common.c 147 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/types.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/init.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/delay.h>
  39. #include <linux/skbuff.h>
  40. #include <net/mac80211.h>
  41. #include "common.h"
  42. const char *
  43. il_get_cmd_string(u8 cmd)
  44. {
  45. switch (cmd) {
  46. IL_CMD(N_ALIVE);
  47. IL_CMD(N_ERROR);
  48. IL_CMD(C_RXON);
  49. IL_CMD(C_RXON_ASSOC);
  50. IL_CMD(C_QOS_PARAM);
  51. IL_CMD(C_RXON_TIMING);
  52. IL_CMD(C_ADD_STA);
  53. IL_CMD(C_REM_STA);
  54. IL_CMD(C_WEPKEY);
  55. IL_CMD(N_3945_RX);
  56. IL_CMD(C_TX);
  57. IL_CMD(C_RATE_SCALE);
  58. IL_CMD(C_LEDS);
  59. IL_CMD(C_TX_LINK_QUALITY_CMD);
  60. IL_CMD(C_CHANNEL_SWITCH);
  61. IL_CMD(N_CHANNEL_SWITCH);
  62. IL_CMD(C_SPECTRUM_MEASUREMENT);
  63. IL_CMD(N_SPECTRUM_MEASUREMENT);
  64. IL_CMD(C_POWER_TBL);
  65. IL_CMD(N_PM_SLEEP);
  66. IL_CMD(N_PM_DEBUG_STATS);
  67. IL_CMD(C_SCAN);
  68. IL_CMD(C_SCAN_ABORT);
  69. IL_CMD(N_SCAN_START);
  70. IL_CMD(N_SCAN_RESULTS);
  71. IL_CMD(N_SCAN_COMPLETE);
  72. IL_CMD(N_BEACON);
  73. IL_CMD(C_TX_BEACON);
  74. IL_CMD(C_TX_PWR_TBL);
  75. IL_CMD(C_BT_CONFIG);
  76. IL_CMD(C_STATS);
  77. IL_CMD(N_STATS);
  78. IL_CMD(N_CARD_STATE);
  79. IL_CMD(N_MISSED_BEACONS);
  80. IL_CMD(C_CT_KILL_CONFIG);
  81. IL_CMD(C_SENSITIVITY);
  82. IL_CMD(C_PHY_CALIBRATION);
  83. IL_CMD(N_RX_PHY);
  84. IL_CMD(N_RX_MPDU);
  85. IL_CMD(N_RX);
  86. IL_CMD(N_COMPRESSED_BA);
  87. default:
  88. return "UNKNOWN";
  89. }
  90. }
  91. EXPORT_SYMBOL(il_get_cmd_string);
  92. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  93. static void
  94. il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
  95. struct il_rx_pkt *pkt)
  96. {
  97. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  98. IL_ERR("Bad return from %s (0x%08X)\n",
  99. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  100. return;
  101. }
  102. #ifdef CONFIG_IWLEGACY_DEBUG
  103. switch (cmd->hdr.cmd) {
  104. case C_TX_LINK_QUALITY_CMD:
  105. case C_SENSITIVITY:
  106. D_HC_DUMP("back from %s (0x%08X)\n",
  107. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  108. break;
  109. default:
  110. D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
  111. pkt->hdr.flags);
  112. }
  113. #endif
  114. }
  115. static int
  116. il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
  117. {
  118. int ret;
  119. BUG_ON(!(cmd->flags & CMD_ASYNC));
  120. /* An asynchronous command can not expect an SKB to be set. */
  121. BUG_ON(cmd->flags & CMD_WANT_SKB);
  122. /* Assign a generic callback if one is not provided */
  123. if (!cmd->callback)
  124. cmd->callback = il_generic_cmd_callback;
  125. if (test_bit(S_EXIT_PENDING, &il->status))
  126. return -EBUSY;
  127. ret = il_enqueue_hcmd(il, cmd);
  128. if (ret < 0) {
  129. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  130. il_get_cmd_string(cmd->id), ret);
  131. return ret;
  132. }
  133. return 0;
  134. }
  135. int
  136. il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
  137. {
  138. int cmd_idx;
  139. int ret;
  140. lockdep_assert_held(&il->mutex);
  141. BUG_ON(cmd->flags & CMD_ASYNC);
  142. /* A synchronous command can not have a callback set. */
  143. BUG_ON(cmd->callback);
  144. D_INFO("Attempting to send sync command %s\n",
  145. il_get_cmd_string(cmd->id));
  146. set_bit(S_HCMD_ACTIVE, &il->status);
  147. D_INFO("Setting HCMD_ACTIVE for command %s\n",
  148. il_get_cmd_string(cmd->id));
  149. cmd_idx = il_enqueue_hcmd(il, cmd);
  150. if (cmd_idx < 0) {
  151. ret = cmd_idx;
  152. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  153. il_get_cmd_string(cmd->id), ret);
  154. goto out;
  155. }
  156. ret = wait_event_timeout(il->wait_command_queue,
  157. !test_bit(S_HCMD_ACTIVE, &il->status),
  158. HOST_COMPLETE_TIMEOUT);
  159. if (!ret) {
  160. if (test_bit(S_HCMD_ACTIVE, &il->status)) {
  161. IL_ERR("Error sending %s: time out after %dms.\n",
  162. il_get_cmd_string(cmd->id),
  163. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  164. clear_bit(S_HCMD_ACTIVE, &il->status);
  165. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  166. il_get_cmd_string(cmd->id));
  167. ret = -ETIMEDOUT;
  168. goto cancel;
  169. }
  170. }
  171. if (test_bit(S_RF_KILL_HW, &il->status)) {
  172. IL_ERR("Command %s aborted: RF KILL Switch\n",
  173. il_get_cmd_string(cmd->id));
  174. ret = -ECANCELED;
  175. goto fail;
  176. }
  177. if (test_bit(S_FW_ERROR, &il->status)) {
  178. IL_ERR("Command %s failed: FW Error\n",
  179. il_get_cmd_string(cmd->id));
  180. ret = -EIO;
  181. goto fail;
  182. }
  183. if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
  184. IL_ERR("Error: Response NULL in '%s'\n",
  185. il_get_cmd_string(cmd->id));
  186. ret = -EIO;
  187. goto cancel;
  188. }
  189. ret = 0;
  190. goto out;
  191. cancel:
  192. if (cmd->flags & CMD_WANT_SKB) {
  193. /*
  194. * Cancel the CMD_WANT_SKB flag for the cmd in the
  195. * TX cmd queue. Otherwise in case the cmd comes
  196. * in later, it will possibly set an invalid
  197. * address (cmd->meta.source).
  198. */
  199. il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
  200. }
  201. fail:
  202. if (cmd->reply_page) {
  203. il_free_pages(il, cmd->reply_page);
  204. cmd->reply_page = 0;
  205. }
  206. out:
  207. return ret;
  208. }
  209. EXPORT_SYMBOL(il_send_cmd_sync);
  210. int
  211. il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
  212. {
  213. if (cmd->flags & CMD_ASYNC)
  214. return il_send_cmd_async(il, cmd);
  215. return il_send_cmd_sync(il, cmd);
  216. }
  217. EXPORT_SYMBOL(il_send_cmd);
  218. int
  219. il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
  220. {
  221. struct il_host_cmd cmd = {
  222. .id = id,
  223. .len = len,
  224. .data = data,
  225. };
  226. return il_send_cmd_sync(il, &cmd);
  227. }
  228. EXPORT_SYMBOL(il_send_cmd_pdu);
  229. int
  230. il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
  231. void (*callback) (struct il_priv *il,
  232. struct il_device_cmd *cmd,
  233. struct il_rx_pkt *pkt))
  234. {
  235. struct il_host_cmd cmd = {
  236. .id = id,
  237. .len = len,
  238. .data = data,
  239. };
  240. cmd.flags |= CMD_ASYNC;
  241. cmd.callback = callback;
  242. return il_send_cmd_async(il, &cmd);
  243. }
  244. EXPORT_SYMBOL(il_send_cmd_pdu_async);
  245. /* default: IL_LED_BLINK(0) using blinking idx table */
  246. static int led_mode;
  247. module_param(led_mode, int, S_IRUGO);
  248. MODULE_PARM_DESC(led_mode,
  249. "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
  250. /* Throughput OFF time(ms) ON time (ms)
  251. * >300 25 25
  252. * >200 to 300 40 40
  253. * >100 to 200 55 55
  254. * >70 to 100 65 65
  255. * >50 to 70 75 75
  256. * >20 to 50 85 85
  257. * >10 to 20 95 95
  258. * >5 to 10 110 110
  259. * >1 to 5 130 130
  260. * >0 to 1 167 167
  261. * <=0 SOLID ON
  262. */
  263. static const struct ieee80211_tpt_blink il_blink[] = {
  264. {.throughput = 0, .blink_time = 334},
  265. {.throughput = 1 * 1024 - 1, .blink_time = 260},
  266. {.throughput = 5 * 1024 - 1, .blink_time = 220},
  267. {.throughput = 10 * 1024 - 1, .blink_time = 190},
  268. {.throughput = 20 * 1024 - 1, .blink_time = 170},
  269. {.throughput = 50 * 1024 - 1, .blink_time = 150},
  270. {.throughput = 70 * 1024 - 1, .blink_time = 130},
  271. {.throughput = 100 * 1024 - 1, .blink_time = 110},
  272. {.throughput = 200 * 1024 - 1, .blink_time = 80},
  273. {.throughput = 300 * 1024 - 1, .blink_time = 50},
  274. };
  275. /*
  276. * Adjust led blink rate to compensate on a MAC Clock difference on every HW
  277. * Led blink rate analysis showed an average deviation of 0% on 3945,
  278. * 5% on 4965 HW.
  279. * Need to compensate on the led on/off time per HW according to the deviation
  280. * to achieve the desired led frequency
  281. * The calculation is: (100-averageDeviation)/100 * blinkTime
  282. * For code efficiency the calculation will be:
  283. * compensation = (100 - averageDeviation) * 64 / 100
  284. * NewBlinkTime = (compensation * BlinkTime) / 64
  285. */
  286. static inline u8
  287. il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
  288. {
  289. if (!compensation) {
  290. IL_ERR("undefined blink compensation: "
  291. "use pre-defined blinking time\n");
  292. return time;
  293. }
  294. return (u8) ((time * compensation) >> 6);
  295. }
  296. /* Set led pattern command */
  297. static int
  298. il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
  299. {
  300. struct il_led_cmd led_cmd = {
  301. .id = IL_LED_LINK,
  302. .interval = IL_DEF_LED_INTRVL
  303. };
  304. int ret;
  305. if (!test_bit(S_READY, &il->status))
  306. return -EBUSY;
  307. if (il->blink_on == on && il->blink_off == off)
  308. return 0;
  309. if (off == 0) {
  310. /* led is SOLID_ON */
  311. on = IL_LED_SOLID;
  312. }
  313. D_LED("Led blink time compensation=%u\n",
  314. il->cfg->base_params->led_compensation);
  315. led_cmd.on =
  316. il_blink_compensation(il, on,
  317. il->cfg->base_params->led_compensation);
  318. led_cmd.off =
  319. il_blink_compensation(il, off,
  320. il->cfg->base_params->led_compensation);
  321. ret = il->cfg->ops->led->cmd(il, &led_cmd);
  322. if (!ret) {
  323. il->blink_on = on;
  324. il->blink_off = off;
  325. }
  326. return ret;
  327. }
  328. static void
  329. il_led_brightness_set(struct led_classdev *led_cdev,
  330. enum led_brightness brightness)
  331. {
  332. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  333. unsigned long on = 0;
  334. if (brightness > 0)
  335. on = IL_LED_SOLID;
  336. il_led_cmd(il, on, 0);
  337. }
  338. static int
  339. il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
  340. unsigned long *delay_off)
  341. {
  342. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  343. return il_led_cmd(il, *delay_on, *delay_off);
  344. }
  345. void
  346. il_leds_init(struct il_priv *il)
  347. {
  348. int mode = led_mode;
  349. int ret;
  350. if (mode == IL_LED_DEFAULT)
  351. mode = il->cfg->led_mode;
  352. il->led.name =
  353. kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
  354. il->led.brightness_set = il_led_brightness_set;
  355. il->led.blink_set = il_led_blink_set;
  356. il->led.max_brightness = 1;
  357. switch (mode) {
  358. case IL_LED_DEFAULT:
  359. WARN_ON(1);
  360. break;
  361. case IL_LED_BLINK:
  362. il->led.default_trigger =
  363. ieee80211_create_tpt_led_trigger(il->hw,
  364. IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
  365. il_blink,
  366. ARRAY_SIZE(il_blink));
  367. break;
  368. case IL_LED_RF_STATE:
  369. il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
  370. break;
  371. }
  372. ret = led_classdev_register(&il->pci_dev->dev, &il->led);
  373. if (ret) {
  374. kfree(il->led.name);
  375. return;
  376. }
  377. il->led_registered = true;
  378. }
  379. EXPORT_SYMBOL(il_leds_init);
  380. void
  381. il_leds_exit(struct il_priv *il)
  382. {
  383. if (!il->led_registered)
  384. return;
  385. led_classdev_unregister(&il->led);
  386. kfree(il->led.name);
  387. }
  388. EXPORT_SYMBOL(il_leds_exit);
  389. /************************** EEPROM BANDS ****************************
  390. *
  391. * The il_eeprom_band definitions below provide the mapping from the
  392. * EEPROM contents to the specific channel number supported for each
  393. * band.
  394. *
  395. * For example, il_priv->eeprom.band_3_channels[4] from the band_3
  396. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  397. * The specific geography and calibration information for that channel
  398. * is contained in the eeprom map itself.
  399. *
  400. * During init, we copy the eeprom information and channel map
  401. * information into il->channel_info_24/52 and il->channel_map_24/52
  402. *
  403. * channel_map_24/52 provides the idx in the channel_info array for a
  404. * given channel. We have to have two separate maps as there is channel
  405. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  406. * band_2
  407. *
  408. * A value of 0xff stored in the channel_map indicates that the channel
  409. * is not supported by the hardware at all.
  410. *
  411. * A value of 0xfe in the channel_map indicates that the channel is not
  412. * valid for Tx with the current hardware. This means that
  413. * while the system can tune and receive on a given channel, it may not
  414. * be able to associate or transmit any frames on that
  415. * channel. There is no corresponding channel information for that
  416. * entry.
  417. *
  418. *********************************************************************/
  419. /* 2.4 GHz */
  420. const u8 il_eeprom_band_1[14] = {
  421. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  422. };
  423. /* 5.2 GHz bands */
  424. static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
  425. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  426. };
  427. static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
  428. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  429. };
  430. static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
  431. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  432. };
  433. static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
  434. 145, 149, 153, 157, 161, 165
  435. };
  436. static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
  437. 1, 2, 3, 4, 5, 6, 7
  438. };
  439. static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
  440. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  441. };
  442. /******************************************************************************
  443. *
  444. * EEPROM related functions
  445. *
  446. ******************************************************************************/
  447. static int
  448. il_eeprom_verify_signature(struct il_priv *il)
  449. {
  450. u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
  451. int ret = 0;
  452. D_EEPROM("EEPROM signature=0x%08x\n", gp);
  453. switch (gp) {
  454. case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
  455. case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
  456. break;
  457. default:
  458. IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
  459. ret = -ENOENT;
  460. break;
  461. }
  462. return ret;
  463. }
  464. const u8 *
  465. il_eeprom_query_addr(const struct il_priv *il, size_t offset)
  466. {
  467. BUG_ON(offset >= il->cfg->base_params->eeprom_size);
  468. return &il->eeprom[offset];
  469. }
  470. EXPORT_SYMBOL(il_eeprom_query_addr);
  471. u16
  472. il_eeprom_query16(const struct il_priv *il, size_t offset)
  473. {
  474. if (!il->eeprom)
  475. return 0;
  476. return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
  477. }
  478. EXPORT_SYMBOL(il_eeprom_query16);
  479. /**
  480. * il_eeprom_init - read EEPROM contents
  481. *
  482. * Load the EEPROM contents from adapter into il->eeprom
  483. *
  484. * NOTE: This routine uses the non-debug IO access functions.
  485. */
  486. int
  487. il_eeprom_init(struct il_priv *il)
  488. {
  489. __le16 *e;
  490. u32 gp = _il_rd(il, CSR_EEPROM_GP);
  491. int sz;
  492. int ret;
  493. u16 addr;
  494. /* allocate eeprom */
  495. sz = il->cfg->base_params->eeprom_size;
  496. D_EEPROM("NVM size = %d\n", sz);
  497. il->eeprom = kzalloc(sz, GFP_KERNEL);
  498. if (!il->eeprom) {
  499. ret = -ENOMEM;
  500. goto alloc_err;
  501. }
  502. e = (__le16 *) il->eeprom;
  503. il->cfg->ops->lib->apm_ops.init(il);
  504. ret = il_eeprom_verify_signature(il);
  505. if (ret < 0) {
  506. IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  507. ret = -ENOENT;
  508. goto err;
  509. }
  510. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  511. ret = il->cfg->ops->lib->eeprom_ops.acquire_semaphore(il);
  512. if (ret < 0) {
  513. IL_ERR("Failed to acquire EEPROM semaphore.\n");
  514. ret = -ENOENT;
  515. goto err;
  516. }
  517. /* eeprom is an array of 16bit values */
  518. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  519. u32 r;
  520. _il_wr(il, CSR_EEPROM_REG,
  521. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  522. ret =
  523. _il_poll_bit(il, CSR_EEPROM_REG,
  524. CSR_EEPROM_REG_READ_VALID_MSK,
  525. CSR_EEPROM_REG_READ_VALID_MSK,
  526. IL_EEPROM_ACCESS_TIMEOUT);
  527. if (ret < 0) {
  528. IL_ERR("Time out reading EEPROM[%d]\n", addr);
  529. goto done;
  530. }
  531. r = _il_rd(il, CSR_EEPROM_REG);
  532. e[addr / 2] = cpu_to_le16(r >> 16);
  533. }
  534. D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
  535. il_eeprom_query16(il, EEPROM_VERSION));
  536. ret = 0;
  537. done:
  538. il->cfg->ops->lib->eeprom_ops.release_semaphore(il);
  539. err:
  540. if (ret)
  541. il_eeprom_free(il);
  542. /* Reset chip to save power until we load uCode during "up". */
  543. il_apm_stop(il);
  544. alloc_err:
  545. return ret;
  546. }
  547. EXPORT_SYMBOL(il_eeprom_init);
  548. void
  549. il_eeprom_free(struct il_priv *il)
  550. {
  551. kfree(il->eeprom);
  552. il->eeprom = NULL;
  553. }
  554. EXPORT_SYMBOL(il_eeprom_free);
  555. static void
  556. il_init_band_reference(const struct il_priv *il, int eep_band,
  557. int *eeprom_ch_count,
  558. const struct il_eeprom_channel **eeprom_ch_info,
  559. const u8 **eeprom_ch_idx)
  560. {
  561. u32 offset =
  562. il->cfg->ops->lib->eeprom_ops.regulatory_bands[eep_band - 1];
  563. switch (eep_band) {
  564. case 1: /* 2.4GHz band */
  565. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
  566. *eeprom_ch_info =
  567. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  568. offset);
  569. *eeprom_ch_idx = il_eeprom_band_1;
  570. break;
  571. case 2: /* 4.9GHz band */
  572. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
  573. *eeprom_ch_info =
  574. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  575. offset);
  576. *eeprom_ch_idx = il_eeprom_band_2;
  577. break;
  578. case 3: /* 5.2GHz band */
  579. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
  580. *eeprom_ch_info =
  581. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  582. offset);
  583. *eeprom_ch_idx = il_eeprom_band_3;
  584. break;
  585. case 4: /* 5.5GHz band */
  586. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
  587. *eeprom_ch_info =
  588. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  589. offset);
  590. *eeprom_ch_idx = il_eeprom_band_4;
  591. break;
  592. case 5: /* 5.7GHz band */
  593. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
  594. *eeprom_ch_info =
  595. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  596. offset);
  597. *eeprom_ch_idx = il_eeprom_band_5;
  598. break;
  599. case 6: /* 2.4GHz ht40 channels */
  600. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
  601. *eeprom_ch_info =
  602. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  603. offset);
  604. *eeprom_ch_idx = il_eeprom_band_6;
  605. break;
  606. case 7: /* 5 GHz ht40 channels */
  607. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
  608. *eeprom_ch_info =
  609. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  610. offset);
  611. *eeprom_ch_idx = il_eeprom_band_7;
  612. break;
  613. default:
  614. BUG();
  615. }
  616. }
  617. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  618. ? # x " " : "")
  619. /**
  620. * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
  621. *
  622. * Does not set up a command, or touch hardware.
  623. */
  624. static int
  625. il_mod_ht40_chan_info(struct il_priv *il, enum ieee80211_band band, u16 channel,
  626. const struct il_eeprom_channel *eeprom_ch,
  627. u8 clear_ht40_extension_channel)
  628. {
  629. struct il_channel_info *ch_info;
  630. ch_info =
  631. (struct il_channel_info *)il_get_channel_info(il, band, channel);
  632. if (!il_is_channel_valid(ch_info))
  633. return -1;
  634. D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  635. " Ad-Hoc %ssupported\n", ch_info->channel,
  636. il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
  637. CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
  638. CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
  639. CHECK_AND_PRINT(DFS), eeprom_ch->flags,
  640. eeprom_ch->max_power_avg,
  641. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
  642. !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
  643. ch_info->ht40_eeprom = *eeprom_ch;
  644. ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
  645. ch_info->ht40_flags = eeprom_ch->flags;
  646. if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
  647. ch_info->ht40_extension_channel &=
  648. ~clear_ht40_extension_channel;
  649. return 0;
  650. }
  651. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  652. ? # x " " : "")
  653. /**
  654. * il_init_channel_map - Set up driver's info for all possible channels
  655. */
  656. int
  657. il_init_channel_map(struct il_priv *il)
  658. {
  659. int eeprom_ch_count = 0;
  660. const u8 *eeprom_ch_idx = NULL;
  661. const struct il_eeprom_channel *eeprom_ch_info = NULL;
  662. int band, ch;
  663. struct il_channel_info *ch_info;
  664. if (il->channel_count) {
  665. D_EEPROM("Channel map already initialized.\n");
  666. return 0;
  667. }
  668. D_EEPROM("Initializing regulatory info from EEPROM\n");
  669. il->channel_count =
  670. ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
  671. ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
  672. ARRAY_SIZE(il_eeprom_band_5);
  673. D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
  674. il->channel_info =
  675. kzalloc(sizeof(struct il_channel_info) * il->channel_count,
  676. GFP_KERNEL);
  677. if (!il->channel_info) {
  678. IL_ERR("Could not allocate channel_info\n");
  679. il->channel_count = 0;
  680. return -ENOMEM;
  681. }
  682. ch_info = il->channel_info;
  683. /* Loop through the 5 EEPROM bands adding them in order to the
  684. * channel map we maintain (that contains additional information than
  685. * what just in the EEPROM) */
  686. for (band = 1; band <= 5; band++) {
  687. il_init_band_reference(il, band, &eeprom_ch_count,
  688. &eeprom_ch_info, &eeprom_ch_idx);
  689. /* Loop through each band adding each of the channels */
  690. for (ch = 0; ch < eeprom_ch_count; ch++) {
  691. ch_info->channel = eeprom_ch_idx[ch];
  692. ch_info->band =
  693. (band ==
  694. 1) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  695. /* permanently store EEPROM's channel regulatory flags
  696. * and max power in channel info database. */
  697. ch_info->eeprom = eeprom_ch_info[ch];
  698. /* Copy the run-time flags so they are there even on
  699. * invalid channels */
  700. ch_info->flags = eeprom_ch_info[ch].flags;
  701. /* First write that ht40 is not enabled, and then enable
  702. * one by one */
  703. ch_info->ht40_extension_channel =
  704. IEEE80211_CHAN_NO_HT40;
  705. if (!(il_is_channel_valid(ch_info))) {
  706. D_EEPROM("Ch. %d Flags %x [%sGHz] - "
  707. "No traffic\n", ch_info->channel,
  708. ch_info->flags,
  709. il_is_channel_a_band(ch_info) ? "5.2" :
  710. "2.4");
  711. ch_info++;
  712. continue;
  713. }
  714. /* Initialize regulatory-based run-time data */
  715. ch_info->max_power_avg = ch_info->curr_txpow =
  716. eeprom_ch_info[ch].max_power_avg;
  717. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  718. ch_info->min_power = 0;
  719. D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
  720. " Ad-Hoc %ssupported\n", ch_info->channel,
  721. il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
  722. CHECK_AND_PRINT_I(VALID),
  723. CHECK_AND_PRINT_I(IBSS),
  724. CHECK_AND_PRINT_I(ACTIVE),
  725. CHECK_AND_PRINT_I(RADAR),
  726. CHECK_AND_PRINT_I(WIDE),
  727. CHECK_AND_PRINT_I(DFS),
  728. eeprom_ch_info[ch].flags,
  729. eeprom_ch_info[ch].max_power_avg,
  730. ((eeprom_ch_info[ch].
  731. flags & EEPROM_CHANNEL_IBSS) &&
  732. !(eeprom_ch_info[ch].
  733. flags & EEPROM_CHANNEL_RADAR)) ? "" :
  734. "not ");
  735. ch_info++;
  736. }
  737. }
  738. /* Check if we do have HT40 channels */
  739. if (il->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
  740. EEPROM_REGULATORY_BAND_NO_HT40 &&
  741. il->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
  742. EEPROM_REGULATORY_BAND_NO_HT40)
  743. return 0;
  744. /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
  745. for (band = 6; band <= 7; band++) {
  746. enum ieee80211_band ieeeband;
  747. il_init_band_reference(il, band, &eeprom_ch_count,
  748. &eeprom_ch_info, &eeprom_ch_idx);
  749. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  750. ieeeband =
  751. (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  752. /* Loop through each band adding each of the channels */
  753. for (ch = 0; ch < eeprom_ch_count; ch++) {
  754. /* Set up driver's info for lower half */
  755. il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
  756. &eeprom_ch_info[ch],
  757. IEEE80211_CHAN_NO_HT40PLUS);
  758. /* Set up driver's info for upper half */
  759. il_mod_ht40_chan_info(il, ieeeband,
  760. eeprom_ch_idx[ch] + 4,
  761. &eeprom_ch_info[ch],
  762. IEEE80211_CHAN_NO_HT40MINUS);
  763. }
  764. }
  765. return 0;
  766. }
  767. EXPORT_SYMBOL(il_init_channel_map);
  768. /*
  769. * il_free_channel_map - undo allocations in il_init_channel_map
  770. */
  771. void
  772. il_free_channel_map(struct il_priv *il)
  773. {
  774. kfree(il->channel_info);
  775. il->channel_count = 0;
  776. }
  777. EXPORT_SYMBOL(il_free_channel_map);
  778. /**
  779. * il_get_channel_info - Find driver's ilate channel info
  780. *
  781. * Based on band and channel number.
  782. */
  783. const struct il_channel_info *
  784. il_get_channel_info(const struct il_priv *il, enum ieee80211_band band,
  785. u16 channel)
  786. {
  787. int i;
  788. switch (band) {
  789. case IEEE80211_BAND_5GHZ:
  790. for (i = 14; i < il->channel_count; i++) {
  791. if (il->channel_info[i].channel == channel)
  792. return &il->channel_info[i];
  793. }
  794. break;
  795. case IEEE80211_BAND_2GHZ:
  796. if (channel >= 1 && channel <= 14)
  797. return &il->channel_info[channel - 1];
  798. break;
  799. default:
  800. BUG();
  801. }
  802. return NULL;
  803. }
  804. EXPORT_SYMBOL(il_get_channel_info);
  805. /*
  806. * Setting power level allows the card to go to sleep when not busy.
  807. *
  808. * We calculate a sleep command based on the required latency, which
  809. * we get from mac80211. In order to handle thermal throttling, we can
  810. * also use pre-defined power levels.
  811. */
  812. /*
  813. * This defines the old power levels. They are still used by default
  814. * (level 1) and for thermal throttle (levels 3 through 5)
  815. */
  816. struct il_power_vec_entry {
  817. struct il_powertable_cmd cmd;
  818. u8 no_dtim; /* number of skip dtim */
  819. };
  820. static void
  821. il_power_sleep_cam_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
  822. {
  823. memset(cmd, 0, sizeof(*cmd));
  824. if (il->power_data.pci_pm)
  825. cmd->flags |= IL_POWER_PCI_PM_MSK;
  826. D_POWER("Sleep command for CAM\n");
  827. }
  828. static int
  829. il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
  830. {
  831. D_POWER("Sending power/sleep command\n");
  832. D_POWER("Flags value = 0x%08X\n", cmd->flags);
  833. D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  834. D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  835. D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  836. le32_to_cpu(cmd->sleep_interval[0]),
  837. le32_to_cpu(cmd->sleep_interval[1]),
  838. le32_to_cpu(cmd->sleep_interval[2]),
  839. le32_to_cpu(cmd->sleep_interval[3]),
  840. le32_to_cpu(cmd->sleep_interval[4]));
  841. return il_send_cmd_pdu(il, C_POWER_TBL,
  842. sizeof(struct il_powertable_cmd), cmd);
  843. }
  844. int
  845. il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
  846. {
  847. int ret;
  848. bool update_chains;
  849. lockdep_assert_held(&il->mutex);
  850. /* Don't update the RX chain when chain noise calibration is running */
  851. update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
  852. il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
  853. if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  854. return 0;
  855. if (!il_is_ready_rf(il))
  856. return -EIO;
  857. /* scan complete use sleep_power_next, need to be updated */
  858. memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  859. if (test_bit(S_SCANNING, &il->status) && !force) {
  860. D_INFO("Defer power set mode while scanning\n");
  861. return 0;
  862. }
  863. if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  864. set_bit(S_POWER_PMI, &il->status);
  865. ret = il_set_power(il, cmd);
  866. if (!ret) {
  867. if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  868. clear_bit(S_POWER_PMI, &il->status);
  869. if (il->cfg->ops->lib->update_chain_flags && update_chains)
  870. il->cfg->ops->lib->update_chain_flags(il);
  871. else if (il->cfg->ops->lib->update_chain_flags)
  872. D_POWER("Cannot update the power, chain noise "
  873. "calibration running: %d\n",
  874. il->chain_noise_data.state);
  875. memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
  876. } else
  877. IL_ERR("set power fail, ret = %d", ret);
  878. return ret;
  879. }
  880. int
  881. il_power_update_mode(struct il_priv *il, bool force)
  882. {
  883. struct il_powertable_cmd cmd;
  884. il_power_sleep_cam_cmd(il, &cmd);
  885. return il_power_set_mode(il, &cmd, force);
  886. }
  887. EXPORT_SYMBOL(il_power_update_mode);
  888. /* initialize to default */
  889. void
  890. il_power_initialize(struct il_priv *il)
  891. {
  892. u16 lctl = il_pcie_link_ctl(il);
  893. il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  894. il->power_data.debug_sleep_level_override = -1;
  895. memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
  896. }
  897. EXPORT_SYMBOL(il_power_initialize);
  898. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  899. * sending probe req. This should be set long enough to hear probe responses
  900. * from more than one AP. */
  901. #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  902. #define IL_ACTIVE_DWELL_TIME_52 (20)
  903. #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  904. #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  905. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  906. * Must be set longer than active dwell time.
  907. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  908. #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  909. #define IL_PASSIVE_DWELL_TIME_52 (10)
  910. #define IL_PASSIVE_DWELL_BASE (100)
  911. #define IL_CHANNEL_TUNE_TIME 5
  912. static int
  913. il_send_scan_abort(struct il_priv *il)
  914. {
  915. int ret;
  916. struct il_rx_pkt *pkt;
  917. struct il_host_cmd cmd = {
  918. .id = C_SCAN_ABORT,
  919. .flags = CMD_WANT_SKB,
  920. };
  921. /* Exit instantly with error when device is not ready
  922. * to receive scan abort command or it does not perform
  923. * hardware scan currently */
  924. if (!test_bit(S_READY, &il->status) ||
  925. !test_bit(S_GEO_CONFIGURED, &il->status) ||
  926. !test_bit(S_SCAN_HW, &il->status) ||
  927. test_bit(S_FW_ERROR, &il->status) ||
  928. test_bit(S_EXIT_PENDING, &il->status))
  929. return -EIO;
  930. ret = il_send_cmd_sync(il, &cmd);
  931. if (ret)
  932. return ret;
  933. pkt = (struct il_rx_pkt *)cmd.reply_page;
  934. if (pkt->u.status != CAN_ABORT_STATUS) {
  935. /* The scan abort will return 1 for success or
  936. * 2 for "failure". A failure condition can be
  937. * due to simply not being in an active scan which
  938. * can occur if we send the scan abort before we
  939. * the microcode has notified us that a scan is
  940. * completed. */
  941. D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
  942. ret = -EIO;
  943. }
  944. il_free_pages(il, cmd.reply_page);
  945. return ret;
  946. }
  947. static void
  948. il_complete_scan(struct il_priv *il, bool aborted)
  949. {
  950. /* check if scan was requested from mac80211 */
  951. if (il->scan_request) {
  952. D_SCAN("Complete scan in mac80211\n");
  953. ieee80211_scan_completed(il->hw, aborted);
  954. }
  955. il->scan_vif = NULL;
  956. il->scan_request = NULL;
  957. }
  958. void
  959. il_force_scan_end(struct il_priv *il)
  960. {
  961. lockdep_assert_held(&il->mutex);
  962. if (!test_bit(S_SCANNING, &il->status)) {
  963. D_SCAN("Forcing scan end while not scanning\n");
  964. return;
  965. }
  966. D_SCAN("Forcing scan end\n");
  967. clear_bit(S_SCANNING, &il->status);
  968. clear_bit(S_SCAN_HW, &il->status);
  969. clear_bit(S_SCAN_ABORTING, &il->status);
  970. il_complete_scan(il, true);
  971. }
  972. static void
  973. il_do_scan_abort(struct il_priv *il)
  974. {
  975. int ret;
  976. lockdep_assert_held(&il->mutex);
  977. if (!test_bit(S_SCANNING, &il->status)) {
  978. D_SCAN("Not performing scan to abort\n");
  979. return;
  980. }
  981. if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
  982. D_SCAN("Scan abort in progress\n");
  983. return;
  984. }
  985. ret = il_send_scan_abort(il);
  986. if (ret) {
  987. D_SCAN("Send scan abort failed %d\n", ret);
  988. il_force_scan_end(il);
  989. } else
  990. D_SCAN("Successfully send scan abort\n");
  991. }
  992. /**
  993. * il_scan_cancel - Cancel any currently executing HW scan
  994. */
  995. int
  996. il_scan_cancel(struct il_priv *il)
  997. {
  998. D_SCAN("Queuing abort scan\n");
  999. queue_work(il->workqueue, &il->abort_scan);
  1000. return 0;
  1001. }
  1002. EXPORT_SYMBOL(il_scan_cancel);
  1003. /**
  1004. * il_scan_cancel_timeout - Cancel any currently executing HW scan
  1005. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1006. *
  1007. */
  1008. int
  1009. il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
  1010. {
  1011. unsigned long timeout = jiffies + msecs_to_jiffies(ms);
  1012. lockdep_assert_held(&il->mutex);
  1013. D_SCAN("Scan cancel timeout\n");
  1014. il_do_scan_abort(il);
  1015. while (time_before_eq(jiffies, timeout)) {
  1016. if (!test_bit(S_SCAN_HW, &il->status))
  1017. break;
  1018. msleep(20);
  1019. }
  1020. return test_bit(S_SCAN_HW, &il->status);
  1021. }
  1022. EXPORT_SYMBOL(il_scan_cancel_timeout);
  1023. /* Service response to C_SCAN (0x80) */
  1024. static void
  1025. il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
  1026. {
  1027. #ifdef CONFIG_IWLEGACY_DEBUG
  1028. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1029. struct il_scanreq_notification *notif =
  1030. (struct il_scanreq_notification *)pkt->u.raw;
  1031. D_SCAN("Scan request status = 0x%x\n", notif->status);
  1032. #endif
  1033. }
  1034. /* Service N_SCAN_START (0x82) */
  1035. static void
  1036. il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
  1037. {
  1038. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1039. struct il_scanstart_notification *notif =
  1040. (struct il_scanstart_notification *)pkt->u.raw;
  1041. il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1042. D_SCAN("Scan start: " "%d [802.11%s] "
  1043. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
  1044. notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
  1045. le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
  1046. }
  1047. /* Service N_SCAN_RESULTS (0x83) */
  1048. static void
  1049. il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
  1050. {
  1051. #ifdef CONFIG_IWLEGACY_DEBUG
  1052. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1053. struct il_scanresults_notification *notif =
  1054. (struct il_scanresults_notification *)pkt->u.raw;
  1055. D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
  1056. "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
  1057. le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
  1058. le32_to_cpu(notif->stats[0]),
  1059. le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
  1060. #endif
  1061. }
  1062. /* Service N_SCAN_COMPLETE (0x84) */
  1063. static void
  1064. il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
  1065. {
  1066. #ifdef CONFIG_IWLEGACY_DEBUG
  1067. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1068. struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1069. #endif
  1070. D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1071. scan_notif->scanned_channels, scan_notif->tsf_low,
  1072. scan_notif->tsf_high, scan_notif->status);
  1073. /* The HW is no longer scanning */
  1074. clear_bit(S_SCAN_HW, &il->status);
  1075. D_SCAN("Scan on %sGHz took %dms\n",
  1076. (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
  1077. jiffies_to_msecs(jiffies - il->scan_start));
  1078. queue_work(il->workqueue, &il->scan_completed);
  1079. }
  1080. void
  1081. il_setup_rx_scan_handlers(struct il_priv *il)
  1082. {
  1083. /* scan handlers */
  1084. il->handlers[C_SCAN] = il_hdl_scan;
  1085. il->handlers[N_SCAN_START] = il_hdl_scan_start;
  1086. il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
  1087. il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
  1088. }
  1089. EXPORT_SYMBOL(il_setup_rx_scan_handlers);
  1090. inline u16
  1091. il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
  1092. u8 n_probes)
  1093. {
  1094. if (band == IEEE80211_BAND_5GHZ)
  1095. return IL_ACTIVE_DWELL_TIME_52 +
  1096. IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  1097. else
  1098. return IL_ACTIVE_DWELL_TIME_24 +
  1099. IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  1100. }
  1101. EXPORT_SYMBOL(il_get_active_dwell_time);
  1102. u16
  1103. il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
  1104. struct ieee80211_vif *vif)
  1105. {
  1106. struct il_rxon_context *ctx = &il->ctx;
  1107. u16 value;
  1108. u16 passive =
  1109. (band ==
  1110. IEEE80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
  1111. IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
  1112. IL_PASSIVE_DWELL_TIME_52;
  1113. if (il_is_any_associated(il)) {
  1114. /*
  1115. * If we're associated, we clamp the maximum passive
  1116. * dwell time to be 98% of the smallest beacon interval
  1117. * (minus 2 * channel tune time)
  1118. */
  1119. value = ctx->vif ? ctx->vif->bss_conf.beacon_int : 0;
  1120. if (value > IL_PASSIVE_DWELL_BASE || !value)
  1121. value = IL_PASSIVE_DWELL_BASE;
  1122. value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
  1123. passive = min(value, passive);
  1124. }
  1125. return passive;
  1126. }
  1127. EXPORT_SYMBOL(il_get_passive_dwell_time);
  1128. void
  1129. il_init_scan_params(struct il_priv *il)
  1130. {
  1131. u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
  1132. if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
  1133. il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
  1134. if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
  1135. il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
  1136. }
  1137. EXPORT_SYMBOL(il_init_scan_params);
  1138. static int
  1139. il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
  1140. {
  1141. int ret;
  1142. lockdep_assert_held(&il->mutex);
  1143. if (WARN_ON(!il->cfg->ops->utils->request_scan))
  1144. return -EOPNOTSUPP;
  1145. cancel_delayed_work(&il->scan_check);
  1146. if (!il_is_ready_rf(il)) {
  1147. IL_WARN("Request scan called when driver not ready.\n");
  1148. return -EIO;
  1149. }
  1150. if (test_bit(S_SCAN_HW, &il->status)) {
  1151. D_SCAN("Multiple concurrent scan requests in parallel.\n");
  1152. return -EBUSY;
  1153. }
  1154. if (test_bit(S_SCAN_ABORTING, &il->status)) {
  1155. D_SCAN("Scan request while abort pending.\n");
  1156. return -EBUSY;
  1157. }
  1158. D_SCAN("Starting scan...\n");
  1159. set_bit(S_SCANNING, &il->status);
  1160. il->scan_start = jiffies;
  1161. ret = il->cfg->ops->utils->request_scan(il, vif);
  1162. if (ret) {
  1163. clear_bit(S_SCANNING, &il->status);
  1164. return ret;
  1165. }
  1166. queue_delayed_work(il->workqueue, &il->scan_check,
  1167. IL_SCAN_CHECK_WATCHDOG);
  1168. return 0;
  1169. }
  1170. int
  1171. il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1172. struct cfg80211_scan_request *req)
  1173. {
  1174. struct il_priv *il = hw->priv;
  1175. int ret;
  1176. D_MAC80211("enter\n");
  1177. if (req->n_channels == 0)
  1178. return -EINVAL;
  1179. mutex_lock(&il->mutex);
  1180. if (test_bit(S_SCANNING, &il->status)) {
  1181. D_SCAN("Scan already in progress.\n");
  1182. ret = -EAGAIN;
  1183. goto out_unlock;
  1184. }
  1185. /* mac80211 will only ask for one band at a time */
  1186. il->scan_request = req;
  1187. il->scan_vif = vif;
  1188. il->scan_band = req->channels[0]->band;
  1189. ret = il_scan_initiate(il, vif);
  1190. D_MAC80211("leave\n");
  1191. out_unlock:
  1192. mutex_unlock(&il->mutex);
  1193. return ret;
  1194. }
  1195. EXPORT_SYMBOL(il_mac_hw_scan);
  1196. static void
  1197. il_bg_scan_check(struct work_struct *data)
  1198. {
  1199. struct il_priv *il =
  1200. container_of(data, struct il_priv, scan_check.work);
  1201. D_SCAN("Scan check work\n");
  1202. /* Since we are here firmware does not finish scan and
  1203. * most likely is in bad shape, so we don't bother to
  1204. * send abort command, just force scan complete to mac80211 */
  1205. mutex_lock(&il->mutex);
  1206. il_force_scan_end(il);
  1207. mutex_unlock(&il->mutex);
  1208. }
  1209. /**
  1210. * il_fill_probe_req - fill in all required fields and IE for probe request
  1211. */
  1212. u16
  1213. il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1214. const u8 *ta, const u8 *ies, int ie_len, int left)
  1215. {
  1216. int len = 0;
  1217. u8 *pos = NULL;
  1218. /* Make sure there is enough space for the probe request,
  1219. * two mandatory IEs and the data */
  1220. left -= 24;
  1221. if (left < 0)
  1222. return 0;
  1223. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1224. memcpy(frame->da, il_bcast_addr, ETH_ALEN);
  1225. memcpy(frame->sa, ta, ETH_ALEN);
  1226. memcpy(frame->bssid, il_bcast_addr, ETH_ALEN);
  1227. frame->seq_ctrl = 0;
  1228. len += 24;
  1229. /* ...next IE... */
  1230. pos = &frame->u.probe_req.variable[0];
  1231. /* fill in our indirect SSID IE */
  1232. left -= 2;
  1233. if (left < 0)
  1234. return 0;
  1235. *pos++ = WLAN_EID_SSID;
  1236. *pos++ = 0;
  1237. len += 2;
  1238. if (WARN_ON(left < ie_len))
  1239. return len;
  1240. if (ies && ie_len) {
  1241. memcpy(pos, ies, ie_len);
  1242. len += ie_len;
  1243. }
  1244. return (u16) len;
  1245. }
  1246. EXPORT_SYMBOL(il_fill_probe_req);
  1247. static void
  1248. il_bg_abort_scan(struct work_struct *work)
  1249. {
  1250. struct il_priv *il = container_of(work, struct il_priv, abort_scan);
  1251. D_SCAN("Abort scan work\n");
  1252. /* We keep scan_check work queued in case when firmware will not
  1253. * report back scan completed notification */
  1254. mutex_lock(&il->mutex);
  1255. il_scan_cancel_timeout(il, 200);
  1256. mutex_unlock(&il->mutex);
  1257. }
  1258. static void
  1259. il_bg_scan_completed(struct work_struct *work)
  1260. {
  1261. struct il_priv *il = container_of(work, struct il_priv, scan_completed);
  1262. bool aborted;
  1263. D_SCAN("Completed scan.\n");
  1264. cancel_delayed_work(&il->scan_check);
  1265. mutex_lock(&il->mutex);
  1266. aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
  1267. if (aborted)
  1268. D_SCAN("Aborted scan completed.\n");
  1269. if (!test_and_clear_bit(S_SCANNING, &il->status)) {
  1270. D_SCAN("Scan already completed.\n");
  1271. goto out_settings;
  1272. }
  1273. il_complete_scan(il, aborted);
  1274. out_settings:
  1275. /* Can we still talk to firmware ? */
  1276. if (!il_is_ready_rf(il))
  1277. goto out;
  1278. /*
  1279. * We do not commit power settings while scan is pending,
  1280. * do it now if the settings changed.
  1281. */
  1282. il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
  1283. il_set_tx_power(il, il->tx_power_next, false);
  1284. il->cfg->ops->utils->post_scan(il);
  1285. out:
  1286. mutex_unlock(&il->mutex);
  1287. }
  1288. void
  1289. il_setup_scan_deferred_work(struct il_priv *il)
  1290. {
  1291. INIT_WORK(&il->scan_completed, il_bg_scan_completed);
  1292. INIT_WORK(&il->abort_scan, il_bg_abort_scan);
  1293. INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
  1294. }
  1295. EXPORT_SYMBOL(il_setup_scan_deferred_work);
  1296. void
  1297. il_cancel_scan_deferred_work(struct il_priv *il)
  1298. {
  1299. cancel_work_sync(&il->abort_scan);
  1300. cancel_work_sync(&il->scan_completed);
  1301. if (cancel_delayed_work_sync(&il->scan_check)) {
  1302. mutex_lock(&il->mutex);
  1303. il_force_scan_end(il);
  1304. mutex_unlock(&il->mutex);
  1305. }
  1306. }
  1307. EXPORT_SYMBOL(il_cancel_scan_deferred_work);
  1308. /* il->sta_lock must be held */
  1309. static void
  1310. il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
  1311. {
  1312. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
  1313. IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
  1314. sta_id, il->stations[sta_id].sta.sta.addr);
  1315. if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
  1316. D_ASSOC("STA id %u addr %pM already present"
  1317. " in uCode (according to driver)\n", sta_id,
  1318. il->stations[sta_id].sta.sta.addr);
  1319. } else {
  1320. il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
  1321. D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
  1322. il->stations[sta_id].sta.sta.addr);
  1323. }
  1324. }
  1325. static int
  1326. il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
  1327. struct il_rx_pkt *pkt, bool sync)
  1328. {
  1329. u8 sta_id = addsta->sta.sta_id;
  1330. unsigned long flags;
  1331. int ret = -EIO;
  1332. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1333. IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
  1334. return ret;
  1335. }
  1336. D_INFO("Processing response for adding station %u\n", sta_id);
  1337. spin_lock_irqsave(&il->sta_lock, flags);
  1338. switch (pkt->u.add_sta.status) {
  1339. case ADD_STA_SUCCESS_MSK:
  1340. D_INFO("C_ADD_STA PASSED\n");
  1341. il_sta_ucode_activate(il, sta_id);
  1342. ret = 0;
  1343. break;
  1344. case ADD_STA_NO_ROOM_IN_TBL:
  1345. IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
  1346. break;
  1347. case ADD_STA_NO_BLOCK_ACK_RESOURCE:
  1348. IL_ERR("Adding station %d failed, no block ack resource.\n",
  1349. sta_id);
  1350. break;
  1351. case ADD_STA_MODIFY_NON_EXIST_STA:
  1352. IL_ERR("Attempting to modify non-existing station %d\n",
  1353. sta_id);
  1354. break;
  1355. default:
  1356. D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
  1357. break;
  1358. }
  1359. D_INFO("%s station id %u addr %pM\n",
  1360. il->stations[sta_id].sta.mode ==
  1361. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
  1362. il->stations[sta_id].sta.sta.addr);
  1363. /*
  1364. * XXX: The MAC address in the command buffer is often changed from
  1365. * the original sent to the device. That is, the MAC address
  1366. * written to the command buffer often is not the same MAC address
  1367. * read from the command buffer when the command returns. This
  1368. * issue has not yet been resolved and this debugging is left to
  1369. * observe the problem.
  1370. */
  1371. D_INFO("%s station according to cmd buffer %pM\n",
  1372. il->stations[sta_id].sta.mode ==
  1373. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
  1374. spin_unlock_irqrestore(&il->sta_lock, flags);
  1375. return ret;
  1376. }
  1377. static void
  1378. il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
  1379. struct il_rx_pkt *pkt)
  1380. {
  1381. struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
  1382. il_process_add_sta_resp(il, addsta, pkt, false);
  1383. }
  1384. int
  1385. il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
  1386. {
  1387. struct il_rx_pkt *pkt = NULL;
  1388. int ret = 0;
  1389. u8 data[sizeof(*sta)];
  1390. struct il_host_cmd cmd = {
  1391. .id = C_ADD_STA,
  1392. .flags = flags,
  1393. .data = data,
  1394. };
  1395. u8 sta_id __maybe_unused = sta->sta.sta_id;
  1396. D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
  1397. flags & CMD_ASYNC ? "a" : "");
  1398. if (flags & CMD_ASYNC)
  1399. cmd.callback = il_add_sta_callback;
  1400. else {
  1401. cmd.flags |= CMD_WANT_SKB;
  1402. might_sleep();
  1403. }
  1404. cmd.len = il->cfg->ops->utils->build_addsta_hcmd(sta, data);
  1405. ret = il_send_cmd(il, &cmd);
  1406. if (ret || (flags & CMD_ASYNC))
  1407. return ret;
  1408. if (ret == 0) {
  1409. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1410. ret = il_process_add_sta_resp(il, sta, pkt, true);
  1411. }
  1412. il_free_pages(il, cmd.reply_page);
  1413. return ret;
  1414. }
  1415. EXPORT_SYMBOL(il_send_add_sta);
  1416. static void
  1417. il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta,
  1418. struct il_rxon_context *ctx)
  1419. {
  1420. struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
  1421. __le32 sta_flags;
  1422. u8 mimo_ps_mode;
  1423. if (!sta || !sta_ht_inf->ht_supported)
  1424. goto done;
  1425. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
  1426. D_ASSOC("spatial multiplexing power save mode: %s\n",
  1427. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ? "static" :
  1428. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ? "dynamic" :
  1429. "disabled");
  1430. sta_flags = il->stations[idx].sta.station_flags;
  1431. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  1432. switch (mimo_ps_mode) {
  1433. case WLAN_HT_CAP_SM_PS_STATIC:
  1434. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  1435. break;
  1436. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  1437. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  1438. break;
  1439. case WLAN_HT_CAP_SM_PS_DISABLED:
  1440. break;
  1441. default:
  1442. IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
  1443. break;
  1444. }
  1445. sta_flags |=
  1446. cpu_to_le32((u32) sta_ht_inf->
  1447. ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  1448. sta_flags |=
  1449. cpu_to_le32((u32) sta_ht_inf->
  1450. ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  1451. if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap))
  1452. sta_flags |= STA_FLG_HT40_EN_MSK;
  1453. else
  1454. sta_flags &= ~STA_FLG_HT40_EN_MSK;
  1455. il->stations[idx].sta.station_flags = sta_flags;
  1456. done:
  1457. return;
  1458. }
  1459. /**
  1460. * il_prep_station - Prepare station information for addition
  1461. *
  1462. * should be called with sta_lock held
  1463. */
  1464. u8
  1465. il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
  1466. const u8 *addr, bool is_ap, struct ieee80211_sta *sta)
  1467. {
  1468. struct il_station_entry *station;
  1469. int i;
  1470. u8 sta_id = IL_INVALID_STATION;
  1471. u16 rate;
  1472. if (is_ap)
  1473. sta_id = ctx->ap_sta_id;
  1474. else if (is_broadcast_ether_addr(addr))
  1475. sta_id = ctx->bcast_sta_id;
  1476. else
  1477. for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
  1478. if (!compare_ether_addr
  1479. (il->stations[i].sta.sta.addr, addr)) {
  1480. sta_id = i;
  1481. break;
  1482. }
  1483. if (!il->stations[i].used &&
  1484. sta_id == IL_INVALID_STATION)
  1485. sta_id = i;
  1486. }
  1487. /*
  1488. * These two conditions have the same outcome, but keep them
  1489. * separate
  1490. */
  1491. if (unlikely(sta_id == IL_INVALID_STATION))
  1492. return sta_id;
  1493. /*
  1494. * uCode is not able to deal with multiple requests to add a
  1495. * station. Keep track if one is in progress so that we do not send
  1496. * another.
  1497. */
  1498. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1499. D_INFO("STA %d already in process of being added.\n", sta_id);
  1500. return sta_id;
  1501. }
  1502. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1503. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
  1504. !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) {
  1505. D_ASSOC("STA %d (%pM) already added, not adding again.\n",
  1506. sta_id, addr);
  1507. return sta_id;
  1508. }
  1509. station = &il->stations[sta_id];
  1510. station->used = IL_STA_DRIVER_ACTIVE;
  1511. D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
  1512. il->num_stations++;
  1513. /* Set up the C_ADD_STA command to send to device */
  1514. memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
  1515. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  1516. station->sta.mode = 0;
  1517. station->sta.sta.sta_id = sta_id;
  1518. station->sta.station_flags = ctx->station_flags;
  1519. station->ctxid = ctx->ctxid;
  1520. if (sta) {
  1521. struct il_station_priv_common *sta_priv;
  1522. sta_priv = (void *)sta->drv_priv;
  1523. sta_priv->ctx = ctx;
  1524. }
  1525. /*
  1526. * OK to call unconditionally, since local stations (IBSS BSSID
  1527. * STA and broadcast STA) pass in a NULL sta, and mac80211
  1528. * doesn't allow HT IBSS.
  1529. */
  1530. il_set_ht_add_station(il, sta_id, sta, ctx);
  1531. /* 3945 only */
  1532. rate = (il->band == IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
  1533. /* Turn on both antennas for the station... */
  1534. station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
  1535. return sta_id;
  1536. }
  1537. EXPORT_SYMBOL_GPL(il_prep_station);
  1538. #define STA_WAIT_TIMEOUT (HZ/2)
  1539. /**
  1540. * il_add_station_common -
  1541. */
  1542. int
  1543. il_add_station_common(struct il_priv *il, struct il_rxon_context *ctx,
  1544. const u8 *addr, bool is_ap, struct ieee80211_sta *sta,
  1545. u8 *sta_id_r)
  1546. {
  1547. unsigned long flags_spin;
  1548. int ret = 0;
  1549. u8 sta_id;
  1550. struct il_addsta_cmd sta_cmd;
  1551. *sta_id_r = 0;
  1552. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1553. sta_id = il_prep_station(il, ctx, addr, is_ap, sta);
  1554. if (sta_id == IL_INVALID_STATION) {
  1555. IL_ERR("Unable to prepare station %pM for addition\n", addr);
  1556. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1557. return -EINVAL;
  1558. }
  1559. /*
  1560. * uCode is not able to deal with multiple requests to add a
  1561. * station. Keep track if one is in progress so that we do not send
  1562. * another.
  1563. */
  1564. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1565. D_INFO("STA %d already in process of being added.\n", sta_id);
  1566. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1567. return -EEXIST;
  1568. }
  1569. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1570. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1571. D_ASSOC("STA %d (%pM) already added, not adding again.\n",
  1572. sta_id, addr);
  1573. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1574. return -EEXIST;
  1575. }
  1576. il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
  1577. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  1578. sizeof(struct il_addsta_cmd));
  1579. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1580. /* Add station to device's station table */
  1581. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1582. if (ret) {
  1583. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1584. IL_ERR("Adding station %pM failed.\n",
  1585. il->stations[sta_id].sta.sta.addr);
  1586. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1587. il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1588. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1589. }
  1590. *sta_id_r = sta_id;
  1591. return ret;
  1592. }
  1593. EXPORT_SYMBOL(il_add_station_common);
  1594. /**
  1595. * il_sta_ucode_deactivate - deactivate ucode status for a station
  1596. *
  1597. * il->sta_lock must be held
  1598. */
  1599. static void
  1600. il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
  1601. {
  1602. /* Ucode must be active and driver must be non active */
  1603. if ((il->stations[sta_id].
  1604. used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
  1605. IL_STA_UCODE_ACTIVE)
  1606. IL_ERR("removed non active STA %u\n", sta_id);
  1607. il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
  1608. memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
  1609. D_ASSOC("Removed STA %u\n", sta_id);
  1610. }
  1611. static int
  1612. il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
  1613. bool temporary)
  1614. {
  1615. struct il_rx_pkt *pkt;
  1616. int ret;
  1617. unsigned long flags_spin;
  1618. struct il_rem_sta_cmd rm_sta_cmd;
  1619. struct il_host_cmd cmd = {
  1620. .id = C_REM_STA,
  1621. .len = sizeof(struct il_rem_sta_cmd),
  1622. .flags = CMD_SYNC,
  1623. .data = &rm_sta_cmd,
  1624. };
  1625. memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
  1626. rm_sta_cmd.num_sta = 1;
  1627. memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
  1628. cmd.flags |= CMD_WANT_SKB;
  1629. ret = il_send_cmd(il, &cmd);
  1630. if (ret)
  1631. return ret;
  1632. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1633. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1634. IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
  1635. ret = -EIO;
  1636. }
  1637. if (!ret) {
  1638. switch (pkt->u.rem_sta.status) {
  1639. case REM_STA_SUCCESS_MSK:
  1640. if (!temporary) {
  1641. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1642. il_sta_ucode_deactivate(il, sta_id);
  1643. spin_unlock_irqrestore(&il->sta_lock,
  1644. flags_spin);
  1645. }
  1646. D_ASSOC("C_REM_STA PASSED\n");
  1647. break;
  1648. default:
  1649. ret = -EIO;
  1650. IL_ERR("C_REM_STA failed\n");
  1651. break;
  1652. }
  1653. }
  1654. il_free_pages(il, cmd.reply_page);
  1655. return ret;
  1656. }
  1657. /**
  1658. * il_remove_station - Remove driver's knowledge of station.
  1659. */
  1660. int
  1661. il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
  1662. {
  1663. unsigned long flags;
  1664. if (!il_is_ready(il)) {
  1665. D_INFO("Unable to remove station %pM, device not ready.\n",
  1666. addr);
  1667. /*
  1668. * It is typical for stations to be removed when we are
  1669. * going down. Return success since device will be down
  1670. * soon anyway
  1671. */
  1672. return 0;
  1673. }
  1674. D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr);
  1675. if (WARN_ON(sta_id == IL_INVALID_STATION))
  1676. return -EINVAL;
  1677. spin_lock_irqsave(&il->sta_lock, flags);
  1678. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1679. D_INFO("Removing %pM but non DRIVER active\n", addr);
  1680. goto out_err;
  1681. }
  1682. if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1683. D_INFO("Removing %pM but non UCODE active\n", addr);
  1684. goto out_err;
  1685. }
  1686. if (il->stations[sta_id].used & IL_STA_LOCAL) {
  1687. kfree(il->stations[sta_id].lq);
  1688. il->stations[sta_id].lq = NULL;
  1689. }
  1690. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1691. il->num_stations--;
  1692. BUG_ON(il->num_stations < 0);
  1693. spin_unlock_irqrestore(&il->sta_lock, flags);
  1694. return il_send_remove_station(il, addr, sta_id, false);
  1695. out_err:
  1696. spin_unlock_irqrestore(&il->sta_lock, flags);
  1697. return -EINVAL;
  1698. }
  1699. EXPORT_SYMBOL_GPL(il_remove_station);
  1700. /**
  1701. * il_clear_ucode_stations - clear ucode station table bits
  1702. *
  1703. * This function clears all the bits in the driver indicating
  1704. * which stations are active in the ucode. Call when something
  1705. * other than explicit station management would cause this in
  1706. * the ucode, e.g. unassociated RXON.
  1707. */
  1708. void
  1709. il_clear_ucode_stations(struct il_priv *il, struct il_rxon_context *ctx)
  1710. {
  1711. int i;
  1712. unsigned long flags_spin;
  1713. bool cleared = false;
  1714. D_INFO("Clearing ucode stations in driver\n");
  1715. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1716. for (i = 0; i < il->hw_params.max_stations; i++) {
  1717. if (ctx && ctx->ctxid != il->stations[i].ctxid)
  1718. continue;
  1719. if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
  1720. D_INFO("Clearing ucode active for station %d\n", i);
  1721. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1722. cleared = true;
  1723. }
  1724. }
  1725. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1726. if (!cleared)
  1727. D_INFO("No active stations found to be cleared\n");
  1728. }
  1729. EXPORT_SYMBOL(il_clear_ucode_stations);
  1730. /**
  1731. * il_restore_stations() - Restore driver known stations to device
  1732. *
  1733. * All stations considered active by driver, but not present in ucode, is
  1734. * restored.
  1735. *
  1736. * Function sleeps.
  1737. */
  1738. void
  1739. il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx)
  1740. {
  1741. struct il_addsta_cmd sta_cmd;
  1742. struct il_link_quality_cmd lq;
  1743. unsigned long flags_spin;
  1744. int i;
  1745. bool found = false;
  1746. int ret;
  1747. bool send_lq;
  1748. if (!il_is_ready(il)) {
  1749. D_INFO("Not ready yet, not restoring any stations.\n");
  1750. return;
  1751. }
  1752. D_ASSOC("Restoring all known stations ... start.\n");
  1753. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1754. for (i = 0; i < il->hw_params.max_stations; i++) {
  1755. if (ctx->ctxid != il->stations[i].ctxid)
  1756. continue;
  1757. if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
  1758. !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
  1759. D_ASSOC("Restoring sta %pM\n",
  1760. il->stations[i].sta.sta.addr);
  1761. il->stations[i].sta.mode = 0;
  1762. il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
  1763. found = true;
  1764. }
  1765. }
  1766. for (i = 0; i < il->hw_params.max_stations; i++) {
  1767. if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
  1768. memcpy(&sta_cmd, &il->stations[i].sta,
  1769. sizeof(struct il_addsta_cmd));
  1770. send_lq = false;
  1771. if (il->stations[i].lq) {
  1772. memcpy(&lq, il->stations[i].lq,
  1773. sizeof(struct il_link_quality_cmd));
  1774. send_lq = true;
  1775. }
  1776. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1777. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1778. if (ret) {
  1779. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1780. IL_ERR("Adding station %pM failed.\n",
  1781. il->stations[i].sta.sta.addr);
  1782. il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
  1783. il->stations[i].used &=
  1784. ~IL_STA_UCODE_INPROGRESS;
  1785. spin_unlock_irqrestore(&il->sta_lock,
  1786. flags_spin);
  1787. }
  1788. /*
  1789. * Rate scaling has already been initialized, send
  1790. * current LQ command
  1791. */
  1792. if (send_lq)
  1793. il_send_lq_cmd(il, ctx, &lq, CMD_SYNC, true);
  1794. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1795. il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
  1796. }
  1797. }
  1798. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1799. if (!found)
  1800. D_INFO("Restoring all known stations"
  1801. " .... no stations to be restored.\n");
  1802. else
  1803. D_INFO("Restoring all known stations" " .... complete.\n");
  1804. }
  1805. EXPORT_SYMBOL(il_restore_stations);
  1806. int
  1807. il_get_free_ucode_key_idx(struct il_priv *il)
  1808. {
  1809. int i;
  1810. for (i = 0; i < il->sta_key_max_num; i++)
  1811. if (!test_and_set_bit(i, &il->ucode_key_table))
  1812. return i;
  1813. return WEP_INVALID_OFFSET;
  1814. }
  1815. EXPORT_SYMBOL(il_get_free_ucode_key_idx);
  1816. void
  1817. il_dealloc_bcast_stations(struct il_priv *il)
  1818. {
  1819. unsigned long flags;
  1820. int i;
  1821. spin_lock_irqsave(&il->sta_lock, flags);
  1822. for (i = 0; i < il->hw_params.max_stations; i++) {
  1823. if (!(il->stations[i].used & IL_STA_BCAST))
  1824. continue;
  1825. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1826. il->num_stations--;
  1827. BUG_ON(il->num_stations < 0);
  1828. kfree(il->stations[i].lq);
  1829. il->stations[i].lq = NULL;
  1830. }
  1831. spin_unlock_irqrestore(&il->sta_lock, flags);
  1832. }
  1833. EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
  1834. #ifdef CONFIG_IWLEGACY_DEBUG
  1835. static void
  1836. il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
  1837. {
  1838. int i;
  1839. D_RATE("lq station id 0x%x\n", lq->sta_id);
  1840. D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
  1841. lq->general_params.dual_stream_ant_msk);
  1842. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
  1843. D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
  1844. }
  1845. #else
  1846. static inline void
  1847. il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
  1848. {
  1849. }
  1850. #endif
  1851. /**
  1852. * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
  1853. *
  1854. * It sometimes happens when a HT rate has been in use and we
  1855. * loose connectivity with AP then mac80211 will first tell us that the
  1856. * current channel is not HT anymore before removing the station. In such a
  1857. * scenario the RXON flags will be updated to indicate we are not
  1858. * communicating HT anymore, but the LQ command may still contain HT rates.
  1859. * Test for this to prevent driver from sending LQ command between the time
  1860. * RXON flags are updated and when LQ command is updated.
  1861. */
  1862. static bool
  1863. il_is_lq_table_valid(struct il_priv *il, struct il_rxon_context *ctx,
  1864. struct il_link_quality_cmd *lq)
  1865. {
  1866. int i;
  1867. if (ctx->ht.enabled)
  1868. return true;
  1869. D_INFO("Channel %u is not an HT channel\n", ctx->active.channel);
  1870. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  1871. if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
  1872. D_INFO("idx %d of LQ expects HT channel\n", i);
  1873. return false;
  1874. }
  1875. }
  1876. return true;
  1877. }
  1878. /**
  1879. * il_send_lq_cmd() - Send link quality command
  1880. * @init: This command is sent as part of station initialization right
  1881. * after station has been added.
  1882. *
  1883. * The link quality command is sent as the last step of station creation.
  1884. * This is the special case in which init is set and we call a callback in
  1885. * this case to clear the state indicating that station creation is in
  1886. * progress.
  1887. */
  1888. int
  1889. il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
  1890. struct il_link_quality_cmd *lq, u8 flags, bool init)
  1891. {
  1892. int ret = 0;
  1893. unsigned long flags_spin;
  1894. struct il_host_cmd cmd = {
  1895. .id = C_TX_LINK_QUALITY_CMD,
  1896. .len = sizeof(struct il_link_quality_cmd),
  1897. .flags = flags,
  1898. .data = lq,
  1899. };
  1900. if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
  1901. return -EINVAL;
  1902. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1903. if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1904. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1905. return -EINVAL;
  1906. }
  1907. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1908. il_dump_lq_cmd(il, lq);
  1909. BUG_ON(init && (cmd.flags & CMD_ASYNC));
  1910. if (il_is_lq_table_valid(il, ctx, lq))
  1911. ret = il_send_cmd(il, &cmd);
  1912. else
  1913. ret = -EINVAL;
  1914. if (cmd.flags & CMD_ASYNC)
  1915. return ret;
  1916. if (init) {
  1917. D_INFO("init LQ command complete,"
  1918. " clearing sta addition status for sta %d\n",
  1919. lq->sta_id);
  1920. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1921. il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1922. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1923. }
  1924. return ret;
  1925. }
  1926. EXPORT_SYMBOL(il_send_lq_cmd);
  1927. int
  1928. il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1929. struct ieee80211_sta *sta)
  1930. {
  1931. struct il_priv *il = hw->priv;
  1932. struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
  1933. int ret;
  1934. D_INFO("received request to remove station %pM\n", sta->addr);
  1935. mutex_lock(&il->mutex);
  1936. D_INFO("proceeding to remove station %pM\n", sta->addr);
  1937. ret = il_remove_station(il, sta_common->sta_id, sta->addr);
  1938. if (ret)
  1939. IL_ERR("Error removing station %pM\n", sta->addr);
  1940. mutex_unlock(&il->mutex);
  1941. return ret;
  1942. }
  1943. EXPORT_SYMBOL(il_mac_sta_remove);
  1944. /************************** RX-FUNCTIONS ****************************/
  1945. /*
  1946. * Rx theory of operation
  1947. *
  1948. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  1949. * each of which point to Receive Buffers to be filled by the NIC. These get
  1950. * used not only for Rx frames, but for any command response or notification
  1951. * from the NIC. The driver and NIC manage the Rx buffers by means
  1952. * of idxes into the circular buffer.
  1953. *
  1954. * Rx Queue Indexes
  1955. * The host/firmware share two idx registers for managing the Rx buffers.
  1956. *
  1957. * The READ idx maps to the first position that the firmware may be writing
  1958. * to -- the driver can read up to (but not including) this position and get
  1959. * good data.
  1960. * The READ idx is managed by the firmware once the card is enabled.
  1961. *
  1962. * The WRITE idx maps to the last position the driver has read from -- the
  1963. * position preceding WRITE is the last slot the firmware can place a packet.
  1964. *
  1965. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  1966. * WRITE = READ.
  1967. *
  1968. * During initialization, the host sets up the READ queue position to the first
  1969. * IDX position, and WRITE to the last (READ - 1 wrapped)
  1970. *
  1971. * When the firmware places a packet in a buffer, it will advance the READ idx
  1972. * and fire the RX interrupt. The driver can then query the READ idx and
  1973. * process as many packets as possible, moving the WRITE idx forward as it
  1974. * resets the Rx queue buffers with new memory.
  1975. *
  1976. * The management in the driver is as follows:
  1977. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  1978. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  1979. * to replenish the iwl->rxq->rx_free.
  1980. * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
  1981. * iwl->rxq is replenished and the READ IDX is updated (updating the
  1982. * 'processed' and 'read' driver idxes as well)
  1983. * + A received packet is processed and handed to the kernel network stack,
  1984. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  1985. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  1986. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  1987. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  1988. * were enough free buffers and RX_STALLED is set it is cleared.
  1989. *
  1990. *
  1991. * Driver sequence:
  1992. *
  1993. * il_rx_queue_alloc() Allocates rx_free
  1994. * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
  1995. * il_rx_queue_restock
  1996. * il_rx_queue_restock() Moves available buffers from rx_free into Rx
  1997. * queue, updates firmware pointers, and updates
  1998. * the WRITE idx. If insufficient rx_free buffers
  1999. * are available, schedules il_rx_replenish
  2000. *
  2001. * -- enable interrupts --
  2002. * ISR - il_rx() Detach il_rx_bufs from pool up to the
  2003. * READ IDX, detaching the SKB from the pool.
  2004. * Moves the packet buffer from queue to rx_used.
  2005. * Calls il_rx_queue_restock to refill any empty
  2006. * slots.
  2007. * ...
  2008. *
  2009. */
  2010. /**
  2011. * il_rx_queue_space - Return number of free slots available in queue.
  2012. */
  2013. int
  2014. il_rx_queue_space(const struct il_rx_queue *q)
  2015. {
  2016. int s = q->read - q->write;
  2017. if (s <= 0)
  2018. s += RX_QUEUE_SIZE;
  2019. /* keep some buffer to not confuse full and empty queue */
  2020. s -= 2;
  2021. if (s < 0)
  2022. s = 0;
  2023. return s;
  2024. }
  2025. EXPORT_SYMBOL(il_rx_queue_space);
  2026. /**
  2027. * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  2028. */
  2029. void
  2030. il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
  2031. {
  2032. unsigned long flags;
  2033. u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
  2034. u32 reg;
  2035. spin_lock_irqsave(&q->lock, flags);
  2036. if (q->need_update == 0)
  2037. goto exit_unlock;
  2038. /* If power-saving is in use, make sure device is awake */
  2039. if (test_bit(S_POWER_PMI, &il->status)) {
  2040. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2041. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2042. D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
  2043. reg);
  2044. il_set_bit(il, CSR_GP_CNTRL,
  2045. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2046. goto exit_unlock;
  2047. }
  2048. q->write_actual = (q->write & ~0x7);
  2049. il_wr(il, rx_wrt_ptr_reg, q->write_actual);
  2050. /* Else device is assumed to be awake */
  2051. } else {
  2052. /* Device expects a multiple of 8 */
  2053. q->write_actual = (q->write & ~0x7);
  2054. il_wr(il, rx_wrt_ptr_reg, q->write_actual);
  2055. }
  2056. q->need_update = 0;
  2057. exit_unlock:
  2058. spin_unlock_irqrestore(&q->lock, flags);
  2059. }
  2060. EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
  2061. int
  2062. il_rx_queue_alloc(struct il_priv *il)
  2063. {
  2064. struct il_rx_queue *rxq = &il->rxq;
  2065. struct device *dev = &il->pci_dev->dev;
  2066. int i;
  2067. spin_lock_init(&rxq->lock);
  2068. INIT_LIST_HEAD(&rxq->rx_free);
  2069. INIT_LIST_HEAD(&rxq->rx_used);
  2070. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  2071. rxq->bd =
  2072. dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  2073. GFP_KERNEL);
  2074. if (!rxq->bd)
  2075. goto err_bd;
  2076. rxq->rb_stts =
  2077. dma_alloc_coherent(dev, sizeof(struct il_rb_status),
  2078. &rxq->rb_stts_dma, GFP_KERNEL);
  2079. if (!rxq->rb_stts)
  2080. goto err_rb;
  2081. /* Fill the rx_used queue with _all_ of the Rx buffers */
  2082. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  2083. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  2084. /* Set us so that we have processed and used all buffers, but have
  2085. * not restocked the Rx queue with fresh buffers */
  2086. rxq->read = rxq->write = 0;
  2087. rxq->write_actual = 0;
  2088. rxq->free_count = 0;
  2089. rxq->need_update = 0;
  2090. return 0;
  2091. err_rb:
  2092. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  2093. rxq->bd_dma);
  2094. err_bd:
  2095. return -ENOMEM;
  2096. }
  2097. EXPORT_SYMBOL(il_rx_queue_alloc);
  2098. void
  2099. il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
  2100. {
  2101. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2102. struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2103. if (!report->state) {
  2104. D_11H("Spectrum Measure Notification: Start\n");
  2105. return;
  2106. }
  2107. memcpy(&il->measure_report, report, sizeof(*report));
  2108. il->measurement_status |= MEASUREMENT_READY;
  2109. }
  2110. EXPORT_SYMBOL(il_hdl_spectrum_measurement);
  2111. /*
  2112. * returns non-zero if packet should be dropped
  2113. */
  2114. int
  2115. il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
  2116. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2117. {
  2118. u16 fc = le16_to_cpu(hdr->frame_control);
  2119. /*
  2120. * All contexts have the same setting here due to it being
  2121. * a module parameter, so OK to check any context.
  2122. */
  2123. if (il->ctx.active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2124. return 0;
  2125. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2126. return 0;
  2127. D_RX("decrypt_res:0x%x\n", decrypt_res);
  2128. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2129. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2130. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2131. * Decryption will be done in SW. */
  2132. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2133. RX_RES_STATUS_BAD_KEY_TTAK)
  2134. break;
  2135. case RX_RES_STATUS_SEC_TYPE_WEP:
  2136. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2137. RX_RES_STATUS_BAD_ICV_MIC) {
  2138. /* bad ICV, the packet is destroyed since the
  2139. * decryption is inplace, drop it */
  2140. D_RX("Packet destroyed\n");
  2141. return -1;
  2142. }
  2143. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2144. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2145. RX_RES_STATUS_DECRYPT_OK) {
  2146. D_RX("hw decrypt successfully!!!\n");
  2147. stats->flag |= RX_FLAG_DECRYPTED;
  2148. }
  2149. break;
  2150. default:
  2151. break;
  2152. }
  2153. return 0;
  2154. }
  2155. EXPORT_SYMBOL(il_set_decrypted_flag);
  2156. /**
  2157. * il_txq_update_write_ptr - Send new write idx to hardware
  2158. */
  2159. void
  2160. il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
  2161. {
  2162. u32 reg = 0;
  2163. int txq_id = txq->q.id;
  2164. if (txq->need_update == 0)
  2165. return;
  2166. /* if we're trying to save power */
  2167. if (test_bit(S_POWER_PMI, &il->status)) {
  2168. /* wake up nic if it's powered down ...
  2169. * uCode will wake up, and interrupt us again, so next
  2170. * time we'll skip this part. */
  2171. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2172. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2173. D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
  2174. txq_id, reg);
  2175. il_set_bit(il, CSR_GP_CNTRL,
  2176. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2177. return;
  2178. }
  2179. il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
  2180. /*
  2181. * else not in power-save mode,
  2182. * uCode will never sleep when we're
  2183. * trying to tx (during RFKILL, we're not trying to tx).
  2184. */
  2185. } else
  2186. _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
  2187. txq->need_update = 0;
  2188. }
  2189. EXPORT_SYMBOL(il_txq_update_write_ptr);
  2190. /**
  2191. * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
  2192. */
  2193. void
  2194. il_tx_queue_unmap(struct il_priv *il, int txq_id)
  2195. {
  2196. struct il_tx_queue *txq = &il->txq[txq_id];
  2197. struct il_queue *q = &txq->q;
  2198. if (q->n_bd == 0)
  2199. return;
  2200. while (q->write_ptr != q->read_ptr) {
  2201. il->cfg->ops->lib->txq_free_tfd(il, txq);
  2202. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2203. }
  2204. }
  2205. EXPORT_SYMBOL(il_tx_queue_unmap);
  2206. /**
  2207. * il_tx_queue_free - Deallocate DMA queue.
  2208. * @txq: Transmit queue to deallocate.
  2209. *
  2210. * Empty queue by removing and destroying all BD's.
  2211. * Free all buffers.
  2212. * 0-fill, but do not free "txq" descriptor structure.
  2213. */
  2214. void
  2215. il_tx_queue_free(struct il_priv *il, int txq_id)
  2216. {
  2217. struct il_tx_queue *txq = &il->txq[txq_id];
  2218. struct device *dev = &il->pci_dev->dev;
  2219. int i;
  2220. il_tx_queue_unmap(il, txq_id);
  2221. /* De-alloc array of command/tx buffers */
  2222. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  2223. kfree(txq->cmd[i]);
  2224. /* De-alloc circular buffer of TFDs */
  2225. if (txq->q.n_bd)
  2226. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2227. txq->tfds, txq->q.dma_addr);
  2228. /* De-alloc array of per-TFD driver data */
  2229. kfree(txq->txb);
  2230. txq->txb = NULL;
  2231. /* deallocate arrays */
  2232. kfree(txq->cmd);
  2233. kfree(txq->meta);
  2234. txq->cmd = NULL;
  2235. txq->meta = NULL;
  2236. /* 0-fill queue descriptor structure */
  2237. memset(txq, 0, sizeof(*txq));
  2238. }
  2239. EXPORT_SYMBOL(il_tx_queue_free);
  2240. /**
  2241. * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
  2242. */
  2243. void
  2244. il_cmd_queue_unmap(struct il_priv *il)
  2245. {
  2246. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2247. struct il_queue *q = &txq->q;
  2248. int i;
  2249. if (q->n_bd == 0)
  2250. return;
  2251. while (q->read_ptr != q->write_ptr) {
  2252. i = il_get_cmd_idx(q, q->read_ptr, 0);
  2253. if (txq->meta[i].flags & CMD_MAPPED) {
  2254. pci_unmap_single(il->pci_dev,
  2255. dma_unmap_addr(&txq->meta[i], mapping),
  2256. dma_unmap_len(&txq->meta[i], len),
  2257. PCI_DMA_BIDIRECTIONAL);
  2258. txq->meta[i].flags = 0;
  2259. }
  2260. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2261. }
  2262. i = q->n_win;
  2263. if (txq->meta[i].flags & CMD_MAPPED) {
  2264. pci_unmap_single(il->pci_dev,
  2265. dma_unmap_addr(&txq->meta[i], mapping),
  2266. dma_unmap_len(&txq->meta[i], len),
  2267. PCI_DMA_BIDIRECTIONAL);
  2268. txq->meta[i].flags = 0;
  2269. }
  2270. }
  2271. EXPORT_SYMBOL(il_cmd_queue_unmap);
  2272. /**
  2273. * il_cmd_queue_free - Deallocate DMA queue.
  2274. * @txq: Transmit queue to deallocate.
  2275. *
  2276. * Empty queue by removing and destroying all BD's.
  2277. * Free all buffers.
  2278. * 0-fill, but do not free "txq" descriptor structure.
  2279. */
  2280. void
  2281. il_cmd_queue_free(struct il_priv *il)
  2282. {
  2283. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2284. struct device *dev = &il->pci_dev->dev;
  2285. int i;
  2286. il_cmd_queue_unmap(il);
  2287. /* De-alloc array of command/tx buffers */
  2288. for (i = 0; i <= TFD_CMD_SLOTS; i++)
  2289. kfree(txq->cmd[i]);
  2290. /* De-alloc circular buffer of TFDs */
  2291. if (txq->q.n_bd)
  2292. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2293. txq->tfds, txq->q.dma_addr);
  2294. /* deallocate arrays */
  2295. kfree(txq->cmd);
  2296. kfree(txq->meta);
  2297. txq->cmd = NULL;
  2298. txq->meta = NULL;
  2299. /* 0-fill queue descriptor structure */
  2300. memset(txq, 0, sizeof(*txq));
  2301. }
  2302. EXPORT_SYMBOL(il_cmd_queue_free);
  2303. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  2304. * DMA services
  2305. *
  2306. * Theory of operation
  2307. *
  2308. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  2309. * of buffer descriptors, each of which points to one or more data buffers for
  2310. * the device to read from or fill. Driver and device exchange status of each
  2311. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  2312. * entries in each circular buffer, to protect against confusing empty and full
  2313. * queue states.
  2314. *
  2315. * The device reads or writes the data in the queues via the device's several
  2316. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  2317. *
  2318. * For Tx queue, there are low mark and high mark limits. If, after queuing
  2319. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  2320. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  2321. * Tx queue resumed.
  2322. *
  2323. * See more detailed info in 4965.h.
  2324. ***************************************************/
  2325. int
  2326. il_queue_space(const struct il_queue *q)
  2327. {
  2328. int s = q->read_ptr - q->write_ptr;
  2329. if (q->read_ptr > q->write_ptr)
  2330. s -= q->n_bd;
  2331. if (s <= 0)
  2332. s += q->n_win;
  2333. /* keep some reserve to not confuse empty and full situations */
  2334. s -= 2;
  2335. if (s < 0)
  2336. s = 0;
  2337. return s;
  2338. }
  2339. EXPORT_SYMBOL(il_queue_space);
  2340. /**
  2341. * il_queue_init - Initialize queue's high/low-water and read/write idxes
  2342. */
  2343. static int
  2344. il_queue_init(struct il_priv *il, struct il_queue *q, int count, int slots_num,
  2345. u32 id)
  2346. {
  2347. q->n_bd = count;
  2348. q->n_win = slots_num;
  2349. q->id = id;
  2350. /* count must be power-of-two size, otherwise il_queue_inc_wrap
  2351. * and il_queue_dec_wrap are broken. */
  2352. BUG_ON(!is_power_of_2(count));
  2353. /* slots_num must be power-of-two size, otherwise
  2354. * il_get_cmd_idx is broken. */
  2355. BUG_ON(!is_power_of_2(slots_num));
  2356. q->low_mark = q->n_win / 4;
  2357. if (q->low_mark < 4)
  2358. q->low_mark = 4;
  2359. q->high_mark = q->n_win / 8;
  2360. if (q->high_mark < 2)
  2361. q->high_mark = 2;
  2362. q->write_ptr = q->read_ptr = 0;
  2363. return 0;
  2364. }
  2365. /**
  2366. * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  2367. */
  2368. static int
  2369. il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
  2370. {
  2371. struct device *dev = &il->pci_dev->dev;
  2372. size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
  2373. /* Driver ilate data, only for Tx (not command) queues,
  2374. * not shared with device. */
  2375. if (id != il->cmd_queue) {
  2376. txq->txb =
  2377. kzalloc(sizeof(txq->txb[0]) * TFD_QUEUE_SIZE_MAX,
  2378. GFP_KERNEL);
  2379. if (!txq->txb) {
  2380. IL_ERR("kmalloc for auxiliary BD "
  2381. "structures failed\n");
  2382. goto error;
  2383. }
  2384. } else {
  2385. txq->txb = NULL;
  2386. }
  2387. /* Circular buffer of transmit frame descriptors (TFDs),
  2388. * shared with device */
  2389. txq->tfds =
  2390. dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
  2391. if (!txq->tfds) {
  2392. IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz);
  2393. goto error;
  2394. }
  2395. txq->q.id = id;
  2396. return 0;
  2397. error:
  2398. kfree(txq->txb);
  2399. txq->txb = NULL;
  2400. return -ENOMEM;
  2401. }
  2402. /**
  2403. * il_tx_queue_init - Allocate and initialize one tx/cmd queue
  2404. */
  2405. int
  2406. il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, int slots_num,
  2407. u32 txq_id)
  2408. {
  2409. int i, len;
  2410. int ret;
  2411. int actual_slots = slots_num;
  2412. /*
  2413. * Alloc buffer array for commands (Tx or other types of commands).
  2414. * For the command queue (#4/#9), allocate command space + one big
  2415. * command for scan, since scan command is very huge; the system will
  2416. * not have two scans at the same time, so only one is needed.
  2417. * For normal Tx queues (all other queues), no super-size command
  2418. * space is needed.
  2419. */
  2420. if (txq_id == il->cmd_queue)
  2421. actual_slots++;
  2422. txq->meta =
  2423. kzalloc(sizeof(struct il_cmd_meta) * actual_slots, GFP_KERNEL);
  2424. txq->cmd =
  2425. kzalloc(sizeof(struct il_device_cmd *) * actual_slots, GFP_KERNEL);
  2426. if (!txq->meta || !txq->cmd)
  2427. goto out_free_arrays;
  2428. len = sizeof(struct il_device_cmd);
  2429. for (i = 0; i < actual_slots; i++) {
  2430. /* only happens for cmd queue */
  2431. if (i == slots_num)
  2432. len = IL_MAX_CMD_SIZE;
  2433. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  2434. if (!txq->cmd[i])
  2435. goto err;
  2436. }
  2437. /* Alloc driver data array and TFD circular buffer */
  2438. ret = il_tx_queue_alloc(il, txq, txq_id);
  2439. if (ret)
  2440. goto err;
  2441. txq->need_update = 0;
  2442. /*
  2443. * For the default queues 0-3, set up the swq_id
  2444. * already -- all others need to get one later
  2445. * (if they need one at all).
  2446. */
  2447. if (txq_id < 4)
  2448. il_set_swq_id(txq, txq_id, txq_id);
  2449. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  2450. * il_queue_inc_wrap and il_queue_dec_wrap are broken. */
  2451. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  2452. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2453. il_queue_init(il, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2454. /* Tell device where to find queue */
  2455. il->cfg->ops->lib->txq_init(il, txq);
  2456. return 0;
  2457. err:
  2458. for (i = 0; i < actual_slots; i++)
  2459. kfree(txq->cmd[i]);
  2460. out_free_arrays:
  2461. kfree(txq->meta);
  2462. kfree(txq->cmd);
  2463. return -ENOMEM;
  2464. }
  2465. EXPORT_SYMBOL(il_tx_queue_init);
  2466. void
  2467. il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq, int slots_num,
  2468. u32 txq_id)
  2469. {
  2470. int actual_slots = slots_num;
  2471. if (txq_id == il->cmd_queue)
  2472. actual_slots++;
  2473. memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
  2474. txq->need_update = 0;
  2475. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2476. il_queue_init(il, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2477. /* Tell device where to find queue */
  2478. il->cfg->ops->lib->txq_init(il, txq);
  2479. }
  2480. EXPORT_SYMBOL(il_tx_queue_reset);
  2481. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  2482. /**
  2483. * il_enqueue_hcmd - enqueue a uCode command
  2484. * @il: device ilate data point
  2485. * @cmd: a point to the ucode command structure
  2486. *
  2487. * The function returns < 0 values to indicate the operation is
  2488. * failed. On success, it turns the idx (> 0) of command in the
  2489. * command queue.
  2490. */
  2491. int
  2492. il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
  2493. {
  2494. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2495. struct il_queue *q = &txq->q;
  2496. struct il_device_cmd *out_cmd;
  2497. struct il_cmd_meta *out_meta;
  2498. dma_addr_t phys_addr;
  2499. unsigned long flags;
  2500. int len;
  2501. u32 idx;
  2502. u16 fix_size;
  2503. cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
  2504. fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
  2505. /* If any of the command structures end up being larger than
  2506. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  2507. * we will need to increase the size of the TFD entries
  2508. * Also, check to see if command buffer should not exceed the size
  2509. * of device_cmd and max_cmd_size. */
  2510. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  2511. !(cmd->flags & CMD_SIZE_HUGE));
  2512. BUG_ON(fix_size > IL_MAX_CMD_SIZE);
  2513. if (il_is_rfkill(il) || il_is_ctkill(il)) {
  2514. IL_WARN("Not sending command - %s KILL\n",
  2515. il_is_rfkill(il) ? "RF" : "CT");
  2516. return -EIO;
  2517. }
  2518. spin_lock_irqsave(&il->hcmd_lock, flags);
  2519. if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
  2520. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2521. IL_ERR("Restarting adapter due to command queue full\n");
  2522. queue_work(il->workqueue, &il->restart);
  2523. return -ENOSPC;
  2524. }
  2525. idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
  2526. out_cmd = txq->cmd[idx];
  2527. out_meta = &txq->meta[idx];
  2528. if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
  2529. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2530. return -ENOSPC;
  2531. }
  2532. memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
  2533. out_meta->flags = cmd->flags | CMD_MAPPED;
  2534. if (cmd->flags & CMD_WANT_SKB)
  2535. out_meta->source = cmd;
  2536. if (cmd->flags & CMD_ASYNC)
  2537. out_meta->callback = cmd->callback;
  2538. out_cmd->hdr.cmd = cmd->id;
  2539. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  2540. /* At this point, the out_cmd now has all of the incoming cmd
  2541. * information */
  2542. out_cmd->hdr.flags = 0;
  2543. out_cmd->hdr.sequence =
  2544. cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
  2545. if (cmd->flags & CMD_SIZE_HUGE)
  2546. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  2547. len = sizeof(struct il_device_cmd);
  2548. if (idx == TFD_CMD_SLOTS)
  2549. len = IL_MAX_CMD_SIZE;
  2550. #ifdef CONFIG_IWLEGACY_DEBUG
  2551. switch (out_cmd->hdr.cmd) {
  2552. case C_TX_LINK_QUALITY_CMD:
  2553. case C_SENSITIVITY:
  2554. D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
  2555. "%d bytes at %d[%d]:%d\n",
  2556. il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
  2557. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2558. q->write_ptr, idx, il->cmd_queue);
  2559. break;
  2560. default:
  2561. D_HC("Sending command %s (#%x), seq: 0x%04X, "
  2562. "%d bytes at %d[%d]:%d\n",
  2563. il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
  2564. le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
  2565. idx, il->cmd_queue);
  2566. }
  2567. #endif
  2568. txq->need_update = 1;
  2569. if (il->cfg->ops->lib->txq_update_byte_cnt_tbl)
  2570. /* Set up entry in queue's byte count circular buffer */
  2571. il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0);
  2572. phys_addr =
  2573. pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
  2574. PCI_DMA_BIDIRECTIONAL);
  2575. dma_unmap_addr_set(out_meta, mapping, phys_addr);
  2576. dma_unmap_len_set(out_meta, len, fix_size);
  2577. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size,
  2578. 1, U32_PAD(cmd->len));
  2579. /* Increment and update queue's write idx */
  2580. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  2581. il_txq_update_write_ptr(il, txq);
  2582. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2583. return idx;
  2584. }
  2585. /**
  2586. * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
  2587. *
  2588. * When FW advances 'R' idx, all entries between old and new 'R' idx
  2589. * need to be reclaimed. As result, some free space forms. If there is
  2590. * enough free space (> low mark), wake the stack that feeds us.
  2591. */
  2592. static void
  2593. il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
  2594. {
  2595. struct il_tx_queue *txq = &il->txq[txq_id];
  2596. struct il_queue *q = &txq->q;
  2597. int nfreed = 0;
  2598. if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
  2599. IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
  2600. "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
  2601. q->write_ptr, q->read_ptr);
  2602. return;
  2603. }
  2604. for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
  2605. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2606. if (nfreed++ > 0) {
  2607. IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
  2608. q->write_ptr, q->read_ptr);
  2609. queue_work(il->workqueue, &il->restart);
  2610. }
  2611. }
  2612. }
  2613. /**
  2614. * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2615. * @rxb: Rx buffer to reclaim
  2616. *
  2617. * If an Rx buffer has an async callback associated with it the callback
  2618. * will be executed. The attached skb (if present) will only be freed
  2619. * if the callback returns 1
  2620. */
  2621. void
  2622. il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
  2623. {
  2624. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2625. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2626. int txq_id = SEQ_TO_QUEUE(sequence);
  2627. int idx = SEQ_TO_IDX(sequence);
  2628. int cmd_idx;
  2629. bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2630. struct il_device_cmd *cmd;
  2631. struct il_cmd_meta *meta;
  2632. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2633. unsigned long flags;
  2634. /* If a Tx command is being handled and it isn't in the actual
  2635. * command queue then there a command routing bug has been introduced
  2636. * in the queue management code. */
  2637. if (WARN
  2638. (txq_id != il->cmd_queue,
  2639. "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
  2640. txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
  2641. il->txq[il->cmd_queue].q.write_ptr)) {
  2642. il_print_hex_error(il, pkt, 32);
  2643. return;
  2644. }
  2645. cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
  2646. cmd = txq->cmd[cmd_idx];
  2647. meta = &txq->meta[cmd_idx];
  2648. txq->time_stamp = jiffies;
  2649. pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
  2650. dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
  2651. /* Input error checking is done when commands are added to queue. */
  2652. if (meta->flags & CMD_WANT_SKB) {
  2653. meta->source->reply_page = (unsigned long)rxb_addr(rxb);
  2654. rxb->page = NULL;
  2655. } else if (meta->callback)
  2656. meta->callback(il, cmd, pkt);
  2657. spin_lock_irqsave(&il->hcmd_lock, flags);
  2658. il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
  2659. if (!(meta->flags & CMD_ASYNC)) {
  2660. clear_bit(S_HCMD_ACTIVE, &il->status);
  2661. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  2662. il_get_cmd_string(cmd->hdr.cmd));
  2663. wake_up(&il->wait_command_queue);
  2664. }
  2665. /* Mark as unmapped */
  2666. meta->flags = 0;
  2667. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2668. }
  2669. EXPORT_SYMBOL(il_tx_cmd_complete);
  2670. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  2671. MODULE_VERSION(IWLWIFI_VERSION);
  2672. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  2673. MODULE_LICENSE("GPL");
  2674. /*
  2675. * set bt_coex_active to true, uCode will do kill/defer
  2676. * every time the priority line is asserted (BT is sending signals on the
  2677. * priority line in the PCIx).
  2678. * set bt_coex_active to false, uCode will ignore the BT activity and
  2679. * perform the normal operation
  2680. *
  2681. * User might experience transmit issue on some platform due to WiFi/BT
  2682. * co-exist problem. The possible behaviors are:
  2683. * Able to scan and finding all the available AP
  2684. * Not able to associate with any AP
  2685. * On those platforms, WiFi communication can be restored by set
  2686. * "bt_coex_active" module parameter to "false"
  2687. *
  2688. * default: bt_coex_active = true (BT_COEX_ENABLE)
  2689. */
  2690. static bool bt_coex_active = true;
  2691. module_param(bt_coex_active, bool, S_IRUGO);
  2692. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  2693. u32 il_debug_level;
  2694. EXPORT_SYMBOL(il_debug_level);
  2695. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  2696. EXPORT_SYMBOL(il_bcast_addr);
  2697. /* This function both allocates and initializes hw and il. */
  2698. struct ieee80211_hw *
  2699. il_alloc_all(struct il_cfg *cfg)
  2700. {
  2701. struct il_priv *il;
  2702. /* mac80211 allocates memory for this device instance, including
  2703. * space for this driver's ilate structure */
  2704. struct ieee80211_hw *hw;
  2705. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  2706. cfg->ops->ieee80211_ops);
  2707. if (hw == NULL) {
  2708. pr_err("%s: Can not allocate network device\n", cfg->name);
  2709. goto out;
  2710. }
  2711. il = hw->priv;
  2712. il->hw = hw;
  2713. out:
  2714. return hw;
  2715. }
  2716. EXPORT_SYMBOL(il_alloc_all);
  2717. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  2718. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  2719. static void
  2720. il_init_ht_hw_capab(const struct il_priv *il,
  2721. struct ieee80211_sta_ht_cap *ht_info,
  2722. enum ieee80211_band band)
  2723. {
  2724. u16 max_bit_rate = 0;
  2725. u8 rx_chains_num = il->hw_params.rx_chains_num;
  2726. u8 tx_chains_num = il->hw_params.tx_chains_num;
  2727. ht_info->cap = 0;
  2728. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  2729. ht_info->ht_supported = true;
  2730. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  2731. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  2732. if (il->hw_params.ht40_channel & BIT(band)) {
  2733. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2734. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  2735. ht_info->mcs.rx_mask[4] = 0x01;
  2736. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  2737. }
  2738. if (il->cfg->mod_params->amsdu_size_8K)
  2739. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  2740. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2741. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2742. ht_info->mcs.rx_mask[0] = 0xFF;
  2743. if (rx_chains_num >= 2)
  2744. ht_info->mcs.rx_mask[1] = 0xFF;
  2745. if (rx_chains_num >= 3)
  2746. ht_info->mcs.rx_mask[2] = 0xFF;
  2747. /* Highest supported Rx data rate */
  2748. max_bit_rate *= rx_chains_num;
  2749. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  2750. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  2751. /* Tx MCS capabilities */
  2752. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2753. if (tx_chains_num != rx_chains_num) {
  2754. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2755. ht_info->mcs.tx_params |=
  2756. ((tx_chains_num -
  2757. 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  2758. }
  2759. }
  2760. /**
  2761. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  2762. */
  2763. int
  2764. il_init_geos(struct il_priv *il)
  2765. {
  2766. struct il_channel_info *ch;
  2767. struct ieee80211_supported_band *sband;
  2768. struct ieee80211_channel *channels;
  2769. struct ieee80211_channel *geo_ch;
  2770. struct ieee80211_rate *rates;
  2771. int i = 0;
  2772. s8 max_tx_power = 0;
  2773. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  2774. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  2775. D_INFO("Geography modes already initialized.\n");
  2776. set_bit(S_GEO_CONFIGURED, &il->status);
  2777. return 0;
  2778. }
  2779. channels =
  2780. kzalloc(sizeof(struct ieee80211_channel) * il->channel_count,
  2781. GFP_KERNEL);
  2782. if (!channels)
  2783. return -ENOMEM;
  2784. rates =
  2785. kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  2786. GFP_KERNEL);
  2787. if (!rates) {
  2788. kfree(channels);
  2789. return -ENOMEM;
  2790. }
  2791. /* 5.2GHz channels start after the 2.4GHz channels */
  2792. sband = &il->bands[IEEE80211_BAND_5GHZ];
  2793. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  2794. /* just OFDM */
  2795. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  2796. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  2797. if (il->cfg->sku & IL_SKU_N)
  2798. il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_5GHZ);
  2799. sband = &il->bands[IEEE80211_BAND_2GHZ];
  2800. sband->channels = channels;
  2801. /* OFDM & CCK */
  2802. sband->bitrates = rates;
  2803. sband->n_bitrates = RATE_COUNT_LEGACY;
  2804. if (il->cfg->sku & IL_SKU_N)
  2805. il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_2GHZ);
  2806. il->ieee_channels = channels;
  2807. il->ieee_rates = rates;
  2808. for (i = 0; i < il->channel_count; i++) {
  2809. ch = &il->channel_info[i];
  2810. if (!il_is_channel_valid(ch))
  2811. continue;
  2812. sband = &il->bands[ch->band];
  2813. geo_ch = &sband->channels[sband->n_channels++];
  2814. geo_ch->center_freq =
  2815. ieee80211_channel_to_frequency(ch->channel, ch->band);
  2816. geo_ch->max_power = ch->max_power_avg;
  2817. geo_ch->max_antenna_gain = 0xff;
  2818. geo_ch->hw_value = ch->channel;
  2819. if (il_is_channel_valid(ch)) {
  2820. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  2821. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  2822. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  2823. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  2824. if (ch->flags & EEPROM_CHANNEL_RADAR)
  2825. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  2826. geo_ch->flags |= ch->ht40_extension_channel;
  2827. if (ch->max_power_avg > max_tx_power)
  2828. max_tx_power = ch->max_power_avg;
  2829. } else {
  2830. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  2831. }
  2832. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
  2833. geo_ch->center_freq,
  2834. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  2835. geo_ch->
  2836. flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
  2837. geo_ch->flags);
  2838. }
  2839. il->tx_power_device_lmt = max_tx_power;
  2840. il->tx_power_user_lmt = max_tx_power;
  2841. il->tx_power_next = max_tx_power;
  2842. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  2843. (il->cfg->sku & IL_SKU_A)) {
  2844. IL_INFO("Incorrectly detected BG card as ABG. "
  2845. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  2846. il->pci_dev->device, il->pci_dev->subsystem_device);
  2847. il->cfg->sku &= ~IL_SKU_A;
  2848. }
  2849. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  2850. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  2851. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  2852. set_bit(S_GEO_CONFIGURED, &il->status);
  2853. return 0;
  2854. }
  2855. EXPORT_SYMBOL(il_init_geos);
  2856. /*
  2857. * il_free_geos - undo allocations in il_init_geos
  2858. */
  2859. void
  2860. il_free_geos(struct il_priv *il)
  2861. {
  2862. kfree(il->ieee_channels);
  2863. kfree(il->ieee_rates);
  2864. clear_bit(S_GEO_CONFIGURED, &il->status);
  2865. }
  2866. EXPORT_SYMBOL(il_free_geos);
  2867. static bool
  2868. il_is_channel_extension(struct il_priv *il, enum ieee80211_band band,
  2869. u16 channel, u8 extension_chan_offset)
  2870. {
  2871. const struct il_channel_info *ch_info;
  2872. ch_info = il_get_channel_info(il, band, channel);
  2873. if (!il_is_channel_valid(ch_info))
  2874. return false;
  2875. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  2876. return !(ch_info->
  2877. ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
  2878. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  2879. return !(ch_info->
  2880. ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
  2881. return false;
  2882. }
  2883. bool
  2884. il_is_ht40_tx_allowed(struct il_priv *il, struct il_rxon_context *ctx,
  2885. struct ieee80211_sta_ht_cap *ht_cap)
  2886. {
  2887. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  2888. return false;
  2889. /*
  2890. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  2891. * the bit will not set if it is pure 40MHz case
  2892. */
  2893. if (ht_cap && !ht_cap->ht_supported)
  2894. return false;
  2895. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2896. if (il->disable_ht40)
  2897. return false;
  2898. #endif
  2899. return il_is_channel_extension(il, il->band,
  2900. le16_to_cpu(ctx->staging.channel),
  2901. ctx->ht.extension_chan_offset);
  2902. }
  2903. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  2904. static u16
  2905. il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  2906. {
  2907. u16 new_val;
  2908. u16 beacon_factor;
  2909. /*
  2910. * If mac80211 hasn't given us a beacon interval, program
  2911. * the default into the device.
  2912. */
  2913. if (!beacon_val)
  2914. return DEFAULT_BEACON_INTERVAL;
  2915. /*
  2916. * If the beacon interval we obtained from the peer
  2917. * is too large, we'll have to wake up more often
  2918. * (and in IBSS case, we'll beacon too much)
  2919. *
  2920. * For example, if max_beacon_val is 4096, and the
  2921. * requested beacon interval is 7000, we'll have to
  2922. * use 3500 to be able to wake up on the beacons.
  2923. *
  2924. * This could badly influence beacon detection stats.
  2925. */
  2926. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  2927. new_val = beacon_val / beacon_factor;
  2928. if (!new_val)
  2929. new_val = max_beacon_val;
  2930. return new_val;
  2931. }
  2932. int
  2933. il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
  2934. {
  2935. u64 tsf;
  2936. s32 interval_tm, rem;
  2937. struct ieee80211_conf *conf = NULL;
  2938. u16 beacon_int;
  2939. struct ieee80211_vif *vif = ctx->vif;
  2940. conf = &il->hw->conf;
  2941. lockdep_assert_held(&il->mutex);
  2942. memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
  2943. ctx->timing.timestamp = cpu_to_le64(il->timestamp);
  2944. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  2945. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  2946. /*
  2947. * TODO: For IBSS we need to get atim_win from mac80211,
  2948. * for now just always use 0
  2949. */
  2950. ctx->timing.atim_win = 0;
  2951. beacon_int =
  2952. il_adjust_beacon_interval(beacon_int,
  2953. il->hw_params.max_beacon_itrvl *
  2954. TIME_UNIT);
  2955. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  2956. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  2957. interval_tm = beacon_int * TIME_UNIT;
  2958. rem = do_div(tsf, interval_tm);
  2959. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  2960. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
  2961. D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
  2962. le16_to_cpu(ctx->timing.beacon_interval),
  2963. le32_to_cpu(ctx->timing.beacon_init_val),
  2964. le16_to_cpu(ctx->timing.atim_win));
  2965. return il_send_cmd_pdu(il, ctx->rxon_timing_cmd, sizeof(ctx->timing),
  2966. &ctx->timing);
  2967. }
  2968. EXPORT_SYMBOL(il_send_rxon_timing);
  2969. void
  2970. il_set_rxon_hwcrypto(struct il_priv *il, struct il_rxon_context *ctx,
  2971. int hw_decrypt)
  2972. {
  2973. struct il_rxon_cmd *rxon = &ctx->staging;
  2974. if (hw_decrypt)
  2975. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2976. else
  2977. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2978. }
  2979. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  2980. /* validate RXON structure is valid */
  2981. int
  2982. il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  2983. {
  2984. struct il_rxon_cmd *rxon = &ctx->staging;
  2985. bool error = false;
  2986. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  2987. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  2988. IL_WARN("check 2.4G: wrong narrow\n");
  2989. error = true;
  2990. }
  2991. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  2992. IL_WARN("check 2.4G: wrong radar\n");
  2993. error = true;
  2994. }
  2995. } else {
  2996. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  2997. IL_WARN("check 5.2G: not short slot!\n");
  2998. error = true;
  2999. }
  3000. if (rxon->flags & RXON_FLG_CCK_MSK) {
  3001. IL_WARN("check 5.2G: CCK!\n");
  3002. error = true;
  3003. }
  3004. }
  3005. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  3006. IL_WARN("mac/bssid mcast!\n");
  3007. error = true;
  3008. }
  3009. /* make sure basic rates 6Mbps and 1Mbps are supported */
  3010. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  3011. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  3012. IL_WARN("neither 1 nor 6 are basic\n");
  3013. error = true;
  3014. }
  3015. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  3016. IL_WARN("aid > 2007\n");
  3017. error = true;
  3018. }
  3019. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
  3020. (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  3021. IL_WARN("CCK and short slot\n");
  3022. error = true;
  3023. }
  3024. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
  3025. (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  3026. IL_WARN("CCK and auto detect");
  3027. error = true;
  3028. }
  3029. if ((rxon->
  3030. flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
  3031. RXON_FLG_TGG_PROTECT_MSK) {
  3032. IL_WARN("TGg but no auto-detect\n");
  3033. error = true;
  3034. }
  3035. if (error)
  3036. IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
  3037. if (error) {
  3038. IL_ERR("Invalid RXON\n");
  3039. return -EINVAL;
  3040. }
  3041. return 0;
  3042. }
  3043. EXPORT_SYMBOL(il_check_rxon_cmd);
  3044. /**
  3045. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  3046. * @il: staging_rxon is compared to active_rxon
  3047. *
  3048. * If the RXON structure is changing enough to require a new tune,
  3049. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  3050. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  3051. */
  3052. int
  3053. il_full_rxon_required(struct il_priv *il, struct il_rxon_context *ctx)
  3054. {
  3055. const struct il_rxon_cmd *staging = &ctx->staging;
  3056. const struct il_rxon_cmd *active = &ctx->active;
  3057. #define CHK(cond) \
  3058. if ((cond)) { \
  3059. D_INFO("need full RXON - " #cond "\n"); \
  3060. return 1; \
  3061. }
  3062. #define CHK_NEQ(c1, c2) \
  3063. if ((c1) != (c2)) { \
  3064. D_INFO("need full RXON - " \
  3065. #c1 " != " #c2 " - %d != %d\n", \
  3066. (c1), (c2)); \
  3067. return 1; \
  3068. }
  3069. /* These items are only settable from the full RXON command */
  3070. CHK(!il_is_associated_ctx(ctx));
  3071. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  3072. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  3073. CHK(compare_ether_addr
  3074. (staging->wlap_bssid_addr, active->wlap_bssid_addr));
  3075. CHK_NEQ(staging->dev_type, active->dev_type);
  3076. CHK_NEQ(staging->channel, active->channel);
  3077. CHK_NEQ(staging->air_propagation, active->air_propagation);
  3078. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  3079. active->ofdm_ht_single_stream_basic_rates);
  3080. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  3081. active->ofdm_ht_dual_stream_basic_rates);
  3082. CHK_NEQ(staging->assoc_id, active->assoc_id);
  3083. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  3084. * be updated with the RXON_ASSOC command -- however only some
  3085. * flag transitions are allowed using RXON_ASSOC */
  3086. /* Check if we are not switching bands */
  3087. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  3088. active->flags & RXON_FLG_BAND_24G_MSK);
  3089. /* Check if we are switching association toggle */
  3090. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  3091. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  3092. #undef CHK
  3093. #undef CHK_NEQ
  3094. return 0;
  3095. }
  3096. EXPORT_SYMBOL(il_full_rxon_required);
  3097. u8
  3098. il_get_lowest_plcp(struct il_priv *il, struct il_rxon_context *ctx)
  3099. {
  3100. /*
  3101. * Assign the lowest rate -- should really get this from
  3102. * the beacon skb from mac80211.
  3103. */
  3104. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  3105. return RATE_1M_PLCP;
  3106. else
  3107. return RATE_6M_PLCP;
  3108. }
  3109. EXPORT_SYMBOL(il_get_lowest_plcp);
  3110. static void
  3111. _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf,
  3112. struct il_rxon_context *ctx)
  3113. {
  3114. struct il_rxon_cmd *rxon = &ctx->staging;
  3115. if (!ctx->ht.enabled) {
  3116. rxon->flags &=
  3117. ~(RXON_FLG_CHANNEL_MODE_MSK |
  3118. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK
  3119. | RXON_FLG_HT_PROT_MSK);
  3120. return;
  3121. }
  3122. rxon->flags |=
  3123. cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
  3124. /* Set up channel bandwidth:
  3125. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  3126. /* clear the HT channel mode before set the mode */
  3127. rxon->flags &=
  3128. ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3129. if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
  3130. /* pure ht40 */
  3131. if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  3132. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  3133. /* Note: control channel is opposite of extension channel */
  3134. switch (ctx->ht.extension_chan_offset) {
  3135. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3136. rxon->flags &=
  3137. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3138. break;
  3139. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3140. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3141. break;
  3142. }
  3143. } else {
  3144. /* Note: control channel is opposite of extension channel */
  3145. switch (ctx->ht.extension_chan_offset) {
  3146. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3147. rxon->flags &=
  3148. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3149. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3150. break;
  3151. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3152. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3153. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3154. break;
  3155. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  3156. default:
  3157. /* channel location only valid if in Mixed mode */
  3158. IL_ERR("invalid extension channel offset\n");
  3159. break;
  3160. }
  3161. }
  3162. } else {
  3163. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  3164. }
  3165. if (il->cfg->ops->hcmd->set_rxon_chain)
  3166. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3167. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  3168. "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags),
  3169. ctx->ht.protection, ctx->ht.extension_chan_offset);
  3170. }
  3171. void
  3172. il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3173. {
  3174. _il_set_rxon_ht(il, ht_conf, &il->ctx);
  3175. }
  3176. EXPORT_SYMBOL(il_set_rxon_ht);
  3177. /* Return valid, unused, channel for a passive scan to reset the RF */
  3178. u8
  3179. il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band)
  3180. {
  3181. const struct il_channel_info *ch_info;
  3182. int i;
  3183. u8 channel = 0;
  3184. u8 min, max;
  3185. if (band == IEEE80211_BAND_5GHZ) {
  3186. min = 14;
  3187. max = il->channel_count;
  3188. } else {
  3189. min = 0;
  3190. max = 14;
  3191. }
  3192. for (i = min; i < max; i++) {
  3193. channel = il->channel_info[i].channel;
  3194. if (channel == le16_to_cpu(il->ctx.staging.channel))
  3195. continue;
  3196. ch_info = il_get_channel_info(il, band, channel);
  3197. if (il_is_channel_valid(ch_info))
  3198. break;
  3199. }
  3200. return channel;
  3201. }
  3202. EXPORT_SYMBOL(il_get_single_channel_number);
  3203. /**
  3204. * il_set_rxon_channel - Set the band and channel values in staging RXON
  3205. * @ch: requested channel as a pointer to struct ieee80211_channel
  3206. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  3207. * in the staging RXON flag structure based on the ch->band
  3208. */
  3209. int
  3210. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
  3211. struct il_rxon_context *ctx)
  3212. {
  3213. enum ieee80211_band band = ch->band;
  3214. u16 channel = ch->hw_value;
  3215. if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
  3216. return 0;
  3217. ctx->staging.channel = cpu_to_le16(channel);
  3218. if (band == IEEE80211_BAND_5GHZ)
  3219. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  3220. else
  3221. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3222. il->band = band;
  3223. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  3224. return 0;
  3225. }
  3226. EXPORT_SYMBOL(il_set_rxon_channel);
  3227. void
  3228. il_set_flags_for_band(struct il_priv *il, struct il_rxon_context *ctx,
  3229. enum ieee80211_band band, struct ieee80211_vif *vif)
  3230. {
  3231. if (band == IEEE80211_BAND_5GHZ) {
  3232. ctx->staging.flags &=
  3233. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  3234. RXON_FLG_CCK_MSK);
  3235. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3236. } else {
  3237. /* Copied from il_post_associate() */
  3238. if (vif && vif->bss_conf.use_short_slot)
  3239. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3240. else
  3241. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3242. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3243. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  3244. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  3245. }
  3246. }
  3247. EXPORT_SYMBOL(il_set_flags_for_band);
  3248. /*
  3249. * initialize rxon structure with default values from eeprom
  3250. */
  3251. void
  3252. il_connection_init_rx_config(struct il_priv *il, struct il_rxon_context *ctx)
  3253. {
  3254. const struct il_channel_info *ch_info;
  3255. memset(&ctx->staging, 0, sizeof(ctx->staging));
  3256. if (!ctx->vif) {
  3257. ctx->staging.dev_type = ctx->unused_devtype;
  3258. } else
  3259. switch (ctx->vif->type) {
  3260. case NL80211_IFTYPE_STATION:
  3261. ctx->staging.dev_type = ctx->station_devtype;
  3262. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  3263. break;
  3264. case NL80211_IFTYPE_ADHOC:
  3265. ctx->staging.dev_type = ctx->ibss_devtype;
  3266. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  3267. ctx->staging.filter_flags =
  3268. RXON_FILTER_BCON_AWARE_MSK |
  3269. RXON_FILTER_ACCEPT_GRP_MSK;
  3270. break;
  3271. default:
  3272. IL_ERR("Unsupported interface type %d\n",
  3273. ctx->vif->type);
  3274. break;
  3275. }
  3276. #if 0
  3277. /* TODO: Figure out when short_preamble would be set and cache from
  3278. * that */
  3279. if (!hw_to_local(il->hw)->short_preamble)
  3280. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3281. else
  3282. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3283. #endif
  3284. ch_info =
  3285. il_get_channel_info(il, il->band, le16_to_cpu(ctx->active.channel));
  3286. if (!ch_info)
  3287. ch_info = &il->channel_info[0];
  3288. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  3289. il->band = ch_info->band;
  3290. il_set_flags_for_band(il, ctx, il->band, ctx->vif);
  3291. ctx->staging.ofdm_basic_rates =
  3292. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3293. ctx->staging.cck_basic_rates =
  3294. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3295. /* clear both MIX and PURE40 mode flag */
  3296. ctx->staging.flags &=
  3297. ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40);
  3298. if (ctx->vif)
  3299. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  3300. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  3301. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  3302. }
  3303. EXPORT_SYMBOL(il_connection_init_rx_config);
  3304. void
  3305. il_set_rate(struct il_priv *il)
  3306. {
  3307. const struct ieee80211_supported_band *hw = NULL;
  3308. struct ieee80211_rate *rate;
  3309. int i;
  3310. hw = il_get_hw_mode(il, il->band);
  3311. if (!hw) {
  3312. IL_ERR("Failed to set rate: unable to get hw mode\n");
  3313. return;
  3314. }
  3315. il->active_rate = 0;
  3316. for (i = 0; i < hw->n_bitrates; i++) {
  3317. rate = &(hw->bitrates[i]);
  3318. if (rate->hw_value < RATE_COUNT_LEGACY)
  3319. il->active_rate |= (1 << rate->hw_value);
  3320. }
  3321. D_RATE("Set active_rate = %0x\n", il->active_rate);
  3322. il->ctx.staging.cck_basic_rates =
  3323. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3324. il->ctx.staging.ofdm_basic_rates =
  3325. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3326. }
  3327. EXPORT_SYMBOL(il_set_rate);
  3328. void
  3329. il_chswitch_done(struct il_priv *il, bool is_success)
  3330. {
  3331. struct il_rxon_context *ctx = &il->ctx;
  3332. if (test_bit(S_EXIT_PENDING, &il->status))
  3333. return;
  3334. if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3335. ieee80211_chswitch_done(ctx->vif, is_success);
  3336. }
  3337. EXPORT_SYMBOL(il_chswitch_done);
  3338. void
  3339. il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
  3340. {
  3341. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3342. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  3343. struct il_rxon_context *ctx = &il->ctx;
  3344. struct il_rxon_cmd *rxon = (void *)&ctx->active;
  3345. if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3346. return;
  3347. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  3348. rxon->channel = csa->channel;
  3349. ctx->staging.channel = csa->channel;
  3350. D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel));
  3351. il_chswitch_done(il, true);
  3352. } else {
  3353. IL_ERR("CSA notif (fail) : channel %d\n",
  3354. le16_to_cpu(csa->channel));
  3355. il_chswitch_done(il, false);
  3356. }
  3357. }
  3358. EXPORT_SYMBOL(il_hdl_csa);
  3359. #ifdef CONFIG_IWLEGACY_DEBUG
  3360. void
  3361. il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  3362. {
  3363. struct il_rxon_cmd *rxon = &ctx->staging;
  3364. D_RADIO("RX CONFIG:\n");
  3365. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3366. D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3367. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3368. D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags));
  3369. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3370. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates);
  3371. D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3372. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  3373. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  3374. D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3375. }
  3376. EXPORT_SYMBOL(il_print_rx_config_cmd);
  3377. #endif
  3378. /**
  3379. * il_irq_handle_error - called for HW or SW error interrupt from card
  3380. */
  3381. void
  3382. il_irq_handle_error(struct il_priv *il)
  3383. {
  3384. /* Set the FW error flag -- cleared on il_down */
  3385. set_bit(S_FW_ERROR, &il->status);
  3386. /* Cancel currently queued command. */
  3387. clear_bit(S_HCMD_ACTIVE, &il->status);
  3388. IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version);
  3389. il->cfg->ops->lib->dump_nic_error_log(il);
  3390. if (il->cfg->ops->lib->dump_fh)
  3391. il->cfg->ops->lib->dump_fh(il, NULL, false);
  3392. #ifdef CONFIG_IWLEGACY_DEBUG
  3393. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  3394. il_print_rx_config_cmd(il, &il->ctx);
  3395. #endif
  3396. wake_up(&il->wait_command_queue);
  3397. /* Keep the restart process from trying to send host
  3398. * commands by clearing the INIT status bit */
  3399. clear_bit(S_READY, &il->status);
  3400. if (!test_bit(S_EXIT_PENDING, &il->status)) {
  3401. IL_DBG(IL_DL_FW_ERRORS,
  3402. "Restarting adapter due to uCode error.\n");
  3403. if (il->cfg->mod_params->restart_fw)
  3404. queue_work(il->workqueue, &il->restart);
  3405. }
  3406. }
  3407. EXPORT_SYMBOL(il_irq_handle_error);
  3408. static int
  3409. il_apm_stop_master(struct il_priv *il)
  3410. {
  3411. int ret = 0;
  3412. /* stop device's busmaster DMA activity */
  3413. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  3414. ret =
  3415. _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  3416. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  3417. if (ret)
  3418. IL_WARN("Master Disable Timed Out, 100 usec\n");
  3419. D_INFO("stop master\n");
  3420. return ret;
  3421. }
  3422. void
  3423. il_apm_stop(struct il_priv *il)
  3424. {
  3425. D_INFO("Stop card, put in low power state\n");
  3426. /* Stop device's DMA activity */
  3427. il_apm_stop_master(il);
  3428. /* Reset the entire device */
  3429. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  3430. udelay(10);
  3431. /*
  3432. * Clear "initialization complete" bit to move adapter from
  3433. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  3434. */
  3435. il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3436. }
  3437. EXPORT_SYMBOL(il_apm_stop);
  3438. /*
  3439. * Start up NIC's basic functionality after it has been reset
  3440. * (e.g. after platform boot, or shutdown via il_apm_stop())
  3441. * NOTE: This does not load uCode nor start the embedded processor
  3442. */
  3443. int
  3444. il_apm_init(struct il_priv *il)
  3445. {
  3446. int ret = 0;
  3447. u16 lctl;
  3448. D_INFO("Init card's basic functions\n");
  3449. /*
  3450. * Use "set_bit" below rather than "write", to preserve any hardware
  3451. * bits already set by default after reset.
  3452. */
  3453. /* Disable L0S exit timer (platform NMI Work/Around) */
  3454. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3455. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  3456. /*
  3457. * Disable L0s without affecting L1;
  3458. * don't wait for ICH L0s (ICH bug W/A)
  3459. */
  3460. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3461. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  3462. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  3463. il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  3464. /*
  3465. * Enable HAP INTA (interrupt from management bus) to
  3466. * wake device's PCI Express link L1a -> L0s
  3467. * NOTE: This is no-op for 3945 (non-existent bit)
  3468. */
  3469. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  3470. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  3471. /*
  3472. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  3473. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  3474. * If so (likely), disable L0S, so device moves directly L0->L1;
  3475. * costs negligible amount of power savings.
  3476. * If not (unlikely), enable L0S, so there is at least some
  3477. * power savings, even without L1.
  3478. */
  3479. if (il->cfg->base_params->set_l0s) {
  3480. lctl = il_pcie_link_ctl(il);
  3481. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  3482. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  3483. /* L1-ASPM enabled; disable(!) L0S */
  3484. il_set_bit(il, CSR_GIO_REG,
  3485. CSR_GIO_REG_VAL_L0S_ENABLED);
  3486. D_POWER("L1 Enabled; Disabling L0S\n");
  3487. } else {
  3488. /* L1-ASPM disabled; enable(!) L0S */
  3489. il_clear_bit(il, CSR_GIO_REG,
  3490. CSR_GIO_REG_VAL_L0S_ENABLED);
  3491. D_POWER("L1 Disabled; Enabling L0S\n");
  3492. }
  3493. }
  3494. /* Configure analog phase-lock-loop before activating to D0A */
  3495. if (il->cfg->base_params->pll_cfg_val)
  3496. il_set_bit(il, CSR_ANA_PLL_CFG,
  3497. il->cfg->base_params->pll_cfg_val);
  3498. /*
  3499. * Set "initialization complete" bit to move adapter from
  3500. * D0U* --> D0A* (powered-up active) state.
  3501. */
  3502. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3503. /*
  3504. * Wait for clock stabilization; once stabilized, access to
  3505. * device-internal resources is supported, e.g. il_wr_prph()
  3506. * and accesses to uCode SRAM.
  3507. */
  3508. ret =
  3509. _il_poll_bit(il, CSR_GP_CNTRL,
  3510. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  3511. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  3512. if (ret < 0) {
  3513. D_INFO("Failed to init the card\n");
  3514. goto out;
  3515. }
  3516. /*
  3517. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  3518. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  3519. *
  3520. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  3521. * do not disable clocks. This preserves any hardware bits already
  3522. * set by default in "CLK_CTRL_REG" after reset.
  3523. */
  3524. if (il->cfg->base_params->use_bsm)
  3525. il_wr_prph(il, APMG_CLK_EN_REG,
  3526. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  3527. else
  3528. il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  3529. udelay(20);
  3530. /* Disable L1-Active */
  3531. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  3532. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  3533. out:
  3534. return ret;
  3535. }
  3536. EXPORT_SYMBOL(il_apm_init);
  3537. int
  3538. il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  3539. {
  3540. int ret;
  3541. s8 prev_tx_power;
  3542. bool defer;
  3543. struct il_rxon_context *ctx = &il->ctx;
  3544. lockdep_assert_held(&il->mutex);
  3545. if (il->tx_power_user_lmt == tx_power && !force)
  3546. return 0;
  3547. if (!il->cfg->ops->lib->send_tx_power)
  3548. return -EOPNOTSUPP;
  3549. /* 0 dBm mean 1 milliwatt */
  3550. if (tx_power < 0) {
  3551. IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power);
  3552. return -EINVAL;
  3553. }
  3554. if (tx_power > il->tx_power_device_lmt) {
  3555. IL_WARN("Requested user TXPOWER %d above upper limit %d.\n",
  3556. tx_power, il->tx_power_device_lmt);
  3557. return -EINVAL;
  3558. }
  3559. if (!il_is_ready_rf(il))
  3560. return -EIO;
  3561. /* scan complete and commit_rxon use tx_power_next value,
  3562. * it always need to be updated for newest request */
  3563. il->tx_power_next = tx_power;
  3564. /* do not set tx power when scanning or channel changing */
  3565. defer = test_bit(S_SCANNING, &il->status) ||
  3566. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  3567. if (defer && !force) {
  3568. D_INFO("Deferring tx power set\n");
  3569. return 0;
  3570. }
  3571. prev_tx_power = il->tx_power_user_lmt;
  3572. il->tx_power_user_lmt = tx_power;
  3573. ret = il->cfg->ops->lib->send_tx_power(il);
  3574. /* if fail to set tx_power, restore the orig. tx power */
  3575. if (ret) {
  3576. il->tx_power_user_lmt = prev_tx_power;
  3577. il->tx_power_next = prev_tx_power;
  3578. }
  3579. return ret;
  3580. }
  3581. EXPORT_SYMBOL(il_set_tx_power);
  3582. void
  3583. il_send_bt_config(struct il_priv *il)
  3584. {
  3585. struct il_bt_cmd bt_cmd = {
  3586. .lead_time = BT_LEAD_TIME_DEF,
  3587. .max_kill = BT_MAX_KILL_DEF,
  3588. .kill_ack_mask = 0,
  3589. .kill_cts_mask = 0,
  3590. };
  3591. if (!bt_coex_active)
  3592. bt_cmd.flags = BT_COEX_DISABLE;
  3593. else
  3594. bt_cmd.flags = BT_COEX_ENABLE;
  3595. D_INFO("BT coex %s\n",
  3596. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  3597. if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd))
  3598. IL_ERR("failed to send BT Coex Config\n");
  3599. }
  3600. EXPORT_SYMBOL(il_send_bt_config);
  3601. int
  3602. il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  3603. {
  3604. struct il_stats_cmd stats_cmd = {
  3605. .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  3606. };
  3607. if (flags & CMD_ASYNC)
  3608. return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd),
  3609. &stats_cmd, NULL);
  3610. else
  3611. return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd),
  3612. &stats_cmd);
  3613. }
  3614. EXPORT_SYMBOL(il_send_stats_request);
  3615. void
  3616. il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb)
  3617. {
  3618. #ifdef CONFIG_IWLEGACY_DEBUG
  3619. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3620. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3621. D_RX("sleep mode: %d, src: %d\n",
  3622. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3623. #endif
  3624. }
  3625. EXPORT_SYMBOL(il_hdl_pm_sleep);
  3626. void
  3627. il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb)
  3628. {
  3629. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3630. u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  3631. D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len,
  3632. il_get_cmd_string(pkt->hdr.cmd));
  3633. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  3634. }
  3635. EXPORT_SYMBOL(il_hdl_pm_debug_stats);
  3636. void
  3637. il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb)
  3638. {
  3639. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3640. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3641. "seq 0x%04X ser 0x%08X\n",
  3642. le32_to_cpu(pkt->u.err_resp.error_type),
  3643. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  3644. pkt->u.err_resp.cmd_id,
  3645. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3646. le32_to_cpu(pkt->u.err_resp.error_info));
  3647. }
  3648. EXPORT_SYMBOL(il_hdl_error);
  3649. void
  3650. il_clear_isr_stats(struct il_priv *il)
  3651. {
  3652. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  3653. }
  3654. int
  3655. il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
  3656. const struct ieee80211_tx_queue_params *params)
  3657. {
  3658. struct il_priv *il = hw->priv;
  3659. unsigned long flags;
  3660. int q;
  3661. D_MAC80211("enter\n");
  3662. if (!il_is_ready_rf(il)) {
  3663. D_MAC80211("leave - RF not ready\n");
  3664. return -EIO;
  3665. }
  3666. if (queue >= AC_NUM) {
  3667. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  3668. return 0;
  3669. }
  3670. q = AC_NUM - 1 - queue;
  3671. spin_lock_irqsave(&il->lock, flags);
  3672. il->ctx.qos_data.def_qos_parm.ac[q].cw_min =
  3673. cpu_to_le16(params->cw_min);
  3674. il->ctx.qos_data.def_qos_parm.ac[q].cw_max =
  3675. cpu_to_le16(params->cw_max);
  3676. il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3677. il->ctx.qos_data.def_qos_parm.ac[q].edca_txop =
  3678. cpu_to_le16((params->txop * 32));
  3679. il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3680. spin_unlock_irqrestore(&il->lock, flags);
  3681. D_MAC80211("leave\n");
  3682. return 0;
  3683. }
  3684. EXPORT_SYMBOL(il_mac_conf_tx);
  3685. int
  3686. il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  3687. {
  3688. struct il_priv *il = hw->priv;
  3689. return il->ibss_manager == IL_IBSS_MANAGER;
  3690. }
  3691. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  3692. static int
  3693. il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
  3694. {
  3695. il_connection_init_rx_config(il, ctx);
  3696. if (il->cfg->ops->hcmd->set_rxon_chain)
  3697. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3698. return il_commit_rxon(il, ctx);
  3699. }
  3700. static int
  3701. il_setup_interface(struct il_priv *il, struct il_rxon_context *ctx)
  3702. {
  3703. struct ieee80211_vif *vif = ctx->vif;
  3704. int err;
  3705. lockdep_assert_held(&il->mutex);
  3706. /*
  3707. * This variable will be correct only when there's just
  3708. * a single context, but all code using it is for hardware
  3709. * that supports only one context.
  3710. */
  3711. il->iw_mode = vif->type;
  3712. ctx->is_active = true;
  3713. err = il_set_mode(il, ctx);
  3714. if (err) {
  3715. if (!ctx->always_active)
  3716. ctx->is_active = false;
  3717. return err;
  3718. }
  3719. return 0;
  3720. }
  3721. int
  3722. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3723. {
  3724. struct il_priv *il = hw->priv;
  3725. struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
  3726. int err;
  3727. u32 modes;
  3728. D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
  3729. mutex_lock(&il->mutex);
  3730. if (!il_is_ready_rf(il)) {
  3731. IL_WARN("Try to add interface when device not ready\n");
  3732. err = -EINVAL;
  3733. goto out;
  3734. }
  3735. /* check if busy context is exclusive */
  3736. if (il->ctx.vif &&
  3737. (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) {
  3738. err = -EINVAL;
  3739. goto out;
  3740. }
  3741. modes = il->ctx.interface_modes | il->ctx.exclusive_interface_modes;
  3742. if (!(modes & BIT(vif->type))) {
  3743. err = -EOPNOTSUPP;
  3744. goto out;
  3745. }
  3746. vif_priv->ctx = &il->ctx;
  3747. il->ctx.vif = vif;
  3748. err = il_setup_interface(il, &il->ctx);
  3749. if (err) {
  3750. il->ctx.vif = NULL;
  3751. il->iw_mode = NL80211_IFTYPE_STATION;
  3752. }
  3753. out:
  3754. mutex_unlock(&il->mutex);
  3755. D_MAC80211("leave\n");
  3756. return err;
  3757. }
  3758. EXPORT_SYMBOL(il_mac_add_interface);
  3759. static void
  3760. il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif,
  3761. bool mode_change)
  3762. {
  3763. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3764. lockdep_assert_held(&il->mutex);
  3765. if (il->scan_vif == vif) {
  3766. il_scan_cancel_timeout(il, 200);
  3767. il_force_scan_end(il);
  3768. }
  3769. if (!mode_change) {
  3770. il_set_mode(il, ctx);
  3771. if (!ctx->always_active)
  3772. ctx->is_active = false;
  3773. }
  3774. }
  3775. void
  3776. il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3777. {
  3778. struct il_priv *il = hw->priv;
  3779. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3780. D_MAC80211("enter\n");
  3781. mutex_lock(&il->mutex);
  3782. WARN_ON(ctx->vif != vif);
  3783. ctx->vif = NULL;
  3784. il_teardown_interface(il, vif, false);
  3785. memset(il->bssid, 0, ETH_ALEN);
  3786. mutex_unlock(&il->mutex);
  3787. D_MAC80211("leave\n");
  3788. }
  3789. EXPORT_SYMBOL(il_mac_remove_interface);
  3790. int
  3791. il_alloc_txq_mem(struct il_priv *il)
  3792. {
  3793. if (!il->txq)
  3794. il->txq =
  3795. kzalloc(sizeof(struct il_tx_queue) *
  3796. il->cfg->base_params->num_of_queues, GFP_KERNEL);
  3797. if (!il->txq) {
  3798. IL_ERR("Not enough memory for txq\n");
  3799. return -ENOMEM;
  3800. }
  3801. return 0;
  3802. }
  3803. EXPORT_SYMBOL(il_alloc_txq_mem);
  3804. void
  3805. il_txq_mem(struct il_priv *il)
  3806. {
  3807. kfree(il->txq);
  3808. il->txq = NULL;
  3809. }
  3810. EXPORT_SYMBOL(il_txq_mem);
  3811. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3812. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  3813. void
  3814. il_reset_traffic_log(struct il_priv *il)
  3815. {
  3816. il->tx_traffic_idx = 0;
  3817. il->rx_traffic_idx = 0;
  3818. if (il->tx_traffic)
  3819. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3820. if (il->rx_traffic)
  3821. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3822. }
  3823. int
  3824. il_alloc_traffic_mem(struct il_priv *il)
  3825. {
  3826. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  3827. if (il_debug_level & IL_DL_TX) {
  3828. if (!il->tx_traffic) {
  3829. il->tx_traffic = kzalloc(traffic_size, GFP_KERNEL);
  3830. if (!il->tx_traffic)
  3831. return -ENOMEM;
  3832. }
  3833. }
  3834. if (il_debug_level & IL_DL_RX) {
  3835. if (!il->rx_traffic) {
  3836. il->rx_traffic = kzalloc(traffic_size, GFP_KERNEL);
  3837. if (!il->rx_traffic)
  3838. return -ENOMEM;
  3839. }
  3840. }
  3841. il_reset_traffic_log(il);
  3842. return 0;
  3843. }
  3844. EXPORT_SYMBOL(il_alloc_traffic_mem);
  3845. void
  3846. il_free_traffic_mem(struct il_priv *il)
  3847. {
  3848. kfree(il->tx_traffic);
  3849. il->tx_traffic = NULL;
  3850. kfree(il->rx_traffic);
  3851. il->rx_traffic = NULL;
  3852. }
  3853. EXPORT_SYMBOL(il_free_traffic_mem);
  3854. void
  3855. il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
  3856. struct ieee80211_hdr *header)
  3857. {
  3858. __le16 fc;
  3859. u16 len;
  3860. if (likely(!(il_debug_level & IL_DL_TX)))
  3861. return;
  3862. if (!il->tx_traffic)
  3863. return;
  3864. fc = header->frame_control;
  3865. if (ieee80211_is_data(fc)) {
  3866. len =
  3867. (length >
  3868. IL_TRAFFIC_ENTRY_SIZE) ? IL_TRAFFIC_ENTRY_SIZE : length;
  3869. memcpy((il->tx_traffic +
  3870. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), header,
  3871. len);
  3872. il->tx_traffic_idx =
  3873. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3874. }
  3875. }
  3876. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  3877. void
  3878. il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
  3879. struct ieee80211_hdr *header)
  3880. {
  3881. __le16 fc;
  3882. u16 len;
  3883. if (likely(!(il_debug_level & IL_DL_RX)))
  3884. return;
  3885. if (!il->rx_traffic)
  3886. return;
  3887. fc = header->frame_control;
  3888. if (ieee80211_is_data(fc)) {
  3889. len =
  3890. (length >
  3891. IL_TRAFFIC_ENTRY_SIZE) ? IL_TRAFFIC_ENTRY_SIZE : length;
  3892. memcpy((il->rx_traffic +
  3893. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), header,
  3894. len);
  3895. il->rx_traffic_idx =
  3896. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3897. }
  3898. }
  3899. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  3900. const char *
  3901. il_get_mgmt_string(int cmd)
  3902. {
  3903. switch (cmd) {
  3904. IL_CMD(MANAGEMENT_ASSOC_REQ);
  3905. IL_CMD(MANAGEMENT_ASSOC_RESP);
  3906. IL_CMD(MANAGEMENT_REASSOC_REQ);
  3907. IL_CMD(MANAGEMENT_REASSOC_RESP);
  3908. IL_CMD(MANAGEMENT_PROBE_REQ);
  3909. IL_CMD(MANAGEMENT_PROBE_RESP);
  3910. IL_CMD(MANAGEMENT_BEACON);
  3911. IL_CMD(MANAGEMENT_ATIM);
  3912. IL_CMD(MANAGEMENT_DISASSOC);
  3913. IL_CMD(MANAGEMENT_AUTH);
  3914. IL_CMD(MANAGEMENT_DEAUTH);
  3915. IL_CMD(MANAGEMENT_ACTION);
  3916. default:
  3917. return "UNKNOWN";
  3918. }
  3919. }
  3920. const char *
  3921. il_get_ctrl_string(int cmd)
  3922. {
  3923. switch (cmd) {
  3924. IL_CMD(CONTROL_BACK_REQ);
  3925. IL_CMD(CONTROL_BACK);
  3926. IL_CMD(CONTROL_PSPOLL);
  3927. IL_CMD(CONTROL_RTS);
  3928. IL_CMD(CONTROL_CTS);
  3929. IL_CMD(CONTROL_ACK);
  3930. IL_CMD(CONTROL_CFEND);
  3931. IL_CMD(CONTROL_CFENDACK);
  3932. default:
  3933. return "UNKNOWN";
  3934. }
  3935. }
  3936. void
  3937. il_clear_traffic_stats(struct il_priv *il)
  3938. {
  3939. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  3940. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  3941. }
  3942. /*
  3943. * if CONFIG_IWLEGACY_DEBUGFS defined,
  3944. * il_update_stats function will
  3945. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  3946. * Use debugFs to display the rx/rx_stats
  3947. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  3948. * information will be recorded, but DATA pkt still will be recorded
  3949. * for the reason of il_led.c need to control the led blinking based on
  3950. * number of tx and rx data.
  3951. *
  3952. */
  3953. void
  3954. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  3955. {
  3956. struct traffic_stats *stats;
  3957. if (is_tx)
  3958. stats = &il->tx_stats;
  3959. else
  3960. stats = &il->rx_stats;
  3961. if (ieee80211_is_mgmt(fc)) {
  3962. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  3963. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  3964. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  3965. break;
  3966. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  3967. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  3968. break;
  3969. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  3970. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  3971. break;
  3972. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  3973. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  3974. break;
  3975. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  3976. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  3977. break;
  3978. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  3979. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  3980. break;
  3981. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  3982. stats->mgmt[MANAGEMENT_BEACON]++;
  3983. break;
  3984. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  3985. stats->mgmt[MANAGEMENT_ATIM]++;
  3986. break;
  3987. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  3988. stats->mgmt[MANAGEMENT_DISASSOC]++;
  3989. break;
  3990. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  3991. stats->mgmt[MANAGEMENT_AUTH]++;
  3992. break;
  3993. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  3994. stats->mgmt[MANAGEMENT_DEAUTH]++;
  3995. break;
  3996. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  3997. stats->mgmt[MANAGEMENT_ACTION]++;
  3998. break;
  3999. }
  4000. } else if (ieee80211_is_ctl(fc)) {
  4001. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4002. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  4003. stats->ctrl[CONTROL_BACK_REQ]++;
  4004. break;
  4005. case cpu_to_le16(IEEE80211_STYPE_BACK):
  4006. stats->ctrl[CONTROL_BACK]++;
  4007. break;
  4008. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  4009. stats->ctrl[CONTROL_PSPOLL]++;
  4010. break;
  4011. case cpu_to_le16(IEEE80211_STYPE_RTS):
  4012. stats->ctrl[CONTROL_RTS]++;
  4013. break;
  4014. case cpu_to_le16(IEEE80211_STYPE_CTS):
  4015. stats->ctrl[CONTROL_CTS]++;
  4016. break;
  4017. case cpu_to_le16(IEEE80211_STYPE_ACK):
  4018. stats->ctrl[CONTROL_ACK]++;
  4019. break;
  4020. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  4021. stats->ctrl[CONTROL_CFEND]++;
  4022. break;
  4023. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  4024. stats->ctrl[CONTROL_CFENDACK]++;
  4025. break;
  4026. }
  4027. } else {
  4028. /* data */
  4029. stats->data_cnt++;
  4030. stats->data_bytes += len;
  4031. }
  4032. }
  4033. EXPORT_SYMBOL(il_update_stats);
  4034. #endif
  4035. int
  4036. il_force_reset(struct il_priv *il, bool external)
  4037. {
  4038. struct il_force_reset *force_reset;
  4039. if (test_bit(S_EXIT_PENDING, &il->status))
  4040. return -EINVAL;
  4041. force_reset = &il->force_reset;
  4042. force_reset->reset_request_count++;
  4043. if (!external) {
  4044. if (force_reset->last_force_reset_jiffies &&
  4045. time_after(force_reset->last_force_reset_jiffies +
  4046. force_reset->reset_duration, jiffies)) {
  4047. D_INFO("force reset rejected\n");
  4048. force_reset->reset_reject_count++;
  4049. return -EAGAIN;
  4050. }
  4051. }
  4052. force_reset->reset_success_count++;
  4053. force_reset->last_force_reset_jiffies = jiffies;
  4054. /*
  4055. * if the request is from external(ex: debugfs),
  4056. * then always perform the request in regardless the module
  4057. * parameter setting
  4058. * if the request is from internal (uCode error or driver
  4059. * detect failure), then fw_restart module parameter
  4060. * need to be check before performing firmware reload
  4061. */
  4062. if (!external && !il->cfg->mod_params->restart_fw) {
  4063. D_INFO("Cancel firmware reload based on "
  4064. "module parameter setting\n");
  4065. return 0;
  4066. }
  4067. IL_ERR("On demand firmware reload\n");
  4068. /* Set the FW error flag -- cleared on il_down */
  4069. set_bit(S_FW_ERROR, &il->status);
  4070. wake_up(&il->wait_command_queue);
  4071. /*
  4072. * Keep the restart process from trying to send host
  4073. * commands by clearing the INIT status bit
  4074. */
  4075. clear_bit(S_READY, &il->status);
  4076. queue_work(il->workqueue, &il->restart);
  4077. return 0;
  4078. }
  4079. int
  4080. il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4081. enum nl80211_iftype newtype, bool newp2p)
  4082. {
  4083. struct il_priv *il = hw->priv;
  4084. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4085. u32 modes;
  4086. int err;
  4087. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  4088. mutex_lock(&il->mutex);
  4089. if (!ctx->vif || !il_is_ready_rf(il)) {
  4090. /*
  4091. * Huh? But wait ... this can maybe happen when
  4092. * we're in the middle of a firmware restart!
  4093. */
  4094. err = -EBUSY;
  4095. goto out;
  4096. }
  4097. modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  4098. if (!(modes & BIT(newtype))) {
  4099. err = -EOPNOTSUPP;
  4100. goto out;
  4101. }
  4102. if ((il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type)) ||
  4103. (il->ctx.exclusive_interface_modes & BIT(newtype))) {
  4104. err = -EINVAL;
  4105. goto out;
  4106. }
  4107. /* success */
  4108. il_teardown_interface(il, vif, true);
  4109. vif->type = newtype;
  4110. vif->p2p = newp2p;
  4111. err = il_setup_interface(il, ctx);
  4112. WARN_ON(err);
  4113. /*
  4114. * We've switched internally, but submitting to the
  4115. * device may have failed for some reason. Mask this
  4116. * error, because otherwise mac80211 will not switch
  4117. * (and set the interface type back) and we'll be
  4118. * out of sync with it.
  4119. */
  4120. err = 0;
  4121. out:
  4122. mutex_unlock(&il->mutex);
  4123. return err;
  4124. }
  4125. EXPORT_SYMBOL(il_mac_change_interface);
  4126. /*
  4127. * On every watchdog tick we check (latest) time stamp. If it does not
  4128. * change during timeout period and queue is not empty we reset firmware.
  4129. */
  4130. static int
  4131. il_check_stuck_queue(struct il_priv *il, int cnt)
  4132. {
  4133. struct il_tx_queue *txq = &il->txq[cnt];
  4134. struct il_queue *q = &txq->q;
  4135. unsigned long timeout;
  4136. int ret;
  4137. if (q->read_ptr == q->write_ptr) {
  4138. txq->time_stamp = jiffies;
  4139. return 0;
  4140. }
  4141. timeout =
  4142. txq->time_stamp +
  4143. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  4144. if (time_after(jiffies, timeout)) {
  4145. IL_ERR("Queue %d stuck for %u ms.\n", q->id,
  4146. il->cfg->base_params->wd_timeout);
  4147. ret = il_force_reset(il, false);
  4148. return (ret == -EAGAIN) ? 0 : 1;
  4149. }
  4150. return 0;
  4151. }
  4152. /*
  4153. * Making watchdog tick be a quarter of timeout assure we will
  4154. * discover the queue hung between timeout and 1.25*timeout
  4155. */
  4156. #define IL_WD_TICK(timeout) ((timeout) / 4)
  4157. /*
  4158. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  4159. * we reset the firmware. If everything is fine just rearm the timer.
  4160. */
  4161. void
  4162. il_bg_watchdog(unsigned long data)
  4163. {
  4164. struct il_priv *il = (struct il_priv *)data;
  4165. int cnt;
  4166. unsigned long timeout;
  4167. if (test_bit(S_EXIT_PENDING, &il->status))
  4168. return;
  4169. timeout = il->cfg->base_params->wd_timeout;
  4170. if (timeout == 0)
  4171. return;
  4172. /* monitor and check for stuck cmd queue */
  4173. if (il_check_stuck_queue(il, il->cmd_queue))
  4174. return;
  4175. /* monitor and check for other stuck queues */
  4176. if (il_is_any_associated(il)) {
  4177. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  4178. /* skip as we already checked the command queue */
  4179. if (cnt == il->cmd_queue)
  4180. continue;
  4181. if (il_check_stuck_queue(il, cnt))
  4182. return;
  4183. }
  4184. }
  4185. mod_timer(&il->watchdog,
  4186. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4187. }
  4188. EXPORT_SYMBOL(il_bg_watchdog);
  4189. void
  4190. il_setup_watchdog(struct il_priv *il)
  4191. {
  4192. unsigned int timeout = il->cfg->base_params->wd_timeout;
  4193. if (timeout)
  4194. mod_timer(&il->watchdog,
  4195. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4196. else
  4197. del_timer(&il->watchdog);
  4198. }
  4199. EXPORT_SYMBOL(il_setup_watchdog);
  4200. /*
  4201. * extended beacon time format
  4202. * time in usec will be changed into a 32-bit value in extended:internal format
  4203. * the extended part is the beacon counts
  4204. * the internal part is the time in usec within one beacon interval
  4205. */
  4206. u32
  4207. il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval)
  4208. {
  4209. u32 quot;
  4210. u32 rem;
  4211. u32 interval = beacon_interval * TIME_UNIT;
  4212. if (!interval || !usec)
  4213. return 0;
  4214. quot =
  4215. (usec /
  4216. interval) & (il_beacon_time_mask_high(il,
  4217. il->hw_params.
  4218. beacon_time_tsf_bits) >> il->
  4219. hw_params.beacon_time_tsf_bits);
  4220. rem =
  4221. (usec % interval) & il_beacon_time_mask_low(il,
  4222. il->hw_params.
  4223. beacon_time_tsf_bits);
  4224. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  4225. }
  4226. EXPORT_SYMBOL(il_usecs_to_beacons);
  4227. /* base is usually what we get from ucode with each received frame,
  4228. * the same as HW timer counter counting down
  4229. */
  4230. __le32
  4231. il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
  4232. u32 beacon_interval)
  4233. {
  4234. u32 base_low = base & il_beacon_time_mask_low(il,
  4235. il->hw_params.
  4236. beacon_time_tsf_bits);
  4237. u32 addon_low = addon & il_beacon_time_mask_low(il,
  4238. il->hw_params.
  4239. beacon_time_tsf_bits);
  4240. u32 interval = beacon_interval * TIME_UNIT;
  4241. u32 res = (base & il_beacon_time_mask_high(il,
  4242. il->hw_params.
  4243. beacon_time_tsf_bits)) +
  4244. (addon & il_beacon_time_mask_high(il,
  4245. il->hw_params.
  4246. beacon_time_tsf_bits));
  4247. if (base_low > addon_low)
  4248. res += base_low - addon_low;
  4249. else if (base_low < addon_low) {
  4250. res += interval + base_low - addon_low;
  4251. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4252. } else
  4253. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4254. return cpu_to_le32(res);
  4255. }
  4256. EXPORT_SYMBOL(il_add_beacon_time);
  4257. #ifdef CONFIG_PM
  4258. int
  4259. il_pci_suspend(struct device *device)
  4260. {
  4261. struct pci_dev *pdev = to_pci_dev(device);
  4262. struct il_priv *il = pci_get_drvdata(pdev);
  4263. /*
  4264. * This function is called when system goes into suspend state
  4265. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  4266. * first but since il_mac_stop() has no knowledge of who the caller is,
  4267. * it will not call apm_ops.stop() to stop the DMA operation.
  4268. * Calling apm_ops.stop here to make sure we stop the DMA.
  4269. */
  4270. il_apm_stop(il);
  4271. return 0;
  4272. }
  4273. EXPORT_SYMBOL(il_pci_suspend);
  4274. int
  4275. il_pci_resume(struct device *device)
  4276. {
  4277. struct pci_dev *pdev = to_pci_dev(device);
  4278. struct il_priv *il = pci_get_drvdata(pdev);
  4279. bool hw_rfkill = false;
  4280. /*
  4281. * We disable the RETRY_TIMEOUT register (0x41) to keep
  4282. * PCI Tx retries from interfering with C3 CPU state.
  4283. */
  4284. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  4285. il_enable_interrupts(il);
  4286. if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4287. hw_rfkill = true;
  4288. if (hw_rfkill)
  4289. set_bit(S_RF_KILL_HW, &il->status);
  4290. else
  4291. clear_bit(S_RF_KILL_HW, &il->status);
  4292. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  4293. return 0;
  4294. }
  4295. EXPORT_SYMBOL(il_pci_resume);
  4296. const struct dev_pm_ops il_pm_ops = {
  4297. .suspend = il_pci_suspend,
  4298. .resume = il_pci_resume,
  4299. .freeze = il_pci_suspend,
  4300. .thaw = il_pci_resume,
  4301. .poweroff = il_pci_suspend,
  4302. .restore = il_pci_resume,
  4303. };
  4304. EXPORT_SYMBOL(il_pm_ops);
  4305. #endif /* CONFIG_PM */
  4306. static void
  4307. il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
  4308. {
  4309. if (test_bit(S_EXIT_PENDING, &il->status))
  4310. return;
  4311. if (!ctx->is_active)
  4312. return;
  4313. ctx->qos_data.def_qos_parm.qos_flags = 0;
  4314. if (ctx->qos_data.qos_active)
  4315. ctx->qos_data.def_qos_parm.qos_flags |=
  4316. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  4317. if (ctx->ht.enabled)
  4318. ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  4319. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  4320. ctx->qos_data.qos_active, ctx->qos_data.def_qos_parm.qos_flags);
  4321. il_send_cmd_pdu_async(il, ctx->qos_cmd, sizeof(struct il_qosparam_cmd),
  4322. &ctx->qos_data.def_qos_parm, NULL);
  4323. }
  4324. /**
  4325. * il_mac_config - mac80211 config callback
  4326. */
  4327. int
  4328. il_mac_config(struct ieee80211_hw *hw, u32 changed)
  4329. {
  4330. struct il_priv *il = hw->priv;
  4331. const struct il_channel_info *ch_info;
  4332. struct ieee80211_conf *conf = &hw->conf;
  4333. struct ieee80211_channel *channel = conf->channel;
  4334. struct il_ht_config *ht_conf = &il->current_ht_config;
  4335. struct il_rxon_context *ctx = &il->ctx;
  4336. unsigned long flags = 0;
  4337. int ret = 0;
  4338. u16 ch;
  4339. int scan_active = 0;
  4340. bool ht_changed = false;
  4341. if (WARN_ON(!il->cfg->ops->legacy))
  4342. return -EOPNOTSUPP;
  4343. mutex_lock(&il->mutex);
  4344. D_MAC80211("enter to channel %d changed 0x%X\n", channel->hw_value,
  4345. changed);
  4346. if (unlikely(test_bit(S_SCANNING, &il->status))) {
  4347. scan_active = 1;
  4348. D_MAC80211("scan active\n");
  4349. }
  4350. if (changed &
  4351. (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) {
  4352. /* mac80211 uses static for non-HT which is what we want */
  4353. il->current_ht_config.smps = conf->smps_mode;
  4354. /*
  4355. * Recalculate chain counts.
  4356. *
  4357. * If monitor mode is enabled then mac80211 will
  4358. * set up the SM PS mode to OFF if an HT channel is
  4359. * configured.
  4360. */
  4361. if (il->cfg->ops->hcmd->set_rxon_chain)
  4362. il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
  4363. }
  4364. /* during scanning mac80211 will delay channel setting until
  4365. * scan finish with changed = 0
  4366. */
  4367. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  4368. if (scan_active)
  4369. goto set_ch_out;
  4370. ch = channel->hw_value;
  4371. ch_info = il_get_channel_info(il, channel->band, ch);
  4372. if (!il_is_channel_valid(ch_info)) {
  4373. D_MAC80211("leave - invalid channel\n");
  4374. ret = -EINVAL;
  4375. goto set_ch_out;
  4376. }
  4377. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  4378. !il_is_channel_ibss(ch_info)) {
  4379. D_MAC80211("leave - not IBSS channel\n");
  4380. ret = -EINVAL;
  4381. goto set_ch_out;
  4382. }
  4383. spin_lock_irqsave(&il->lock, flags);
  4384. /* Configure HT40 channels */
  4385. if (ctx->ht.enabled != conf_is_ht(conf)) {
  4386. ctx->ht.enabled = conf_is_ht(conf);
  4387. ht_changed = true;
  4388. }
  4389. if (ctx->ht.enabled) {
  4390. if (conf_is_ht40_minus(conf)) {
  4391. ctx->ht.extension_chan_offset =
  4392. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  4393. ctx->ht.is_40mhz = true;
  4394. } else if (conf_is_ht40_plus(conf)) {
  4395. ctx->ht.extension_chan_offset =
  4396. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  4397. ctx->ht.is_40mhz = true;
  4398. } else {
  4399. ctx->ht.extension_chan_offset =
  4400. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  4401. ctx->ht.is_40mhz = false;
  4402. }
  4403. } else
  4404. ctx->ht.is_40mhz = false;
  4405. /*
  4406. * Default to no protection. Protection mode will
  4407. * later be set from BSS config in il_ht_conf
  4408. */
  4409. ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  4410. /* if we are switching from ht to 2.4 clear flags
  4411. * from any ht related info since 2.4 does not
  4412. * support ht */
  4413. if ((le16_to_cpu(ctx->staging.channel) != ch))
  4414. ctx->staging.flags = 0;
  4415. il_set_rxon_channel(il, channel, ctx);
  4416. il_set_rxon_ht(il, ht_conf);
  4417. il_set_flags_for_band(il, ctx, channel->band, ctx->vif);
  4418. spin_unlock_irqrestore(&il->lock, flags);
  4419. if (il->cfg->ops->legacy->update_bcast_stations)
  4420. ret = il->cfg->ops->legacy->update_bcast_stations(il);
  4421. set_ch_out:
  4422. /* The list of supported rates and rate mask can be different
  4423. * for each band; since the band may have changed, reset
  4424. * the rate mask to what mac80211 lists */
  4425. il_set_rate(il);
  4426. }
  4427. if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) {
  4428. ret = il_power_update_mode(il, false);
  4429. if (ret)
  4430. D_MAC80211("Error setting sleep level\n");
  4431. }
  4432. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  4433. D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt,
  4434. conf->power_level);
  4435. il_set_tx_power(il, conf->power_level, false);
  4436. }
  4437. if (!il_is_ready(il)) {
  4438. D_MAC80211("leave - not ready\n");
  4439. goto out;
  4440. }
  4441. if (scan_active)
  4442. goto out;
  4443. if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
  4444. il_commit_rxon(il, ctx);
  4445. else
  4446. D_INFO("Not re-sending same RXON configuration.\n");
  4447. if (ht_changed)
  4448. il_update_qos(il, ctx);
  4449. out:
  4450. D_MAC80211("leave\n");
  4451. mutex_unlock(&il->mutex);
  4452. return ret;
  4453. }
  4454. EXPORT_SYMBOL(il_mac_config);
  4455. void
  4456. il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  4457. {
  4458. struct il_priv *il = hw->priv;
  4459. unsigned long flags;
  4460. struct il_rxon_context *ctx = &il->ctx;
  4461. if (WARN_ON(!il->cfg->ops->legacy))
  4462. return;
  4463. mutex_lock(&il->mutex);
  4464. D_MAC80211("enter\n");
  4465. spin_lock_irqsave(&il->lock, flags);
  4466. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  4467. spin_unlock_irqrestore(&il->lock, flags);
  4468. spin_lock_irqsave(&il->lock, flags);
  4469. /* new association get rid of ibss beacon skb */
  4470. if (il->beacon_skb)
  4471. dev_kfree_skb(il->beacon_skb);
  4472. il->beacon_skb = NULL;
  4473. il->timestamp = 0;
  4474. spin_unlock_irqrestore(&il->lock, flags);
  4475. il_scan_cancel_timeout(il, 100);
  4476. if (!il_is_ready_rf(il)) {
  4477. D_MAC80211("leave - not ready\n");
  4478. mutex_unlock(&il->mutex);
  4479. return;
  4480. }
  4481. /* we are restarting association process
  4482. * clear RXON_FILTER_ASSOC_MSK bit
  4483. */
  4484. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4485. il_commit_rxon(il, ctx);
  4486. il_set_rate(il);
  4487. mutex_unlock(&il->mutex);
  4488. D_MAC80211("leave\n");
  4489. }
  4490. EXPORT_SYMBOL(il_mac_reset_tsf);
  4491. static void
  4492. il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif)
  4493. {
  4494. struct il_ht_config *ht_conf = &il->current_ht_config;
  4495. struct ieee80211_sta *sta;
  4496. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  4497. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4498. D_ASSOC("enter:\n");
  4499. if (!ctx->ht.enabled)
  4500. return;
  4501. ctx->ht.protection =
  4502. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  4503. ctx->ht.non_gf_sta_present =
  4504. !!(bss_conf->
  4505. ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  4506. ht_conf->single_chain_sufficient = false;
  4507. switch (vif->type) {
  4508. case NL80211_IFTYPE_STATION:
  4509. rcu_read_lock();
  4510. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  4511. if (sta) {
  4512. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  4513. int maxstreams;
  4514. maxstreams =
  4515. (ht_cap->mcs.
  4516. tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  4517. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  4518. maxstreams += 1;
  4519. if (ht_cap->mcs.rx_mask[1] == 0 &&
  4520. ht_cap->mcs.rx_mask[2] == 0)
  4521. ht_conf->single_chain_sufficient = true;
  4522. if (maxstreams <= 1)
  4523. ht_conf->single_chain_sufficient = true;
  4524. } else {
  4525. /*
  4526. * If at all, this can only happen through a race
  4527. * when the AP disconnects us while we're still
  4528. * setting up the connection, in that case mac80211
  4529. * will soon tell us about that.
  4530. */
  4531. ht_conf->single_chain_sufficient = true;
  4532. }
  4533. rcu_read_unlock();
  4534. break;
  4535. case NL80211_IFTYPE_ADHOC:
  4536. ht_conf->single_chain_sufficient = true;
  4537. break;
  4538. default:
  4539. break;
  4540. }
  4541. D_ASSOC("leave\n");
  4542. }
  4543. static inline void
  4544. il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif)
  4545. {
  4546. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4547. /*
  4548. * inform the ucode that there is no longer an
  4549. * association and that no more packets should be
  4550. * sent
  4551. */
  4552. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4553. ctx->staging.assoc_id = 0;
  4554. il_commit_rxon(il, ctx);
  4555. }
  4556. static void
  4557. il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  4558. {
  4559. struct il_priv *il = hw->priv;
  4560. unsigned long flags;
  4561. __le64 timestamp;
  4562. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  4563. if (!skb)
  4564. return;
  4565. D_MAC80211("enter\n");
  4566. lockdep_assert_held(&il->mutex);
  4567. if (!il->beacon_ctx) {
  4568. IL_ERR("update beacon but no beacon context!\n");
  4569. dev_kfree_skb(skb);
  4570. return;
  4571. }
  4572. spin_lock_irqsave(&il->lock, flags);
  4573. if (il->beacon_skb)
  4574. dev_kfree_skb(il->beacon_skb);
  4575. il->beacon_skb = skb;
  4576. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  4577. il->timestamp = le64_to_cpu(timestamp);
  4578. D_MAC80211("leave\n");
  4579. spin_unlock_irqrestore(&il->lock, flags);
  4580. if (!il_is_ready_rf(il)) {
  4581. D_MAC80211("leave - RF not ready\n");
  4582. return;
  4583. }
  4584. il->cfg->ops->legacy->post_associate(il);
  4585. }
  4586. void
  4587. il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4588. struct ieee80211_bss_conf *bss_conf, u32 changes)
  4589. {
  4590. struct il_priv *il = hw->priv;
  4591. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4592. int ret;
  4593. if (WARN_ON(!il->cfg->ops->legacy))
  4594. return;
  4595. D_MAC80211("changes = 0x%X\n", changes);
  4596. mutex_lock(&il->mutex);
  4597. if (!il_is_alive(il)) {
  4598. mutex_unlock(&il->mutex);
  4599. return;
  4600. }
  4601. if (changes & BSS_CHANGED_QOS) {
  4602. unsigned long flags;
  4603. spin_lock_irqsave(&il->lock, flags);
  4604. ctx->qos_data.qos_active = bss_conf->qos;
  4605. il_update_qos(il, ctx);
  4606. spin_unlock_irqrestore(&il->lock, flags);
  4607. }
  4608. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4609. /*
  4610. * the add_interface code must make sure we only ever
  4611. * have a single interface that could be beaconing at
  4612. * any time.
  4613. */
  4614. if (vif->bss_conf.enable_beacon)
  4615. il->beacon_ctx = ctx;
  4616. else
  4617. il->beacon_ctx = NULL;
  4618. }
  4619. if (changes & BSS_CHANGED_BSSID) {
  4620. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  4621. /*
  4622. * If there is currently a HW scan going on in the
  4623. * background then we need to cancel it else the RXON
  4624. * below/in post_associate will fail.
  4625. */
  4626. if (il_scan_cancel_timeout(il, 100)) {
  4627. IL_WARN("Aborted scan still in progress after 100ms\n");
  4628. D_MAC80211("leaving - scan abort failed.\n");
  4629. mutex_unlock(&il->mutex);
  4630. return;
  4631. }
  4632. /* mac80211 only sets assoc when in STATION mode */
  4633. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  4634. memcpy(ctx->staging.bssid_addr, bss_conf->bssid,
  4635. ETH_ALEN);
  4636. /* currently needed in a few places */
  4637. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4638. } else {
  4639. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4640. }
  4641. }
  4642. /*
  4643. * This needs to be after setting the BSSID in case
  4644. * mac80211 decides to do both changes at once because
  4645. * it will invoke post_associate.
  4646. */
  4647. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  4648. il_beacon_update(hw, vif);
  4649. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4650. D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble);
  4651. if (bss_conf->use_short_preamble)
  4652. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4653. else
  4654. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4655. }
  4656. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4657. D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  4658. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  4659. ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4660. else
  4661. ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4662. if (bss_conf->use_cts_prot)
  4663. ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
  4664. else
  4665. ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  4666. }
  4667. if (changes & BSS_CHANGED_BASIC_RATES) {
  4668. /* XXX use this information
  4669. *
  4670. * To do that, remove code from il_set_rate() and put something
  4671. * like this here:
  4672. *
  4673. if (A-band)
  4674. ctx->staging.ofdm_basic_rates =
  4675. bss_conf->basic_rates;
  4676. else
  4677. ctx->staging.ofdm_basic_rates =
  4678. bss_conf->basic_rates >> 4;
  4679. ctx->staging.cck_basic_rates =
  4680. bss_conf->basic_rates & 0xF;
  4681. */
  4682. }
  4683. if (changes & BSS_CHANGED_HT) {
  4684. il_ht_conf(il, vif);
  4685. if (il->cfg->ops->hcmd->set_rxon_chain)
  4686. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  4687. }
  4688. if (changes & BSS_CHANGED_ASSOC) {
  4689. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4690. if (bss_conf->assoc) {
  4691. il->timestamp = bss_conf->timestamp;
  4692. if (!il_is_rfkill(il))
  4693. il->cfg->ops->legacy->post_associate(il);
  4694. } else
  4695. il_set_no_assoc(il, vif);
  4696. }
  4697. if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
  4698. D_MAC80211("Changes (%#x) while associated\n", changes);
  4699. ret = il_send_rxon_assoc(il, ctx);
  4700. if (!ret) {
  4701. /* Sync active_rxon with latest change. */
  4702. memcpy((void *)&ctx->active, &ctx->staging,
  4703. sizeof(struct il_rxon_cmd));
  4704. }
  4705. }
  4706. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4707. if (vif->bss_conf.enable_beacon) {
  4708. memcpy(ctx->staging.bssid_addr, bss_conf->bssid,
  4709. ETH_ALEN);
  4710. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4711. il->cfg->ops->legacy->config_ap(il);
  4712. } else
  4713. il_set_no_assoc(il, vif);
  4714. }
  4715. if (changes & BSS_CHANGED_IBSS) {
  4716. ret =
  4717. il->cfg->ops->legacy->manage_ibss_station(il, vif,
  4718. bss_conf->
  4719. ibss_joined);
  4720. if (ret)
  4721. IL_ERR("failed to %s IBSS station %pM\n",
  4722. bss_conf->ibss_joined ? "add" : "remove",
  4723. bss_conf->bssid);
  4724. }
  4725. mutex_unlock(&il->mutex);
  4726. D_MAC80211("leave\n");
  4727. }
  4728. EXPORT_SYMBOL(il_mac_bss_info_changed);
  4729. irqreturn_t
  4730. il_isr(int irq, void *data)
  4731. {
  4732. struct il_priv *il = data;
  4733. u32 inta, inta_mask;
  4734. u32 inta_fh;
  4735. unsigned long flags;
  4736. if (!il)
  4737. return IRQ_NONE;
  4738. spin_lock_irqsave(&il->lock, flags);
  4739. /* Disable (but don't clear!) interrupts here to avoid
  4740. * back-to-back ISRs and sporadic interrupts from our NIC.
  4741. * If we have something to service, the tasklet will re-enable ints.
  4742. * If we *don't* have something, we'll re-enable before leaving here. */
  4743. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  4744. _il_wr(il, CSR_INT_MASK, 0x00000000);
  4745. /* Discover which interrupts are active/pending */
  4746. inta = _il_rd(il, CSR_INT);
  4747. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  4748. /* Ignore interrupt if there's nothing in NIC to service.
  4749. * This may be due to IRQ shared with another device,
  4750. * or due to sporadic interrupts thrown from our NIC. */
  4751. if (!inta && !inta_fh) {
  4752. D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4753. goto none;
  4754. }
  4755. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  4756. /* Hardware disappeared. It might have already raised
  4757. * an interrupt */
  4758. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  4759. goto unplugged;
  4760. }
  4761. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask,
  4762. inta_fh);
  4763. inta &= ~CSR_INT_BIT_SCD;
  4764. /* il_irq_tasklet() will service interrupts and re-enable them */
  4765. if (likely(inta || inta_fh))
  4766. tasklet_schedule(&il->irq_tasklet);
  4767. unplugged:
  4768. spin_unlock_irqrestore(&il->lock, flags);
  4769. return IRQ_HANDLED;
  4770. none:
  4771. /* re-enable interrupts here since we don't have anything to service. */
  4772. /* only Re-enable if disabled by irq */
  4773. if (test_bit(S_INT_ENABLED, &il->status))
  4774. il_enable_interrupts(il);
  4775. spin_unlock_irqrestore(&il->lock, flags);
  4776. return IRQ_NONE;
  4777. }
  4778. EXPORT_SYMBOL(il_isr);
  4779. /*
  4780. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  4781. * function.
  4782. */
  4783. void
  4784. il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
  4785. __le16 fc, __le32 *tx_flags)
  4786. {
  4787. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  4788. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  4789. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  4790. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4791. if (!ieee80211_is_mgmt(fc))
  4792. return;
  4793. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4794. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4795. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4796. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4797. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4798. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4799. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4800. break;
  4801. }
  4802. } else if (info->control.rates[0].
  4803. flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  4804. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4805. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4806. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4807. }
  4808. }
  4809. EXPORT_SYMBOL(il_tx_cmd_protection);