sdio.c 26 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/card.h>
  17. #include <linux/mmc/mmc.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include <linux/mmc/sdio_ids.h>
  21. #include <linux/mmc/sdio.h>
  22. #include <linux/mmc/sd.h>
  23. #include "hif.h"
  24. #include "hif-ops.h"
  25. #include "target.h"
  26. #include "debug.h"
  27. #include "cfg80211.h"
  28. struct ath6kl_sdio {
  29. struct sdio_func *func;
  30. spinlock_t lock;
  31. /* free list */
  32. struct list_head bus_req_freeq;
  33. /* available bus requests */
  34. struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
  35. struct ath6kl *ar;
  36. u8 *dma_buffer;
  37. /* scatter request list head */
  38. struct list_head scat_req;
  39. spinlock_t scat_lock;
  40. bool scatter_enabled;
  41. bool is_disabled;
  42. atomic_t irq_handling;
  43. const struct sdio_device_id *id;
  44. struct work_struct wr_async_work;
  45. struct list_head wr_asyncq;
  46. spinlock_t wr_async_lock;
  47. };
  48. #define CMD53_ARG_READ 0
  49. #define CMD53_ARG_WRITE 1
  50. #define CMD53_ARG_BLOCK_BASIS 1
  51. #define CMD53_ARG_FIXED_ADDRESS 0
  52. #define CMD53_ARG_INCR_ADDRESS 1
  53. static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
  54. {
  55. return ar->hif_priv;
  56. }
  57. /*
  58. * Macro to check if DMA buffer is WORD-aligned and DMA-able.
  59. * Most host controllers assume the buffer is DMA'able and will
  60. * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid
  61. * check fails on stack memory.
  62. */
  63. static inline bool buf_needs_bounce(u8 *buf)
  64. {
  65. return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf);
  66. }
  67. static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar)
  68. {
  69. struct ath6kl_mbox_info *mbox_info = &ar->mbox_info;
  70. /* EP1 has an extended range */
  71. mbox_info->htc_addr = HIF_MBOX_BASE_ADDR;
  72. mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR;
  73. mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH;
  74. mbox_info->block_size = HIF_MBOX_BLOCK_SIZE;
  75. mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR;
  76. mbox_info->gmbox_sz = HIF_GMBOX_WIDTH;
  77. }
  78. static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
  79. u8 mode, u8 opcode, u32 addr,
  80. u16 blksz)
  81. {
  82. *arg = (((rw & 1) << 31) |
  83. ((func & 0x7) << 28) |
  84. ((mode & 1) << 27) |
  85. ((opcode & 1) << 26) |
  86. ((addr & 0x1FFFF) << 9) |
  87. (blksz & 0x1FF));
  88. }
  89. static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
  90. unsigned int address,
  91. unsigned char val)
  92. {
  93. const u8 func = 0;
  94. *arg = ((write & 1) << 31) |
  95. ((func & 0x7) << 28) |
  96. ((raw & 1) << 27) |
  97. (1 << 26) |
  98. ((address & 0x1FFFF) << 9) |
  99. (1 << 8) |
  100. (val & 0xFF);
  101. }
  102. static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
  103. unsigned int address,
  104. unsigned char byte)
  105. {
  106. struct mmc_command io_cmd;
  107. memset(&io_cmd, 0, sizeof(io_cmd));
  108. ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
  109. io_cmd.opcode = SD_IO_RW_DIRECT;
  110. io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
  111. return mmc_wait_for_cmd(card->host, &io_cmd, 0);
  112. }
  113. static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr,
  114. u8 *buf, u32 len)
  115. {
  116. int ret = 0;
  117. sdio_claim_host(func);
  118. if (request & HIF_WRITE) {
  119. /* FIXME: looks like ugly workaround for something */
  120. if (addr >= HIF_MBOX_BASE_ADDR &&
  121. addr <= HIF_MBOX_END_ADDR)
  122. addr += (HIF_MBOX_WIDTH - len);
  123. /* FIXME: this also looks like ugly workaround */
  124. if (addr == HIF_MBOX0_EXT_BASE_ADDR)
  125. addr += HIF_MBOX0_EXT_WIDTH - len;
  126. if (request & HIF_FIXED_ADDRESS)
  127. ret = sdio_writesb(func, addr, buf, len);
  128. else
  129. ret = sdio_memcpy_toio(func, addr, buf, len);
  130. } else {
  131. if (request & HIF_FIXED_ADDRESS)
  132. ret = sdio_readsb(func, buf, addr, len);
  133. else
  134. ret = sdio_memcpy_fromio(func, buf, addr, len);
  135. }
  136. sdio_release_host(func);
  137. ath6kl_dbg(ATH6KL_DBG_SDIO, "%s addr 0x%x%s buf 0x%p len %d\n",
  138. request & HIF_WRITE ? "wr" : "rd", addr,
  139. request & HIF_FIXED_ADDRESS ? " (fixed)" : "", buf, len);
  140. ath6kl_dbg_dump(ATH6KL_DBG_SDIO_DUMP, NULL, "sdio ", buf, len);
  141. return ret;
  142. }
  143. static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio)
  144. {
  145. struct bus_request *bus_req;
  146. spin_lock_bh(&ar_sdio->lock);
  147. if (list_empty(&ar_sdio->bus_req_freeq)) {
  148. spin_unlock_bh(&ar_sdio->lock);
  149. return NULL;
  150. }
  151. bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
  152. struct bus_request, list);
  153. list_del(&bus_req->list);
  154. spin_unlock_bh(&ar_sdio->lock);
  155. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n",
  156. __func__, bus_req);
  157. return bus_req;
  158. }
  159. static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio,
  160. struct bus_request *bus_req)
  161. {
  162. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n",
  163. __func__, bus_req);
  164. spin_lock_bh(&ar_sdio->lock);
  165. list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
  166. spin_unlock_bh(&ar_sdio->lock);
  167. }
  168. static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req,
  169. struct mmc_data *data)
  170. {
  171. struct scatterlist *sg;
  172. int i;
  173. data->blksz = HIF_MBOX_BLOCK_SIZE;
  174. data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE;
  175. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  176. "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
  177. (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr,
  178. data->blksz, data->blocks, scat_req->len,
  179. scat_req->scat_entries);
  180. data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE :
  181. MMC_DATA_READ;
  182. /* fill SG entries */
  183. sg = scat_req->sgentries;
  184. sg_init_table(sg, scat_req->scat_entries);
  185. /* assemble SG list */
  186. for (i = 0; i < scat_req->scat_entries; i++, sg++) {
  187. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
  188. i, scat_req->scat_list[i].buf,
  189. scat_req->scat_list[i].len);
  190. sg_set_buf(sg, scat_req->scat_list[i].buf,
  191. scat_req->scat_list[i].len);
  192. }
  193. /* set scatter-gather table for request */
  194. data->sg = scat_req->sgentries;
  195. data->sg_len = scat_req->scat_entries;
  196. }
  197. static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio,
  198. struct bus_request *req)
  199. {
  200. struct mmc_request mmc_req;
  201. struct mmc_command cmd;
  202. struct mmc_data data;
  203. struct hif_scatter_req *scat_req;
  204. u8 opcode, rw;
  205. int status, len;
  206. scat_req = req->scat_req;
  207. if (scat_req->virt_scat) {
  208. len = scat_req->len;
  209. if (scat_req->req & HIF_BLOCK_BASIS)
  210. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  211. status = ath6kl_sdio_io(ar_sdio->func, scat_req->req,
  212. scat_req->addr, scat_req->virt_dma_buf,
  213. len);
  214. goto scat_complete;
  215. }
  216. memset(&mmc_req, 0, sizeof(struct mmc_request));
  217. memset(&cmd, 0, sizeof(struct mmc_command));
  218. memset(&data, 0, sizeof(struct mmc_data));
  219. ath6kl_sdio_setup_scat_data(scat_req, &data);
  220. opcode = (scat_req->req & HIF_FIXED_ADDRESS) ?
  221. CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS;
  222. rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
  223. /* Fixup the address so that the last byte will fall on MBOX EOM */
  224. if (scat_req->req & HIF_WRITE) {
  225. if (scat_req->addr == HIF_MBOX_BASE_ADDR)
  226. scat_req->addr += HIF_MBOX_WIDTH - scat_req->len;
  227. else
  228. /* Uses extended address range */
  229. scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len;
  230. }
  231. /* set command argument */
  232. ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num,
  233. CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr,
  234. data.blocks);
  235. cmd.opcode = SD_IO_RW_EXTENDED;
  236. cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
  237. mmc_req.cmd = &cmd;
  238. mmc_req.data = &data;
  239. sdio_claim_host(ar_sdio->func);
  240. mmc_set_data_timeout(&data, ar_sdio->func->card);
  241. /* synchronous call to process request */
  242. mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req);
  243. sdio_release_host(ar_sdio->func);
  244. status = cmd.error ? cmd.error : data.error;
  245. scat_complete:
  246. scat_req->status = status;
  247. if (scat_req->status)
  248. ath6kl_err("Scatter write request failed:%d\n",
  249. scat_req->status);
  250. if (scat_req->req & HIF_ASYNCHRONOUS)
  251. scat_req->complete(ar_sdio->ar->htc_target, scat_req);
  252. return status;
  253. }
  254. static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio,
  255. int n_scat_entry, int n_scat_req,
  256. bool virt_scat)
  257. {
  258. struct hif_scatter_req *s_req;
  259. struct bus_request *bus_req;
  260. int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz;
  261. u8 *virt_buf;
  262. scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item);
  263. scat_req_sz = sizeof(*s_req) + scat_list_sz;
  264. if (!virt_scat)
  265. sg_sz = sizeof(struct scatterlist) * n_scat_entry;
  266. else
  267. buf_sz = 2 * L1_CACHE_BYTES +
  268. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  269. for (i = 0; i < n_scat_req; i++) {
  270. /* allocate the scatter request */
  271. s_req = kzalloc(scat_req_sz, GFP_KERNEL);
  272. if (!s_req)
  273. return -ENOMEM;
  274. if (virt_scat) {
  275. virt_buf = kzalloc(buf_sz, GFP_KERNEL);
  276. if (!virt_buf) {
  277. kfree(s_req);
  278. return -ENOMEM;
  279. }
  280. s_req->virt_dma_buf =
  281. (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf);
  282. } else {
  283. /* allocate sglist */
  284. s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL);
  285. if (!s_req->sgentries) {
  286. kfree(s_req);
  287. return -ENOMEM;
  288. }
  289. }
  290. /* allocate a bus request for this scatter request */
  291. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  292. if (!bus_req) {
  293. kfree(s_req->sgentries);
  294. kfree(s_req->virt_dma_buf);
  295. kfree(s_req);
  296. return -ENOMEM;
  297. }
  298. /* assign the scatter request to this bus request */
  299. bus_req->scat_req = s_req;
  300. s_req->busrequest = bus_req;
  301. s_req->virt_scat = virt_scat;
  302. /* add it to the scatter pool */
  303. hif_scatter_req_add(ar_sdio->ar, s_req);
  304. }
  305. return 0;
  306. }
  307. static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
  308. u32 len, u32 request)
  309. {
  310. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  311. u8 *tbuf = NULL;
  312. int ret;
  313. bool bounced = false;
  314. if (request & HIF_BLOCK_BASIS)
  315. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  316. if (buf_needs_bounce(buf)) {
  317. if (!ar_sdio->dma_buffer)
  318. return -ENOMEM;
  319. tbuf = ar_sdio->dma_buffer;
  320. memcpy(tbuf, buf, len);
  321. bounced = true;
  322. } else
  323. tbuf = buf;
  324. ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len);
  325. if ((request & HIF_READ) && bounced)
  326. memcpy(buf, tbuf, len);
  327. return ret;
  328. }
  329. static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio,
  330. struct bus_request *req)
  331. {
  332. if (req->scat_req)
  333. ath6kl_sdio_scat_rw(ar_sdio, req);
  334. else {
  335. void *context;
  336. int status;
  337. status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address,
  338. req->buffer, req->length,
  339. req->request);
  340. context = req->packet;
  341. ath6kl_sdio_free_bus_req(ar_sdio, req);
  342. ath6kl_hif_rw_comp_handler(context, status);
  343. }
  344. }
  345. static void ath6kl_sdio_write_async_work(struct work_struct *work)
  346. {
  347. struct ath6kl_sdio *ar_sdio;
  348. struct bus_request *req, *tmp_req;
  349. ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work);
  350. spin_lock_bh(&ar_sdio->wr_async_lock);
  351. list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
  352. list_del(&req->list);
  353. spin_unlock_bh(&ar_sdio->wr_async_lock);
  354. __ath6kl_sdio_write_async(ar_sdio, req);
  355. spin_lock_bh(&ar_sdio->wr_async_lock);
  356. }
  357. spin_unlock_bh(&ar_sdio->wr_async_lock);
  358. }
  359. static void ath6kl_sdio_irq_handler(struct sdio_func *func)
  360. {
  361. int status;
  362. struct ath6kl_sdio *ar_sdio;
  363. ath6kl_dbg(ATH6KL_DBG_SDIO, "irq\n");
  364. ar_sdio = sdio_get_drvdata(func);
  365. atomic_set(&ar_sdio->irq_handling, 1);
  366. /*
  367. * Release the host during interrups so we can pick it back up when
  368. * we process commands.
  369. */
  370. sdio_release_host(ar_sdio->func);
  371. status = ath6kl_hif_intr_bh_handler(ar_sdio->ar);
  372. sdio_claim_host(ar_sdio->func);
  373. atomic_set(&ar_sdio->irq_handling, 0);
  374. WARN_ON(status && status != -ECANCELED);
  375. }
  376. static int ath6kl_sdio_power_on(struct ath6kl *ar)
  377. {
  378. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  379. struct sdio_func *func = ar_sdio->func;
  380. int ret = 0;
  381. if (!ar_sdio->is_disabled)
  382. return 0;
  383. ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power on\n");
  384. sdio_claim_host(func);
  385. ret = sdio_enable_func(func);
  386. if (ret) {
  387. ath6kl_err("Unable to enable sdio func: %d)\n", ret);
  388. sdio_release_host(func);
  389. return ret;
  390. }
  391. sdio_release_host(func);
  392. /*
  393. * Wait for hardware to initialise. It should take a lot less than
  394. * 10 ms but let's be conservative here.
  395. */
  396. msleep(10);
  397. ar_sdio->is_disabled = false;
  398. return ret;
  399. }
  400. static int ath6kl_sdio_power_off(struct ath6kl *ar)
  401. {
  402. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  403. int ret;
  404. if (ar_sdio->is_disabled)
  405. return 0;
  406. ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power off\n");
  407. /* Disable the card */
  408. sdio_claim_host(ar_sdio->func);
  409. ret = sdio_disable_func(ar_sdio->func);
  410. sdio_release_host(ar_sdio->func);
  411. if (ret)
  412. return ret;
  413. ar_sdio->is_disabled = true;
  414. return ret;
  415. }
  416. static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
  417. u32 length, u32 request,
  418. struct htc_packet *packet)
  419. {
  420. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  421. struct bus_request *bus_req;
  422. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  423. if (!bus_req)
  424. return -ENOMEM;
  425. bus_req->address = address;
  426. bus_req->buffer = buffer;
  427. bus_req->length = length;
  428. bus_req->request = request;
  429. bus_req->packet = packet;
  430. spin_lock_bh(&ar_sdio->wr_async_lock);
  431. list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
  432. spin_unlock_bh(&ar_sdio->wr_async_lock);
  433. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  434. return 0;
  435. }
  436. static void ath6kl_sdio_irq_enable(struct ath6kl *ar)
  437. {
  438. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  439. int ret;
  440. sdio_claim_host(ar_sdio->func);
  441. /* Register the isr */
  442. ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler);
  443. if (ret)
  444. ath6kl_err("Failed to claim sdio irq: %d\n", ret);
  445. sdio_release_host(ar_sdio->func);
  446. }
  447. static void ath6kl_sdio_irq_disable(struct ath6kl *ar)
  448. {
  449. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  450. int ret;
  451. sdio_claim_host(ar_sdio->func);
  452. /* Mask our function IRQ */
  453. while (atomic_read(&ar_sdio->irq_handling)) {
  454. sdio_release_host(ar_sdio->func);
  455. schedule_timeout(HZ / 10);
  456. sdio_claim_host(ar_sdio->func);
  457. }
  458. ret = sdio_release_irq(ar_sdio->func);
  459. if (ret)
  460. ath6kl_err("Failed to release sdio irq: %d\n", ret);
  461. sdio_release_host(ar_sdio->func);
  462. }
  463. static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar)
  464. {
  465. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  466. struct hif_scatter_req *node = NULL;
  467. spin_lock_bh(&ar_sdio->scat_lock);
  468. if (!list_empty(&ar_sdio->scat_req)) {
  469. node = list_first_entry(&ar_sdio->scat_req,
  470. struct hif_scatter_req, list);
  471. list_del(&node->list);
  472. }
  473. spin_unlock_bh(&ar_sdio->scat_lock);
  474. return node;
  475. }
  476. static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar,
  477. struct hif_scatter_req *s_req)
  478. {
  479. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  480. spin_lock_bh(&ar_sdio->scat_lock);
  481. list_add_tail(&s_req->list, &ar_sdio->scat_req);
  482. spin_unlock_bh(&ar_sdio->scat_lock);
  483. }
  484. /* scatter gather read write request */
  485. static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar,
  486. struct hif_scatter_req *scat_req)
  487. {
  488. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  489. u32 request = scat_req->req;
  490. int status = 0;
  491. if (!scat_req->len)
  492. return -EINVAL;
  493. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  494. "hif-scatter: total len: %d scatter entries: %d\n",
  495. scat_req->len, scat_req->scat_entries);
  496. if (request & HIF_SYNCHRONOUS)
  497. status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest);
  498. else {
  499. spin_lock_bh(&ar_sdio->wr_async_lock);
  500. list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq);
  501. spin_unlock_bh(&ar_sdio->wr_async_lock);
  502. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  503. }
  504. return status;
  505. }
  506. /* clean up scatter support */
  507. static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
  508. {
  509. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  510. struct hif_scatter_req *s_req, *tmp_req;
  511. /* empty the free list */
  512. spin_lock_bh(&ar_sdio->scat_lock);
  513. list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) {
  514. list_del(&s_req->list);
  515. spin_unlock_bh(&ar_sdio->scat_lock);
  516. /*
  517. * FIXME: should we also call completion handler with
  518. * ath6kl_hif_rw_comp_handler() with status -ECANCELED so
  519. * that the packet is properly freed?
  520. */
  521. if (s_req->busrequest)
  522. ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
  523. kfree(s_req->virt_dma_buf);
  524. kfree(s_req->sgentries);
  525. kfree(s_req);
  526. spin_lock_bh(&ar_sdio->scat_lock);
  527. }
  528. spin_unlock_bh(&ar_sdio->scat_lock);
  529. }
  530. /* setup of HIF scatter resources */
  531. static int ath6kl_sdio_enable_scatter(struct ath6kl *ar)
  532. {
  533. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  534. struct htc_target *target = ar->htc_target;
  535. int ret;
  536. bool virt_scat = false;
  537. if (ar_sdio->scatter_enabled)
  538. return 0;
  539. ar_sdio->scatter_enabled = true;
  540. /* check if host supports scatter and it meets our requirements */
  541. if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
  542. ath6kl_err("host only supports scatter of :%d entries, need: %d\n",
  543. ar_sdio->func->card->host->max_segs,
  544. MAX_SCATTER_ENTRIES_PER_REQ);
  545. virt_scat = true;
  546. }
  547. if (!virt_scat) {
  548. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  549. MAX_SCATTER_ENTRIES_PER_REQ,
  550. MAX_SCATTER_REQUESTS, virt_scat);
  551. if (!ret) {
  552. ath6kl_dbg(ATH6KL_DBG_BOOT,
  553. "hif-scatter enabled requests %d entries %d\n",
  554. MAX_SCATTER_REQUESTS,
  555. MAX_SCATTER_ENTRIES_PER_REQ);
  556. target->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ;
  557. target->max_xfer_szper_scatreq =
  558. MAX_SCATTER_REQ_TRANSFER_SIZE;
  559. } else {
  560. ath6kl_sdio_cleanup_scatter(ar);
  561. ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n");
  562. }
  563. }
  564. if (virt_scat || ret) {
  565. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  566. ATH6KL_SCATTER_ENTRIES_PER_REQ,
  567. ATH6KL_SCATTER_REQS, virt_scat);
  568. if (ret) {
  569. ath6kl_err("failed to alloc virtual scatter resources !\n");
  570. ath6kl_sdio_cleanup_scatter(ar);
  571. return ret;
  572. }
  573. ath6kl_dbg(ATH6KL_DBG_BOOT,
  574. "virtual scatter enabled requests %d entries %d\n",
  575. ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ);
  576. target->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ;
  577. target->max_xfer_szper_scatreq =
  578. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  579. }
  580. return 0;
  581. }
  582. static int ath6kl_sdio_config(struct ath6kl *ar)
  583. {
  584. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  585. struct sdio_func *func = ar_sdio->func;
  586. int ret;
  587. sdio_claim_host(func);
  588. if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >=
  589. MANUFACTURER_ID_AR6003_BASE) {
  590. /* enable 4-bit ASYNC interrupt on AR6003 or later */
  591. ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card,
  592. CCCR_SDIO_IRQ_MODE_REG,
  593. SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
  594. if (ret) {
  595. ath6kl_err("Failed to enable 4-bit async irq mode %d\n",
  596. ret);
  597. goto out;
  598. }
  599. ath6kl_dbg(ATH6KL_DBG_BOOT, "4-bit async irq mode enabled\n");
  600. }
  601. /* give us some time to enable, in ms */
  602. func->enable_timeout = 100;
  603. ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
  604. if (ret) {
  605. ath6kl_err("Set sdio block size %d failed: %d)\n",
  606. HIF_MBOX_BLOCK_SIZE, ret);
  607. sdio_release_host(func);
  608. goto out;
  609. }
  610. out:
  611. sdio_release_host(func);
  612. return ret;
  613. }
  614. static int ath6kl_sdio_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow)
  615. {
  616. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  617. struct sdio_func *func = ar_sdio->func;
  618. mmc_pm_flag_t flags;
  619. int ret;
  620. flags = sdio_get_host_pm_caps(func);
  621. ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio suspend pm_caps 0x%x\n", flags);
  622. if (!(flags & MMC_PM_KEEP_POWER) ||
  623. (ar->conf_flags & ATH6KL_CONF_SUSPEND_CUTPOWER)) {
  624. /* as host doesn't support keep power we need to cut power */
  625. return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_CUTPOWER,
  626. NULL);
  627. }
  628. ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
  629. if (ret) {
  630. printk(KERN_ERR "ath6kl: set sdio pm flags failed: %d\n",
  631. ret);
  632. return ret;
  633. }
  634. if ((flags & MMC_PM_WAKE_SDIO_IRQ) && wow) {
  635. /*
  636. * The host sdio controller is capable of keep power and
  637. * sdio irq wake up at this point. It's fine to continue
  638. * wow suspend operation.
  639. */
  640. ret = ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_WOW, wow);
  641. if (ret)
  642. return ret;
  643. ret = sdio_set_host_pm_flags(func, MMC_PM_WAKE_SDIO_IRQ);
  644. if (ret)
  645. ath6kl_err("set sdio wake irq flag failed: %d\n", ret);
  646. return ret;
  647. }
  648. return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_DEEPSLEEP, NULL);
  649. }
  650. static int ath6kl_sdio_resume(struct ath6kl *ar)
  651. {
  652. switch (ar->state) {
  653. case ATH6KL_STATE_OFF:
  654. case ATH6KL_STATE_CUTPOWER:
  655. ath6kl_dbg(ATH6KL_DBG_SUSPEND,
  656. "sdio resume configuring sdio\n");
  657. /* need to set sdio settings after power is cut from sdio */
  658. ath6kl_sdio_config(ar);
  659. break;
  660. case ATH6KL_STATE_ON:
  661. break;
  662. case ATH6KL_STATE_DEEPSLEEP:
  663. break;
  664. case ATH6KL_STATE_WOW:
  665. break;
  666. }
  667. ath6kl_cfg80211_resume(ar);
  668. return 0;
  669. }
  670. static void ath6kl_sdio_stop(struct ath6kl *ar)
  671. {
  672. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  673. struct bus_request *req, *tmp_req;
  674. void *context;
  675. /* FIXME: make sure that wq is not queued again */
  676. cancel_work_sync(&ar_sdio->wr_async_work);
  677. spin_lock_bh(&ar_sdio->wr_async_lock);
  678. list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
  679. list_del(&req->list);
  680. if (req->scat_req) {
  681. /* this is a scatter gather request */
  682. req->scat_req->status = -ECANCELED;
  683. req->scat_req->complete(ar_sdio->ar->htc_target,
  684. req->scat_req);
  685. } else {
  686. context = req->packet;
  687. ath6kl_sdio_free_bus_req(ar_sdio, req);
  688. ath6kl_hif_rw_comp_handler(context, -ECANCELED);
  689. }
  690. }
  691. spin_unlock_bh(&ar_sdio->wr_async_lock);
  692. WARN_ON(get_queue_depth(&ar_sdio->scat_req) != 4);
  693. }
  694. static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
  695. .read_write_sync = ath6kl_sdio_read_write_sync,
  696. .write_async = ath6kl_sdio_write_async,
  697. .irq_enable = ath6kl_sdio_irq_enable,
  698. .irq_disable = ath6kl_sdio_irq_disable,
  699. .scatter_req_get = ath6kl_sdio_scatter_req_get,
  700. .scatter_req_add = ath6kl_sdio_scatter_req_add,
  701. .enable_scatter = ath6kl_sdio_enable_scatter,
  702. .scat_req_rw = ath6kl_sdio_async_rw_scatter,
  703. .cleanup_scatter = ath6kl_sdio_cleanup_scatter,
  704. .suspend = ath6kl_sdio_suspend,
  705. .resume = ath6kl_sdio_resume,
  706. .power_on = ath6kl_sdio_power_on,
  707. .power_off = ath6kl_sdio_power_off,
  708. .stop = ath6kl_sdio_stop,
  709. };
  710. #ifdef CONFIG_PM_SLEEP
  711. /*
  712. * Empty handlers so that mmc subsystem doesn't remove us entirely during
  713. * suspend. We instead follow cfg80211 suspend/resume handlers.
  714. */
  715. static int ath6kl_sdio_pm_suspend(struct device *device)
  716. {
  717. ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio pm suspend\n");
  718. return 0;
  719. }
  720. static int ath6kl_sdio_pm_resume(struct device *device)
  721. {
  722. ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio pm resume\n");
  723. return 0;
  724. }
  725. static SIMPLE_DEV_PM_OPS(ath6kl_sdio_pm_ops, ath6kl_sdio_pm_suspend,
  726. ath6kl_sdio_pm_resume);
  727. #define ATH6KL_SDIO_PM_OPS (&ath6kl_sdio_pm_ops)
  728. #else
  729. #define ATH6KL_SDIO_PM_OPS NULL
  730. #endif /* CONFIG_PM_SLEEP */
  731. static int ath6kl_sdio_probe(struct sdio_func *func,
  732. const struct sdio_device_id *id)
  733. {
  734. int ret;
  735. struct ath6kl_sdio *ar_sdio;
  736. struct ath6kl *ar;
  737. int count;
  738. ath6kl_dbg(ATH6KL_DBG_BOOT,
  739. "sdio new func %d vendor 0x%x device 0x%x block 0x%x/0x%x\n",
  740. func->num, func->vendor, func->device,
  741. func->max_blksize, func->cur_blksize);
  742. ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL);
  743. if (!ar_sdio)
  744. return -ENOMEM;
  745. ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
  746. if (!ar_sdio->dma_buffer) {
  747. ret = -ENOMEM;
  748. goto err_hif;
  749. }
  750. ar_sdio->func = func;
  751. sdio_set_drvdata(func, ar_sdio);
  752. ar_sdio->id = id;
  753. ar_sdio->is_disabled = true;
  754. spin_lock_init(&ar_sdio->lock);
  755. spin_lock_init(&ar_sdio->scat_lock);
  756. spin_lock_init(&ar_sdio->wr_async_lock);
  757. INIT_LIST_HEAD(&ar_sdio->scat_req);
  758. INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
  759. INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
  760. INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work);
  761. for (count = 0; count < BUS_REQUEST_MAX_NUM; count++)
  762. ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]);
  763. ar = ath6kl_core_alloc(&ar_sdio->func->dev);
  764. if (!ar) {
  765. ath6kl_err("Failed to alloc ath6kl core\n");
  766. ret = -ENOMEM;
  767. goto err_dma;
  768. }
  769. ar_sdio->ar = ar;
  770. ar->hif_priv = ar_sdio;
  771. ar->hif_ops = &ath6kl_sdio_ops;
  772. ath6kl_sdio_set_mbox_info(ar);
  773. ret = ath6kl_sdio_config(ar);
  774. if (ret) {
  775. ath6kl_err("Failed to config sdio: %d\n", ret);
  776. goto err_core_alloc;
  777. }
  778. ret = ath6kl_core_init(ar);
  779. if (ret) {
  780. ath6kl_err("Failed to init ath6kl core\n");
  781. goto err_core_alloc;
  782. }
  783. return ret;
  784. err_core_alloc:
  785. ath6kl_core_free(ar_sdio->ar);
  786. err_dma:
  787. kfree(ar_sdio->dma_buffer);
  788. err_hif:
  789. kfree(ar_sdio);
  790. return ret;
  791. }
  792. static void ath6kl_sdio_remove(struct sdio_func *func)
  793. {
  794. struct ath6kl_sdio *ar_sdio;
  795. ath6kl_dbg(ATH6KL_DBG_BOOT,
  796. "sdio removed func %d vendor 0x%x device 0x%x\n",
  797. func->num, func->vendor, func->device);
  798. ar_sdio = sdio_get_drvdata(func);
  799. ath6kl_stop_txrx(ar_sdio->ar);
  800. cancel_work_sync(&ar_sdio->wr_async_work);
  801. ath6kl_core_cleanup(ar_sdio->ar);
  802. kfree(ar_sdio->dma_buffer);
  803. kfree(ar_sdio);
  804. }
  805. static const struct sdio_device_id ath6kl_sdio_devices[] = {
  806. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
  807. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
  808. {},
  809. };
  810. MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
  811. static struct sdio_driver ath6kl_sdio_driver = {
  812. .name = "ath6kl",
  813. .id_table = ath6kl_sdio_devices,
  814. .probe = ath6kl_sdio_probe,
  815. .remove = ath6kl_sdio_remove,
  816. .drv.pm = ATH6KL_SDIO_PM_OPS,
  817. };
  818. static int __init ath6kl_sdio_init(void)
  819. {
  820. int ret;
  821. ret = sdio_register_driver(&ath6kl_sdio_driver);
  822. if (ret)
  823. ath6kl_err("sdio driver registration failed: %d\n", ret);
  824. return ret;
  825. }
  826. static void __exit ath6kl_sdio_exit(void)
  827. {
  828. sdio_unregister_driver(&ath6kl_sdio_driver);
  829. }
  830. module_init(ath6kl_sdio_init);
  831. module_exit(ath6kl_sdio_exit);
  832. MODULE_AUTHOR("Atheros Communications, Inc.");
  833. MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
  834. MODULE_LICENSE("Dual BSD/GPL");
  835. MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
  836. MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
  837. MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
  838. MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
  839. MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
  840. MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
  841. MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
  842. MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
  843. MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
  844. MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);