bmi.c 17 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "core.h"
  17. #include "hif-ops.h"
  18. #include "target.h"
  19. #include "debug.h"
  20. static int ath6kl_get_bmi_cmd_credits(struct ath6kl *ar)
  21. {
  22. u32 addr;
  23. unsigned long timeout;
  24. int ret;
  25. ar->bmi.cmd_credits = 0;
  26. /* Read the counter register to get the command credits */
  27. addr = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4;
  28. timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
  29. while (time_before(jiffies, timeout) && !ar->bmi.cmd_credits) {
  30. /*
  31. * Hit the credit counter with a 4-byte access, the first byte
  32. * read will hit the counter and cause a decrement, while the
  33. * remaining 3 bytes has no effect. The rationale behind this
  34. * is to make all HIF accesses 4-byte aligned.
  35. */
  36. ret = hif_read_write_sync(ar, addr,
  37. (u8 *)&ar->bmi.cmd_credits, 4,
  38. HIF_RD_SYNC_BYTE_INC);
  39. if (ret) {
  40. ath6kl_err("Unable to decrement the command credit count register: %d\n",
  41. ret);
  42. return ret;
  43. }
  44. /* The counter is only 8 bits.
  45. * Ignore anything in the upper 3 bytes
  46. */
  47. ar->bmi.cmd_credits &= 0xFF;
  48. }
  49. if (!ar->bmi.cmd_credits) {
  50. ath6kl_err("bmi communication timeout\n");
  51. return -ETIMEDOUT;
  52. }
  53. return 0;
  54. }
  55. static int ath6kl_bmi_get_rx_lkahd(struct ath6kl *ar)
  56. {
  57. unsigned long timeout;
  58. u32 rx_word = 0;
  59. int ret = 0;
  60. timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
  61. while (time_before(jiffies, timeout) && !rx_word) {
  62. ret = hif_read_write_sync(ar, RX_LOOKAHEAD_VALID_ADDRESS,
  63. (u8 *)&rx_word, sizeof(rx_word),
  64. HIF_RD_SYNC_BYTE_INC);
  65. if (ret) {
  66. ath6kl_err("unable to read RX_LOOKAHEAD_VALID\n");
  67. return ret;
  68. }
  69. /* all we really want is one bit */
  70. rx_word &= (1 << ENDPOINT1);
  71. }
  72. if (!rx_word) {
  73. ath6kl_err("bmi_recv_buf FIFO empty\n");
  74. return -EINVAL;
  75. }
  76. return ret;
  77. }
  78. static int ath6kl_bmi_send_buf(struct ath6kl *ar, u8 *buf, u32 len)
  79. {
  80. int ret;
  81. u32 addr;
  82. ret = ath6kl_get_bmi_cmd_credits(ar);
  83. if (ret)
  84. return ret;
  85. addr = ar->mbox_info.htc_addr;
  86. ret = hif_read_write_sync(ar, addr, buf, len,
  87. HIF_WR_SYNC_BYTE_INC);
  88. if (ret)
  89. ath6kl_err("unable to send the bmi data to the device\n");
  90. return ret;
  91. }
  92. static int ath6kl_bmi_recv_buf(struct ath6kl *ar, u8 *buf, u32 len)
  93. {
  94. int ret;
  95. u32 addr;
  96. /*
  97. * During normal bootup, small reads may be required.
  98. * Rather than issue an HIF Read and then wait as the Target
  99. * adds successive bytes to the FIFO, we wait here until
  100. * we know that response data is available.
  101. *
  102. * This allows us to cleanly timeout on an unexpected
  103. * Target failure rather than risk problems at the HIF level.
  104. * In particular, this avoids SDIO timeouts and possibly garbage
  105. * data on some host controllers. And on an interconnect
  106. * such as Compact Flash (as well as some SDIO masters) which
  107. * does not provide any indication on data timeout, it avoids
  108. * a potential hang or garbage response.
  109. *
  110. * Synchronization is more difficult for reads larger than the
  111. * size of the MBOX FIFO (128B), because the Target is unable
  112. * to push the 129th byte of data until AFTER the Host posts an
  113. * HIF Read and removes some FIFO data. So for large reads the
  114. * Host proceeds to post an HIF Read BEFORE all the data is
  115. * actually available to read. Fortunately, large BMI reads do
  116. * not occur in practice -- they're supported for debug/development.
  117. *
  118. * So Host/Target BMI synchronization is divided into these cases:
  119. * CASE 1: length < 4
  120. * Should not happen
  121. *
  122. * CASE 2: 4 <= length <= 128
  123. * Wait for first 4 bytes to be in FIFO
  124. * If CONSERVATIVE_BMI_READ is enabled, also wait for
  125. * a BMI command credit, which indicates that the ENTIRE
  126. * response is available in the the FIFO
  127. *
  128. * CASE 3: length > 128
  129. * Wait for the first 4 bytes to be in FIFO
  130. *
  131. * For most uses, a small timeout should be sufficient and we will
  132. * usually see a response quickly; but there may be some unusual
  133. * (debug) cases of BMI_EXECUTE where we want an larger timeout.
  134. * For now, we use an unbounded busy loop while waiting for
  135. * BMI_EXECUTE.
  136. *
  137. * If BMI_EXECUTE ever needs to support longer-latency execution,
  138. * especially in production, this code needs to be enhanced to sleep
  139. * and yield. Also note that BMI_COMMUNICATION_TIMEOUT is currently
  140. * a function of Host processor speed.
  141. */
  142. if (len >= 4) { /* NB: Currently, always true */
  143. ret = ath6kl_bmi_get_rx_lkahd(ar);
  144. if (ret)
  145. return ret;
  146. }
  147. addr = ar->mbox_info.htc_addr;
  148. ret = hif_read_write_sync(ar, addr, buf, len,
  149. HIF_RD_SYNC_BYTE_INC);
  150. if (ret) {
  151. ath6kl_err("Unable to read the bmi data from the device: %d\n",
  152. ret);
  153. return ret;
  154. }
  155. return 0;
  156. }
  157. int ath6kl_bmi_done(struct ath6kl *ar)
  158. {
  159. int ret;
  160. u32 cid = BMI_DONE;
  161. if (ar->bmi.done_sent) {
  162. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi done skipped\n");
  163. return 0;
  164. }
  165. ar->bmi.done_sent = true;
  166. ret = ath6kl_bmi_send_buf(ar, (u8 *)&cid, sizeof(cid));
  167. if (ret) {
  168. ath6kl_err("Unable to send bmi done: %d\n", ret);
  169. return ret;
  170. }
  171. return 0;
  172. }
  173. int ath6kl_bmi_get_target_info(struct ath6kl *ar,
  174. struct ath6kl_bmi_target_info *targ_info)
  175. {
  176. int ret;
  177. u32 cid = BMI_GET_TARGET_INFO;
  178. if (ar->bmi.done_sent) {
  179. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  180. return -EACCES;
  181. }
  182. ret = ath6kl_bmi_send_buf(ar, (u8 *)&cid, sizeof(cid));
  183. if (ret) {
  184. ath6kl_err("Unable to send get target info: %d\n", ret);
  185. return ret;
  186. }
  187. ret = ath6kl_bmi_recv_buf(ar, (u8 *)&targ_info->version,
  188. sizeof(targ_info->version));
  189. if (ret) {
  190. ath6kl_err("Unable to recv target info: %d\n", ret);
  191. return ret;
  192. }
  193. if (le32_to_cpu(targ_info->version) == TARGET_VERSION_SENTINAL) {
  194. /* Determine how many bytes are in the Target's targ_info */
  195. ret = ath6kl_bmi_recv_buf(ar,
  196. (u8 *)&targ_info->byte_count,
  197. sizeof(targ_info->byte_count));
  198. if (ret) {
  199. ath6kl_err("unable to read target info byte count: %d\n",
  200. ret);
  201. return ret;
  202. }
  203. /*
  204. * The target's targ_info doesn't match the host's targ_info.
  205. * We need to do some backwards compatibility to make this work.
  206. */
  207. if (le32_to_cpu(targ_info->byte_count) != sizeof(*targ_info)) {
  208. WARN_ON(1);
  209. return -EINVAL;
  210. }
  211. /* Read the remainder of the targ_info */
  212. ret = ath6kl_bmi_recv_buf(ar,
  213. ((u8 *)targ_info) +
  214. sizeof(targ_info->byte_count),
  215. sizeof(*targ_info) -
  216. sizeof(targ_info->byte_count));
  217. if (ret) {
  218. ath6kl_err("Unable to read target info (%d bytes): %d\n",
  219. targ_info->byte_count, ret);
  220. return ret;
  221. }
  222. }
  223. ath6kl_dbg(ATH6KL_DBG_BMI, "target info (ver: 0x%x type: 0x%x)\n",
  224. targ_info->version, targ_info->type);
  225. return 0;
  226. }
  227. int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
  228. {
  229. u32 cid = BMI_READ_MEMORY;
  230. int ret;
  231. u32 offset;
  232. u32 len_remain, rx_len;
  233. u16 size;
  234. if (ar->bmi.done_sent) {
  235. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  236. return -EACCES;
  237. }
  238. size = BMI_DATASZ_MAX + sizeof(cid) + sizeof(addr) + sizeof(len);
  239. if (size > MAX_BMI_CMDBUF_SZ) {
  240. WARN_ON(1);
  241. return -EINVAL;
  242. }
  243. memset(ar->bmi.cmd_buf, 0, size);
  244. ath6kl_dbg(ATH6KL_DBG_BMI,
  245. "bmi read memory: device: addr: 0x%x, len: %d\n",
  246. addr, len);
  247. len_remain = len;
  248. while (len_remain) {
  249. rx_len = (len_remain < BMI_DATASZ_MAX) ?
  250. len_remain : BMI_DATASZ_MAX;
  251. offset = 0;
  252. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  253. offset += sizeof(cid);
  254. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  255. offset += sizeof(addr);
  256. memcpy(&(ar->bmi.cmd_buf[offset]), &rx_len, sizeof(rx_len));
  257. offset += sizeof(len);
  258. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  259. if (ret) {
  260. ath6kl_err("Unable to write to the device: %d\n",
  261. ret);
  262. return ret;
  263. }
  264. ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, rx_len);
  265. if (ret) {
  266. ath6kl_err("Unable to read from the device: %d\n",
  267. ret);
  268. return ret;
  269. }
  270. memcpy(&buf[len - len_remain], ar->bmi.cmd_buf, rx_len);
  271. len_remain -= rx_len; addr += rx_len;
  272. }
  273. return 0;
  274. }
  275. int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
  276. {
  277. u32 cid = BMI_WRITE_MEMORY;
  278. int ret;
  279. u32 offset;
  280. u32 len_remain, tx_len;
  281. const u32 header = sizeof(cid) + sizeof(addr) + sizeof(len);
  282. u8 aligned_buf[BMI_DATASZ_MAX];
  283. u8 *src;
  284. if (ar->bmi.done_sent) {
  285. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  286. return -EACCES;
  287. }
  288. if ((BMI_DATASZ_MAX + header) > MAX_BMI_CMDBUF_SZ) {
  289. WARN_ON(1);
  290. return -EINVAL;
  291. }
  292. memset(ar->bmi.cmd_buf, 0, BMI_DATASZ_MAX + header);
  293. ath6kl_dbg(ATH6KL_DBG_BMI,
  294. "bmi write memory: addr: 0x%x, len: %d\n", addr, len);
  295. len_remain = len;
  296. while (len_remain) {
  297. src = &buf[len - len_remain];
  298. if (len_remain < (BMI_DATASZ_MAX - header)) {
  299. if (len_remain & 3) {
  300. /* align it with 4 bytes */
  301. len_remain = len_remain +
  302. (4 - (len_remain & 3));
  303. memcpy(aligned_buf, src, len_remain);
  304. src = aligned_buf;
  305. }
  306. tx_len = len_remain;
  307. } else {
  308. tx_len = (BMI_DATASZ_MAX - header);
  309. }
  310. offset = 0;
  311. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  312. offset += sizeof(cid);
  313. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  314. offset += sizeof(addr);
  315. memcpy(&(ar->bmi.cmd_buf[offset]), &tx_len, sizeof(tx_len));
  316. offset += sizeof(tx_len);
  317. memcpy(&(ar->bmi.cmd_buf[offset]), src, tx_len);
  318. offset += tx_len;
  319. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  320. if (ret) {
  321. ath6kl_err("Unable to write to the device: %d\n",
  322. ret);
  323. return ret;
  324. }
  325. len_remain -= tx_len; addr += tx_len;
  326. }
  327. return 0;
  328. }
  329. int ath6kl_bmi_execute(struct ath6kl *ar, u32 addr, u32 *param)
  330. {
  331. u32 cid = BMI_EXECUTE;
  332. int ret;
  333. u32 offset;
  334. u16 size;
  335. if (ar->bmi.done_sent) {
  336. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  337. return -EACCES;
  338. }
  339. size = sizeof(cid) + sizeof(addr) + sizeof(param);
  340. if (size > MAX_BMI_CMDBUF_SZ) {
  341. WARN_ON(1);
  342. return -EINVAL;
  343. }
  344. memset(ar->bmi.cmd_buf, 0, size);
  345. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi execute: addr: 0x%x, param: %d)\n",
  346. addr, *param);
  347. offset = 0;
  348. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  349. offset += sizeof(cid);
  350. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  351. offset += sizeof(addr);
  352. memcpy(&(ar->bmi.cmd_buf[offset]), param, sizeof(*param));
  353. offset += sizeof(*param);
  354. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  355. if (ret) {
  356. ath6kl_err("Unable to write to the device: %d\n", ret);
  357. return ret;
  358. }
  359. ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, sizeof(*param));
  360. if (ret) {
  361. ath6kl_err("Unable to read from the device: %d\n", ret);
  362. return ret;
  363. }
  364. memcpy(param, ar->bmi.cmd_buf, sizeof(*param));
  365. return 0;
  366. }
  367. int ath6kl_bmi_set_app_start(struct ath6kl *ar, u32 addr)
  368. {
  369. u32 cid = BMI_SET_APP_START;
  370. int ret;
  371. u32 offset;
  372. u16 size;
  373. if (ar->bmi.done_sent) {
  374. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  375. return -EACCES;
  376. }
  377. size = sizeof(cid) + sizeof(addr);
  378. if (size > MAX_BMI_CMDBUF_SZ) {
  379. WARN_ON(1);
  380. return -EINVAL;
  381. }
  382. memset(ar->bmi.cmd_buf, 0, size);
  383. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi set app start: addr: 0x%x\n", addr);
  384. offset = 0;
  385. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  386. offset += sizeof(cid);
  387. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  388. offset += sizeof(addr);
  389. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  390. if (ret) {
  391. ath6kl_err("Unable to write to the device: %d\n", ret);
  392. return ret;
  393. }
  394. return 0;
  395. }
  396. int ath6kl_bmi_reg_read(struct ath6kl *ar, u32 addr, u32 *param)
  397. {
  398. u32 cid = BMI_READ_SOC_REGISTER;
  399. int ret;
  400. u32 offset;
  401. u16 size;
  402. if (ar->bmi.done_sent) {
  403. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  404. return -EACCES;
  405. }
  406. size = sizeof(cid) + sizeof(addr);
  407. if (size > MAX_BMI_CMDBUF_SZ) {
  408. WARN_ON(1);
  409. return -EINVAL;
  410. }
  411. memset(ar->bmi.cmd_buf, 0, size);
  412. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi read SOC reg: addr: 0x%x\n", addr);
  413. offset = 0;
  414. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  415. offset += sizeof(cid);
  416. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  417. offset += sizeof(addr);
  418. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  419. if (ret) {
  420. ath6kl_err("Unable to write to the device: %d\n", ret);
  421. return ret;
  422. }
  423. ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, sizeof(*param));
  424. if (ret) {
  425. ath6kl_err("Unable to read from the device: %d\n", ret);
  426. return ret;
  427. }
  428. memcpy(param, ar->bmi.cmd_buf, sizeof(*param));
  429. return 0;
  430. }
  431. int ath6kl_bmi_reg_write(struct ath6kl *ar, u32 addr, u32 param)
  432. {
  433. u32 cid = BMI_WRITE_SOC_REGISTER;
  434. int ret;
  435. u32 offset;
  436. u16 size;
  437. if (ar->bmi.done_sent) {
  438. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  439. return -EACCES;
  440. }
  441. size = sizeof(cid) + sizeof(addr) + sizeof(param);
  442. if (size > MAX_BMI_CMDBUF_SZ) {
  443. WARN_ON(1);
  444. return -EINVAL;
  445. }
  446. memset(ar->bmi.cmd_buf, 0, size);
  447. ath6kl_dbg(ATH6KL_DBG_BMI,
  448. "bmi write SOC reg: addr: 0x%x, param: %d\n",
  449. addr, param);
  450. offset = 0;
  451. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  452. offset += sizeof(cid);
  453. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  454. offset += sizeof(addr);
  455. memcpy(&(ar->bmi.cmd_buf[offset]), &param, sizeof(param));
  456. offset += sizeof(param);
  457. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  458. if (ret) {
  459. ath6kl_err("Unable to write to the device: %d\n", ret);
  460. return ret;
  461. }
  462. return 0;
  463. }
  464. int ath6kl_bmi_lz_data(struct ath6kl *ar, u8 *buf, u32 len)
  465. {
  466. u32 cid = BMI_LZ_DATA;
  467. int ret;
  468. u32 offset;
  469. u32 len_remain, tx_len;
  470. const u32 header = sizeof(cid) + sizeof(len);
  471. u16 size;
  472. if (ar->bmi.done_sent) {
  473. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  474. return -EACCES;
  475. }
  476. size = BMI_DATASZ_MAX + header;
  477. if (size > MAX_BMI_CMDBUF_SZ) {
  478. WARN_ON(1);
  479. return -EINVAL;
  480. }
  481. memset(ar->bmi.cmd_buf, 0, size);
  482. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi send LZ data: len: %d)\n",
  483. len);
  484. len_remain = len;
  485. while (len_remain) {
  486. tx_len = (len_remain < (BMI_DATASZ_MAX - header)) ?
  487. len_remain : (BMI_DATASZ_MAX - header);
  488. offset = 0;
  489. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  490. offset += sizeof(cid);
  491. memcpy(&(ar->bmi.cmd_buf[offset]), &tx_len, sizeof(tx_len));
  492. offset += sizeof(tx_len);
  493. memcpy(&(ar->bmi.cmd_buf[offset]), &buf[len - len_remain],
  494. tx_len);
  495. offset += tx_len;
  496. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  497. if (ret) {
  498. ath6kl_err("Unable to write to the device: %d\n",
  499. ret);
  500. return ret;
  501. }
  502. len_remain -= tx_len;
  503. }
  504. return 0;
  505. }
  506. int ath6kl_bmi_lz_stream_start(struct ath6kl *ar, u32 addr)
  507. {
  508. u32 cid = BMI_LZ_STREAM_START;
  509. int ret;
  510. u32 offset;
  511. u16 size;
  512. if (ar->bmi.done_sent) {
  513. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  514. return -EACCES;
  515. }
  516. size = sizeof(cid) + sizeof(addr);
  517. if (size > MAX_BMI_CMDBUF_SZ) {
  518. WARN_ON(1);
  519. return -EINVAL;
  520. }
  521. memset(ar->bmi.cmd_buf, 0, size);
  522. ath6kl_dbg(ATH6KL_DBG_BMI,
  523. "bmi LZ stream start: addr: 0x%x)\n",
  524. addr);
  525. offset = 0;
  526. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  527. offset += sizeof(cid);
  528. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  529. offset += sizeof(addr);
  530. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  531. if (ret) {
  532. ath6kl_err("Unable to start LZ stream to the device: %d\n",
  533. ret);
  534. return ret;
  535. }
  536. return 0;
  537. }
  538. int ath6kl_bmi_fast_download(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
  539. {
  540. int ret;
  541. u32 last_word = 0;
  542. u32 last_word_offset = len & ~0x3;
  543. u32 unaligned_bytes = len & 0x3;
  544. ret = ath6kl_bmi_lz_stream_start(ar, addr);
  545. if (ret)
  546. return ret;
  547. if (unaligned_bytes) {
  548. /* copy the last word into a zero padded buffer */
  549. memcpy(&last_word, &buf[last_word_offset], unaligned_bytes);
  550. }
  551. ret = ath6kl_bmi_lz_data(ar, buf, last_word_offset);
  552. if (ret)
  553. return ret;
  554. if (unaligned_bytes)
  555. ret = ath6kl_bmi_lz_data(ar, (u8 *)&last_word, 4);
  556. if (!ret) {
  557. /* Close compressed stream and open a new (fake) one.
  558. * This serves mainly to flush Target caches. */
  559. ret = ath6kl_bmi_lz_stream_start(ar, 0x00);
  560. }
  561. return ret;
  562. }
  563. void ath6kl_bmi_reset(struct ath6kl *ar)
  564. {
  565. ar->bmi.done_sent = false;
  566. }
  567. int ath6kl_bmi_init(struct ath6kl *ar)
  568. {
  569. ar->bmi.cmd_buf = kzalloc(MAX_BMI_CMDBUF_SZ, GFP_ATOMIC);
  570. if (!ar->bmi.cmd_buf)
  571. return -ENOMEM;
  572. return 0;
  573. }
  574. void ath6kl_bmi_cleanup(struct ath6kl *ar)
  575. {
  576. kfree(ar->bmi.cmd_buf);
  577. ar->bmi.cmd_buf = NULL;
  578. }