exynos5440.dtsi 5.0 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. clock: clock-controller@0x160000 {
  16. compatible = "samsung,exynos5440-clock";
  17. reg = <0x160000 0x1000>;
  18. #clock-cells = <1>;
  19. };
  20. gic:interrupt-controller@2E0000 {
  21. compatible = "arm,cortex-a15-gic";
  22. #interrupt-cells = <3>;
  23. interrupt-controller;
  24. reg = <0x2E1000 0x1000>,
  25. <0x2E2000 0x1000>,
  26. <0x2E4000 0x2000>,
  27. <0x2E6000 0x2000>;
  28. interrupts = <1 9 0xf04>;
  29. };
  30. cpus {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. cpu@0 {
  34. device_type = "cpu";
  35. compatible = "arm,cortex-a15";
  36. reg = <0>;
  37. };
  38. cpu@1 {
  39. device_type = "cpu";
  40. compatible = "arm,cortex-a15";
  41. reg = <1>;
  42. };
  43. cpu@2 {
  44. device_type = "cpu";
  45. compatible = "arm,cortex-a15";
  46. reg = <2>;
  47. };
  48. cpu@3 {
  49. device_type = "cpu";
  50. compatible = "arm,cortex-a15";
  51. reg = <3>;
  52. };
  53. };
  54. arm-pmu {
  55. compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
  56. interrupts = <0 52 4>,
  57. <0 53 4>,
  58. <0 54 4>,
  59. <0 55 4>;
  60. };
  61. timer {
  62. compatible = "arm,cortex-a15-timer",
  63. "arm,armv7-timer";
  64. interrupts = <1 13 0xf08>,
  65. <1 14 0xf08>,
  66. <1 11 0xf08>,
  67. <1 10 0xf08>;
  68. clock-frequency = <50000000>;
  69. };
  70. cpufreq@160000 {
  71. compatible = "samsung,exynos5440-cpufreq";
  72. reg = <0x160000 0x1000>;
  73. interrupts = <0 57 0>;
  74. operating-points = <
  75. /* KHz uV */
  76. 1200000 1025000
  77. 1000000 975000
  78. 800000 925000
  79. >;
  80. };
  81. serial@B0000 {
  82. compatible = "samsung,exynos4210-uart";
  83. reg = <0xB0000 0x1000>;
  84. interrupts = <0 2 0>;
  85. clocks = <&clock 21>, <&clock 21>;
  86. clock-names = "uart", "clk_uart_baud0";
  87. };
  88. serial@C0000 {
  89. compatible = "samsung,exynos4210-uart";
  90. reg = <0xC0000 0x1000>;
  91. interrupts = <0 3 0>;
  92. clocks = <&clock 21>, <&clock 21>;
  93. clock-names = "uart", "clk_uart_baud0";
  94. };
  95. spi {
  96. compatible = "samsung,exynos4210-spi";
  97. reg = <0xD0000 0x1000>;
  98. interrupts = <0 4 0>;
  99. tx-dma-channel = <&pdma0 5>; /* preliminary */
  100. rx-dma-channel = <&pdma0 4>; /* preliminary */
  101. #address-cells = <1>;
  102. #size-cells = <0>;
  103. clocks = <&clock 21>, <&clock 16>;
  104. clock-names = "spi", "spi_busclk0";
  105. };
  106. pinctrl {
  107. compatible = "samsung,exynos5440-pinctrl";
  108. reg = <0xE0000 0x1000>;
  109. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
  110. <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
  111. interrupt-controller;
  112. #interrupt-cells = <2>;
  113. #gpio-cells = <2>;
  114. fan: fan {
  115. samsung,exynos5440-pin-function = <1>;
  116. };
  117. hdd_led0: hdd_led0 {
  118. samsung,exynos5440-pin-function = <2>;
  119. };
  120. hdd_led1: hdd_led1 {
  121. samsung,exynos5440-pin-function = <3>;
  122. };
  123. uart1: uart1 {
  124. samsung,exynos5440-pin-function = <4>;
  125. };
  126. };
  127. i2c@F0000 {
  128. compatible = "samsung,exynos5440-i2c";
  129. reg = <0xF0000 0x1000>;
  130. interrupts = <0 5 0>;
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. clocks = <&clock 21>;
  134. clock-names = "i2c";
  135. };
  136. i2c@100000 {
  137. compatible = "samsung,exynos5440-i2c";
  138. reg = <0x100000 0x1000>;
  139. interrupts = <0 6 0>;
  140. #address-cells = <1>;
  141. #size-cells = <0>;
  142. clocks = <&clock 21>;
  143. clock-names = "i2c";
  144. };
  145. watchdog {
  146. compatible = "samsung,s3c2410-wdt";
  147. reg = <0x110000 0x1000>;
  148. interrupts = <0 1 0>;
  149. clocks = <&clock 21>;
  150. clock-names = "watchdog";
  151. };
  152. gmac: ethernet@00230000 {
  153. compatible = "snps,dwmac-3.70a";
  154. reg = <0x00230000 0x8000>;
  155. interrupt-parent = <&gic>;
  156. interrupts = <0 31 4>;
  157. interrupt-names = "macirq";
  158. phy-mode = "sgmii";
  159. clocks = <&clock 25>;
  160. clock-names = "stmmaceth";
  161. };
  162. amba {
  163. #address-cells = <1>;
  164. #size-cells = <1>;
  165. compatible = "arm,amba-bus";
  166. interrupt-parent = <&gic>;
  167. ranges;
  168. pdma0: pdma@00121000 {
  169. compatible = "arm,pl330", "arm,primecell";
  170. reg = <0x121000 0x1000>;
  171. interrupts = <0 46 0>;
  172. clocks = <&clock 8>;
  173. clock-names = "apb_pclk";
  174. #dma-cells = <1>;
  175. #dma-channels = <8>;
  176. #dma-requests = <32>;
  177. };
  178. pdma1: pdma@00120000 {
  179. compatible = "arm,pl330", "arm,primecell";
  180. reg = <0x120000 0x1000>;
  181. interrupts = <0 47 0>;
  182. clocks = <&clock 8>;
  183. clock-names = "apb_pclk";
  184. #dma-cells = <1>;
  185. #dma-channels = <8>;
  186. #dma-requests = <32>;
  187. };
  188. };
  189. rtc {
  190. compatible = "samsung,s3c6410-rtc";
  191. reg = <0x130000 0x1000>;
  192. interrupts = <0 17 0>, <0 16 0>;
  193. clocks = <&clock 21>;
  194. clock-names = "rtc";
  195. };
  196. sata@210000 {
  197. compatible = "snps,exynos5440-ahci";
  198. reg = <0x210000 0x10000>;
  199. interrupts = <0 30 0>;
  200. clocks = <&clock 23>;
  201. clock-names = "sata";
  202. };
  203. ohci@220000 {
  204. compatible = "samsung,exynos5440-ohci";
  205. reg = <0x220000 0x1000>;
  206. interrupts = <0 29 0>;
  207. clocks = <&clock 24>;
  208. clock-names = "usbhost";
  209. };
  210. ehci@221000 {
  211. compatible = "samsung,exynos5440-ehci";
  212. reg = <0x221000 0x1000>;
  213. interrupts = <0 29 0>;
  214. clocks = <&clock 24>;
  215. clock-names = "usbhost";
  216. };
  217. };