mxser.c 70 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  18. * www.moxa.com.
  19. * - Fixed x86_64 cleanness
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/smp_lock.h>
  26. #include <linux/timer.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/tty.h>
  29. #include <linux/tty_flip.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_reg.h>
  32. #include <linux/major.h>
  33. #include <linux/string.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/ptrace.h>
  36. #include <linux/gfp.h>
  37. #include <linux/ioport.h>
  38. #include <linux/mm.h>
  39. #include <linux/delay.h>
  40. #include <linux/pci.h>
  41. #include <linux/bitops.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/uaccess.h>
  46. #include "mxser.h"
  47. #define MXSER_VERSION "2.0.4" /* 1.12 */
  48. #define MXSERMAJOR 174
  49. #define MXSER_BOARDS 4 /* Max. boards */
  50. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  51. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  52. #define MXSER_ISR_PASS_LIMIT 100
  53. /*CheckIsMoxaMust return value*/
  54. #define MOXA_OTHER_UART 0x00
  55. #define MOXA_MUST_MU150_HWID 0x01
  56. #define MOXA_MUST_MU860_HWID 0x02
  57. #define WAKEUP_CHARS 256
  58. #define UART_MCR_AFE 0x20
  59. #define UART_LSR_SPECIAL 0x1E
  60. #define PCI_DEVICE_ID_POS104UL 0x1044
  61. #define PCI_DEVICE_ID_CB108 0x1080
  62. #define PCI_DEVICE_ID_CP102UF 0x1023
  63. #define PCI_DEVICE_ID_CB114 0x1142
  64. #define PCI_DEVICE_ID_CP114UL 0x1143
  65. #define PCI_DEVICE_ID_CB134I 0x1341
  66. #define PCI_DEVICE_ID_CP138U 0x1380
  67. #define C168_ASIC_ID 1
  68. #define C104_ASIC_ID 2
  69. #define C102_ASIC_ID 0xB
  70. #define CI132_ASIC_ID 4
  71. #define CI134_ASIC_ID 3
  72. #define CI104J_ASIC_ID 5
  73. #define MXSER_HIGHBAUD 1
  74. #define MXSER_HAS2 2
  75. /* This is only for PCI */
  76. static const struct {
  77. int type;
  78. int tx_fifo;
  79. int rx_fifo;
  80. int xmit_fifo_size;
  81. int rx_high_water;
  82. int rx_trigger;
  83. int rx_low_water;
  84. long max_baud;
  85. } Gpci_uart_info[] = {
  86. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  87. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  88. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  89. };
  90. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  91. struct mxser_cardinfo {
  92. char *name;
  93. unsigned int nports;
  94. unsigned int flags;
  95. };
  96. static const struct mxser_cardinfo mxser_cards[] = {
  97. /* 0*/ { "C168 series", 8, },
  98. { "C104 series", 4, },
  99. { "CI-104J series", 4, },
  100. { "C168H/PCI series", 8, },
  101. { "C104H/PCI series", 4, },
  102. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  103. { "CI-132 series", 4, MXSER_HAS2 },
  104. { "CI-134 series", 4, },
  105. { "CP-132 series", 2, },
  106. { "CP-114 series", 4, },
  107. /*10*/ { "CT-114 series", 4, },
  108. { "CP-102 series", 2, MXSER_HIGHBAUD },
  109. { "CP-104U series", 4, },
  110. { "CP-168U series", 8, },
  111. { "CP-132U series", 2, },
  112. /*15*/ { "CP-134U series", 4, },
  113. { "CP-104JU series", 4, },
  114. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  115. { "CP-118U series", 8, },
  116. { "CP-102UL series", 2, },
  117. /*20*/ { "CP-102U series", 2, },
  118. { "CP-118EL series", 8, },
  119. { "CP-168EL series", 8, },
  120. { "CP-104EL series", 4, },
  121. { "CB-108 series", 8, },
  122. /*25*/ { "CB-114 series", 4, },
  123. { "CB-134I series", 4, },
  124. { "CP-138U series", 8, },
  125. { "POS-104UL series", 4, },
  126. { "CP-114UL series", 4, },
  127. /*30*/ { "CP-102UF series", 2, }
  128. };
  129. /* driver_data correspond to the lines in the structure above
  130. see also ISA probe function before you change something */
  131. static struct pci_device_id mxser_pcibrds[] = {
  132. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  157. { }
  158. };
  159. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  160. static unsigned long ioaddr[MXSER_BOARDS];
  161. static int ttymajor = MXSERMAJOR;
  162. /* Variables for insmod */
  163. MODULE_AUTHOR("Casper Yang");
  164. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  165. module_param_array(ioaddr, ulong, NULL, 0);
  166. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  167. module_param(ttymajor, int, 0);
  168. MODULE_LICENSE("GPL");
  169. struct mxser_log {
  170. int tick;
  171. unsigned long rxcnt[MXSER_PORTS];
  172. unsigned long txcnt[MXSER_PORTS];
  173. };
  174. struct mxser_mon {
  175. unsigned long rxcnt;
  176. unsigned long txcnt;
  177. unsigned long up_rxcnt;
  178. unsigned long up_txcnt;
  179. int modem_status;
  180. unsigned char hold_reason;
  181. };
  182. struct mxser_mon_ext {
  183. unsigned long rx_cnt[32];
  184. unsigned long tx_cnt[32];
  185. unsigned long up_rxcnt[32];
  186. unsigned long up_txcnt[32];
  187. int modem_status[32];
  188. long baudrate[32];
  189. int databits[32];
  190. int stopbits[32];
  191. int parity[32];
  192. int flowctrl[32];
  193. int fifo[32];
  194. int iftype[32];
  195. };
  196. struct mxser_board;
  197. struct mxser_port {
  198. struct tty_port port;
  199. struct mxser_board *board;
  200. unsigned long ioaddr;
  201. unsigned long opmode_ioaddr;
  202. int max_baud;
  203. int rx_high_water;
  204. int rx_trigger; /* Rx fifo trigger level */
  205. int rx_low_water;
  206. int baud_base; /* max. speed */
  207. int type; /* UART type */
  208. int x_char; /* xon/xoff character */
  209. int IER; /* Interrupt Enable Register */
  210. int MCR; /* Modem control register */
  211. unsigned char stop_rx;
  212. unsigned char ldisc_stop_rx;
  213. int custom_divisor;
  214. unsigned char err_shadow;
  215. struct async_icount icount; /* kernel counters for 4 input interrupts */
  216. int timeout;
  217. int read_status_mask;
  218. int ignore_status_mask;
  219. int xmit_fifo_size;
  220. int xmit_head;
  221. int xmit_tail;
  222. int xmit_cnt;
  223. struct ktermios normal_termios;
  224. struct mxser_mon mon_data;
  225. spinlock_t slock;
  226. wait_queue_head_t delta_msr_wait;
  227. };
  228. struct mxser_board {
  229. unsigned int idx;
  230. int irq;
  231. const struct mxser_cardinfo *info;
  232. unsigned long vector;
  233. unsigned long vector_mask;
  234. int chip_flag;
  235. int uart_type;
  236. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  237. };
  238. struct mxser_mstatus {
  239. tcflag_t cflag;
  240. int cts;
  241. int dsr;
  242. int ri;
  243. int dcd;
  244. };
  245. static struct mxser_board mxser_boards[MXSER_BOARDS];
  246. static struct tty_driver *mxvar_sdriver;
  247. static struct mxser_log mxvar_log;
  248. static int mxser_set_baud_method[MXSER_PORTS + 1];
  249. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  250. {
  251. u8 oldlcr;
  252. u8 efr;
  253. oldlcr = inb(baseio + UART_LCR);
  254. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  255. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  256. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  257. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  258. outb(oldlcr, baseio + UART_LCR);
  259. }
  260. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  261. {
  262. u8 oldlcr;
  263. u8 efr;
  264. oldlcr = inb(baseio + UART_LCR);
  265. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  266. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  267. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  268. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  269. outb(oldlcr, baseio + UART_LCR);
  270. }
  271. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  272. {
  273. u8 oldlcr;
  274. u8 efr;
  275. oldlcr = inb(baseio + UART_LCR);
  276. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  277. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  278. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  279. efr |= MOXA_MUST_EFR_BANK0;
  280. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  281. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  282. outb(oldlcr, baseio + UART_LCR);
  283. }
  284. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  285. {
  286. u8 oldlcr;
  287. u8 efr;
  288. oldlcr = inb(baseio + UART_LCR);
  289. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  290. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  291. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  292. efr |= MOXA_MUST_EFR_BANK0;
  293. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  294. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  295. outb(oldlcr, baseio + UART_LCR);
  296. }
  297. static void mxser_set_must_fifo_value(struct mxser_port *info)
  298. {
  299. u8 oldlcr;
  300. u8 efr;
  301. oldlcr = inb(info->ioaddr + UART_LCR);
  302. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  303. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  304. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  305. efr |= MOXA_MUST_EFR_BANK1;
  306. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  307. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  308. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  309. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  310. outb(oldlcr, info->ioaddr + UART_LCR);
  311. }
  312. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  313. {
  314. u8 oldlcr;
  315. u8 efr;
  316. oldlcr = inb(baseio + UART_LCR);
  317. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  318. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  319. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  320. efr |= MOXA_MUST_EFR_BANK2;
  321. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  322. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  323. outb(oldlcr, baseio + UART_LCR);
  324. }
  325. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  326. {
  327. u8 oldlcr;
  328. u8 efr;
  329. oldlcr = inb(baseio + UART_LCR);
  330. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  331. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  332. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  333. efr |= MOXA_MUST_EFR_BANK2;
  334. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  335. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  336. outb(oldlcr, baseio + UART_LCR);
  337. }
  338. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  339. {
  340. u8 oldlcr;
  341. u8 efr;
  342. oldlcr = inb(baseio + UART_LCR);
  343. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  344. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  345. efr &= ~MOXA_MUST_EFR_SF_MASK;
  346. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  347. outb(oldlcr, baseio + UART_LCR);
  348. }
  349. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  350. {
  351. u8 oldlcr;
  352. u8 efr;
  353. oldlcr = inb(baseio + UART_LCR);
  354. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  355. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  356. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  357. efr |= MOXA_MUST_EFR_SF_TX1;
  358. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  359. outb(oldlcr, baseio + UART_LCR);
  360. }
  361. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  362. {
  363. u8 oldlcr;
  364. u8 efr;
  365. oldlcr = inb(baseio + UART_LCR);
  366. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  367. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  368. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  369. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  370. outb(oldlcr, baseio + UART_LCR);
  371. }
  372. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  373. {
  374. u8 oldlcr;
  375. u8 efr;
  376. oldlcr = inb(baseio + UART_LCR);
  377. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  378. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  379. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  380. efr |= MOXA_MUST_EFR_SF_RX1;
  381. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  382. outb(oldlcr, baseio + UART_LCR);
  383. }
  384. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  385. {
  386. u8 oldlcr;
  387. u8 efr;
  388. oldlcr = inb(baseio + UART_LCR);
  389. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  390. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  391. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  392. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  393. outb(oldlcr, baseio + UART_LCR);
  394. }
  395. #ifdef CONFIG_PCI
  396. static int __devinit CheckIsMoxaMust(unsigned long io)
  397. {
  398. u8 oldmcr, hwid;
  399. int i;
  400. outb(0, io + UART_LCR);
  401. mxser_disable_must_enchance_mode(io);
  402. oldmcr = inb(io + UART_MCR);
  403. outb(0, io + UART_MCR);
  404. mxser_set_must_xon1_value(io, 0x11);
  405. if ((hwid = inb(io + UART_MCR)) != 0) {
  406. outb(oldmcr, io + UART_MCR);
  407. return MOXA_OTHER_UART;
  408. }
  409. mxser_get_must_hardware_id(io, &hwid);
  410. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  411. if (hwid == Gpci_uart_info[i].type)
  412. return (int)hwid;
  413. }
  414. return MOXA_OTHER_UART;
  415. }
  416. #endif
  417. static void process_txrx_fifo(struct mxser_port *info)
  418. {
  419. int i;
  420. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  421. info->rx_trigger = 1;
  422. info->rx_high_water = 1;
  423. info->rx_low_water = 1;
  424. info->xmit_fifo_size = 1;
  425. } else
  426. for (i = 0; i < UART_INFO_NUM; i++)
  427. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  428. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  429. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  430. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  431. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  432. break;
  433. }
  434. }
  435. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  436. {
  437. static unsigned char mxser_msr[MXSER_PORTS + 1];
  438. unsigned char status = 0;
  439. status = inb(baseaddr + UART_MSR);
  440. mxser_msr[port] &= 0x0F;
  441. mxser_msr[port] |= status;
  442. status = mxser_msr[port];
  443. if (mode)
  444. mxser_msr[port] = 0;
  445. return status;
  446. }
  447. static int mxser_carrier_raised(struct tty_port *port)
  448. {
  449. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  450. return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
  451. }
  452. static void mxser_dtr_rts(struct tty_port *port, int on)
  453. {
  454. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  455. unsigned long flags;
  456. spin_lock_irqsave(&mp->slock, flags);
  457. if (on)
  458. outb(inb(mp->ioaddr + UART_MCR) |
  459. UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
  460. else
  461. outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
  462. mp->ioaddr + UART_MCR);
  463. spin_unlock_irqrestore(&mp->slock, flags);
  464. }
  465. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  466. {
  467. struct mxser_port *info = tty->driver_data;
  468. int quot = 0, baud;
  469. unsigned char cval;
  470. if (!info->ioaddr)
  471. return -1;
  472. if (newspd > info->max_baud)
  473. return -1;
  474. if (newspd == 134) {
  475. quot = 2 * info->baud_base / 269;
  476. tty_encode_baud_rate(tty, 134, 134);
  477. } else if (newspd) {
  478. quot = info->baud_base / newspd;
  479. if (quot == 0)
  480. quot = 1;
  481. baud = info->baud_base/quot;
  482. tty_encode_baud_rate(tty, baud, baud);
  483. } else {
  484. quot = 0;
  485. }
  486. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  487. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  488. if (quot) {
  489. info->MCR |= UART_MCR_DTR;
  490. outb(info->MCR, info->ioaddr + UART_MCR);
  491. } else {
  492. info->MCR &= ~UART_MCR_DTR;
  493. outb(info->MCR, info->ioaddr + UART_MCR);
  494. return 0;
  495. }
  496. cval = inb(info->ioaddr + UART_LCR);
  497. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  498. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  499. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  500. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  501. #ifdef BOTHER
  502. if (C_BAUD(tty) == BOTHER) {
  503. quot = info->baud_base % newspd;
  504. quot *= 8;
  505. if (quot % newspd > newspd / 2) {
  506. quot /= newspd;
  507. quot++;
  508. } else
  509. quot /= newspd;
  510. mxser_set_must_enum_value(info->ioaddr, quot);
  511. } else
  512. #endif
  513. mxser_set_must_enum_value(info->ioaddr, 0);
  514. return 0;
  515. }
  516. /*
  517. * This routine is called to set the UART divisor registers to match
  518. * the specified baud rate for a serial port.
  519. */
  520. static int mxser_change_speed(struct tty_struct *tty,
  521. struct ktermios *old_termios)
  522. {
  523. struct mxser_port *info = tty->driver_data;
  524. unsigned cflag, cval, fcr;
  525. int ret = 0;
  526. unsigned char status;
  527. cflag = tty->termios->c_cflag;
  528. if (!info->ioaddr)
  529. return ret;
  530. if (mxser_set_baud_method[tty->index] == 0)
  531. mxser_set_baud(tty, tty_get_baud_rate(tty));
  532. /* byte size and parity */
  533. switch (cflag & CSIZE) {
  534. case CS5:
  535. cval = 0x00;
  536. break;
  537. case CS6:
  538. cval = 0x01;
  539. break;
  540. case CS7:
  541. cval = 0x02;
  542. break;
  543. case CS8:
  544. cval = 0x03;
  545. break;
  546. default:
  547. cval = 0x00;
  548. break; /* too keep GCC shut... */
  549. }
  550. if (cflag & CSTOPB)
  551. cval |= 0x04;
  552. if (cflag & PARENB)
  553. cval |= UART_LCR_PARITY;
  554. if (!(cflag & PARODD))
  555. cval |= UART_LCR_EPAR;
  556. if (cflag & CMSPAR)
  557. cval |= UART_LCR_SPAR;
  558. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  559. if (info->board->chip_flag) {
  560. fcr = UART_FCR_ENABLE_FIFO;
  561. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  562. mxser_set_must_fifo_value(info);
  563. } else
  564. fcr = 0;
  565. } else {
  566. fcr = UART_FCR_ENABLE_FIFO;
  567. if (info->board->chip_flag) {
  568. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  569. mxser_set_must_fifo_value(info);
  570. } else {
  571. switch (info->rx_trigger) {
  572. case 1:
  573. fcr |= UART_FCR_TRIGGER_1;
  574. break;
  575. case 4:
  576. fcr |= UART_FCR_TRIGGER_4;
  577. break;
  578. case 8:
  579. fcr |= UART_FCR_TRIGGER_8;
  580. break;
  581. default:
  582. fcr |= UART_FCR_TRIGGER_14;
  583. break;
  584. }
  585. }
  586. }
  587. /* CTS flow control flag and modem status interrupts */
  588. info->IER &= ~UART_IER_MSI;
  589. info->MCR &= ~UART_MCR_AFE;
  590. if (cflag & CRTSCTS) {
  591. info->port.flags |= ASYNC_CTS_FLOW;
  592. info->IER |= UART_IER_MSI;
  593. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  594. info->MCR |= UART_MCR_AFE;
  595. } else {
  596. status = inb(info->ioaddr + UART_MSR);
  597. if (tty->hw_stopped) {
  598. if (status & UART_MSR_CTS) {
  599. tty->hw_stopped = 0;
  600. if (info->type != PORT_16550A &&
  601. !info->board->chip_flag) {
  602. outb(info->IER & ~UART_IER_THRI,
  603. info->ioaddr +
  604. UART_IER);
  605. info->IER |= UART_IER_THRI;
  606. outb(info->IER, info->ioaddr +
  607. UART_IER);
  608. }
  609. tty_wakeup(tty);
  610. }
  611. } else {
  612. if (!(status & UART_MSR_CTS)) {
  613. tty->hw_stopped = 1;
  614. if ((info->type != PORT_16550A) &&
  615. (!info->board->chip_flag)) {
  616. info->IER &= ~UART_IER_THRI;
  617. outb(info->IER, info->ioaddr +
  618. UART_IER);
  619. }
  620. }
  621. }
  622. }
  623. } else {
  624. info->port.flags &= ~ASYNC_CTS_FLOW;
  625. }
  626. outb(info->MCR, info->ioaddr + UART_MCR);
  627. if (cflag & CLOCAL) {
  628. info->port.flags &= ~ASYNC_CHECK_CD;
  629. } else {
  630. info->port.flags |= ASYNC_CHECK_CD;
  631. info->IER |= UART_IER_MSI;
  632. }
  633. outb(info->IER, info->ioaddr + UART_IER);
  634. /*
  635. * Set up parity check flag
  636. */
  637. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  638. if (I_INPCK(tty))
  639. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  640. if (I_BRKINT(tty) || I_PARMRK(tty))
  641. info->read_status_mask |= UART_LSR_BI;
  642. info->ignore_status_mask = 0;
  643. if (I_IGNBRK(tty)) {
  644. info->ignore_status_mask |= UART_LSR_BI;
  645. info->read_status_mask |= UART_LSR_BI;
  646. /*
  647. * If we're ignore parity and break indicators, ignore
  648. * overruns too. (For real raw support).
  649. */
  650. if (I_IGNPAR(tty)) {
  651. info->ignore_status_mask |=
  652. UART_LSR_OE |
  653. UART_LSR_PE |
  654. UART_LSR_FE;
  655. info->read_status_mask |=
  656. UART_LSR_OE |
  657. UART_LSR_PE |
  658. UART_LSR_FE;
  659. }
  660. }
  661. if (info->board->chip_flag) {
  662. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  663. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  664. if (I_IXON(tty)) {
  665. mxser_enable_must_rx_software_flow_control(
  666. info->ioaddr);
  667. } else {
  668. mxser_disable_must_rx_software_flow_control(
  669. info->ioaddr);
  670. }
  671. if (I_IXOFF(tty)) {
  672. mxser_enable_must_tx_software_flow_control(
  673. info->ioaddr);
  674. } else {
  675. mxser_disable_must_tx_software_flow_control(
  676. info->ioaddr);
  677. }
  678. }
  679. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  680. outb(cval, info->ioaddr + UART_LCR);
  681. return ret;
  682. }
  683. static void mxser_check_modem_status(struct tty_struct *tty,
  684. struct mxser_port *port, int status)
  685. {
  686. /* update input line counters */
  687. if (status & UART_MSR_TERI)
  688. port->icount.rng++;
  689. if (status & UART_MSR_DDSR)
  690. port->icount.dsr++;
  691. if (status & UART_MSR_DDCD)
  692. port->icount.dcd++;
  693. if (status & UART_MSR_DCTS)
  694. port->icount.cts++;
  695. port->mon_data.modem_status = status;
  696. wake_up_interruptible(&port->delta_msr_wait);
  697. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  698. if (status & UART_MSR_DCD)
  699. wake_up_interruptible(&port->port.open_wait);
  700. }
  701. if (port->port.flags & ASYNC_CTS_FLOW) {
  702. if (tty->hw_stopped) {
  703. if (status & UART_MSR_CTS) {
  704. tty->hw_stopped = 0;
  705. if ((port->type != PORT_16550A) &&
  706. (!port->board->chip_flag)) {
  707. outb(port->IER & ~UART_IER_THRI,
  708. port->ioaddr + UART_IER);
  709. port->IER |= UART_IER_THRI;
  710. outb(port->IER, port->ioaddr +
  711. UART_IER);
  712. }
  713. tty_wakeup(tty);
  714. }
  715. } else {
  716. if (!(status & UART_MSR_CTS)) {
  717. tty->hw_stopped = 1;
  718. if (port->type != PORT_16550A &&
  719. !port->board->chip_flag) {
  720. port->IER &= ~UART_IER_THRI;
  721. outb(port->IER, port->ioaddr +
  722. UART_IER);
  723. }
  724. }
  725. }
  726. }
  727. }
  728. static int mxser_startup(struct tty_struct *tty)
  729. {
  730. struct mxser_port *info = tty->driver_data;
  731. unsigned long page;
  732. unsigned long flags;
  733. page = __get_free_page(GFP_KERNEL);
  734. if (!page)
  735. return -ENOMEM;
  736. spin_lock_irqsave(&info->slock, flags);
  737. if (info->port.flags & ASYNC_INITIALIZED) {
  738. free_page(page);
  739. spin_unlock_irqrestore(&info->slock, flags);
  740. return 0;
  741. }
  742. if (!info->ioaddr || !info->type) {
  743. set_bit(TTY_IO_ERROR, &tty->flags);
  744. free_page(page);
  745. spin_unlock_irqrestore(&info->slock, flags);
  746. return 0;
  747. }
  748. if (info->port.xmit_buf)
  749. free_page(page);
  750. else
  751. info->port.xmit_buf = (unsigned char *) page;
  752. /*
  753. * Clear the FIFO buffers and disable them
  754. * (they will be reenabled in mxser_change_speed())
  755. */
  756. if (info->board->chip_flag)
  757. outb((UART_FCR_CLEAR_RCVR |
  758. UART_FCR_CLEAR_XMIT |
  759. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  760. else
  761. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  762. info->ioaddr + UART_FCR);
  763. /*
  764. * At this point there's no way the LSR could still be 0xFF;
  765. * if it is, then bail out, because there's likely no UART
  766. * here.
  767. */
  768. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  769. spin_unlock_irqrestore(&info->slock, flags);
  770. if (capable(CAP_SYS_ADMIN)) {
  771. if (tty)
  772. set_bit(TTY_IO_ERROR, &tty->flags);
  773. return 0;
  774. } else
  775. return -ENODEV;
  776. }
  777. /*
  778. * Clear the interrupt registers.
  779. */
  780. (void) inb(info->ioaddr + UART_LSR);
  781. (void) inb(info->ioaddr + UART_RX);
  782. (void) inb(info->ioaddr + UART_IIR);
  783. (void) inb(info->ioaddr + UART_MSR);
  784. /*
  785. * Now, initialize the UART
  786. */
  787. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  788. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  789. outb(info->MCR, info->ioaddr + UART_MCR);
  790. /*
  791. * Finally, enable interrupts
  792. */
  793. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  794. if (info->board->chip_flag)
  795. info->IER |= MOXA_MUST_IER_EGDAI;
  796. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  797. /*
  798. * And clear the interrupt registers again for luck.
  799. */
  800. (void) inb(info->ioaddr + UART_LSR);
  801. (void) inb(info->ioaddr + UART_RX);
  802. (void) inb(info->ioaddr + UART_IIR);
  803. (void) inb(info->ioaddr + UART_MSR);
  804. clear_bit(TTY_IO_ERROR, &tty->flags);
  805. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  806. /*
  807. * and set the speed of the serial port
  808. */
  809. mxser_change_speed(tty, NULL);
  810. info->port.flags |= ASYNC_INITIALIZED;
  811. spin_unlock_irqrestore(&info->slock, flags);
  812. return 0;
  813. }
  814. /*
  815. * This routine will shutdown a serial port; interrupts maybe disabled, and
  816. * DTR is dropped if the hangup on close termio flag is on.
  817. */
  818. static void mxser_shutdown(struct tty_struct *tty)
  819. {
  820. struct mxser_port *info = tty->driver_data;
  821. unsigned long flags;
  822. if (!(info->port.flags & ASYNC_INITIALIZED))
  823. return;
  824. spin_lock_irqsave(&info->slock, flags);
  825. /*
  826. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  827. * here so the queue might never be waken up
  828. */
  829. wake_up_interruptible(&info->delta_msr_wait);
  830. /*
  831. * Free the IRQ, if necessary
  832. */
  833. if (info->port.xmit_buf) {
  834. free_page((unsigned long) info->port.xmit_buf);
  835. info->port.xmit_buf = NULL;
  836. }
  837. info->IER = 0;
  838. outb(0x00, info->ioaddr + UART_IER);
  839. if (tty->termios->c_cflag & HUPCL)
  840. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  841. outb(info->MCR, info->ioaddr + UART_MCR);
  842. /* clear Rx/Tx FIFO's */
  843. if (info->board->chip_flag)
  844. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  845. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  846. info->ioaddr + UART_FCR);
  847. else
  848. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  849. info->ioaddr + UART_FCR);
  850. /* read data port to reset things */
  851. (void) inb(info->ioaddr + UART_RX);
  852. set_bit(TTY_IO_ERROR, &tty->flags);
  853. info->port.flags &= ~ASYNC_INITIALIZED;
  854. if (info->board->chip_flag)
  855. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  856. spin_unlock_irqrestore(&info->slock, flags);
  857. }
  858. /*
  859. * This routine is called whenever a serial port is opened. It
  860. * enables interrupts for a serial port, linking in its async structure into
  861. * the IRQ chain. It also performs the serial-specific
  862. * initialization for the tty structure.
  863. */
  864. static int mxser_open(struct tty_struct *tty, struct file *filp)
  865. {
  866. struct mxser_port *info;
  867. unsigned long flags;
  868. int retval, line;
  869. line = tty->index;
  870. if (line == MXSER_PORTS)
  871. return 0;
  872. if (line < 0 || line > MXSER_PORTS)
  873. return -ENODEV;
  874. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  875. if (!info->ioaddr)
  876. return -ENODEV;
  877. tty->driver_data = info;
  878. tty_port_tty_set(&info->port, tty);
  879. /*
  880. * Start up serial port
  881. */
  882. spin_lock_irqsave(&info->port.lock, flags);
  883. info->port.count++;
  884. spin_unlock_irqrestore(&info->port.lock, flags);
  885. retval = mxser_startup(tty);
  886. if (retval)
  887. return retval;
  888. retval = tty_port_block_til_ready(&info->port, tty, filp);
  889. if (retval)
  890. return retval;
  891. return 0;
  892. }
  893. static void mxser_flush_buffer(struct tty_struct *tty)
  894. {
  895. struct mxser_port *info = tty->driver_data;
  896. char fcr;
  897. unsigned long flags;
  898. spin_lock_irqsave(&info->slock, flags);
  899. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  900. fcr = inb(info->ioaddr + UART_FCR);
  901. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  902. info->ioaddr + UART_FCR);
  903. outb(fcr, info->ioaddr + UART_FCR);
  904. spin_unlock_irqrestore(&info->slock, flags);
  905. tty_wakeup(tty);
  906. }
  907. static void mxser_close_port(struct tty_struct *tty, struct tty_port *port)
  908. {
  909. struct mxser_port *info = container_of(port, struct mxser_port, port);
  910. unsigned long timeout;
  911. /*
  912. * Save the termios structure, since this port may have
  913. * separate termios for callout and dialin.
  914. *
  915. * FIXME: Can this go ?
  916. */
  917. if (port->flags & ASYNC_NORMAL_ACTIVE)
  918. info->normal_termios = *tty->termios;
  919. /*
  920. * At this point we stop accepting input. To do this, we
  921. * disable the receive line status interrupts, and tell the
  922. * interrupt driver to stop checking the data ready bit in the
  923. * line status register.
  924. */
  925. info->IER &= ~UART_IER_RLSI;
  926. if (info->board->chip_flag)
  927. info->IER &= ~MOXA_MUST_RECV_ISR;
  928. if (port->flags & ASYNC_INITIALIZED) {
  929. outb(info->IER, info->ioaddr + UART_IER);
  930. /*
  931. * Before we drop DTR, make sure the UART transmitter
  932. * has completely drained; this is especially
  933. * important if there is a transmit FIFO!
  934. */
  935. timeout = jiffies + HZ;
  936. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  937. schedule_timeout_interruptible(5);
  938. if (time_after(jiffies, timeout))
  939. break;
  940. }
  941. }
  942. mxser_shutdown(tty);
  943. }
  944. /*
  945. * This routine is called when the serial port gets closed. First, we
  946. * wait for the last remaining data to be sent. Then, we unlink its
  947. * async structure from the interrupt chain if necessary, and we free
  948. * that IRQ if nothing is left in the chain.
  949. */
  950. static void mxser_close(struct tty_struct *tty, struct file *filp)
  951. {
  952. struct mxser_port *info = tty->driver_data;
  953. struct tty_port *port = &info->port;
  954. if (tty->index == MXSER_PORTS)
  955. return;
  956. if (tty_port_close_start(port, tty, filp) == 0)
  957. return;
  958. mxser_close_port(tty, port);
  959. mxser_flush_buffer(tty);
  960. /* Right now the tty_port set is done outside of the close_end helper
  961. as we don't yet have everyone using refcounts */
  962. tty_port_close_end(port, tty);
  963. tty_port_tty_set(port, NULL);
  964. }
  965. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  966. {
  967. int c, total = 0;
  968. struct mxser_port *info = tty->driver_data;
  969. unsigned long flags;
  970. if (!info->port.xmit_buf)
  971. return 0;
  972. while (1) {
  973. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  974. SERIAL_XMIT_SIZE - info->xmit_head));
  975. if (c <= 0)
  976. break;
  977. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  978. spin_lock_irqsave(&info->slock, flags);
  979. info->xmit_head = (info->xmit_head + c) &
  980. (SERIAL_XMIT_SIZE - 1);
  981. info->xmit_cnt += c;
  982. spin_unlock_irqrestore(&info->slock, flags);
  983. buf += c;
  984. count -= c;
  985. total += c;
  986. }
  987. if (info->xmit_cnt && !tty->stopped) {
  988. if (!tty->hw_stopped ||
  989. (info->type == PORT_16550A) ||
  990. (info->board->chip_flag)) {
  991. spin_lock_irqsave(&info->slock, flags);
  992. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  993. UART_IER);
  994. info->IER |= UART_IER_THRI;
  995. outb(info->IER, info->ioaddr + UART_IER);
  996. spin_unlock_irqrestore(&info->slock, flags);
  997. }
  998. }
  999. return total;
  1000. }
  1001. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1002. {
  1003. struct mxser_port *info = tty->driver_data;
  1004. unsigned long flags;
  1005. if (!info->port.xmit_buf)
  1006. return 0;
  1007. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1008. return 0;
  1009. spin_lock_irqsave(&info->slock, flags);
  1010. info->port.xmit_buf[info->xmit_head++] = ch;
  1011. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1012. info->xmit_cnt++;
  1013. spin_unlock_irqrestore(&info->slock, flags);
  1014. if (!tty->stopped) {
  1015. if (!tty->hw_stopped ||
  1016. (info->type == PORT_16550A) ||
  1017. info->board->chip_flag) {
  1018. spin_lock_irqsave(&info->slock, flags);
  1019. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1020. info->IER |= UART_IER_THRI;
  1021. outb(info->IER, info->ioaddr + UART_IER);
  1022. spin_unlock_irqrestore(&info->slock, flags);
  1023. }
  1024. }
  1025. return 1;
  1026. }
  1027. static void mxser_flush_chars(struct tty_struct *tty)
  1028. {
  1029. struct mxser_port *info = tty->driver_data;
  1030. unsigned long flags;
  1031. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  1032. (tty->hw_stopped && info->type != PORT_16550A &&
  1033. !info->board->chip_flag))
  1034. return;
  1035. spin_lock_irqsave(&info->slock, flags);
  1036. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1037. info->IER |= UART_IER_THRI;
  1038. outb(info->IER, info->ioaddr + UART_IER);
  1039. spin_unlock_irqrestore(&info->slock, flags);
  1040. }
  1041. static int mxser_write_room(struct tty_struct *tty)
  1042. {
  1043. struct mxser_port *info = tty->driver_data;
  1044. int ret;
  1045. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1046. return ret < 0 ? 0 : ret;
  1047. }
  1048. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1049. {
  1050. struct mxser_port *info = tty->driver_data;
  1051. return info->xmit_cnt;
  1052. }
  1053. /*
  1054. * ------------------------------------------------------------
  1055. * friends of mxser_ioctl()
  1056. * ------------------------------------------------------------
  1057. */
  1058. static int mxser_get_serial_info(struct tty_struct *tty,
  1059. struct serial_struct __user *retinfo)
  1060. {
  1061. struct mxser_port *info = tty->driver_data;
  1062. struct serial_struct tmp = {
  1063. .type = info->type,
  1064. .line = tty->index,
  1065. .port = info->ioaddr,
  1066. .irq = info->board->irq,
  1067. .flags = info->port.flags,
  1068. .baud_base = info->baud_base,
  1069. .close_delay = info->port.close_delay,
  1070. .closing_wait = info->port.closing_wait,
  1071. .custom_divisor = info->custom_divisor,
  1072. .hub6 = 0
  1073. };
  1074. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1075. return -EFAULT;
  1076. return 0;
  1077. }
  1078. static int mxser_set_serial_info(struct tty_struct *tty,
  1079. struct serial_struct __user *new_info)
  1080. {
  1081. struct mxser_port *info = tty->driver_data;
  1082. struct serial_struct new_serial;
  1083. speed_t baud;
  1084. unsigned long sl_flags;
  1085. unsigned int flags;
  1086. int retval = 0;
  1087. if (!new_info || !info->ioaddr)
  1088. return -ENODEV;
  1089. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1090. return -EFAULT;
  1091. if (new_serial.irq != info->board->irq ||
  1092. new_serial.port != info->ioaddr)
  1093. return -EINVAL;
  1094. flags = info->port.flags & ASYNC_SPD_MASK;
  1095. if (!capable(CAP_SYS_ADMIN)) {
  1096. if ((new_serial.baud_base != info->baud_base) ||
  1097. (new_serial.close_delay != info->port.close_delay) ||
  1098. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1099. return -EPERM;
  1100. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1101. (new_serial.flags & ASYNC_USR_MASK));
  1102. } else {
  1103. /*
  1104. * OK, past this point, all the error checking has been done.
  1105. * At this point, we start making changes.....
  1106. */
  1107. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1108. (new_serial.flags & ASYNC_FLAGS));
  1109. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1110. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1111. tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
  1112. ? 1 : 0;
  1113. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1114. (new_serial.baud_base != info->baud_base ||
  1115. new_serial.custom_divisor !=
  1116. info->custom_divisor)) {
  1117. baud = new_serial.baud_base / new_serial.custom_divisor;
  1118. tty_encode_baud_rate(tty, baud, baud);
  1119. }
  1120. }
  1121. info->type = new_serial.type;
  1122. process_txrx_fifo(info);
  1123. if (info->port.flags & ASYNC_INITIALIZED) {
  1124. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1125. spin_lock_irqsave(&info->slock, sl_flags);
  1126. mxser_change_speed(tty, NULL);
  1127. spin_unlock_irqrestore(&info->slock, sl_flags);
  1128. }
  1129. } else
  1130. retval = mxser_startup(tty);
  1131. return retval;
  1132. }
  1133. /*
  1134. * mxser_get_lsr_info - get line status register info
  1135. *
  1136. * Purpose: Let user call ioctl() to get info when the UART physically
  1137. * is emptied. On bus types like RS485, the transmitter must
  1138. * release the bus after transmitting. This must be done when
  1139. * the transmit shift register is empty, not be done when the
  1140. * transmit holding register is empty. This functionality
  1141. * allows an RS485 driver to be written in user space.
  1142. */
  1143. static int mxser_get_lsr_info(struct mxser_port *info,
  1144. unsigned int __user *value)
  1145. {
  1146. unsigned char status;
  1147. unsigned int result;
  1148. unsigned long flags;
  1149. spin_lock_irqsave(&info->slock, flags);
  1150. status = inb(info->ioaddr + UART_LSR);
  1151. spin_unlock_irqrestore(&info->slock, flags);
  1152. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1153. return put_user(result, value);
  1154. }
  1155. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1156. {
  1157. struct mxser_port *info = tty->driver_data;
  1158. unsigned char control, status;
  1159. unsigned long flags;
  1160. if (tty->index == MXSER_PORTS)
  1161. return -ENOIOCTLCMD;
  1162. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1163. return -EIO;
  1164. control = info->MCR;
  1165. spin_lock_irqsave(&info->slock, flags);
  1166. status = inb(info->ioaddr + UART_MSR);
  1167. if (status & UART_MSR_ANY_DELTA)
  1168. mxser_check_modem_status(tty, info, status);
  1169. spin_unlock_irqrestore(&info->slock, flags);
  1170. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1171. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1172. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1173. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1174. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1175. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1176. }
  1177. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1178. unsigned int set, unsigned int clear)
  1179. {
  1180. struct mxser_port *info = tty->driver_data;
  1181. unsigned long flags;
  1182. if (tty->index == MXSER_PORTS)
  1183. return -ENOIOCTLCMD;
  1184. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1185. return -EIO;
  1186. spin_lock_irqsave(&info->slock, flags);
  1187. if (set & TIOCM_RTS)
  1188. info->MCR |= UART_MCR_RTS;
  1189. if (set & TIOCM_DTR)
  1190. info->MCR |= UART_MCR_DTR;
  1191. if (clear & TIOCM_RTS)
  1192. info->MCR &= ~UART_MCR_RTS;
  1193. if (clear & TIOCM_DTR)
  1194. info->MCR &= ~UART_MCR_DTR;
  1195. outb(info->MCR, info->ioaddr + UART_MCR);
  1196. spin_unlock_irqrestore(&info->slock, flags);
  1197. return 0;
  1198. }
  1199. static int __init mxser_program_mode(int port)
  1200. {
  1201. int id, i, j, n;
  1202. outb(0, port);
  1203. outb(0, port);
  1204. outb(0, port);
  1205. (void)inb(port);
  1206. (void)inb(port);
  1207. outb(0, port);
  1208. (void)inb(port);
  1209. id = inb(port + 1) & 0x1F;
  1210. if ((id != C168_ASIC_ID) &&
  1211. (id != C104_ASIC_ID) &&
  1212. (id != C102_ASIC_ID) &&
  1213. (id != CI132_ASIC_ID) &&
  1214. (id != CI134_ASIC_ID) &&
  1215. (id != CI104J_ASIC_ID))
  1216. return -1;
  1217. for (i = 0, j = 0; i < 4; i++) {
  1218. n = inb(port + 2);
  1219. if (n == 'M') {
  1220. j = 1;
  1221. } else if ((j == 1) && (n == 1)) {
  1222. j = 2;
  1223. break;
  1224. } else
  1225. j = 0;
  1226. }
  1227. if (j != 2)
  1228. id = -2;
  1229. return id;
  1230. }
  1231. static void __init mxser_normal_mode(int port)
  1232. {
  1233. int i, n;
  1234. outb(0xA5, port + 1);
  1235. outb(0x80, port + 3);
  1236. outb(12, port + 0); /* 9600 bps */
  1237. outb(0, port + 1);
  1238. outb(0x03, port + 3); /* 8 data bits */
  1239. outb(0x13, port + 4); /* loop back mode */
  1240. for (i = 0; i < 16; i++) {
  1241. n = inb(port + 5);
  1242. if ((n & 0x61) == 0x60)
  1243. break;
  1244. if ((n & 1) == 1)
  1245. (void)inb(port);
  1246. }
  1247. outb(0x00, port + 4);
  1248. }
  1249. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1250. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1251. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1252. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1253. #define EN_CCMD 0x000 /* Chip's command register */
  1254. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1255. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1256. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1257. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1258. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1259. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1260. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1261. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1262. static int __init mxser_read_register(int port, unsigned short *regs)
  1263. {
  1264. int i, k, value, id;
  1265. unsigned int j;
  1266. id = mxser_program_mode(port);
  1267. if (id < 0)
  1268. return id;
  1269. for (i = 0; i < 14; i++) {
  1270. k = (i & 0x3F) | 0x180;
  1271. for (j = 0x100; j > 0; j >>= 1) {
  1272. outb(CHIP_CS, port);
  1273. if (k & j) {
  1274. outb(CHIP_CS | CHIP_DO, port);
  1275. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1276. } else {
  1277. outb(CHIP_CS, port);
  1278. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1279. }
  1280. }
  1281. (void)inb(port);
  1282. value = 0;
  1283. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1284. outb(CHIP_CS, port);
  1285. outb(CHIP_CS | CHIP_SK, port);
  1286. if (inb(port) & CHIP_DI)
  1287. value |= j;
  1288. }
  1289. regs[i] = value;
  1290. outb(0, port);
  1291. }
  1292. mxser_normal_mode(port);
  1293. return id;
  1294. }
  1295. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1296. {
  1297. struct mxser_port *port;
  1298. struct tty_struct *tty;
  1299. int result, status;
  1300. unsigned int i, j;
  1301. int ret = 0;
  1302. switch (cmd) {
  1303. case MOXA_GET_MAJOR:
  1304. if (printk_ratelimit())
  1305. printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1306. "%x (GET_MAJOR), fix your userspace\n",
  1307. current->comm, cmd);
  1308. return put_user(ttymajor, (int __user *)argp);
  1309. case MOXA_CHKPORTENABLE:
  1310. result = 0;
  1311. lock_kernel();
  1312. for (i = 0; i < MXSER_BOARDS; i++)
  1313. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1314. if (mxser_boards[i].ports[j].ioaddr)
  1315. result |= (1 << i);
  1316. unlock_kernel();
  1317. return put_user(result, (unsigned long __user *)argp);
  1318. case MOXA_GETDATACOUNT:
  1319. lock_kernel();
  1320. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1321. ret = -EFAULT;
  1322. unlock_kernel();
  1323. return ret;
  1324. case MOXA_GETMSTATUS: {
  1325. struct mxser_mstatus ms, __user *msu = argp;
  1326. lock_kernel();
  1327. for (i = 0; i < MXSER_BOARDS; i++)
  1328. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1329. port = &mxser_boards[i].ports[j];
  1330. memset(&ms, 0, sizeof(ms));
  1331. if (!port->ioaddr)
  1332. goto copy;
  1333. tty = tty_port_tty_get(&port->port);
  1334. if (!tty || !tty->termios)
  1335. ms.cflag = port->normal_termios.c_cflag;
  1336. else
  1337. ms.cflag = tty->termios->c_cflag;
  1338. tty_kref_put(tty);
  1339. status = inb(port->ioaddr + UART_MSR);
  1340. if (status & UART_MSR_DCD)
  1341. ms.dcd = 1;
  1342. if (status & UART_MSR_DSR)
  1343. ms.dsr = 1;
  1344. if (status & UART_MSR_CTS)
  1345. ms.cts = 1;
  1346. copy:
  1347. if (copy_to_user(msu, &ms, sizeof(ms))) {
  1348. unlock_kernel();
  1349. return -EFAULT;
  1350. }
  1351. msu++;
  1352. }
  1353. unlock_kernel();
  1354. return 0;
  1355. }
  1356. case MOXA_ASPP_MON_EXT: {
  1357. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1358. unsigned int cflag, iflag, p;
  1359. u8 opmode;
  1360. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1361. if (!me)
  1362. return -ENOMEM;
  1363. lock_kernel();
  1364. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1365. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1366. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1367. i = MXSER_BOARDS;
  1368. break;
  1369. }
  1370. port = &mxser_boards[i].ports[j];
  1371. if (!port->ioaddr)
  1372. continue;
  1373. status = mxser_get_msr(port->ioaddr, 0, p);
  1374. if (status & UART_MSR_TERI)
  1375. port->icount.rng++;
  1376. if (status & UART_MSR_DDSR)
  1377. port->icount.dsr++;
  1378. if (status & UART_MSR_DDCD)
  1379. port->icount.dcd++;
  1380. if (status & UART_MSR_DCTS)
  1381. port->icount.cts++;
  1382. port->mon_data.modem_status = status;
  1383. me->rx_cnt[p] = port->mon_data.rxcnt;
  1384. me->tx_cnt[p] = port->mon_data.txcnt;
  1385. me->up_rxcnt[p] = port->mon_data.up_rxcnt;
  1386. me->up_txcnt[p] = port->mon_data.up_txcnt;
  1387. me->modem_status[p] =
  1388. port->mon_data.modem_status;
  1389. tty = tty_port_tty_get(&port->port);
  1390. if (!tty || !tty->termios) {
  1391. cflag = port->normal_termios.c_cflag;
  1392. iflag = port->normal_termios.c_iflag;
  1393. me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
  1394. } else {
  1395. cflag = tty->termios->c_cflag;
  1396. iflag = tty->termios->c_iflag;
  1397. me->baudrate[p] = tty_get_baud_rate(tty);
  1398. }
  1399. tty_kref_put(tty);
  1400. me->databits[p] = cflag & CSIZE;
  1401. me->stopbits[p] = cflag & CSTOPB;
  1402. me->parity[p] = cflag & (PARENB | PARODD |
  1403. CMSPAR);
  1404. if (cflag & CRTSCTS)
  1405. me->flowctrl[p] |= 0x03;
  1406. if (iflag & (IXON | IXOFF))
  1407. me->flowctrl[p] |= 0x0C;
  1408. if (port->type == PORT_16550A)
  1409. me->fifo[p] = 1;
  1410. opmode = inb(port->opmode_ioaddr) >>
  1411. ((p % 4) * 2);
  1412. opmode &= OP_MODE_MASK;
  1413. me->iftype[p] = opmode;
  1414. }
  1415. }
  1416. unlock_kernel();
  1417. if (copy_to_user(argp, me, sizeof(*me)))
  1418. ret = -EFAULT;
  1419. kfree(me);
  1420. return ret;
  1421. }
  1422. default:
  1423. return -ENOIOCTLCMD;
  1424. }
  1425. return 0;
  1426. }
  1427. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1428. struct async_icount *cprev)
  1429. {
  1430. struct async_icount cnow;
  1431. unsigned long flags;
  1432. int ret;
  1433. spin_lock_irqsave(&info->slock, flags);
  1434. cnow = info->icount; /* atomic copy */
  1435. spin_unlock_irqrestore(&info->slock, flags);
  1436. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1437. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1438. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1439. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1440. *cprev = cnow;
  1441. return ret;
  1442. }
  1443. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1444. unsigned int cmd, unsigned long arg)
  1445. {
  1446. struct mxser_port *info = tty->driver_data;
  1447. struct async_icount cnow;
  1448. unsigned long flags;
  1449. void __user *argp = (void __user *)arg;
  1450. int retval;
  1451. if (tty->index == MXSER_PORTS)
  1452. return mxser_ioctl_special(cmd, argp);
  1453. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1454. int p;
  1455. unsigned long opmode;
  1456. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1457. int shiftbit;
  1458. unsigned char val, mask;
  1459. p = tty->index % 4;
  1460. if (cmd == MOXA_SET_OP_MODE) {
  1461. if (get_user(opmode, (int __user *) argp))
  1462. return -EFAULT;
  1463. if (opmode != RS232_MODE &&
  1464. opmode != RS485_2WIRE_MODE &&
  1465. opmode != RS422_MODE &&
  1466. opmode != RS485_4WIRE_MODE)
  1467. return -EFAULT;
  1468. lock_kernel();
  1469. mask = ModeMask[p];
  1470. shiftbit = p * 2;
  1471. val = inb(info->opmode_ioaddr);
  1472. val &= mask;
  1473. val |= (opmode << shiftbit);
  1474. outb(val, info->opmode_ioaddr);
  1475. unlock_kernel();
  1476. } else {
  1477. lock_kernel();
  1478. shiftbit = p * 2;
  1479. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1480. opmode &= OP_MODE_MASK;
  1481. unlock_kernel();
  1482. if (put_user(opmode, (int __user *)argp))
  1483. return -EFAULT;
  1484. }
  1485. return 0;
  1486. }
  1487. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1488. test_bit(TTY_IO_ERROR, &tty->flags))
  1489. return -EIO;
  1490. switch (cmd) {
  1491. case TIOCGSERIAL:
  1492. lock_kernel();
  1493. retval = mxser_get_serial_info(tty, argp);
  1494. unlock_kernel();
  1495. return retval;
  1496. case TIOCSSERIAL:
  1497. lock_kernel();
  1498. retval = mxser_set_serial_info(tty, argp);
  1499. unlock_kernel();
  1500. return retval;
  1501. case TIOCSERGETLSR: /* Get line status register */
  1502. return mxser_get_lsr_info(info, argp);
  1503. /*
  1504. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1505. * - mask passed in arg for lines of interest
  1506. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1507. * Caller should use TIOCGICOUNT to see which one it was
  1508. */
  1509. case TIOCMIWAIT:
  1510. spin_lock_irqsave(&info->slock, flags);
  1511. cnow = info->icount; /* note the counters on entry */
  1512. spin_unlock_irqrestore(&info->slock, flags);
  1513. return wait_event_interruptible(info->delta_msr_wait,
  1514. mxser_cflags_changed(info, arg, &cnow));
  1515. /*
  1516. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1517. * Return: write counters to the user passed counter struct
  1518. * NB: both 1->0 and 0->1 transitions are counted except for
  1519. * RI where only 0->1 is counted.
  1520. */
  1521. case TIOCGICOUNT: {
  1522. struct serial_icounter_struct icnt = { 0 };
  1523. spin_lock_irqsave(&info->slock, flags);
  1524. cnow = info->icount;
  1525. spin_unlock_irqrestore(&info->slock, flags);
  1526. icnt.frame = cnow.frame;
  1527. icnt.brk = cnow.brk;
  1528. icnt.overrun = cnow.overrun;
  1529. icnt.buf_overrun = cnow.buf_overrun;
  1530. icnt.parity = cnow.parity;
  1531. icnt.rx = cnow.rx;
  1532. icnt.tx = cnow.tx;
  1533. icnt.cts = cnow.cts;
  1534. icnt.dsr = cnow.dsr;
  1535. icnt.rng = cnow.rng;
  1536. icnt.dcd = cnow.dcd;
  1537. return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
  1538. }
  1539. case MOXA_HighSpeedOn:
  1540. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1541. case MOXA_SDS_RSTICOUNTER:
  1542. lock_kernel();
  1543. info->mon_data.rxcnt = 0;
  1544. info->mon_data.txcnt = 0;
  1545. unlock_kernel();
  1546. return 0;
  1547. case MOXA_ASPP_OQUEUE:{
  1548. int len, lsr;
  1549. lock_kernel();
  1550. len = mxser_chars_in_buffer(tty);
  1551. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1552. len += (lsr ? 0 : 1);
  1553. unlock_kernel();
  1554. return put_user(len, (int __user *)argp);
  1555. }
  1556. case MOXA_ASPP_MON: {
  1557. int mcr, status;
  1558. lock_kernel();
  1559. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1560. mxser_check_modem_status(tty, info, status);
  1561. mcr = inb(info->ioaddr + UART_MCR);
  1562. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1563. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1564. else
  1565. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1566. if (mcr & MOXA_MUST_MCR_TX_XON)
  1567. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1568. else
  1569. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1570. if (tty->hw_stopped)
  1571. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1572. else
  1573. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1574. unlock_kernel();
  1575. if (copy_to_user(argp, &info->mon_data,
  1576. sizeof(struct mxser_mon)))
  1577. return -EFAULT;
  1578. return 0;
  1579. }
  1580. case MOXA_ASPP_LSTATUS: {
  1581. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1582. return -EFAULT;
  1583. info->err_shadow = 0;
  1584. return 0;
  1585. }
  1586. case MOXA_SET_BAUD_METHOD: {
  1587. int method;
  1588. if (get_user(method, (int __user *)argp))
  1589. return -EFAULT;
  1590. mxser_set_baud_method[tty->index] = method;
  1591. return put_user(method, (int __user *)argp);
  1592. }
  1593. default:
  1594. return -ENOIOCTLCMD;
  1595. }
  1596. return 0;
  1597. }
  1598. static void mxser_stoprx(struct tty_struct *tty)
  1599. {
  1600. struct mxser_port *info = tty->driver_data;
  1601. info->ldisc_stop_rx = 1;
  1602. if (I_IXOFF(tty)) {
  1603. if (info->board->chip_flag) {
  1604. info->IER &= ~MOXA_MUST_RECV_ISR;
  1605. outb(info->IER, info->ioaddr + UART_IER);
  1606. } else {
  1607. info->x_char = STOP_CHAR(tty);
  1608. outb(0, info->ioaddr + UART_IER);
  1609. info->IER |= UART_IER_THRI;
  1610. outb(info->IER, info->ioaddr + UART_IER);
  1611. }
  1612. }
  1613. if (tty->termios->c_cflag & CRTSCTS) {
  1614. info->MCR &= ~UART_MCR_RTS;
  1615. outb(info->MCR, info->ioaddr + UART_MCR);
  1616. }
  1617. }
  1618. /*
  1619. * This routine is called by the upper-layer tty layer to signal that
  1620. * incoming characters should be throttled.
  1621. */
  1622. static void mxser_throttle(struct tty_struct *tty)
  1623. {
  1624. mxser_stoprx(tty);
  1625. }
  1626. static void mxser_unthrottle(struct tty_struct *tty)
  1627. {
  1628. struct mxser_port *info = tty->driver_data;
  1629. /* startrx */
  1630. info->ldisc_stop_rx = 0;
  1631. if (I_IXOFF(tty)) {
  1632. if (info->x_char)
  1633. info->x_char = 0;
  1634. else {
  1635. if (info->board->chip_flag) {
  1636. info->IER |= MOXA_MUST_RECV_ISR;
  1637. outb(info->IER, info->ioaddr + UART_IER);
  1638. } else {
  1639. info->x_char = START_CHAR(tty);
  1640. outb(0, info->ioaddr + UART_IER);
  1641. info->IER |= UART_IER_THRI;
  1642. outb(info->IER, info->ioaddr + UART_IER);
  1643. }
  1644. }
  1645. }
  1646. if (tty->termios->c_cflag & CRTSCTS) {
  1647. info->MCR |= UART_MCR_RTS;
  1648. outb(info->MCR, info->ioaddr + UART_MCR);
  1649. }
  1650. }
  1651. /*
  1652. * mxser_stop() and mxser_start()
  1653. *
  1654. * This routines are called before setting or resetting tty->stopped.
  1655. * They enable or disable transmitter interrupts, as necessary.
  1656. */
  1657. static void mxser_stop(struct tty_struct *tty)
  1658. {
  1659. struct mxser_port *info = tty->driver_data;
  1660. unsigned long flags;
  1661. spin_lock_irqsave(&info->slock, flags);
  1662. if (info->IER & UART_IER_THRI) {
  1663. info->IER &= ~UART_IER_THRI;
  1664. outb(info->IER, info->ioaddr + UART_IER);
  1665. }
  1666. spin_unlock_irqrestore(&info->slock, flags);
  1667. }
  1668. static void mxser_start(struct tty_struct *tty)
  1669. {
  1670. struct mxser_port *info = tty->driver_data;
  1671. unsigned long flags;
  1672. spin_lock_irqsave(&info->slock, flags);
  1673. if (info->xmit_cnt && info->port.xmit_buf) {
  1674. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1675. info->IER |= UART_IER_THRI;
  1676. outb(info->IER, info->ioaddr + UART_IER);
  1677. }
  1678. spin_unlock_irqrestore(&info->slock, flags);
  1679. }
  1680. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1681. {
  1682. struct mxser_port *info = tty->driver_data;
  1683. unsigned long flags;
  1684. spin_lock_irqsave(&info->slock, flags);
  1685. mxser_change_speed(tty, old_termios);
  1686. spin_unlock_irqrestore(&info->slock, flags);
  1687. if ((old_termios->c_cflag & CRTSCTS) &&
  1688. !(tty->termios->c_cflag & CRTSCTS)) {
  1689. tty->hw_stopped = 0;
  1690. mxser_start(tty);
  1691. }
  1692. /* Handle sw stopped */
  1693. if ((old_termios->c_iflag & IXON) &&
  1694. !(tty->termios->c_iflag & IXON)) {
  1695. tty->stopped = 0;
  1696. if (info->board->chip_flag) {
  1697. spin_lock_irqsave(&info->slock, flags);
  1698. mxser_disable_must_rx_software_flow_control(
  1699. info->ioaddr);
  1700. spin_unlock_irqrestore(&info->slock, flags);
  1701. }
  1702. mxser_start(tty);
  1703. }
  1704. }
  1705. /*
  1706. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1707. */
  1708. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1709. {
  1710. struct mxser_port *info = tty->driver_data;
  1711. unsigned long orig_jiffies, char_time;
  1712. int lsr;
  1713. if (info->type == PORT_UNKNOWN)
  1714. return;
  1715. if (info->xmit_fifo_size == 0)
  1716. return; /* Just in case.... */
  1717. orig_jiffies = jiffies;
  1718. /*
  1719. * Set the check interval to be 1/5 of the estimated time to
  1720. * send a single character, and make it at least 1. The check
  1721. * interval should also be less than the timeout.
  1722. *
  1723. * Note: we have to use pretty tight timings here to satisfy
  1724. * the NIST-PCTS.
  1725. */
  1726. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1727. char_time = char_time / 5;
  1728. if (char_time == 0)
  1729. char_time = 1;
  1730. if (timeout && timeout < char_time)
  1731. char_time = timeout;
  1732. /*
  1733. * If the transmitter hasn't cleared in twice the approximate
  1734. * amount of time to send the entire FIFO, it probably won't
  1735. * ever clear. This assumes the UART isn't doing flow
  1736. * control, which is currently the case. Hence, if it ever
  1737. * takes longer than info->timeout, this is probably due to a
  1738. * UART bug of some kind. So, we clamp the timeout parameter at
  1739. * 2*info->timeout.
  1740. */
  1741. if (!timeout || timeout > 2 * info->timeout)
  1742. timeout = 2 * info->timeout;
  1743. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1744. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1745. timeout, char_time);
  1746. printk("jiff=%lu...", jiffies);
  1747. #endif
  1748. lock_kernel();
  1749. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1750. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1751. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1752. #endif
  1753. schedule_timeout_interruptible(char_time);
  1754. if (signal_pending(current))
  1755. break;
  1756. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1757. break;
  1758. }
  1759. set_current_state(TASK_RUNNING);
  1760. unlock_kernel();
  1761. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1762. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1763. #endif
  1764. }
  1765. /*
  1766. * This routine is called by tty_hangup() when a hangup is signaled.
  1767. */
  1768. static void mxser_hangup(struct tty_struct *tty)
  1769. {
  1770. struct mxser_port *info = tty->driver_data;
  1771. mxser_flush_buffer(tty);
  1772. mxser_shutdown(tty);
  1773. tty_port_hangup(&info->port);
  1774. }
  1775. /*
  1776. * mxser_rs_break() --- routine which turns the break handling on or off
  1777. */
  1778. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1779. {
  1780. struct mxser_port *info = tty->driver_data;
  1781. unsigned long flags;
  1782. spin_lock_irqsave(&info->slock, flags);
  1783. if (break_state == -1)
  1784. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1785. info->ioaddr + UART_LCR);
  1786. else
  1787. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1788. info->ioaddr + UART_LCR);
  1789. spin_unlock_irqrestore(&info->slock, flags);
  1790. return 0;
  1791. }
  1792. static void mxser_receive_chars(struct tty_struct *tty,
  1793. struct mxser_port *port, int *status)
  1794. {
  1795. unsigned char ch, gdl;
  1796. int ignored = 0;
  1797. int cnt = 0;
  1798. int recv_room;
  1799. int max = 256;
  1800. recv_room = tty->receive_room;
  1801. if (recv_room == 0 && !port->ldisc_stop_rx)
  1802. mxser_stoprx(tty);
  1803. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1804. if (*status & UART_LSR_SPECIAL)
  1805. goto intr_old;
  1806. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1807. (*status & MOXA_MUST_LSR_RERR))
  1808. goto intr_old;
  1809. if (*status & MOXA_MUST_LSR_RERR)
  1810. goto intr_old;
  1811. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1812. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1813. gdl &= MOXA_MUST_GDL_MASK;
  1814. if (gdl >= recv_room) {
  1815. if (!port->ldisc_stop_rx)
  1816. mxser_stoprx(tty);
  1817. }
  1818. while (gdl--) {
  1819. ch = inb(port->ioaddr + UART_RX);
  1820. tty_insert_flip_char(tty, ch, 0);
  1821. cnt++;
  1822. }
  1823. goto end_intr;
  1824. }
  1825. intr_old:
  1826. do {
  1827. if (max-- < 0)
  1828. break;
  1829. ch = inb(port->ioaddr + UART_RX);
  1830. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1831. outb(0x23, port->ioaddr + UART_FCR);
  1832. *status &= port->read_status_mask;
  1833. if (*status & port->ignore_status_mask) {
  1834. if (++ignored > 100)
  1835. break;
  1836. } else {
  1837. char flag = 0;
  1838. if (*status & UART_LSR_SPECIAL) {
  1839. if (*status & UART_LSR_BI) {
  1840. flag = TTY_BREAK;
  1841. port->icount.brk++;
  1842. if (port->port.flags & ASYNC_SAK)
  1843. do_SAK(tty);
  1844. } else if (*status & UART_LSR_PE) {
  1845. flag = TTY_PARITY;
  1846. port->icount.parity++;
  1847. } else if (*status & UART_LSR_FE) {
  1848. flag = TTY_FRAME;
  1849. port->icount.frame++;
  1850. } else if (*status & UART_LSR_OE) {
  1851. flag = TTY_OVERRUN;
  1852. port->icount.overrun++;
  1853. } else
  1854. flag = TTY_BREAK;
  1855. }
  1856. tty_insert_flip_char(tty, ch, flag);
  1857. cnt++;
  1858. if (cnt >= recv_room) {
  1859. if (!port->ldisc_stop_rx)
  1860. mxser_stoprx(tty);
  1861. break;
  1862. }
  1863. }
  1864. if (port->board->chip_flag)
  1865. break;
  1866. *status = inb(port->ioaddr + UART_LSR);
  1867. } while (*status & UART_LSR_DR);
  1868. end_intr:
  1869. mxvar_log.rxcnt[tty->index] += cnt;
  1870. port->mon_data.rxcnt += cnt;
  1871. port->mon_data.up_rxcnt += cnt;
  1872. /*
  1873. * We are called from an interrupt context with &port->slock
  1874. * being held. Drop it temporarily in order to prevent
  1875. * recursive locking.
  1876. */
  1877. spin_unlock(&port->slock);
  1878. tty_flip_buffer_push(tty);
  1879. spin_lock(&port->slock);
  1880. }
  1881. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1882. {
  1883. int count, cnt;
  1884. if (port->x_char) {
  1885. outb(port->x_char, port->ioaddr + UART_TX);
  1886. port->x_char = 0;
  1887. mxvar_log.txcnt[tty->index]++;
  1888. port->mon_data.txcnt++;
  1889. port->mon_data.up_txcnt++;
  1890. port->icount.tx++;
  1891. return;
  1892. }
  1893. if (port->port.xmit_buf == NULL)
  1894. return;
  1895. if (port->xmit_cnt <= 0 || tty->stopped ||
  1896. (tty->hw_stopped &&
  1897. (port->type != PORT_16550A) &&
  1898. (!port->board->chip_flag))) {
  1899. port->IER &= ~UART_IER_THRI;
  1900. outb(port->IER, port->ioaddr + UART_IER);
  1901. return;
  1902. }
  1903. cnt = port->xmit_cnt;
  1904. count = port->xmit_fifo_size;
  1905. do {
  1906. outb(port->port.xmit_buf[port->xmit_tail++],
  1907. port->ioaddr + UART_TX);
  1908. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1909. if (--port->xmit_cnt <= 0)
  1910. break;
  1911. } while (--count > 0);
  1912. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1913. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1914. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1915. port->icount.tx += (cnt - port->xmit_cnt);
  1916. if (port->xmit_cnt < WAKEUP_CHARS && tty)
  1917. tty_wakeup(tty);
  1918. if (port->xmit_cnt <= 0) {
  1919. port->IER &= ~UART_IER_THRI;
  1920. outb(port->IER, port->ioaddr + UART_IER);
  1921. }
  1922. }
  1923. /*
  1924. * This is the serial driver's generic interrupt routine
  1925. */
  1926. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1927. {
  1928. int status, iir, i;
  1929. struct mxser_board *brd = NULL;
  1930. struct mxser_port *port;
  1931. int max, irqbits, bits, msr;
  1932. unsigned int int_cnt, pass_counter = 0;
  1933. int handled = IRQ_NONE;
  1934. struct tty_struct *tty;
  1935. for (i = 0; i < MXSER_BOARDS; i++)
  1936. if (dev_id == &mxser_boards[i]) {
  1937. brd = dev_id;
  1938. break;
  1939. }
  1940. if (i == MXSER_BOARDS)
  1941. goto irq_stop;
  1942. if (brd == NULL)
  1943. goto irq_stop;
  1944. max = brd->info->nports;
  1945. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  1946. irqbits = inb(brd->vector) & brd->vector_mask;
  1947. if (irqbits == brd->vector_mask)
  1948. break;
  1949. handled = IRQ_HANDLED;
  1950. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1951. if (irqbits == brd->vector_mask)
  1952. break;
  1953. if (bits & irqbits)
  1954. continue;
  1955. port = &brd->ports[i];
  1956. int_cnt = 0;
  1957. spin_lock(&port->slock);
  1958. do {
  1959. iir = inb(port->ioaddr + UART_IIR);
  1960. if (iir & UART_IIR_NO_INT)
  1961. break;
  1962. iir &= MOXA_MUST_IIR_MASK;
  1963. tty = tty_port_tty_get(&port->port);
  1964. if (!tty ||
  1965. (port->port.flags & ASYNC_CLOSING) ||
  1966. !(port->port.flags &
  1967. ASYNC_INITIALIZED)) {
  1968. status = inb(port->ioaddr + UART_LSR);
  1969. outb(0x27, port->ioaddr + UART_FCR);
  1970. inb(port->ioaddr + UART_MSR);
  1971. tty_kref_put(tty);
  1972. break;
  1973. }
  1974. status = inb(port->ioaddr + UART_LSR);
  1975. if (status & UART_LSR_PE)
  1976. port->err_shadow |= NPPI_NOTIFY_PARITY;
  1977. if (status & UART_LSR_FE)
  1978. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  1979. if (status & UART_LSR_OE)
  1980. port->err_shadow |=
  1981. NPPI_NOTIFY_HW_OVERRUN;
  1982. if (status & UART_LSR_BI)
  1983. port->err_shadow |= NPPI_NOTIFY_BREAK;
  1984. if (port->board->chip_flag) {
  1985. if (iir == MOXA_MUST_IIR_GDA ||
  1986. iir == MOXA_MUST_IIR_RDA ||
  1987. iir == MOXA_MUST_IIR_RTO ||
  1988. iir == MOXA_MUST_IIR_LSR)
  1989. mxser_receive_chars(tty, port,
  1990. &status);
  1991. } else {
  1992. status &= port->read_status_mask;
  1993. if (status & UART_LSR_DR)
  1994. mxser_receive_chars(tty, port,
  1995. &status);
  1996. }
  1997. msr = inb(port->ioaddr + UART_MSR);
  1998. if (msr & UART_MSR_ANY_DELTA)
  1999. mxser_check_modem_status(tty, port, msr);
  2000. if (port->board->chip_flag) {
  2001. if (iir == 0x02 && (status &
  2002. UART_LSR_THRE))
  2003. mxser_transmit_chars(tty, port);
  2004. } else {
  2005. if (status & UART_LSR_THRE)
  2006. mxser_transmit_chars(tty, port);
  2007. }
  2008. tty_kref_put(tty);
  2009. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2010. spin_unlock(&port->slock);
  2011. }
  2012. }
  2013. irq_stop:
  2014. return handled;
  2015. }
  2016. static const struct tty_operations mxser_ops = {
  2017. .open = mxser_open,
  2018. .close = mxser_close,
  2019. .write = mxser_write,
  2020. .put_char = mxser_put_char,
  2021. .flush_chars = mxser_flush_chars,
  2022. .write_room = mxser_write_room,
  2023. .chars_in_buffer = mxser_chars_in_buffer,
  2024. .flush_buffer = mxser_flush_buffer,
  2025. .ioctl = mxser_ioctl,
  2026. .throttle = mxser_throttle,
  2027. .unthrottle = mxser_unthrottle,
  2028. .set_termios = mxser_set_termios,
  2029. .stop = mxser_stop,
  2030. .start = mxser_start,
  2031. .hangup = mxser_hangup,
  2032. .break_ctl = mxser_rs_break,
  2033. .wait_until_sent = mxser_wait_until_sent,
  2034. .tiocmget = mxser_tiocmget,
  2035. .tiocmset = mxser_tiocmset,
  2036. };
  2037. struct tty_port_operations mxser_port_ops = {
  2038. .carrier_raised = mxser_carrier_raised,
  2039. .dtr_rts = mxser_dtr_rts,
  2040. };
  2041. /*
  2042. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2043. */
  2044. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2045. unsigned int irq)
  2046. {
  2047. if (irq)
  2048. free_irq(brd->irq, brd);
  2049. if (pdev != NULL) { /* PCI */
  2050. #ifdef CONFIG_PCI
  2051. pci_release_region(pdev, 2);
  2052. pci_release_region(pdev, 3);
  2053. #endif
  2054. } else {
  2055. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2056. release_region(brd->vector, 1);
  2057. }
  2058. }
  2059. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2060. struct pci_dev *pdev)
  2061. {
  2062. struct mxser_port *info;
  2063. unsigned int i;
  2064. int retval;
  2065. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2066. brd->ports[0].max_baud);
  2067. for (i = 0; i < brd->info->nports; i++) {
  2068. info = &brd->ports[i];
  2069. tty_port_init(&info->port);
  2070. info->port.ops = &mxser_port_ops;
  2071. info->board = brd;
  2072. info->stop_rx = 0;
  2073. info->ldisc_stop_rx = 0;
  2074. /* Enhance mode enabled here */
  2075. if (brd->chip_flag != MOXA_OTHER_UART)
  2076. mxser_enable_must_enchance_mode(info->ioaddr);
  2077. info->port.flags = ASYNC_SHARE_IRQ;
  2078. info->type = brd->uart_type;
  2079. process_txrx_fifo(info);
  2080. info->custom_divisor = info->baud_base * 16;
  2081. info->port.close_delay = 5 * HZ / 10;
  2082. info->port.closing_wait = 30 * HZ;
  2083. info->normal_termios = mxvar_sdriver->init_termios;
  2084. init_waitqueue_head(&info->delta_msr_wait);
  2085. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2086. info->err_shadow = 0;
  2087. spin_lock_init(&info->slock);
  2088. /* before set INT ISR, disable all int */
  2089. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2090. info->ioaddr + UART_IER);
  2091. }
  2092. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2093. brd);
  2094. if (retval) {
  2095. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2096. "conflict with another device.\n",
  2097. brd->info->name, brd->irq);
  2098. /* We hold resources, we need to release them. */
  2099. mxser_release_res(brd, pdev, 0);
  2100. }
  2101. return retval;
  2102. }
  2103. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2104. {
  2105. int id, i, bits;
  2106. unsigned short regs[16], irq;
  2107. unsigned char scratch, scratch2;
  2108. brd->chip_flag = MOXA_OTHER_UART;
  2109. id = mxser_read_register(cap, regs);
  2110. switch (id) {
  2111. case C168_ASIC_ID:
  2112. brd->info = &mxser_cards[0];
  2113. break;
  2114. case C104_ASIC_ID:
  2115. brd->info = &mxser_cards[1];
  2116. break;
  2117. case CI104J_ASIC_ID:
  2118. brd->info = &mxser_cards[2];
  2119. break;
  2120. case C102_ASIC_ID:
  2121. brd->info = &mxser_cards[5];
  2122. break;
  2123. case CI132_ASIC_ID:
  2124. brd->info = &mxser_cards[6];
  2125. break;
  2126. case CI134_ASIC_ID:
  2127. brd->info = &mxser_cards[7];
  2128. break;
  2129. default:
  2130. return 0;
  2131. }
  2132. irq = 0;
  2133. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2134. Flag-hack checks if configuration should be read as 2-port here. */
  2135. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2136. irq = regs[9] & 0xF000;
  2137. irq = irq | (irq >> 4);
  2138. if (irq != (regs[9] & 0xFF00))
  2139. goto err_irqconflict;
  2140. } else if (brd->info->nports == 4) {
  2141. irq = regs[9] & 0xF000;
  2142. irq = irq | (irq >> 4);
  2143. irq = irq | (irq >> 8);
  2144. if (irq != regs[9])
  2145. goto err_irqconflict;
  2146. } else if (brd->info->nports == 8) {
  2147. irq = regs[9] & 0xF000;
  2148. irq = irq | (irq >> 4);
  2149. irq = irq | (irq >> 8);
  2150. if ((irq != regs[9]) || (irq != regs[10]))
  2151. goto err_irqconflict;
  2152. }
  2153. if (!irq) {
  2154. printk(KERN_ERR "mxser: interrupt number unset\n");
  2155. return -EIO;
  2156. }
  2157. brd->irq = ((int)(irq & 0xF000) >> 12);
  2158. for (i = 0; i < 8; i++)
  2159. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2160. if ((regs[12] & 0x80) == 0) {
  2161. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2162. return -EIO;
  2163. }
  2164. brd->vector = (int)regs[11]; /* interrupt vector */
  2165. if (id == 1)
  2166. brd->vector_mask = 0x00FF;
  2167. else
  2168. brd->vector_mask = 0x000F;
  2169. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2170. if (regs[12] & bits) {
  2171. brd->ports[i].baud_base = 921600;
  2172. brd->ports[i].max_baud = 921600;
  2173. } else {
  2174. brd->ports[i].baud_base = 115200;
  2175. brd->ports[i].max_baud = 115200;
  2176. }
  2177. }
  2178. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2179. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2180. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2181. outb(scratch2, cap + UART_LCR);
  2182. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2183. scratch = inb(cap + UART_IIR);
  2184. if (scratch & 0xC0)
  2185. brd->uart_type = PORT_16550A;
  2186. else
  2187. brd->uart_type = PORT_16450;
  2188. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2189. "mxser(IO)")) {
  2190. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2191. "0x%.8lx-0x%.8lx\n",
  2192. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2193. 8 * brd->info->nports - 1);
  2194. return -EIO;
  2195. }
  2196. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2197. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2198. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2199. "0x%.8lx-0x%.8lx\n",
  2200. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2201. 8 * brd->info->nports - 1);
  2202. return -EIO;
  2203. }
  2204. return brd->info->nports;
  2205. err_irqconflict:
  2206. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2207. return -EIO;
  2208. }
  2209. static int __devinit mxser_probe(struct pci_dev *pdev,
  2210. const struct pci_device_id *ent)
  2211. {
  2212. #ifdef CONFIG_PCI
  2213. struct mxser_board *brd;
  2214. unsigned int i, j;
  2215. unsigned long ioaddress;
  2216. int retval = -EINVAL;
  2217. for (i = 0; i < MXSER_BOARDS; i++)
  2218. if (mxser_boards[i].info == NULL)
  2219. break;
  2220. if (i >= MXSER_BOARDS) {
  2221. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2222. "not configured\n", MXSER_BOARDS);
  2223. goto err;
  2224. }
  2225. brd = &mxser_boards[i];
  2226. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2227. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2228. mxser_cards[ent->driver_data].name,
  2229. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2230. retval = pci_enable_device(pdev);
  2231. if (retval) {
  2232. dev_err(&pdev->dev, "PCI enable failed\n");
  2233. goto err;
  2234. }
  2235. /* io address */
  2236. ioaddress = pci_resource_start(pdev, 2);
  2237. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2238. if (retval)
  2239. goto err;
  2240. brd->info = &mxser_cards[ent->driver_data];
  2241. for (i = 0; i < brd->info->nports; i++)
  2242. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2243. /* vector */
  2244. ioaddress = pci_resource_start(pdev, 3);
  2245. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2246. if (retval)
  2247. goto err_relio;
  2248. brd->vector = ioaddress;
  2249. /* irq */
  2250. brd->irq = pdev->irq;
  2251. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2252. brd->uart_type = PORT_16550A;
  2253. brd->vector_mask = 0;
  2254. for (i = 0; i < brd->info->nports; i++) {
  2255. for (j = 0; j < UART_INFO_NUM; j++) {
  2256. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2257. brd->ports[i].max_baud =
  2258. Gpci_uart_info[j].max_baud;
  2259. /* exception....CP-102 */
  2260. if (brd->info->flags & MXSER_HIGHBAUD)
  2261. brd->ports[i].max_baud = 921600;
  2262. break;
  2263. }
  2264. }
  2265. }
  2266. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2267. for (i = 0; i < brd->info->nports; i++) {
  2268. if (i < 4)
  2269. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2270. else
  2271. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2272. }
  2273. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2274. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2275. }
  2276. for (i = 0; i < brd->info->nports; i++) {
  2277. brd->vector_mask |= (1 << i);
  2278. brd->ports[i].baud_base = 921600;
  2279. }
  2280. /* mxser_initbrd will hook ISR. */
  2281. retval = mxser_initbrd(brd, pdev);
  2282. if (retval)
  2283. goto err_null;
  2284. for (i = 0; i < brd->info->nports; i++)
  2285. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2286. pci_set_drvdata(pdev, brd);
  2287. return 0;
  2288. err_relio:
  2289. pci_release_region(pdev, 2);
  2290. err_null:
  2291. brd->info = NULL;
  2292. err:
  2293. return retval;
  2294. #else
  2295. return -ENODEV;
  2296. #endif
  2297. }
  2298. static void __devexit mxser_remove(struct pci_dev *pdev)
  2299. {
  2300. struct mxser_board *brd = pci_get_drvdata(pdev);
  2301. unsigned int i;
  2302. for (i = 0; i < brd->info->nports; i++)
  2303. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2304. mxser_release_res(brd, pdev, 1);
  2305. brd->info = NULL;
  2306. }
  2307. static struct pci_driver mxser_driver = {
  2308. .name = "mxser",
  2309. .id_table = mxser_pcibrds,
  2310. .probe = mxser_probe,
  2311. .remove = __devexit_p(mxser_remove)
  2312. };
  2313. static int __init mxser_module_init(void)
  2314. {
  2315. struct mxser_board *brd;
  2316. unsigned int b, i, m;
  2317. int retval;
  2318. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2319. if (!mxvar_sdriver)
  2320. return -ENOMEM;
  2321. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2322. MXSER_VERSION);
  2323. /* Initialize the tty_driver structure */
  2324. mxvar_sdriver->owner = THIS_MODULE;
  2325. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2326. mxvar_sdriver->name = "ttyMI";
  2327. mxvar_sdriver->major = ttymajor;
  2328. mxvar_sdriver->minor_start = 0;
  2329. mxvar_sdriver->num = MXSER_PORTS + 1;
  2330. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2331. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2332. mxvar_sdriver->init_termios = tty_std_termios;
  2333. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2334. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2335. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2336. retval = tty_register_driver(mxvar_sdriver);
  2337. if (retval) {
  2338. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2339. "tty driver !\n");
  2340. goto err_put;
  2341. }
  2342. /* Start finding ISA boards here */
  2343. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2344. if (!ioaddr[b])
  2345. continue;
  2346. brd = &mxser_boards[m];
  2347. retval = mxser_get_ISA_conf(ioaddr[b], brd);
  2348. if (retval <= 0) {
  2349. brd->info = NULL;
  2350. continue;
  2351. }
  2352. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2353. brd->info->name, ioaddr[b]);
  2354. /* mxser_initbrd will hook ISR. */
  2355. if (mxser_initbrd(brd, NULL) < 0) {
  2356. brd->info = NULL;
  2357. continue;
  2358. }
  2359. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2360. for (i = 0; i < brd->info->nports; i++)
  2361. tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
  2362. m++;
  2363. }
  2364. retval = pci_register_driver(&mxser_driver);
  2365. if (retval) {
  2366. printk(KERN_ERR "mxser: can't register pci driver\n");
  2367. if (!m) {
  2368. retval = -ENODEV;
  2369. goto err_unr;
  2370. } /* else: we have some ISA cards under control */
  2371. }
  2372. return 0;
  2373. err_unr:
  2374. tty_unregister_driver(mxvar_sdriver);
  2375. err_put:
  2376. put_tty_driver(mxvar_sdriver);
  2377. return retval;
  2378. }
  2379. static void __exit mxser_module_exit(void)
  2380. {
  2381. unsigned int i, j;
  2382. pci_unregister_driver(&mxser_driver);
  2383. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2384. if (mxser_boards[i].info != NULL)
  2385. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2386. tty_unregister_device(mxvar_sdriver,
  2387. mxser_boards[i].idx + j);
  2388. tty_unregister_driver(mxvar_sdriver);
  2389. put_tty_driver(mxvar_sdriver);
  2390. for (i = 0; i < MXSER_BOARDS; i++)
  2391. if (mxser_boards[i].info != NULL)
  2392. mxser_release_res(&mxser_boards[i], NULL, 1);
  2393. }
  2394. module_init(mxser_module_init);
  2395. module_exit(mxser_module_exit);