pci-sysfs.c 25 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. ssize_t consumed = -EINVAL;
  55. if ((count > 0) && (*buf == '0' || *buf == '1')) {
  56. pdev->broken_parity_status = *buf == '1' ? 1 : 0;
  57. consumed = count;
  58. }
  59. return consumed;
  60. }
  61. static ssize_t local_cpus_show(struct device *dev,
  62. struct device_attribute *attr, char *buf)
  63. {
  64. cpumask_t mask;
  65. int len;
  66. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  67. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  68. buf[len++] = '\n';
  69. buf[len] = '\0';
  70. return len;
  71. }
  72. static ssize_t local_cpulist_show(struct device *dev,
  73. struct device_attribute *attr, char *buf)
  74. {
  75. cpumask_t mask;
  76. int len;
  77. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  78. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  79. buf[len++] = '\n';
  80. buf[len] = '\0';
  81. return len;
  82. }
  83. /* show resources */
  84. static ssize_t
  85. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  86. {
  87. struct pci_dev * pci_dev = to_pci_dev(dev);
  88. char * str = buf;
  89. int i;
  90. int max = 7;
  91. resource_size_t start, end;
  92. if (pci_dev->subordinate)
  93. max = DEVICE_COUNT_RESOURCE;
  94. for (i = 0; i < max; i++) {
  95. struct resource *res = &pci_dev->resource[i];
  96. pci_resource_to_user(pci_dev, i, res, &start, &end);
  97. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  98. (unsigned long long)start,
  99. (unsigned long long)end,
  100. (unsigned long long)res->flags);
  101. }
  102. return (str - buf);
  103. }
  104. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  105. {
  106. struct pci_dev *pci_dev = to_pci_dev(dev);
  107. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  108. pci_dev->vendor, pci_dev->device,
  109. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  110. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  111. (u8)(pci_dev->class));
  112. }
  113. static ssize_t is_enabled_store(struct device *dev,
  114. struct device_attribute *attr, const char *buf,
  115. size_t count)
  116. {
  117. ssize_t result = -EINVAL;
  118. struct pci_dev *pdev = to_pci_dev(dev);
  119. /* this can crash the machine when done on the "wrong" device */
  120. if (!capable(CAP_SYS_ADMIN))
  121. return count;
  122. if (*buf == '0') {
  123. if (atomic_read(&pdev->enable_cnt) != 0)
  124. pci_disable_device(pdev);
  125. else
  126. result = -EIO;
  127. } else if (*buf == '1')
  128. result = pci_enable_device(pdev);
  129. return result < 0 ? result : count;
  130. }
  131. static ssize_t is_enabled_show(struct device *dev,
  132. struct device_attribute *attr, char *buf)
  133. {
  134. struct pci_dev *pdev;
  135. pdev = to_pci_dev (dev);
  136. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  137. }
  138. #ifdef CONFIG_NUMA
  139. static ssize_t
  140. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  141. {
  142. return sprintf (buf, "%d\n", dev->numa_node);
  143. }
  144. #endif
  145. static ssize_t
  146. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  147. {
  148. struct pci_dev *pdev = to_pci_dev(dev);
  149. if (!pdev->subordinate)
  150. return 0;
  151. return sprintf (buf, "%u\n",
  152. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  153. }
  154. static ssize_t
  155. msi_bus_store(struct device *dev, struct device_attribute *attr,
  156. const char *buf, size_t count)
  157. {
  158. struct pci_dev *pdev = to_pci_dev(dev);
  159. /* bad things may happen if the no_msi flag is changed
  160. * while some drivers are loaded */
  161. if (!capable(CAP_SYS_ADMIN))
  162. return count;
  163. if (!pdev->subordinate)
  164. return count;
  165. if (*buf == '0') {
  166. pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  167. dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
  168. " bad things could happen.\n");
  169. }
  170. if (*buf == '1') {
  171. pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  172. dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
  173. " bad things could happen.\n");
  174. }
  175. return count;
  176. }
  177. struct device_attribute pci_dev_attrs[] = {
  178. __ATTR_RO(resource),
  179. __ATTR_RO(vendor),
  180. __ATTR_RO(device),
  181. __ATTR_RO(subsystem_vendor),
  182. __ATTR_RO(subsystem_device),
  183. __ATTR_RO(class),
  184. __ATTR_RO(irq),
  185. __ATTR_RO(local_cpus),
  186. __ATTR_RO(local_cpulist),
  187. __ATTR_RO(modalias),
  188. #ifdef CONFIG_NUMA
  189. __ATTR_RO(numa_node),
  190. #endif
  191. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  192. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  193. broken_parity_status_show,broken_parity_status_store),
  194. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  195. __ATTR_NULL,
  196. };
  197. static ssize_t
  198. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  199. char *buf, loff_t off, size_t count)
  200. {
  201. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  202. unsigned int size = 64;
  203. loff_t init_off = off;
  204. u8 *data = (u8*) buf;
  205. /* Several chips lock up trying to read undefined config space */
  206. if (capable(CAP_SYS_ADMIN)) {
  207. size = dev->cfg_size;
  208. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  209. size = 128;
  210. }
  211. if (off > size)
  212. return 0;
  213. if (off + count > size) {
  214. size -= off;
  215. count = size;
  216. } else {
  217. size = count;
  218. }
  219. if ((off & 1) && size) {
  220. u8 val;
  221. pci_user_read_config_byte(dev, off, &val);
  222. data[off - init_off] = val;
  223. off++;
  224. size--;
  225. }
  226. if ((off & 3) && size > 2) {
  227. u16 val;
  228. pci_user_read_config_word(dev, off, &val);
  229. data[off - init_off] = val & 0xff;
  230. data[off - init_off + 1] = (val >> 8) & 0xff;
  231. off += 2;
  232. size -= 2;
  233. }
  234. while (size > 3) {
  235. u32 val;
  236. pci_user_read_config_dword(dev, off, &val);
  237. data[off - init_off] = val & 0xff;
  238. data[off - init_off + 1] = (val >> 8) & 0xff;
  239. data[off - init_off + 2] = (val >> 16) & 0xff;
  240. data[off - init_off + 3] = (val >> 24) & 0xff;
  241. off += 4;
  242. size -= 4;
  243. }
  244. if (size >= 2) {
  245. u16 val;
  246. pci_user_read_config_word(dev, off, &val);
  247. data[off - init_off] = val & 0xff;
  248. data[off - init_off + 1] = (val >> 8) & 0xff;
  249. off += 2;
  250. size -= 2;
  251. }
  252. if (size > 0) {
  253. u8 val;
  254. pci_user_read_config_byte(dev, off, &val);
  255. data[off - init_off] = val;
  256. off++;
  257. --size;
  258. }
  259. return count;
  260. }
  261. static ssize_t
  262. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  263. char *buf, loff_t off, size_t count)
  264. {
  265. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  266. unsigned int size = count;
  267. loff_t init_off = off;
  268. u8 *data = (u8*) buf;
  269. if (off > dev->cfg_size)
  270. return 0;
  271. if (off + count > dev->cfg_size) {
  272. size = dev->cfg_size - off;
  273. count = size;
  274. }
  275. if ((off & 1) && size) {
  276. pci_user_write_config_byte(dev, off, data[off - init_off]);
  277. off++;
  278. size--;
  279. }
  280. if ((off & 3) && size > 2) {
  281. u16 val = data[off - init_off];
  282. val |= (u16) data[off - init_off + 1] << 8;
  283. pci_user_write_config_word(dev, off, val);
  284. off += 2;
  285. size -= 2;
  286. }
  287. while (size > 3) {
  288. u32 val = data[off - init_off];
  289. val |= (u32) data[off - init_off + 1] << 8;
  290. val |= (u32) data[off - init_off + 2] << 16;
  291. val |= (u32) data[off - init_off + 3] << 24;
  292. pci_user_write_config_dword(dev, off, val);
  293. off += 4;
  294. size -= 4;
  295. }
  296. if (size >= 2) {
  297. u16 val = data[off - init_off];
  298. val |= (u16) data[off - init_off + 1] << 8;
  299. pci_user_write_config_word(dev, off, val);
  300. off += 2;
  301. size -= 2;
  302. }
  303. if (size) {
  304. pci_user_write_config_byte(dev, off, data[off - init_off]);
  305. off++;
  306. --size;
  307. }
  308. return count;
  309. }
  310. static ssize_t
  311. pci_read_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  312. char *buf, loff_t off, size_t count)
  313. {
  314. struct pci_dev *dev =
  315. to_pci_dev(container_of(kobj, struct device, kobj));
  316. int end;
  317. int ret;
  318. if (off > bin_attr->size)
  319. count = 0;
  320. else if (count > bin_attr->size - off)
  321. count = bin_attr->size - off;
  322. end = off + count;
  323. while (off < end) {
  324. ret = dev->vpd->ops->read(dev, off, end - off, buf);
  325. if (ret < 0)
  326. return ret;
  327. buf += ret;
  328. off += ret;
  329. }
  330. return count;
  331. }
  332. static ssize_t
  333. pci_write_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  334. char *buf, loff_t off, size_t count)
  335. {
  336. struct pci_dev *dev =
  337. to_pci_dev(container_of(kobj, struct device, kobj));
  338. int end;
  339. int ret;
  340. if (off > bin_attr->size)
  341. count = 0;
  342. else if (count > bin_attr->size - off)
  343. count = bin_attr->size - off;
  344. end = off + count;
  345. while (off < end) {
  346. ret = dev->vpd->ops->write(dev, off, end - off, buf);
  347. if (ret < 0)
  348. return ret;
  349. buf += ret;
  350. off += ret;
  351. }
  352. return count;
  353. }
  354. #ifdef HAVE_PCI_LEGACY
  355. /**
  356. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  357. * @kobj: kobject corresponding to file to read from
  358. * @buf: buffer to store results
  359. * @off: offset into legacy I/O port space
  360. * @count: number of bytes to read
  361. *
  362. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  363. * callback routine (pci_legacy_read).
  364. */
  365. static ssize_t
  366. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  367. char *buf, loff_t off, size_t count)
  368. {
  369. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  370. struct device,
  371. kobj));
  372. /* Only support 1, 2 or 4 byte accesses */
  373. if (count != 1 && count != 2 && count != 4)
  374. return -EINVAL;
  375. return pci_legacy_read(bus, off, (u32 *)buf, count);
  376. }
  377. /**
  378. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  379. * @kobj: kobject corresponding to file to read from
  380. * @buf: buffer containing value to be written
  381. * @off: offset into legacy I/O port space
  382. * @count: number of bytes to write
  383. *
  384. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  385. * callback routine (pci_legacy_write).
  386. */
  387. static ssize_t
  388. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  389. char *buf, loff_t off, size_t count)
  390. {
  391. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  392. struct device,
  393. kobj));
  394. /* Only support 1, 2 or 4 byte accesses */
  395. if (count != 1 && count != 2 && count != 4)
  396. return -EINVAL;
  397. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  398. }
  399. /**
  400. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  401. * @kobj: kobject corresponding to device to be mapped
  402. * @attr: struct bin_attribute for this file
  403. * @vma: struct vm_area_struct passed to mmap
  404. *
  405. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  406. * legacy memory space (first meg of bus space) into application virtual
  407. * memory space.
  408. */
  409. static int
  410. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  411. struct vm_area_struct *vma)
  412. {
  413. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  414. struct device,
  415. kobj));
  416. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  417. }
  418. /**
  419. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  420. * @kobj: kobject corresponding to device to be mapped
  421. * @attr: struct bin_attribute for this file
  422. * @vma: struct vm_area_struct passed to mmap
  423. *
  424. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  425. * legacy IO space (first meg of bus space) into application virtual
  426. * memory space. Returns -ENOSYS if the operation isn't supported
  427. */
  428. static int
  429. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  430. struct vm_area_struct *vma)
  431. {
  432. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  433. struct device,
  434. kobj));
  435. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  436. }
  437. /**
  438. * pci_create_legacy_files - create legacy I/O port and memory files
  439. * @b: bus to create files under
  440. *
  441. * Some platforms allow access to legacy I/O port and ISA memory space on
  442. * a per-bus basis. This routine creates the files and ties them into
  443. * their associated read, write and mmap files from pci-sysfs.c
  444. *
  445. * On error unwind, but don't propogate the error to the caller
  446. * as it is ok to set up the PCI bus without these files.
  447. */
  448. void pci_create_legacy_files(struct pci_bus *b)
  449. {
  450. int error;
  451. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  452. GFP_ATOMIC);
  453. if (!b->legacy_io)
  454. goto kzalloc_err;
  455. b->legacy_io->attr.name = "legacy_io";
  456. b->legacy_io->size = 0xffff;
  457. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  458. b->legacy_io->read = pci_read_legacy_io;
  459. b->legacy_io->write = pci_write_legacy_io;
  460. b->legacy_io->mmap = pci_mmap_legacy_io;
  461. error = device_create_bin_file(&b->dev, b->legacy_io);
  462. if (error)
  463. goto legacy_io_err;
  464. /* Allocated above after the legacy_io struct */
  465. b->legacy_mem = b->legacy_io + 1;
  466. b->legacy_mem->attr.name = "legacy_mem";
  467. b->legacy_mem->size = 1024*1024;
  468. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  469. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  470. error = device_create_bin_file(&b->dev, b->legacy_mem);
  471. if (error)
  472. goto legacy_mem_err;
  473. return;
  474. legacy_mem_err:
  475. device_remove_bin_file(&b->dev, b->legacy_io);
  476. legacy_io_err:
  477. kfree(b->legacy_io);
  478. b->legacy_io = NULL;
  479. kzalloc_err:
  480. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  481. "and ISA memory resources to sysfs\n");
  482. return;
  483. }
  484. void pci_remove_legacy_files(struct pci_bus *b)
  485. {
  486. if (b->legacy_io) {
  487. device_remove_bin_file(&b->dev, b->legacy_io);
  488. device_remove_bin_file(&b->dev, b->legacy_mem);
  489. kfree(b->legacy_io); /* both are allocated here */
  490. }
  491. }
  492. #endif /* HAVE_PCI_LEGACY */
  493. #ifdef HAVE_PCI_MMAP
  494. static int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  495. {
  496. unsigned long nr, start, size;
  497. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  498. start = vma->vm_pgoff;
  499. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  500. if (start < size && size - start >= nr)
  501. return 1;
  502. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  503. current->comm, start, start+nr, pci_name(pdev), resno, size);
  504. return 0;
  505. }
  506. /**
  507. * pci_mmap_resource - map a PCI resource into user memory space
  508. * @kobj: kobject for mapping
  509. * @attr: struct bin_attribute for the file being mapped
  510. * @vma: struct vm_area_struct passed into the mmap
  511. * @write_combine: 1 for write_combine mapping
  512. *
  513. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  514. */
  515. static int
  516. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  517. struct vm_area_struct *vma, int write_combine)
  518. {
  519. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  520. struct device, kobj));
  521. struct resource *res = (struct resource *)attr->private;
  522. enum pci_mmap_state mmap_type;
  523. resource_size_t start, end;
  524. int i;
  525. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  526. if (res == &pdev->resource[i])
  527. break;
  528. if (i >= PCI_ROM_RESOURCE)
  529. return -ENODEV;
  530. if (!pci_mmap_fits(pdev, i, vma))
  531. return -EINVAL;
  532. /* pci_mmap_page_range() expects the same kind of entry as coming
  533. * from /proc/bus/pci/ which is a "user visible" value. If this is
  534. * different from the resource itself, arch will do necessary fixup.
  535. */
  536. pci_resource_to_user(pdev, i, res, &start, &end);
  537. vma->vm_pgoff += start >> PAGE_SHIFT;
  538. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  539. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  540. }
  541. static int
  542. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  543. struct vm_area_struct *vma)
  544. {
  545. return pci_mmap_resource(kobj, attr, vma, 0);
  546. }
  547. static int
  548. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  549. struct vm_area_struct *vma)
  550. {
  551. return pci_mmap_resource(kobj, attr, vma, 1);
  552. }
  553. /**
  554. * pci_remove_resource_files - cleanup resource files
  555. * @dev: dev to cleanup
  556. *
  557. * If we created resource files for @dev, remove them from sysfs and
  558. * free their resources.
  559. */
  560. static void
  561. pci_remove_resource_files(struct pci_dev *pdev)
  562. {
  563. int i;
  564. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  565. struct bin_attribute *res_attr;
  566. res_attr = pdev->res_attr[i];
  567. if (res_attr) {
  568. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  569. kfree(res_attr);
  570. }
  571. res_attr = pdev->res_attr_wc[i];
  572. if (res_attr) {
  573. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  574. kfree(res_attr);
  575. }
  576. }
  577. }
  578. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  579. {
  580. /* allocate attribute structure, piggyback attribute name */
  581. int name_len = write_combine ? 13 : 10;
  582. struct bin_attribute *res_attr;
  583. int retval;
  584. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  585. if (res_attr) {
  586. char *res_attr_name = (char *)(res_attr + 1);
  587. if (write_combine) {
  588. pdev->res_attr_wc[num] = res_attr;
  589. sprintf(res_attr_name, "resource%d_wc", num);
  590. res_attr->mmap = pci_mmap_resource_wc;
  591. } else {
  592. pdev->res_attr[num] = res_attr;
  593. sprintf(res_attr_name, "resource%d", num);
  594. res_attr->mmap = pci_mmap_resource_uc;
  595. }
  596. res_attr->attr.name = res_attr_name;
  597. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  598. res_attr->size = pci_resource_len(pdev, num);
  599. res_attr->private = &pdev->resource[num];
  600. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  601. } else
  602. retval = -ENOMEM;
  603. return retval;
  604. }
  605. /**
  606. * pci_create_resource_files - create resource files in sysfs for @dev
  607. * @dev: dev in question
  608. *
  609. * Walk the resources in @dev creating files for each resource available.
  610. */
  611. static int pci_create_resource_files(struct pci_dev *pdev)
  612. {
  613. int i;
  614. int retval;
  615. /* Expose the PCI resources from this device as files */
  616. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  617. /* skip empty resources */
  618. if (!pci_resource_len(pdev, i))
  619. continue;
  620. retval = pci_create_attr(pdev, i, 0);
  621. /* for prefetchable resources, create a WC mappable file */
  622. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  623. retval = pci_create_attr(pdev, i, 1);
  624. if (retval) {
  625. pci_remove_resource_files(pdev);
  626. return retval;
  627. }
  628. }
  629. return 0;
  630. }
  631. #else /* !HAVE_PCI_MMAP */
  632. static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
  633. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  634. #endif /* HAVE_PCI_MMAP */
  635. /**
  636. * pci_write_rom - used to enable access to the PCI ROM display
  637. * @kobj: kernel object handle
  638. * @buf: user input
  639. * @off: file offset
  640. * @count: number of byte in input
  641. *
  642. * writing anything except 0 enables it
  643. */
  644. static ssize_t
  645. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  646. char *buf, loff_t off, size_t count)
  647. {
  648. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  649. if ((off == 0) && (*buf == '0') && (count == 2))
  650. pdev->rom_attr_enabled = 0;
  651. else
  652. pdev->rom_attr_enabled = 1;
  653. return count;
  654. }
  655. /**
  656. * pci_read_rom - read a PCI ROM
  657. * @kobj: kernel object handle
  658. * @buf: where to put the data we read from the ROM
  659. * @off: file offset
  660. * @count: number of bytes to read
  661. *
  662. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  663. * device corresponding to @kobj.
  664. */
  665. static ssize_t
  666. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  667. char *buf, loff_t off, size_t count)
  668. {
  669. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  670. void __iomem *rom;
  671. size_t size;
  672. if (!pdev->rom_attr_enabled)
  673. return -EINVAL;
  674. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  675. if (!rom)
  676. return 0;
  677. if (off >= size)
  678. count = 0;
  679. else {
  680. if (off + count > size)
  681. count = size - off;
  682. memcpy_fromio(buf, rom + off, count);
  683. }
  684. pci_unmap_rom(pdev, rom);
  685. return count;
  686. }
  687. static struct bin_attribute pci_config_attr = {
  688. .attr = {
  689. .name = "config",
  690. .mode = S_IRUGO | S_IWUSR,
  691. },
  692. .size = PCI_CFG_SPACE_SIZE,
  693. .read = pci_read_config,
  694. .write = pci_write_config,
  695. };
  696. static struct bin_attribute pcie_config_attr = {
  697. .attr = {
  698. .name = "config",
  699. .mode = S_IRUGO | S_IWUSR,
  700. },
  701. .size = PCI_CFG_SPACE_EXP_SIZE,
  702. .read = pci_read_config,
  703. .write = pci_write_config,
  704. };
  705. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  706. {
  707. return 0;
  708. }
  709. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  710. {
  711. int retval;
  712. struct bin_attribute *attr;
  713. /* If the device has VPD, try to expose it in sysfs. */
  714. if (dev->vpd) {
  715. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  716. if (!attr)
  717. return -ENOMEM;
  718. attr->size = dev->vpd->len;
  719. attr->attr.name = "vpd";
  720. attr->attr.mode = S_IRUSR | S_IWUSR;
  721. attr->read = pci_read_vpd;
  722. attr->write = pci_write_vpd;
  723. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  724. if (retval) {
  725. kfree(dev->vpd->attr);
  726. return retval;
  727. }
  728. dev->vpd->attr = attr;
  729. }
  730. /* Active State Power Management */
  731. pcie_aspm_create_sysfs_dev_files(dev);
  732. return 0;
  733. }
  734. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  735. {
  736. int retval;
  737. int rom_size = 0;
  738. struct bin_attribute *attr;
  739. if (!sysfs_initialized)
  740. return -EACCES;
  741. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  742. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  743. else
  744. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  745. if (retval)
  746. goto err;
  747. retval = pci_create_resource_files(pdev);
  748. if (retval)
  749. goto err_config_file;
  750. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  751. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  752. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  753. rom_size = 0x20000;
  754. /* If the device has a ROM, try to expose it in sysfs. */
  755. if (rom_size) {
  756. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  757. if (!attr) {
  758. retval = -ENOMEM;
  759. goto err_resource_files;
  760. }
  761. attr->size = rom_size;
  762. attr->attr.name = "rom";
  763. attr->attr.mode = S_IRUSR;
  764. attr->read = pci_read_rom;
  765. attr->write = pci_write_rom;
  766. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  767. if (retval) {
  768. kfree(attr);
  769. goto err_resource_files;
  770. }
  771. pdev->rom_attr = attr;
  772. }
  773. /* add platform-specific attributes */
  774. retval = pcibios_add_platform_entries(pdev);
  775. if (retval)
  776. goto err_rom_file;
  777. /* add sysfs entries for various capabilities */
  778. retval = pci_create_capabilities_sysfs(pdev);
  779. if (retval)
  780. goto err_rom_file;
  781. return 0;
  782. err_rom_file:
  783. if (rom_size) {
  784. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  785. kfree(pdev->rom_attr);
  786. pdev->rom_attr = NULL;
  787. }
  788. err_resource_files:
  789. pci_remove_resource_files(pdev);
  790. err_config_file:
  791. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  792. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  793. else
  794. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  795. err:
  796. return retval;
  797. }
  798. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  799. {
  800. if (dev->vpd && dev->vpd->attr) {
  801. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  802. kfree(dev->vpd->attr);
  803. }
  804. pcie_aspm_remove_sysfs_dev_files(dev);
  805. }
  806. /**
  807. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  808. * @pdev: device whose entries we should free
  809. *
  810. * Cleanup when @pdev is removed from sysfs.
  811. */
  812. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  813. {
  814. int rom_size = 0;
  815. if (!sysfs_initialized)
  816. return;
  817. pci_remove_capabilities_sysfs(pdev);
  818. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  819. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  820. else
  821. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  822. pci_remove_resource_files(pdev);
  823. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  824. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  825. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  826. rom_size = 0x20000;
  827. if (rom_size && pdev->rom_attr) {
  828. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  829. kfree(pdev->rom_attr);
  830. }
  831. }
  832. static int __init pci_sysfs_init(void)
  833. {
  834. struct pci_dev *pdev = NULL;
  835. int retval;
  836. sysfs_initialized = 1;
  837. for_each_pci_dev(pdev) {
  838. retval = pci_create_sysfs_dev_files(pdev);
  839. if (retval) {
  840. pci_dev_put(pdev);
  841. return retval;
  842. }
  843. }
  844. return 0;
  845. }
  846. late_initcall(pci_sysfs_init);