p54common.c 39 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. static struct ieee80211_rate p54_bgrates[] = {
  25. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  26. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 60, .hw_value = 4, },
  30. { .bitrate = 90, .hw_value = 5, },
  31. { .bitrate = 120, .hw_value = 6, },
  32. { .bitrate = 180, .hw_value = 7, },
  33. { .bitrate = 240, .hw_value = 8, },
  34. { .bitrate = 360, .hw_value = 9, },
  35. { .bitrate = 480, .hw_value = 10, },
  36. { .bitrate = 540, .hw_value = 11, },
  37. };
  38. static struct ieee80211_channel p54_bgchannels[] = {
  39. { .center_freq = 2412, .hw_value = 1, },
  40. { .center_freq = 2417, .hw_value = 2, },
  41. { .center_freq = 2422, .hw_value = 3, },
  42. { .center_freq = 2427, .hw_value = 4, },
  43. { .center_freq = 2432, .hw_value = 5, },
  44. { .center_freq = 2437, .hw_value = 6, },
  45. { .center_freq = 2442, .hw_value = 7, },
  46. { .center_freq = 2447, .hw_value = 8, },
  47. { .center_freq = 2452, .hw_value = 9, },
  48. { .center_freq = 2457, .hw_value = 10, },
  49. { .center_freq = 2462, .hw_value = 11, },
  50. { .center_freq = 2467, .hw_value = 12, },
  51. { .center_freq = 2472, .hw_value = 13, },
  52. { .center_freq = 2484, .hw_value = 14, },
  53. };
  54. static struct ieee80211_supported_band band_2GHz = {
  55. .channels = p54_bgchannels,
  56. .n_channels = ARRAY_SIZE(p54_bgchannels),
  57. .bitrates = p54_bgrates,
  58. .n_bitrates = ARRAY_SIZE(p54_bgrates),
  59. };
  60. static struct ieee80211_rate p54_arates[] = {
  61. { .bitrate = 60, .hw_value = 4, },
  62. { .bitrate = 90, .hw_value = 5, },
  63. { .bitrate = 120, .hw_value = 6, },
  64. { .bitrate = 180, .hw_value = 7, },
  65. { .bitrate = 240, .hw_value = 8, },
  66. { .bitrate = 360, .hw_value = 9, },
  67. { .bitrate = 480, .hw_value = 10, },
  68. { .bitrate = 540, .hw_value = 11, },
  69. };
  70. static struct ieee80211_channel p54_achannels[] = {
  71. { .center_freq = 4920 },
  72. { .center_freq = 4940 },
  73. { .center_freq = 4960 },
  74. { .center_freq = 4980 },
  75. { .center_freq = 5040 },
  76. { .center_freq = 5060 },
  77. { .center_freq = 5080 },
  78. { .center_freq = 5170 },
  79. { .center_freq = 5180 },
  80. { .center_freq = 5190 },
  81. { .center_freq = 5200 },
  82. { .center_freq = 5210 },
  83. { .center_freq = 5220 },
  84. { .center_freq = 5230 },
  85. { .center_freq = 5240 },
  86. { .center_freq = 5260 },
  87. { .center_freq = 5280 },
  88. { .center_freq = 5300 },
  89. { .center_freq = 5320 },
  90. { .center_freq = 5500 },
  91. { .center_freq = 5520 },
  92. { .center_freq = 5540 },
  93. { .center_freq = 5560 },
  94. { .center_freq = 5580 },
  95. { .center_freq = 5600 },
  96. { .center_freq = 5620 },
  97. { .center_freq = 5640 },
  98. { .center_freq = 5660 },
  99. { .center_freq = 5680 },
  100. { .center_freq = 5700 },
  101. { .center_freq = 5745 },
  102. { .center_freq = 5765 },
  103. { .center_freq = 5785 },
  104. { .center_freq = 5805 },
  105. { .center_freq = 5825 },
  106. };
  107. static struct ieee80211_supported_band band_5GHz = {
  108. .channels = p54_achannels,
  109. .n_channels = ARRAY_SIZE(p54_achannels),
  110. .bitrates = p54_arates,
  111. .n_bitrates = ARRAY_SIZE(p54_arates),
  112. };
  113. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  114. {
  115. struct p54_common *priv = dev->priv;
  116. struct bootrec_exp_if *exp_if;
  117. struct bootrec *bootrec;
  118. u32 *data = (u32 *)fw->data;
  119. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  120. u8 *fw_version = NULL;
  121. size_t len;
  122. int i;
  123. if (priv->rx_start)
  124. return 0;
  125. while (data < end_data && *data)
  126. data++;
  127. while (data < end_data && !*data)
  128. data++;
  129. bootrec = (struct bootrec *) data;
  130. while (bootrec->data <= end_data &&
  131. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  132. u32 code = le32_to_cpu(bootrec->code);
  133. switch (code) {
  134. case BR_CODE_COMPONENT_ID:
  135. priv->fw_interface = be32_to_cpup((__be32 *)
  136. bootrec->data);
  137. switch (priv->fw_interface) {
  138. case FW_FMAC:
  139. printk(KERN_INFO "p54: FreeMAC firmware\n");
  140. break;
  141. case FW_LM20:
  142. printk(KERN_INFO "p54: LM20 firmware\n");
  143. break;
  144. case FW_LM86:
  145. printk(KERN_INFO "p54: LM86 firmware\n");
  146. break;
  147. case FW_LM87:
  148. printk(KERN_INFO "p54: LM87 firmware\n");
  149. break;
  150. default:
  151. printk(KERN_INFO "p54: unknown firmware\n");
  152. break;
  153. }
  154. break;
  155. case BR_CODE_COMPONENT_VERSION:
  156. /* 24 bytes should be enough for all firmwares */
  157. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  158. fw_version = (unsigned char*)bootrec->data;
  159. break;
  160. case BR_CODE_DESCR: {
  161. struct bootrec_desc *desc =
  162. (struct bootrec_desc *)bootrec->data;
  163. priv->rx_start = le32_to_cpu(desc->rx_start);
  164. /* FIXME add sanity checking */
  165. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  166. priv->headroom = desc->headroom;
  167. priv->tailroom = desc->tailroom;
  168. if (le32_to_cpu(bootrec->len) == 11)
  169. priv->rx_mtu = le16_to_cpu(bootrec->rx_mtu);
  170. else
  171. priv->rx_mtu = (size_t)
  172. 0x620 - priv->tx_hdr_len;
  173. break;
  174. }
  175. case BR_CODE_EXPOSED_IF:
  176. exp_if = (struct bootrec_exp_if *) bootrec->data;
  177. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  178. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  179. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  180. break;
  181. case BR_CODE_DEPENDENT_IF:
  182. break;
  183. case BR_CODE_END_OF_BRA:
  184. case LEGACY_BR_CODE_END_OF_BRA:
  185. end_data = NULL;
  186. break;
  187. default:
  188. break;
  189. }
  190. bootrec = (struct bootrec *)&bootrec->data[len];
  191. }
  192. if (fw_version)
  193. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  194. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  195. if (priv->fw_var >= 0x300) {
  196. /* Firmware supports QoS, use it! */
  197. priv->tx_stats[4].limit = 3;
  198. priv->tx_stats[5].limit = 4;
  199. priv->tx_stats[6].limit = 3;
  200. priv->tx_stats[7].limit = 1;
  201. dev->queues = 4;
  202. }
  203. return 0;
  204. }
  205. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  206. static int p54_convert_rev0(struct ieee80211_hw *dev,
  207. struct pda_pa_curve_data *curve_data)
  208. {
  209. struct p54_common *priv = dev->priv;
  210. struct p54_pa_curve_data_sample *dst;
  211. struct pda_pa_curve_data_sample_rev0 *src;
  212. size_t cd_len = sizeof(*curve_data) +
  213. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  214. curve_data->channels;
  215. unsigned int i, j;
  216. void *source, *target;
  217. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  218. if (!priv->curve_data)
  219. return -ENOMEM;
  220. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  221. source = curve_data->data;
  222. target = priv->curve_data->data;
  223. for (i = 0; i < curve_data->channels; i++) {
  224. __le16 *freq = source;
  225. source += sizeof(__le16);
  226. *((__le16 *)target) = *freq;
  227. target += sizeof(__le16);
  228. for (j = 0; j < curve_data->points_per_channel; j++) {
  229. dst = target;
  230. src = source;
  231. dst->rf_power = src->rf_power;
  232. dst->pa_detector = src->pa_detector;
  233. dst->data_64qam = src->pcv;
  234. /* "invent" the points for the other modulations */
  235. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  236. dst->data_16qam = SUB(src->pcv, 12);
  237. dst->data_qpsk = SUB(dst->data_16qam, 12);
  238. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  239. dst->data_barker = SUB(dst->data_bpsk, 14);
  240. #undef SUB
  241. target += sizeof(*dst);
  242. source += sizeof(*src);
  243. }
  244. }
  245. return 0;
  246. }
  247. static int p54_convert_rev1(struct ieee80211_hw *dev,
  248. struct pda_pa_curve_data *curve_data)
  249. {
  250. struct p54_common *priv = dev->priv;
  251. struct p54_pa_curve_data_sample *dst;
  252. struct pda_pa_curve_data_sample_rev1 *src;
  253. size_t cd_len = sizeof(*curve_data) +
  254. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  255. curve_data->channels;
  256. unsigned int i, j;
  257. void *source, *target;
  258. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  259. if (!priv->curve_data)
  260. return -ENOMEM;
  261. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  262. source = curve_data->data;
  263. target = priv->curve_data->data;
  264. for (i = 0; i < curve_data->channels; i++) {
  265. __le16 *freq = source;
  266. source += sizeof(__le16);
  267. *((__le16 *)target) = *freq;
  268. target += sizeof(__le16);
  269. for (j = 0; j < curve_data->points_per_channel; j++) {
  270. memcpy(target, source, sizeof(*src));
  271. target += sizeof(*dst);
  272. source += sizeof(*src);
  273. }
  274. source++;
  275. }
  276. return 0;
  277. }
  278. static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
  279. "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
  280. static int p54_init_xbow_synth(struct ieee80211_hw *dev);
  281. static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  282. {
  283. struct p54_common *priv = dev->priv;
  284. struct eeprom_pda_wrap *wrap = NULL;
  285. struct pda_entry *entry;
  286. unsigned int data_len, entry_len;
  287. void *tmp;
  288. int err;
  289. u8 *end = (u8 *)eeprom + len;
  290. u16 synth = 0;
  291. DECLARE_MAC_BUF(mac);
  292. wrap = (struct eeprom_pda_wrap *) eeprom;
  293. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  294. /* verify that at least the entry length/code fits */
  295. while ((u8 *)entry <= end - sizeof(*entry)) {
  296. entry_len = le16_to_cpu(entry->len);
  297. data_len = ((entry_len - 1) << 1);
  298. /* abort if entry exceeds whole structure */
  299. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  300. break;
  301. switch (le16_to_cpu(entry->code)) {
  302. case PDR_MAC_ADDRESS:
  303. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  304. break;
  305. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  306. if (data_len < 2) {
  307. err = -EINVAL;
  308. goto err;
  309. }
  310. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  311. err = -EINVAL;
  312. goto err;
  313. }
  314. priv->output_limit = kmalloc(entry->data[1] *
  315. sizeof(*priv->output_limit), GFP_KERNEL);
  316. if (!priv->output_limit) {
  317. err = -ENOMEM;
  318. goto err;
  319. }
  320. memcpy(priv->output_limit, &entry->data[2],
  321. entry->data[1]*sizeof(*priv->output_limit));
  322. priv->output_limit_len = entry->data[1];
  323. break;
  324. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  325. struct pda_pa_curve_data *curve_data =
  326. (struct pda_pa_curve_data *)entry->data;
  327. if (data_len < sizeof(*curve_data)) {
  328. err = -EINVAL;
  329. goto err;
  330. }
  331. switch (curve_data->cal_method_rev) {
  332. case 0:
  333. err = p54_convert_rev0(dev, curve_data);
  334. break;
  335. case 1:
  336. err = p54_convert_rev1(dev, curve_data);
  337. break;
  338. default:
  339. printk(KERN_ERR "p54: unknown curve data "
  340. "revision %d\n",
  341. curve_data->cal_method_rev);
  342. err = -ENODEV;
  343. break;
  344. }
  345. if (err)
  346. goto err;
  347. }
  348. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  349. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  350. if (!priv->iq_autocal) {
  351. err = -ENOMEM;
  352. goto err;
  353. }
  354. memcpy(priv->iq_autocal, entry->data, data_len);
  355. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  356. break;
  357. case PDR_INTERFACE_LIST:
  358. tmp = entry->data;
  359. while ((u8 *)tmp < entry->data + data_len) {
  360. struct bootrec_exp_if *exp_if = tmp;
  361. if (le16_to_cpu(exp_if->if_id) == 0xf)
  362. synth = le16_to_cpu(exp_if->variant);
  363. tmp += sizeof(struct bootrec_exp_if);
  364. }
  365. break;
  366. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  367. priv->version = *(u8 *)(entry->data + 1);
  368. break;
  369. case PDR_END:
  370. /* make it overrun */
  371. entry_len = len;
  372. break;
  373. default:
  374. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  375. le16_to_cpu(entry->code));
  376. break;
  377. }
  378. entry = (void *)entry + (entry_len + 1)*2;
  379. }
  380. if (!synth || !priv->iq_autocal || !priv->output_limit ||
  381. !priv->curve_data) {
  382. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  383. err = -EINVAL;
  384. goto err;
  385. }
  386. priv->rxhw = synth & 0x07;
  387. if (priv->rxhw == 4)
  388. p54_init_xbow_synth(dev);
  389. if (!(synth & 0x40))
  390. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  391. if (!(synth & 0x80))
  392. dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
  393. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  394. u8 perm_addr[ETH_ALEN];
  395. printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
  396. wiphy_name(dev->wiphy));
  397. random_ether_addr(perm_addr);
  398. SET_IEEE80211_PERM_ADDR(dev, perm_addr);
  399. }
  400. printk(KERN_INFO "%s: hwaddr %s, MAC:isl38%02x RF:%s\n",
  401. wiphy_name(dev->wiphy),
  402. print_mac(mac, dev->wiphy->perm_addr),
  403. priv->version, p54_rf_chips[priv->rxhw]);
  404. return 0;
  405. err:
  406. if (priv->iq_autocal) {
  407. kfree(priv->iq_autocal);
  408. priv->iq_autocal = NULL;
  409. }
  410. if (priv->output_limit) {
  411. kfree(priv->output_limit);
  412. priv->output_limit = NULL;
  413. }
  414. if (priv->curve_data) {
  415. kfree(priv->curve_data);
  416. priv->curve_data = NULL;
  417. }
  418. printk(KERN_ERR "p54: eeprom parse failed!\n");
  419. return err;
  420. }
  421. static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
  422. {
  423. /* TODO: get the rssi_add & rssi_mul data from the eeprom */
  424. return ((rssi * 0x83) / 64 - 400) / 4;
  425. }
  426. static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  427. {
  428. struct p54_common *priv = dev->priv;
  429. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  430. struct ieee80211_rx_status rx_status = {0};
  431. u16 freq = le16_to_cpu(hdr->freq);
  432. size_t header_len = sizeof(*hdr);
  433. u32 tsf32;
  434. if (!(hdr->magic & cpu_to_le16(0x0001))) {
  435. if (priv->filter_flags & FIF_FCSFAIL)
  436. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  437. else
  438. return 0;
  439. }
  440. rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
  441. rx_status.noise = priv->noise;
  442. /* XX correct? */
  443. rx_status.qual = (100 * hdr->rssi) / 127;
  444. rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
  445. hdr->rate : (hdr->rate - 4)) & 0xf;
  446. rx_status.freq = freq;
  447. rx_status.band = dev->conf.channel->band;
  448. rx_status.antenna = hdr->antenna;
  449. tsf32 = le32_to_cpu(hdr->tsf32);
  450. if (tsf32 < priv->tsf_low32)
  451. priv->tsf_high32++;
  452. rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
  453. priv->tsf_low32 = tsf32;
  454. rx_status.flag |= RX_FLAG_TSFT;
  455. if (hdr->magic & cpu_to_le16(0x4000))
  456. header_len += hdr->align[0];
  457. skb_pull(skb, header_len);
  458. skb_trim(skb, le16_to_cpu(hdr->len));
  459. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  460. return -1;
  461. }
  462. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  463. {
  464. struct p54_common *priv = dev->priv;
  465. int i;
  466. for (i = 0; i < dev->queues; i++)
  467. if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
  468. ieee80211_wake_queue(dev, i);
  469. }
  470. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  471. {
  472. struct p54_common *priv = dev->priv;
  473. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  474. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  475. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  476. u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
  477. struct memrecord *range = NULL;
  478. u32 freed = 0;
  479. u32 last_addr = priv->rx_start;
  480. unsigned long flags;
  481. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  482. while (entry != (struct sk_buff *)&priv->tx_queue) {
  483. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  484. range = (void *)info->driver_data;
  485. if (range->start_addr == addr) {
  486. struct p54_control_hdr *entry_hdr;
  487. struct p54_tx_control_allocdata *entry_data;
  488. int pad = 0;
  489. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  490. struct ieee80211_tx_info *ni;
  491. struct memrecord *mr;
  492. ni = IEEE80211_SKB_CB(entry->next);
  493. mr = (struct memrecord *)ni->driver_data;
  494. freed = mr->start_addr - last_addr;
  495. } else
  496. freed = priv->rx_end - last_addr;
  497. last_addr = range->end_addr;
  498. __skb_unlink(entry, &priv->tx_queue);
  499. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  500. memset(&info->status, 0, sizeof(info->status));
  501. entry_hdr = (struct p54_control_hdr *) entry->data;
  502. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  503. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  504. pad = entry_data->align[0];
  505. priv->tx_stats[entry_data->hw_queue].len--;
  506. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  507. if (!(payload->status & 0x01))
  508. info->flags |= IEEE80211_TX_STAT_ACK;
  509. else
  510. info->status.excessive_retries = 1;
  511. }
  512. info->status.retry_count = payload->retries - 1;
  513. info->status.ack_signal = p54_rssi_to_dbm(dev,
  514. le16_to_cpu(payload->ack_rssi));
  515. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  516. ieee80211_tx_status_irqsafe(dev, entry);
  517. goto out;
  518. } else
  519. last_addr = range->end_addr;
  520. entry = entry->next;
  521. }
  522. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  523. out:
  524. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  525. sizeof(struct p54_control_hdr))
  526. p54_wake_free_queues(dev);
  527. }
  528. static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
  529. struct sk_buff *skb)
  530. {
  531. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  532. struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
  533. struct p54_common *priv = dev->priv;
  534. if (!priv->eeprom)
  535. return ;
  536. memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
  537. complete(&priv->eeprom_comp);
  538. }
  539. static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
  540. {
  541. struct p54_common *priv = dev->priv;
  542. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  543. struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
  544. u32 tsf32 = le32_to_cpu(stats->tsf32);
  545. if (tsf32 < priv->tsf_low32)
  546. priv->tsf_high32++;
  547. priv->tsf_low32 = tsf32;
  548. priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
  549. priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
  550. priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
  551. priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
  552. complete(&priv->stats_comp);
  553. mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
  554. }
  555. static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  556. {
  557. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  558. switch (le16_to_cpu(hdr->type)) {
  559. case P54_CONTROL_TYPE_TXDONE:
  560. p54_rx_frame_sent(dev, skb);
  561. break;
  562. case P54_CONTROL_TYPE_BBP:
  563. break;
  564. case P54_CONTROL_TYPE_STAT_READBACK:
  565. p54_rx_stats(dev, skb);
  566. break;
  567. case P54_CONTROL_TYPE_EEPROM_READBACK:
  568. p54_rx_eeprom_readback(dev, skb);
  569. break;
  570. default:
  571. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  572. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  573. break;
  574. }
  575. return 0;
  576. }
  577. /* returns zero if skb can be reused */
  578. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  579. {
  580. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  581. if (type == 0x80)
  582. return p54_rx_control(dev, skb);
  583. else
  584. return p54_rx_data(dev, skb);
  585. }
  586. EXPORT_SYMBOL_GPL(p54_rx);
  587. /*
  588. * So, the firmware is somewhat stupid and doesn't know what places in its
  589. * memory incoming data should go to. By poking around in the firmware, we
  590. * can find some unused memory to upload our packets to. However, data that we
  591. * want the card to TX needs to stay intact until the card has told us that
  592. * it is done with it. This function finds empty places we can upload to and
  593. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  594. * allocated areas.
  595. */
  596. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  597. struct p54_control_hdr *data, u32 len)
  598. {
  599. struct p54_common *priv = dev->priv;
  600. struct sk_buff *entry = priv->tx_queue.next;
  601. struct sk_buff *target_skb = NULL;
  602. u32 last_addr = priv->rx_start;
  603. u32 largest_hole = 0;
  604. u32 target_addr = priv->rx_start;
  605. unsigned long flags;
  606. unsigned int left;
  607. len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
  608. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  609. left = skb_queue_len(&priv->tx_queue);
  610. while (left--) {
  611. u32 hole_size;
  612. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  613. struct memrecord *range = (void *)info->driver_data;
  614. hole_size = range->start_addr - last_addr;
  615. if (!target_skb && hole_size >= len) {
  616. target_skb = entry->prev;
  617. hole_size -= len;
  618. target_addr = last_addr;
  619. }
  620. largest_hole = max(largest_hole, hole_size);
  621. last_addr = range->end_addr;
  622. entry = entry->next;
  623. }
  624. if (!target_skb && priv->rx_end - last_addr >= len) {
  625. target_skb = priv->tx_queue.prev;
  626. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  627. if (!skb_queue_empty(&priv->tx_queue)) {
  628. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
  629. struct memrecord *range = (void *)info->driver_data;
  630. target_addr = range->end_addr;
  631. }
  632. } else
  633. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  634. if (skb) {
  635. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  636. struct memrecord *range = (void *)info->driver_data;
  637. range->start_addr = target_addr;
  638. range->end_addr = target_addr + len;
  639. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  640. if (largest_hole < priv->rx_mtu + priv->headroom +
  641. priv->tailroom +
  642. sizeof(struct p54_control_hdr))
  643. ieee80211_stop_queues(dev);
  644. }
  645. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  646. data->req_id = cpu_to_le32(target_addr + priv->headroom);
  647. }
  648. int p54_read_eeprom(struct ieee80211_hw *dev)
  649. {
  650. struct p54_common *priv = dev->priv;
  651. struct p54_control_hdr *hdr = NULL;
  652. struct p54_eeprom_lm86 *eeprom_hdr;
  653. size_t eeprom_size = 0x2020, offset = 0, blocksize;
  654. int ret = -ENOMEM;
  655. void *eeprom = NULL;
  656. hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
  657. sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
  658. if (!hdr)
  659. goto free;
  660. priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
  661. if (!priv->eeprom)
  662. goto free;
  663. eeprom = kzalloc(eeprom_size, GFP_KERNEL);
  664. if (!eeprom)
  665. goto free;
  666. hdr->magic1 = cpu_to_le16(0x8000);
  667. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  668. hdr->retry1 = hdr->retry2 = 0;
  669. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  670. while (eeprom_size) {
  671. blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
  672. hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
  673. eeprom_hdr->offset = cpu_to_le16(offset);
  674. eeprom_hdr->len = cpu_to_le16(blocksize);
  675. p54_assign_address(dev, NULL, hdr, le16_to_cpu(hdr->len) +
  676. sizeof(*hdr));
  677. priv->tx(dev, hdr, le16_to_cpu(hdr->len) + sizeof(*hdr), 0);
  678. if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
  679. printk(KERN_ERR "%s: device does not respond!\n",
  680. wiphy_name(dev->wiphy));
  681. ret = -EBUSY;
  682. goto free;
  683. }
  684. memcpy(eeprom + offset, priv->eeprom, blocksize);
  685. offset += blocksize;
  686. eeprom_size -= blocksize;
  687. }
  688. ret = p54_parse_eeprom(dev, eeprom, offset);
  689. free:
  690. kfree(priv->eeprom);
  691. priv->eeprom = NULL;
  692. kfree(hdr);
  693. kfree(eeprom);
  694. return ret;
  695. }
  696. EXPORT_SYMBOL_GPL(p54_read_eeprom);
  697. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  698. {
  699. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  700. struct ieee80211_tx_queue_stats *current_queue;
  701. struct p54_common *priv = dev->priv;
  702. struct p54_control_hdr *hdr;
  703. struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
  704. struct p54_tx_control_allocdata *txhdr;
  705. size_t padding, len;
  706. u8 rate;
  707. u8 cts_rate = 0x20;
  708. current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
  709. if (unlikely(current_queue->len > current_queue->limit))
  710. return NETDEV_TX_BUSY;
  711. current_queue->len++;
  712. current_queue->count++;
  713. if (current_queue->len == current_queue->limit)
  714. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  715. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  716. len = skb->len;
  717. txhdr = (struct p54_tx_control_allocdata *)
  718. skb_push(skb, sizeof(*txhdr) + padding);
  719. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  720. if (padding)
  721. hdr->magic1 = cpu_to_le16(0x4010);
  722. else
  723. hdr->magic1 = cpu_to_le16(0x0010);
  724. hdr->len = cpu_to_le16(len);
  725. hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
  726. hdr->retry1 = hdr->retry2 = info->control.retry_limit;
  727. /* TODO: add support for alternate retry TX rates */
  728. rate = ieee80211_get_tx_rate(dev, info)->hw_value;
  729. if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
  730. rate |= 0x10;
  731. cts_rate |= 0x10;
  732. }
  733. if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
  734. rate |= 0x40;
  735. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  736. } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
  737. rate |= 0x20;
  738. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  739. }
  740. memset(txhdr->rateset, rate, 8);
  741. txhdr->key_type = 0;
  742. txhdr->key_len = 0;
  743. txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
  744. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  745. 2 : info->antenna_sel_tx - 1;
  746. txhdr->output_power = priv->output_power;
  747. txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
  748. 0 : cts_rate;
  749. if (padding)
  750. txhdr->align[0] = padding;
  751. /* FIXME: The sequence that follows is needed for this driver to
  752. * work with mac80211 since "mac80211: fix TX sequence numbers".
  753. * As with the temporary code in rt2x00, changes will be needed
  754. * to get proper sequence numbers on beacons. In addition, this
  755. * patch places the sequence number in the hardware state, which
  756. * limits us to a single virtual state.
  757. */
  758. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  759. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  760. priv->seqno += 0x10;
  761. ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  762. ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
  763. }
  764. /* modifies skb->cb and with it info, so must be last! */
  765. p54_assign_address(dev, skb, hdr, skb->len);
  766. priv->tx(dev, hdr, skb->len, 0);
  767. return 0;
  768. }
  769. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  770. const u8 *bssid)
  771. {
  772. struct p54_common *priv = dev->priv;
  773. struct p54_control_hdr *hdr;
  774. struct p54_tx_control_filter *filter;
  775. size_t data_len;
  776. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  777. priv->tx_hdr_len, GFP_ATOMIC);
  778. if (!hdr)
  779. return -ENOMEM;
  780. hdr = (void *)hdr + priv->tx_hdr_len;
  781. filter = (struct p54_tx_control_filter *) hdr->data;
  782. hdr->magic1 = cpu_to_le16(0x8001);
  783. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  784. priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
  785. memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
  786. if (!bssid)
  787. memset(filter->bssid, ~0, ETH_ALEN);
  788. else
  789. memcpy(filter->bssid, bssid, ETH_ALEN);
  790. filter->rx_antenna = priv->rx_antenna;
  791. if (priv->fw_var < 0x500) {
  792. data_len = P54_TX_CONTROL_FILTER_V1_LEN;
  793. filter->v1.basic_rate_mask = cpu_to_le32(0x15F);
  794. filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
  795. filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  796. filter->v1.rxhw = cpu_to_le16(priv->rxhw);
  797. filter->v1.wakeup_timer = cpu_to_le16(500);
  798. } else {
  799. data_len = P54_TX_CONTROL_FILTER_V2_LEN;
  800. filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
  801. filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  802. filter->v2.rxhw = cpu_to_le16(priv->rxhw);
  803. filter->v2.timer = cpu_to_le16(1000);
  804. }
  805. hdr->len = cpu_to_le16(data_len);
  806. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
  807. priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
  808. return 0;
  809. }
  810. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  811. {
  812. struct p54_common *priv = dev->priv;
  813. struct p54_control_hdr *hdr;
  814. struct p54_tx_control_channel *chan;
  815. unsigned int i;
  816. size_t data_len;
  817. void *entry;
  818. hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
  819. priv->tx_hdr_len, GFP_KERNEL);
  820. if (!hdr)
  821. return -ENOMEM;
  822. hdr = (void *)hdr + priv->tx_hdr_len;
  823. chan = (struct p54_tx_control_channel *) hdr->data;
  824. hdr->magic1 = cpu_to_le16(0x8001);
  825. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  826. chan->flags = cpu_to_le16(0x1);
  827. chan->dwell = cpu_to_le16(0x0);
  828. for (i = 0; i < priv->iq_autocal_len; i++) {
  829. if (priv->iq_autocal[i].freq != freq)
  830. continue;
  831. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  832. sizeof(*priv->iq_autocal));
  833. break;
  834. }
  835. if (i == priv->iq_autocal_len)
  836. goto err;
  837. for (i = 0; i < priv->output_limit_len; i++) {
  838. if (priv->output_limit[i].freq != freq)
  839. continue;
  840. chan->val_barker = 0x38;
  841. chan->val_bpsk = chan->dup_bpsk =
  842. priv->output_limit[i].val_bpsk;
  843. chan->val_qpsk = chan->dup_qpsk =
  844. priv->output_limit[i].val_qpsk;
  845. chan->val_16qam = chan->dup_16qam =
  846. priv->output_limit[i].val_16qam;
  847. chan->val_64qam = chan->dup_64qam =
  848. priv->output_limit[i].val_64qam;
  849. break;
  850. }
  851. if (i == priv->output_limit_len)
  852. goto err;
  853. entry = priv->curve_data->data;
  854. for (i = 0; i < priv->curve_data->channels; i++) {
  855. if (*((__le16 *)entry) != freq) {
  856. entry += sizeof(__le16);
  857. entry += sizeof(struct p54_pa_curve_data_sample) *
  858. priv->curve_data->points_per_channel;
  859. continue;
  860. }
  861. entry += sizeof(__le16);
  862. chan->pa_points_per_curve =
  863. min(priv->curve_data->points_per_channel, (u8) 8);
  864. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  865. chan->pa_points_per_curve);
  866. break;
  867. }
  868. if (priv->fw_var < 0x500) {
  869. data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
  870. chan->v1.rssical_mul = cpu_to_le16(130);
  871. chan->v1.rssical_add = cpu_to_le16(0xfe70);
  872. } else {
  873. data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
  874. chan->v2.rssical_mul = cpu_to_le16(130);
  875. chan->v2.rssical_add = cpu_to_le16(0xfe70);
  876. chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
  877. }
  878. hdr->len = cpu_to_le16(data_len);
  879. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
  880. priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
  881. return 0;
  882. err:
  883. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  884. kfree(hdr);
  885. return -EINVAL;
  886. }
  887. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  888. {
  889. struct p54_common *priv = dev->priv;
  890. struct p54_control_hdr *hdr;
  891. struct p54_tx_control_led *led;
  892. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  893. priv->tx_hdr_len, GFP_KERNEL);
  894. if (!hdr)
  895. return -ENOMEM;
  896. hdr = (void *)hdr + priv->tx_hdr_len;
  897. hdr->magic1 = cpu_to_le16(0x8001);
  898. hdr->len = cpu_to_le16(sizeof(*led));
  899. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  900. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
  901. led = (struct p54_tx_control_led *) hdr->data;
  902. led->mode = cpu_to_le16(mode);
  903. led->led_permanent = cpu_to_le16(link);
  904. led->led_temporary = cpu_to_le16(act);
  905. led->duration = cpu_to_le16(1000);
  906. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  907. return 0;
  908. }
  909. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  910. do { \
  911. queue.aifs = cpu_to_le16(ai_fs); \
  912. queue.cwmin = cpu_to_le16(cw_min); \
  913. queue.cwmax = cpu_to_le16(cw_max); \
  914. queue.txop = cpu_to_le16(_txop); \
  915. } while(0)
  916. static void p54_init_vdcf(struct ieee80211_hw *dev)
  917. {
  918. struct p54_common *priv = dev->priv;
  919. struct p54_control_hdr *hdr;
  920. struct p54_tx_control_vdcf *vdcf;
  921. /* all USB V1 adapters need a extra headroom */
  922. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  923. hdr->magic1 = cpu_to_le16(0x8001);
  924. hdr->len = cpu_to_le16(sizeof(*vdcf));
  925. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  926. hdr->req_id = cpu_to_le32(priv->rx_start);
  927. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  928. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
  929. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
  930. P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
  931. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
  932. }
  933. static void p54_set_vdcf(struct ieee80211_hw *dev)
  934. {
  935. struct p54_common *priv = dev->priv;
  936. struct p54_control_hdr *hdr;
  937. struct p54_tx_control_vdcf *vdcf;
  938. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  939. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
  940. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  941. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  942. vdcf->slottime = 9;
  943. vdcf->magic1 = 0x10;
  944. vdcf->magic2 = 0x00;
  945. } else {
  946. vdcf->slottime = 20;
  947. vdcf->magic1 = 0x0a;
  948. vdcf->magic2 = 0x06;
  949. }
  950. /* (see prism54/isl_oid.h for further details) */
  951. vdcf->frameburst = cpu_to_le16(0);
  952. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  953. }
  954. static int p54_start(struct ieee80211_hw *dev)
  955. {
  956. struct p54_common *priv = dev->priv;
  957. int err;
  958. if (!priv->cached_vdcf) {
  959. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
  960. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  961. GFP_KERNEL);
  962. if (!priv->cached_vdcf)
  963. return -ENOMEM;
  964. }
  965. if (!priv->cached_stats) {
  966. priv->cached_stats = kzalloc(sizeof(struct p54_statistics) +
  967. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  968. GFP_KERNEL);
  969. if (!priv->cached_stats) {
  970. kfree(priv->cached_vdcf);
  971. priv->cached_vdcf = NULL;
  972. return -ENOMEM;
  973. }
  974. }
  975. err = priv->open(dev);
  976. if (!err)
  977. priv->mode = NL80211_IFTYPE_MONITOR;
  978. p54_init_vdcf(dev);
  979. mod_timer(&priv->stats_timer, jiffies + HZ);
  980. return err;
  981. }
  982. static void p54_stop(struct ieee80211_hw *dev)
  983. {
  984. struct p54_common *priv = dev->priv;
  985. struct sk_buff *skb;
  986. del_timer(&priv->stats_timer);
  987. while ((skb = skb_dequeue(&priv->tx_queue)))
  988. kfree_skb(skb);
  989. priv->stop(dev);
  990. priv->tsf_high32 = priv->tsf_low32 = 0;
  991. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  992. }
  993. static int p54_add_interface(struct ieee80211_hw *dev,
  994. struct ieee80211_if_init_conf *conf)
  995. {
  996. struct p54_common *priv = dev->priv;
  997. if (priv->mode != NL80211_IFTYPE_MONITOR)
  998. return -EOPNOTSUPP;
  999. switch (conf->type) {
  1000. case NL80211_IFTYPE_STATION:
  1001. priv->mode = conf->type;
  1002. break;
  1003. default:
  1004. return -EOPNOTSUPP;
  1005. }
  1006. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  1007. p54_set_filter(dev, 0, NULL);
  1008. switch (conf->type) {
  1009. case NL80211_IFTYPE_STATION:
  1010. p54_set_filter(dev, 1, NULL);
  1011. break;
  1012. default:
  1013. BUG(); /* impossible */
  1014. break;
  1015. }
  1016. p54_set_leds(dev, 1, 0, 0);
  1017. return 0;
  1018. }
  1019. static void p54_remove_interface(struct ieee80211_hw *dev,
  1020. struct ieee80211_if_init_conf *conf)
  1021. {
  1022. struct p54_common *priv = dev->priv;
  1023. priv->mode = NL80211_IFTYPE_MONITOR;
  1024. memset(priv->mac_addr, 0, ETH_ALEN);
  1025. p54_set_filter(dev, 0, NULL);
  1026. }
  1027. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  1028. {
  1029. int ret;
  1030. struct p54_common *priv = dev->priv;
  1031. mutex_lock(&priv->conf_mutex);
  1032. priv->rx_antenna = (conf->antenna_sel_rx == 0) ?
  1033. 2 : conf->antenna_sel_tx - 1;
  1034. priv->output_power = conf->power_level << 2;
  1035. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  1036. p54_set_vdcf(dev);
  1037. mutex_unlock(&priv->conf_mutex);
  1038. return ret;
  1039. }
  1040. static int p54_config_interface(struct ieee80211_hw *dev,
  1041. struct ieee80211_vif *vif,
  1042. struct ieee80211_if_conf *conf)
  1043. {
  1044. struct p54_common *priv = dev->priv;
  1045. mutex_lock(&priv->conf_mutex);
  1046. p54_set_filter(dev, 0, conf->bssid);
  1047. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  1048. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  1049. mutex_unlock(&priv->conf_mutex);
  1050. return 0;
  1051. }
  1052. static void p54_configure_filter(struct ieee80211_hw *dev,
  1053. unsigned int changed_flags,
  1054. unsigned int *total_flags,
  1055. int mc_count, struct dev_mc_list *mclist)
  1056. {
  1057. struct p54_common *priv = dev->priv;
  1058. *total_flags &= FIF_BCN_PRBRESP_PROMISC |
  1059. FIF_PROMISC_IN_BSS |
  1060. FIF_FCSFAIL;
  1061. priv->filter_flags = *total_flags;
  1062. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1063. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1064. p54_set_filter(dev, le16_to_cpu(priv->filter_type),
  1065. NULL);
  1066. else
  1067. p54_set_filter(dev, le16_to_cpu(priv->filter_type),
  1068. priv->bssid);
  1069. }
  1070. if (changed_flags & FIF_PROMISC_IN_BSS) {
  1071. if (*total_flags & FIF_PROMISC_IN_BSS)
  1072. p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
  1073. 0x8, NULL);
  1074. else
  1075. p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
  1076. ~0x8, priv->bssid);
  1077. }
  1078. }
  1079. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  1080. const struct ieee80211_tx_queue_params *params)
  1081. {
  1082. struct p54_common *priv = dev->priv;
  1083. struct p54_tx_control_vdcf *vdcf;
  1084. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  1085. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  1086. if ((params) && !(queue > 4)) {
  1087. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  1088. params->cw_min, params->cw_max, params->txop);
  1089. } else
  1090. return -EINVAL;
  1091. p54_set_vdcf(dev);
  1092. return 0;
  1093. }
  1094. static int p54_init_xbow_synth(struct ieee80211_hw *dev)
  1095. {
  1096. struct p54_common *priv = dev->priv;
  1097. struct p54_control_hdr *hdr;
  1098. struct p54_tx_control_xbow_synth *xbow;
  1099. hdr = kzalloc(sizeof(*hdr) + sizeof(*xbow) +
  1100. priv->tx_hdr_len, GFP_KERNEL);
  1101. if (!hdr)
  1102. return -ENOMEM;
  1103. hdr = (void *)hdr + priv->tx_hdr_len;
  1104. hdr->magic1 = cpu_to_le16(0x8001);
  1105. hdr->len = cpu_to_le16(sizeof(*xbow));
  1106. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_XBOW_SYNTH_CFG);
  1107. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*xbow));
  1108. xbow = (struct p54_tx_control_xbow_synth *) hdr->data;
  1109. xbow->magic1 = cpu_to_le16(0x1);
  1110. xbow->magic2 = cpu_to_le16(0x2);
  1111. xbow->freq = cpu_to_le16(5390);
  1112. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*xbow), 1);
  1113. return 0;
  1114. }
  1115. static void p54_statistics_timer(unsigned long data)
  1116. {
  1117. struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
  1118. struct p54_common *priv = dev->priv;
  1119. struct p54_control_hdr *hdr;
  1120. struct p54_statistics *stats;
  1121. BUG_ON(!priv->cached_stats);
  1122. hdr = (void *)priv->cached_stats + priv->tx_hdr_len;
  1123. hdr->magic1 = cpu_to_le16(0x8000);
  1124. hdr->len = cpu_to_le16(sizeof(*stats));
  1125. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
  1126. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
  1127. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
  1128. }
  1129. static int p54_get_stats(struct ieee80211_hw *dev,
  1130. struct ieee80211_low_level_stats *stats)
  1131. {
  1132. struct p54_common *priv = dev->priv;
  1133. del_timer(&priv->stats_timer);
  1134. p54_statistics_timer((unsigned long)dev);
  1135. if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
  1136. printk(KERN_ERR "%s: device does not respond!\n",
  1137. wiphy_name(dev->wiphy));
  1138. return -EBUSY;
  1139. }
  1140. memcpy(stats, &priv->stats, sizeof(*stats));
  1141. return 0;
  1142. }
  1143. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  1144. struct ieee80211_tx_queue_stats *stats)
  1145. {
  1146. struct p54_common *priv = dev->priv;
  1147. memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
  1148. return 0;
  1149. }
  1150. static const struct ieee80211_ops p54_ops = {
  1151. .tx = p54_tx,
  1152. .start = p54_start,
  1153. .stop = p54_stop,
  1154. .add_interface = p54_add_interface,
  1155. .remove_interface = p54_remove_interface,
  1156. .config = p54_config,
  1157. .config_interface = p54_config_interface,
  1158. .configure_filter = p54_configure_filter,
  1159. .conf_tx = p54_conf_tx,
  1160. .get_stats = p54_get_stats,
  1161. .get_tx_stats = p54_get_tx_stats
  1162. };
  1163. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  1164. {
  1165. struct ieee80211_hw *dev;
  1166. struct p54_common *priv;
  1167. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  1168. if (!dev)
  1169. return NULL;
  1170. priv = dev->priv;
  1171. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1172. skb_queue_head_init(&priv->tx_queue);
  1173. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  1174. IEEE80211_HW_RX_INCLUDES_FCS |
  1175. IEEE80211_HW_SIGNAL_DBM |
  1176. IEEE80211_HW_NOISE_DBM;
  1177. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  1178. dev->channel_change_time = 1000; /* TODO: find actual value */
  1179. priv->tx_stats[0].limit = 1;
  1180. priv->tx_stats[1].limit = 1;
  1181. priv->tx_stats[2].limit = 1;
  1182. priv->tx_stats[3].limit = 1;
  1183. priv->tx_stats[4].limit = 5;
  1184. dev->queues = 1;
  1185. priv->noise = -94;
  1186. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  1187. sizeof(struct p54_tx_control_allocdata);
  1188. mutex_init(&priv->conf_mutex);
  1189. init_completion(&priv->eeprom_comp);
  1190. init_completion(&priv->stats_comp);
  1191. setup_timer(&priv->stats_timer, p54_statistics_timer,
  1192. (unsigned long)dev);
  1193. return dev;
  1194. }
  1195. EXPORT_SYMBOL_GPL(p54_init_common);
  1196. void p54_free_common(struct ieee80211_hw *dev)
  1197. {
  1198. struct p54_common *priv = dev->priv;
  1199. kfree(priv->cached_stats);
  1200. kfree(priv->iq_autocal);
  1201. kfree(priv->output_limit);
  1202. kfree(priv->curve_data);
  1203. kfree(priv->cached_vdcf);
  1204. }
  1205. EXPORT_SYMBOL_GPL(p54_free_common);
  1206. static int __init p54_init(void)
  1207. {
  1208. return 0;
  1209. }
  1210. static void __exit p54_exit(void)
  1211. {
  1212. }
  1213. module_init(p54_init);
  1214. module_exit(p54_exit);