smc911x.c 58 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/netdevice.h>
  71. #include <linux/etherdevice.h>
  72. #include <linux/skbuff.h>
  73. #include <asm/io.h>
  74. #include "smc911x.h"
  75. /*
  76. * Transmit timeout, default 5 seconds.
  77. */
  78. static int watchdog = 5000;
  79. module_param(watchdog, int, 0400);
  80. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  81. static int tx_fifo_kb=8;
  82. module_param(tx_fifo_kb, int, 0400);
  83. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  84. MODULE_LICENSE("GPL");
  85. MODULE_ALIAS("platform:smc911x");
  86. /*
  87. * The internal workings of the driver. If you are changing anything
  88. * here with the SMC stuff, you should have the datasheet and know
  89. * what you are doing.
  90. */
  91. #define CARDNAME "smc911x"
  92. /*
  93. * Use power-down feature of the chip
  94. */
  95. #define POWER_DOWN 1
  96. #if SMC_DEBUG > 0
  97. #define DBG(n, args...) \
  98. do { \
  99. if (SMC_DEBUG & (n)) \
  100. printk(args); \
  101. } while (0)
  102. #define PRINTK(args...) printk(args)
  103. #else
  104. #define DBG(n, args...) do { } while (0)
  105. #define PRINTK(args...) printk(KERN_DEBUG args)
  106. #endif
  107. #if SMC_DEBUG_PKTS > 0
  108. static void PRINT_PKT(u_char *buf, int length)
  109. {
  110. int i;
  111. int remainder;
  112. int lines;
  113. lines = length / 16;
  114. remainder = length % 16;
  115. for (i = 0; i < lines ; i ++) {
  116. int cur;
  117. for (cur = 0; cur < 8; cur++) {
  118. u_char a, b;
  119. a = *buf++;
  120. b = *buf++;
  121. printk("%02x%02x ", a, b);
  122. }
  123. printk("\n");
  124. }
  125. for (i = 0; i < remainder/2 ; i++) {
  126. u_char a, b;
  127. a = *buf++;
  128. b = *buf++;
  129. printk("%02x%02x ", a, b);
  130. }
  131. printk("\n");
  132. }
  133. #else
  134. #define PRINT_PKT(x...) do { } while (0)
  135. #endif
  136. /* this enables an interrupt in the interrupt mask register */
  137. #define SMC_ENABLE_INT(lp, x) do { \
  138. unsigned int __mask; \
  139. __mask = SMC_GET_INT_EN((lp)); \
  140. __mask |= (x); \
  141. SMC_SET_INT_EN((lp), __mask); \
  142. } while (0)
  143. /* this disables an interrupt from the interrupt mask register */
  144. #define SMC_DISABLE_INT(lp, x) do { \
  145. unsigned int __mask; \
  146. __mask = SMC_GET_INT_EN((lp)); \
  147. __mask &= ~(x); \
  148. SMC_SET_INT_EN((lp), __mask); \
  149. } while (0)
  150. /*
  151. * this does a soft reset on the device
  152. */
  153. static void smc911x_reset(struct net_device *dev)
  154. {
  155. struct smc911x_local *lp = netdev_priv(dev);
  156. unsigned int reg, timeout=0, resets=1, irq_cfg;
  157. unsigned long flags;
  158. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  159. /* Take out of PM setting first */
  160. if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
  161. /* Write to the bytetest will take out of powerdown */
  162. SMC_SET_BYTE_TEST(lp, 0);
  163. timeout=10;
  164. do {
  165. udelay(10);
  166. reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
  167. } while (--timeout && !reg);
  168. if (timeout == 0) {
  169. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  170. return;
  171. }
  172. }
  173. /* Disable all interrupts */
  174. spin_lock_irqsave(&lp->lock, flags);
  175. SMC_SET_INT_EN(lp, 0);
  176. spin_unlock_irqrestore(&lp->lock, flags);
  177. while (resets--) {
  178. SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
  179. timeout=10;
  180. do {
  181. udelay(10);
  182. reg = SMC_GET_HW_CFG(lp);
  183. /* If chip indicates reset timeout then try again */
  184. if (reg & HW_CFG_SRST_TO_) {
  185. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  186. resets++;
  187. break;
  188. }
  189. } while (--timeout && (reg & HW_CFG_SRST_));
  190. }
  191. if (timeout == 0) {
  192. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  193. return;
  194. }
  195. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  196. timeout=1000;
  197. while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) {
  198. udelay(10);
  199. }
  200. if (timeout == 0){
  201. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  202. return;
  203. }
  204. /* Initialize interrupts */
  205. SMC_SET_INT_EN(lp, 0);
  206. SMC_ACK_INT(lp, -1);
  207. /* Reset the FIFO level and flow control settings */
  208. SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
  209. //TODO: Figure out what appropriate pause time is
  210. SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
  211. SMC_SET_AFC_CFG(lp, lp->afc_cfg);
  212. /* Set to LED outputs */
  213. SMC_SET_GPIO_CFG(lp, 0x70070000);
  214. /*
  215. * Deassert IRQ for 1*10us for edge type interrupts
  216. * and drive IRQ pin push-pull
  217. */
  218. irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
  219. #ifdef SMC_DYNAMIC_BUS_CONFIG
  220. if (lp->cfg.irq_polarity)
  221. irq_cfg |= INT_CFG_IRQ_POL_;
  222. #endif
  223. SMC_SET_IRQ_CFG(lp, irq_cfg);
  224. /* clear anything saved */
  225. if (lp->pending_tx_skb != NULL) {
  226. dev_kfree_skb (lp->pending_tx_skb);
  227. lp->pending_tx_skb = NULL;
  228. dev->stats.tx_errors++;
  229. dev->stats.tx_aborted_errors++;
  230. }
  231. }
  232. /*
  233. * Enable Interrupts, Receive, and Transmit
  234. */
  235. static void smc911x_enable(struct net_device *dev)
  236. {
  237. struct smc911x_local *lp = netdev_priv(dev);
  238. unsigned mask, cfg, cr;
  239. unsigned long flags;
  240. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  241. spin_lock_irqsave(&lp->lock, flags);
  242. SMC_SET_MAC_ADDR(lp, dev->dev_addr);
  243. /* Enable TX */
  244. cfg = SMC_GET_HW_CFG(lp);
  245. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  246. cfg |= HW_CFG_SF_;
  247. SMC_SET_HW_CFG(lp, cfg);
  248. SMC_SET_FIFO_TDA(lp, 0xFF);
  249. /* Update TX stats on every 64 packets received or every 1 sec */
  250. SMC_SET_FIFO_TSL(lp, 64);
  251. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  252. SMC_GET_MAC_CR(lp, cr);
  253. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  254. SMC_SET_MAC_CR(lp, cr);
  255. SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
  256. /* Add 2 byte padding to start of packets */
  257. SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
  258. /* Turn on receiver and enable RX */
  259. if (cr & MAC_CR_RXEN_)
  260. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  261. SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
  262. /* Interrupt on every received packet */
  263. SMC_SET_FIFO_RSA(lp, 0x01);
  264. SMC_SET_FIFO_RSL(lp, 0x00);
  265. /* now, enable interrupts */
  266. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  267. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  268. INT_EN_PHY_INT_EN_;
  269. if (IS_REV_A(lp->revision))
  270. mask|=INT_EN_RDFL_EN_;
  271. else {
  272. mask|=INT_EN_RDFO_EN_;
  273. }
  274. SMC_ENABLE_INT(lp, mask);
  275. spin_unlock_irqrestore(&lp->lock, flags);
  276. }
  277. /*
  278. * this puts the device in an inactive state
  279. */
  280. static void smc911x_shutdown(struct net_device *dev)
  281. {
  282. struct smc911x_local *lp = netdev_priv(dev);
  283. unsigned cr;
  284. unsigned long flags;
  285. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
  286. /* Disable IRQ's */
  287. SMC_SET_INT_EN(lp, 0);
  288. /* Turn of Rx and TX */
  289. spin_lock_irqsave(&lp->lock, flags);
  290. SMC_GET_MAC_CR(lp, cr);
  291. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  292. SMC_SET_MAC_CR(lp, cr);
  293. SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
  294. spin_unlock_irqrestore(&lp->lock, flags);
  295. }
  296. static inline void smc911x_drop_pkt(struct net_device *dev)
  297. {
  298. struct smc911x_local *lp = netdev_priv(dev);
  299. unsigned int fifo_count, timeout, reg;
  300. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
  301. fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
  302. if (fifo_count <= 4) {
  303. /* Manually dump the packet data */
  304. while (fifo_count--)
  305. SMC_GET_RX_FIFO(lp);
  306. } else {
  307. /* Fast forward through the bad packet */
  308. SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
  309. timeout=50;
  310. do {
  311. udelay(10);
  312. reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
  313. } while (--timeout && reg);
  314. if (timeout == 0) {
  315. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  316. }
  317. }
  318. }
  319. /*
  320. * This is the procedure to handle the receipt of a packet.
  321. * It should be called after checking for packet presence in
  322. * the RX status FIFO. It must be called with the spin lock
  323. * already held.
  324. */
  325. static inline void smc911x_rcv(struct net_device *dev)
  326. {
  327. struct smc911x_local *lp = netdev_priv(dev);
  328. unsigned int pkt_len, status;
  329. struct sk_buff *skb;
  330. unsigned char *data;
  331. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  332. dev->name, __func__);
  333. status = SMC_GET_RX_STS_FIFO(lp);
  334. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  335. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  336. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  337. if (status & RX_STS_ES_) {
  338. /* Deal with a bad packet */
  339. dev->stats.rx_errors++;
  340. if (status & RX_STS_CRC_ERR_)
  341. dev->stats.rx_crc_errors++;
  342. else {
  343. if (status & RX_STS_LEN_ERR_)
  344. dev->stats.rx_length_errors++;
  345. if (status & RX_STS_MCAST_)
  346. dev->stats.multicast++;
  347. }
  348. /* Remove the bad packet data from the RX FIFO */
  349. smc911x_drop_pkt(dev);
  350. } else {
  351. /* Receive a valid packet */
  352. /* Alloc a buffer with extra room for DMA alignment */
  353. skb=dev_alloc_skb(pkt_len+32);
  354. if (unlikely(skb == NULL)) {
  355. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  356. dev->name);
  357. dev->stats.rx_dropped++;
  358. smc911x_drop_pkt(dev);
  359. return;
  360. }
  361. /* Align IP header to 32 bits
  362. * Note that the device is configured to add a 2
  363. * byte padding to the packet start, so we really
  364. * want to write to the orignal data pointer */
  365. data = skb->data;
  366. skb_reserve(skb, 2);
  367. skb_put(skb,pkt_len-4);
  368. #ifdef SMC_USE_DMA
  369. {
  370. unsigned int fifo;
  371. /* Lower the FIFO threshold if possible */
  372. fifo = SMC_GET_FIFO_INT(lp);
  373. if (fifo & 0xFF) fifo--;
  374. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  375. dev->name, fifo & 0xff);
  376. SMC_SET_FIFO_INT(lp, fifo);
  377. /* Setup RX DMA */
  378. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  379. lp->rxdma_active = 1;
  380. lp->current_rx_skb = skb;
  381. SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
  382. /* Packet processing deferred to DMA RX interrupt */
  383. }
  384. #else
  385. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  386. SMC_PULL_DATA(lp, data, pkt_len+2+3);
  387. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  388. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  389. dev->last_rx = jiffies;
  390. skb->protocol = eth_type_trans(skb, dev);
  391. netif_rx(skb);
  392. dev->stats.rx_packets++;
  393. dev->stats.rx_bytes += pkt_len-4;
  394. #endif
  395. }
  396. }
  397. /*
  398. * This is called to actually send a packet to the chip.
  399. */
  400. static void smc911x_hardware_send_pkt(struct net_device *dev)
  401. {
  402. struct smc911x_local *lp = netdev_priv(dev);
  403. struct sk_buff *skb;
  404. unsigned int cmdA, cmdB, len;
  405. unsigned char *buf;
  406. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
  407. BUG_ON(lp->pending_tx_skb == NULL);
  408. skb = lp->pending_tx_skb;
  409. lp->pending_tx_skb = NULL;
  410. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  411. /* cmdB {31:16] pkt tag [10:0] length */
  412. #ifdef SMC_USE_DMA
  413. /* 16 byte buffer alignment mode */
  414. buf = (char*)((u32)(skb->data) & ~0xF);
  415. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  416. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  417. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  418. skb->len;
  419. #else
  420. buf = (char*)((u32)skb->data & ~0x3);
  421. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  422. cmdA = (((u32)skb->data & 0x3) << 16) |
  423. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  424. skb->len;
  425. #endif
  426. /* tag is packet length so we can use this in stats update later */
  427. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  428. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  429. dev->name, len, len, buf, cmdA, cmdB);
  430. SMC_SET_TX_FIFO(lp, cmdA);
  431. SMC_SET_TX_FIFO(lp, cmdB);
  432. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  433. PRINT_PKT(buf, len <= 64 ? len : 64);
  434. /* Send pkt via PIO or DMA */
  435. #ifdef SMC_USE_DMA
  436. lp->current_tx_skb = skb;
  437. SMC_PUSH_DATA(lp, buf, len);
  438. /* DMA complete IRQ will free buffer and set jiffies */
  439. #else
  440. SMC_PUSH_DATA(lp, buf, len);
  441. dev->trans_start = jiffies;
  442. dev_kfree_skb_irq(skb);
  443. #endif
  444. if (!lp->tx_throttle) {
  445. netif_wake_queue(dev);
  446. }
  447. SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  448. }
  449. /*
  450. * Since I am not sure if I will have enough room in the chip's ram
  451. * to store the packet, I call this routine which either sends it
  452. * now, or set the card to generates an interrupt when ready
  453. * for the packet.
  454. */
  455. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  456. {
  457. struct smc911x_local *lp = netdev_priv(dev);
  458. unsigned int free;
  459. unsigned long flags;
  460. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  461. dev->name, __func__);
  462. spin_lock_irqsave(&lp->lock, flags);
  463. BUG_ON(lp->pending_tx_skb != NULL);
  464. free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
  465. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  466. /* Turn off the flow when running out of space in FIFO */
  467. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  468. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  469. dev->name, free);
  470. /* Reenable when at least 1 packet of size MTU present */
  471. SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  472. lp->tx_throttle = 1;
  473. netif_stop_queue(dev);
  474. }
  475. /* Drop packets when we run out of space in TX FIFO
  476. * Account for overhead required for:
  477. *
  478. * Tx command words 8 bytes
  479. * Start offset 15 bytes
  480. * End padding 15 bytes
  481. */
  482. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  483. printk("%s: No Tx free space %d < %d\n",
  484. dev->name, free, skb->len);
  485. lp->pending_tx_skb = NULL;
  486. dev->stats.tx_errors++;
  487. dev->stats.tx_dropped++;
  488. spin_unlock_irqrestore(&lp->lock, flags);
  489. dev_kfree_skb(skb);
  490. return 0;
  491. }
  492. #ifdef SMC_USE_DMA
  493. {
  494. /* If the DMA is already running then defer this packet Tx until
  495. * the DMA IRQ starts it
  496. */
  497. if (lp->txdma_active) {
  498. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  499. lp->pending_tx_skb = skb;
  500. netif_stop_queue(dev);
  501. spin_unlock_irqrestore(&lp->lock, flags);
  502. return 0;
  503. } else {
  504. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  505. lp->txdma_active = 1;
  506. }
  507. }
  508. #endif
  509. lp->pending_tx_skb = skb;
  510. smc911x_hardware_send_pkt(dev);
  511. spin_unlock_irqrestore(&lp->lock, flags);
  512. return 0;
  513. }
  514. /*
  515. * This handles a TX status interrupt, which is only called when:
  516. * - a TX error occurred, or
  517. * - TX of a packet completed.
  518. */
  519. static void smc911x_tx(struct net_device *dev)
  520. {
  521. struct smc911x_local *lp = netdev_priv(dev);
  522. unsigned int tx_status;
  523. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  524. dev->name, __func__);
  525. /* Collect the TX status */
  526. while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  527. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  528. dev->name,
  529. (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
  530. tx_status = SMC_GET_TX_STS_FIFO(lp);
  531. dev->stats.tx_packets++;
  532. dev->stats.tx_bytes+=tx_status>>16;
  533. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  534. dev->name, (tx_status & 0xffff0000) >> 16,
  535. tx_status & 0x0000ffff);
  536. /* count Tx errors, but ignore lost carrier errors when in
  537. * full-duplex mode */
  538. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  539. !(tx_status & 0x00000306))) {
  540. dev->stats.tx_errors++;
  541. }
  542. if (tx_status & TX_STS_MANY_COLL_) {
  543. dev->stats.collisions+=16;
  544. dev->stats.tx_aborted_errors++;
  545. } else {
  546. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  547. }
  548. /* carrier error only has meaning for half-duplex communication */
  549. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  550. !lp->ctl_rfduplx) {
  551. dev->stats.tx_carrier_errors++;
  552. }
  553. if (tx_status & TX_STS_LATE_COLL_) {
  554. dev->stats.collisions++;
  555. dev->stats.tx_aborted_errors++;
  556. }
  557. }
  558. }
  559. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  560. /*
  561. * Reads a register from the MII Management serial interface
  562. */
  563. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  564. {
  565. struct smc911x_local *lp = netdev_priv(dev);
  566. unsigned int phydata;
  567. SMC_GET_MII(lp, phyreg, phyaddr, phydata);
  568. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  569. __func__, phyaddr, phyreg, phydata);
  570. return phydata;
  571. }
  572. /*
  573. * Writes a register to the MII Management serial interface
  574. */
  575. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  576. int phydata)
  577. {
  578. struct smc911x_local *lp = netdev_priv(dev);
  579. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  580. __func__, phyaddr, phyreg, phydata);
  581. SMC_SET_MII(lp, phyreg, phyaddr, phydata);
  582. }
  583. /*
  584. * Finds and reports the PHY address (115 and 117 have external
  585. * PHY interface 118 has internal only
  586. */
  587. static void smc911x_phy_detect(struct net_device *dev)
  588. {
  589. struct smc911x_local *lp = netdev_priv(dev);
  590. int phyaddr;
  591. unsigned int cfg, id1, id2;
  592. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  593. lp->phy_type = 0;
  594. /*
  595. * Scan all 32 PHY addresses if necessary, starting at
  596. * PHY#1 to PHY#31, and then PHY#0 last.
  597. */
  598. switch(lp->version) {
  599. case CHIP_9115:
  600. case CHIP_9117:
  601. case CHIP_9215:
  602. case CHIP_9217:
  603. cfg = SMC_GET_HW_CFG(lp);
  604. if (cfg & HW_CFG_EXT_PHY_DET_) {
  605. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  606. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  607. SMC_SET_HW_CFG(lp, cfg);
  608. udelay(10); /* Wait for clocks to stop */
  609. cfg |= HW_CFG_EXT_PHY_EN_;
  610. SMC_SET_HW_CFG(lp, cfg);
  611. udelay(10); /* Wait for clocks to stop */
  612. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  613. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  614. SMC_SET_HW_CFG(lp, cfg);
  615. udelay(10); /* Wait for clocks to stop */
  616. cfg |= HW_CFG_SMI_SEL_;
  617. SMC_SET_HW_CFG(lp, cfg);
  618. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  619. /* Read the PHY identifiers */
  620. SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
  621. SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
  622. /* Make sure it is a valid identifier */
  623. if (id1 != 0x0000 && id1 != 0xffff &&
  624. id1 != 0x8000 && id2 != 0x0000 &&
  625. id2 != 0xffff && id2 != 0x8000) {
  626. /* Save the PHY's address */
  627. lp->mii.phy_id = phyaddr & 31;
  628. lp->phy_type = id1 << 16 | id2;
  629. break;
  630. }
  631. }
  632. if (phyaddr < 32)
  633. /* Found an external PHY */
  634. break;
  635. }
  636. default:
  637. /* Internal media only */
  638. SMC_GET_PHY_ID1(lp, 1, id1);
  639. SMC_GET_PHY_ID2(lp, 1, id2);
  640. /* Save the PHY's address */
  641. lp->mii.phy_id = 1;
  642. lp->phy_type = id1 << 16 | id2;
  643. }
  644. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  645. dev->name, id1, id2, lp->mii.phy_id);
  646. }
  647. /*
  648. * Sets the PHY to a configuration as determined by the user.
  649. * Called with spin_lock held.
  650. */
  651. static int smc911x_phy_fixed(struct net_device *dev)
  652. {
  653. struct smc911x_local *lp = netdev_priv(dev);
  654. int phyaddr = lp->mii.phy_id;
  655. int bmcr;
  656. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  657. /* Enter Link Disable state */
  658. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  659. bmcr |= BMCR_PDOWN;
  660. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  661. /*
  662. * Set our fixed capabilities
  663. * Disable auto-negotiation
  664. */
  665. bmcr &= ~BMCR_ANENABLE;
  666. if (lp->ctl_rfduplx)
  667. bmcr |= BMCR_FULLDPLX;
  668. if (lp->ctl_rspeed == 100)
  669. bmcr |= BMCR_SPEED100;
  670. /* Write our capabilities to the phy control register */
  671. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  672. /* Re-Configure the Receive/Phy Control register */
  673. bmcr &= ~BMCR_PDOWN;
  674. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  675. return 1;
  676. }
  677. /*
  678. * smc911x_phy_reset - reset the phy
  679. * @dev: net device
  680. * @phy: phy address
  681. *
  682. * Issue a software reset for the specified PHY and
  683. * wait up to 100ms for the reset to complete. We should
  684. * not access the PHY for 50ms after issuing the reset.
  685. *
  686. * The time to wait appears to be dependent on the PHY.
  687. *
  688. */
  689. static int smc911x_phy_reset(struct net_device *dev, int phy)
  690. {
  691. struct smc911x_local *lp = netdev_priv(dev);
  692. int timeout;
  693. unsigned long flags;
  694. unsigned int reg;
  695. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  696. spin_lock_irqsave(&lp->lock, flags);
  697. reg = SMC_GET_PMT_CTRL(lp);
  698. reg &= ~0xfffff030;
  699. reg |= PMT_CTRL_PHY_RST_;
  700. SMC_SET_PMT_CTRL(lp, reg);
  701. spin_unlock_irqrestore(&lp->lock, flags);
  702. for (timeout = 2; timeout; timeout--) {
  703. msleep(50);
  704. spin_lock_irqsave(&lp->lock, flags);
  705. reg = SMC_GET_PMT_CTRL(lp);
  706. spin_unlock_irqrestore(&lp->lock, flags);
  707. if (!(reg & PMT_CTRL_PHY_RST_)) {
  708. /* extra delay required because the phy may
  709. * not be completed with its reset
  710. * when PHY_BCR_RESET_ is cleared. 256us
  711. * should suffice, but use 500us to be safe
  712. */
  713. udelay(500);
  714. break;
  715. }
  716. }
  717. return reg & PMT_CTRL_PHY_RST_;
  718. }
  719. /*
  720. * smc911x_phy_powerdown - powerdown phy
  721. * @dev: net device
  722. * @phy: phy address
  723. *
  724. * Power down the specified PHY
  725. */
  726. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  727. {
  728. struct smc911x_local *lp = netdev_priv(dev);
  729. unsigned int bmcr;
  730. /* Enter Link Disable state */
  731. SMC_GET_PHY_BMCR(lp, phy, bmcr);
  732. bmcr |= BMCR_PDOWN;
  733. SMC_SET_PHY_BMCR(lp, phy, bmcr);
  734. }
  735. /*
  736. * smc911x_phy_check_media - check the media status and adjust BMCR
  737. * @dev: net device
  738. * @init: set true for initialisation
  739. *
  740. * Select duplex mode depending on negotiation state. This
  741. * also updates our carrier state.
  742. */
  743. static void smc911x_phy_check_media(struct net_device *dev, int init)
  744. {
  745. struct smc911x_local *lp = netdev_priv(dev);
  746. int phyaddr = lp->mii.phy_id;
  747. unsigned int bmcr, cr;
  748. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  749. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  750. /* duplex state has changed */
  751. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  752. SMC_GET_MAC_CR(lp, cr);
  753. if (lp->mii.full_duplex) {
  754. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  755. bmcr |= BMCR_FULLDPLX;
  756. cr |= MAC_CR_RCVOWN_;
  757. } else {
  758. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  759. bmcr &= ~BMCR_FULLDPLX;
  760. cr &= ~MAC_CR_RCVOWN_;
  761. }
  762. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  763. SMC_SET_MAC_CR(lp, cr);
  764. }
  765. }
  766. /*
  767. * Configures the specified PHY through the MII management interface
  768. * using Autonegotiation.
  769. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  770. * If RPC ANEG bit is set, the media selection is dependent purely on
  771. * the selection by the MII (either in the MII BMCR reg or the result
  772. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  773. * is controlled by the RPC SPEED and RPC DPLX bits.
  774. */
  775. static void smc911x_phy_configure(struct work_struct *work)
  776. {
  777. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  778. phy_configure);
  779. struct net_device *dev = lp->netdev;
  780. int phyaddr = lp->mii.phy_id;
  781. int my_phy_caps; /* My PHY capabilities */
  782. int my_ad_caps; /* My Advertised capabilities */
  783. int status;
  784. unsigned long flags;
  785. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  786. /*
  787. * We should not be called if phy_type is zero.
  788. */
  789. if (lp->phy_type == 0)
  790. return;
  791. if (smc911x_phy_reset(dev, phyaddr)) {
  792. printk("%s: PHY reset timed out\n", dev->name);
  793. return;
  794. }
  795. spin_lock_irqsave(&lp->lock, flags);
  796. /*
  797. * Enable PHY Interrupts (for register 18)
  798. * Interrupts listed here are enabled
  799. */
  800. SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  801. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  802. PHY_INT_MASK_LINK_DOWN_);
  803. /* If the user requested no auto neg, then go set his request */
  804. if (lp->mii.force_media) {
  805. smc911x_phy_fixed(dev);
  806. goto smc911x_phy_configure_exit;
  807. }
  808. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  809. SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
  810. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  811. printk(KERN_INFO "Auto negotiation NOT supported\n");
  812. smc911x_phy_fixed(dev);
  813. goto smc911x_phy_configure_exit;
  814. }
  815. /* CSMA capable w/ both pauses */
  816. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  817. if (my_phy_caps & BMSR_100BASE4)
  818. my_ad_caps |= ADVERTISE_100BASE4;
  819. if (my_phy_caps & BMSR_100FULL)
  820. my_ad_caps |= ADVERTISE_100FULL;
  821. if (my_phy_caps & BMSR_100HALF)
  822. my_ad_caps |= ADVERTISE_100HALF;
  823. if (my_phy_caps & BMSR_10FULL)
  824. my_ad_caps |= ADVERTISE_10FULL;
  825. if (my_phy_caps & BMSR_10HALF)
  826. my_ad_caps |= ADVERTISE_10HALF;
  827. /* Disable capabilities not selected by our user */
  828. if (lp->ctl_rspeed != 100)
  829. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  830. if (!lp->ctl_rfduplx)
  831. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  832. /* Update our Auto-Neg Advertisement Register */
  833. SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
  834. lp->mii.advertising = my_ad_caps;
  835. /*
  836. * Read the register back. Without this, it appears that when
  837. * auto-negotiation is restarted, sometimes it isn't ready and
  838. * the link does not come up.
  839. */
  840. udelay(10);
  841. SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
  842. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  843. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  844. /* Restart auto-negotiation process in order to advertise my caps */
  845. SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  846. smc911x_phy_check_media(dev, 1);
  847. smc911x_phy_configure_exit:
  848. spin_unlock_irqrestore(&lp->lock, flags);
  849. }
  850. /*
  851. * smc911x_phy_interrupt
  852. *
  853. * Purpose: Handle interrupts relating to PHY register 18. This is
  854. * called from the "hard" interrupt handler under our private spinlock.
  855. */
  856. static void smc911x_phy_interrupt(struct net_device *dev)
  857. {
  858. struct smc911x_local *lp = netdev_priv(dev);
  859. int phyaddr = lp->mii.phy_id;
  860. int status;
  861. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  862. if (lp->phy_type == 0)
  863. return;
  864. smc911x_phy_check_media(dev, 0);
  865. /* read to clear status bits */
  866. SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
  867. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  868. dev->name, status & 0xffff);
  869. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  870. dev->name, SMC_GET_AFC_CFG(lp));
  871. }
  872. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  873. /*
  874. * This is the main routine of the driver, to handle the device when
  875. * it needs some attention.
  876. */
  877. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  878. {
  879. struct net_device *dev = dev_id;
  880. struct smc911x_local *lp = netdev_priv(dev);
  881. unsigned int status, mask, timeout;
  882. unsigned int rx_overrun=0, cr, pkts;
  883. unsigned long flags;
  884. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  885. spin_lock_irqsave(&lp->lock, flags);
  886. /* Spurious interrupt check */
  887. if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  888. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  889. spin_unlock_irqrestore(&lp->lock, flags);
  890. return IRQ_NONE;
  891. }
  892. mask = SMC_GET_INT_EN(lp);
  893. SMC_SET_INT_EN(lp, 0);
  894. /* set a timeout value, so I don't stay here forever */
  895. timeout = 8;
  896. do {
  897. status = SMC_GET_INT(lp);
  898. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  899. dev->name, status, mask, status & ~mask);
  900. status &= mask;
  901. if (!status)
  902. break;
  903. /* Handle SW interrupt condition */
  904. if (status & INT_STS_SW_INT_) {
  905. SMC_ACK_INT(lp, INT_STS_SW_INT_);
  906. mask &= ~INT_EN_SW_INT_EN_;
  907. }
  908. /* Handle various error conditions */
  909. if (status & INT_STS_RXE_) {
  910. SMC_ACK_INT(lp, INT_STS_RXE_);
  911. dev->stats.rx_errors++;
  912. }
  913. if (status & INT_STS_RXDFH_INT_) {
  914. SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
  915. dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
  916. }
  917. /* Undocumented interrupt-what is the right thing to do here? */
  918. if (status & INT_STS_RXDF_INT_) {
  919. SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
  920. }
  921. /* Rx Data FIFO exceeds set level */
  922. if (status & INT_STS_RDFL_) {
  923. if (IS_REV_A(lp->revision)) {
  924. rx_overrun=1;
  925. SMC_GET_MAC_CR(lp, cr);
  926. cr &= ~MAC_CR_RXEN_;
  927. SMC_SET_MAC_CR(lp, cr);
  928. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  929. dev->stats.rx_errors++;
  930. dev->stats.rx_fifo_errors++;
  931. }
  932. SMC_ACK_INT(lp, INT_STS_RDFL_);
  933. }
  934. if (status & INT_STS_RDFO_) {
  935. if (!IS_REV_A(lp->revision)) {
  936. SMC_GET_MAC_CR(lp, cr);
  937. cr &= ~MAC_CR_RXEN_;
  938. SMC_SET_MAC_CR(lp, cr);
  939. rx_overrun=1;
  940. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  941. dev->stats.rx_errors++;
  942. dev->stats.rx_fifo_errors++;
  943. }
  944. SMC_ACK_INT(lp, INT_STS_RDFO_);
  945. }
  946. /* Handle receive condition */
  947. if ((status & INT_STS_RSFL_) || rx_overrun) {
  948. unsigned int fifo;
  949. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  950. fifo = SMC_GET_RX_FIFO_INF(lp);
  951. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  952. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  953. dev->name, pkts, fifo & 0xFFFF );
  954. if (pkts != 0) {
  955. #ifdef SMC_USE_DMA
  956. unsigned int fifo;
  957. if (lp->rxdma_active){
  958. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  959. "%s: RX DMA active\n", dev->name);
  960. /* The DMA is already running so up the IRQ threshold */
  961. fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
  962. fifo |= pkts & 0xFF;
  963. DBG(SMC_DEBUG_RX,
  964. "%s: Setting RX stat FIFO threshold to %d\n",
  965. dev->name, fifo & 0xff);
  966. SMC_SET_FIFO_INT(lp, fifo);
  967. } else
  968. #endif
  969. smc911x_rcv(dev);
  970. }
  971. SMC_ACK_INT(lp, INT_STS_RSFL_);
  972. }
  973. /* Handle transmit FIFO available */
  974. if (status & INT_STS_TDFA_) {
  975. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  976. SMC_SET_FIFO_TDA(lp, 0xFF);
  977. lp->tx_throttle = 0;
  978. #ifdef SMC_USE_DMA
  979. if (!lp->txdma_active)
  980. #endif
  981. netif_wake_queue(dev);
  982. SMC_ACK_INT(lp, INT_STS_TDFA_);
  983. }
  984. /* Handle transmit done condition */
  985. #if 1
  986. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  987. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  988. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  989. dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
  990. smc911x_tx(dev);
  991. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  992. SMC_ACK_INT(lp, INT_STS_TSFL_);
  993. SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
  994. }
  995. #else
  996. if (status & INT_STS_TSFL_) {
  997. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  998. smc911x_tx(dev);
  999. SMC_ACK_INT(lp, INT_STS_TSFL_);
  1000. }
  1001. if (status & INT_STS_GPT_INT_) {
  1002. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1003. dev->name,
  1004. SMC_GET_IRQ_CFG(lp),
  1005. SMC_GET_FIFO_INT(lp),
  1006. SMC_GET_RX_CFG(lp));
  1007. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1008. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1009. dev->name,
  1010. (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
  1011. SMC_GET_RX_FIFO_INF(lp) & 0xffff,
  1012. SMC_GET_RX_STS_FIFO_PEEK(lp));
  1013. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  1014. SMC_ACK_INT(lp, INT_STS_GPT_INT_);
  1015. }
  1016. #endif
  1017. /* Handle PHY interrupt condition */
  1018. if (status & INT_STS_PHY_INT_) {
  1019. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1020. smc911x_phy_interrupt(dev);
  1021. SMC_ACK_INT(lp, INT_STS_PHY_INT_);
  1022. }
  1023. } while (--timeout);
  1024. /* restore mask state */
  1025. SMC_SET_INT_EN(lp, mask);
  1026. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1027. dev->name, 8-timeout);
  1028. spin_unlock_irqrestore(&lp->lock, flags);
  1029. return IRQ_HANDLED;
  1030. }
  1031. #ifdef SMC_USE_DMA
  1032. static void
  1033. smc911x_tx_dma_irq(int dma, void *data)
  1034. {
  1035. struct net_device *dev = (struct net_device *)data;
  1036. struct smc911x_local *lp = netdev_priv(dev);
  1037. struct sk_buff *skb = lp->current_tx_skb;
  1038. unsigned long flags;
  1039. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1040. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1041. /* Clear the DMA interrupt sources */
  1042. SMC_DMA_ACK_IRQ(dev, dma);
  1043. BUG_ON(skb == NULL);
  1044. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1045. dev->trans_start = jiffies;
  1046. dev_kfree_skb_irq(skb);
  1047. lp->current_tx_skb = NULL;
  1048. if (lp->pending_tx_skb != NULL)
  1049. smc911x_hardware_send_pkt(dev);
  1050. else {
  1051. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1052. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1053. spin_lock_irqsave(&lp->lock, flags);
  1054. lp->txdma_active = 0;
  1055. if (!lp->tx_throttle) {
  1056. netif_wake_queue(dev);
  1057. }
  1058. spin_unlock_irqrestore(&lp->lock, flags);
  1059. }
  1060. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1061. "%s: TX DMA irq completed\n", dev->name);
  1062. }
  1063. static void
  1064. smc911x_rx_dma_irq(int dma, void *data)
  1065. {
  1066. struct net_device *dev = (struct net_device *)data;
  1067. unsigned long ioaddr = dev->base_addr;
  1068. struct smc911x_local *lp = netdev_priv(dev);
  1069. struct sk_buff *skb = lp->current_rx_skb;
  1070. unsigned long flags;
  1071. unsigned int pkts;
  1072. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1073. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1074. /* Clear the DMA interrupt sources */
  1075. SMC_DMA_ACK_IRQ(dev, dma);
  1076. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1077. BUG_ON(skb == NULL);
  1078. lp->current_rx_skb = NULL;
  1079. PRINT_PKT(skb->data, skb->len);
  1080. dev->last_rx = jiffies;
  1081. skb->protocol = eth_type_trans(skb, dev);
  1082. dev->stats.rx_packets++;
  1083. dev->stats.rx_bytes += skb->len;
  1084. netif_rx(skb);
  1085. spin_lock_irqsave(&lp->lock, flags);
  1086. pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
  1087. if (pkts != 0) {
  1088. smc911x_rcv(dev);
  1089. }else {
  1090. lp->rxdma_active = 0;
  1091. }
  1092. spin_unlock_irqrestore(&lp->lock, flags);
  1093. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1094. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1095. dev->name, pkts);
  1096. }
  1097. #endif /* SMC_USE_DMA */
  1098. #ifdef CONFIG_NET_POLL_CONTROLLER
  1099. /*
  1100. * Polling receive - used by netconsole and other diagnostic tools
  1101. * to allow network i/o with interrupts disabled.
  1102. */
  1103. static void smc911x_poll_controller(struct net_device *dev)
  1104. {
  1105. disable_irq(dev->irq);
  1106. smc911x_interrupt(dev->irq, dev);
  1107. enable_irq(dev->irq);
  1108. }
  1109. #endif
  1110. /* Our watchdog timed out. Called by the networking layer */
  1111. static void smc911x_timeout(struct net_device *dev)
  1112. {
  1113. struct smc911x_local *lp = netdev_priv(dev);
  1114. int status, mask;
  1115. unsigned long flags;
  1116. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1117. spin_lock_irqsave(&lp->lock, flags);
  1118. status = SMC_GET_INT(lp);
  1119. mask = SMC_GET_INT_EN(lp);
  1120. spin_unlock_irqrestore(&lp->lock, flags);
  1121. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1122. dev->name, status, mask);
  1123. /* Dump the current TX FIFO contents and restart */
  1124. mask = SMC_GET_TX_CFG(lp);
  1125. SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1126. /*
  1127. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1128. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1129. * which calls schedule(). Hence we use a work queue.
  1130. */
  1131. if (lp->phy_type != 0)
  1132. schedule_work(&lp->phy_configure);
  1133. /* We can accept TX packets again */
  1134. dev->trans_start = jiffies;
  1135. netif_wake_queue(dev);
  1136. }
  1137. /*
  1138. * This routine will, depending on the values passed to it,
  1139. * either make it accept multicast packets, go into
  1140. * promiscuous mode (for TCPDUMP and cousins) or accept
  1141. * a select set of multicast packets
  1142. */
  1143. static void smc911x_set_multicast_list(struct net_device *dev)
  1144. {
  1145. struct smc911x_local *lp = netdev_priv(dev);
  1146. unsigned int multicast_table[2];
  1147. unsigned int mcr, update_multicast = 0;
  1148. unsigned long flags;
  1149. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1150. spin_lock_irqsave(&lp->lock, flags);
  1151. SMC_GET_MAC_CR(lp, mcr);
  1152. spin_unlock_irqrestore(&lp->lock, flags);
  1153. if (dev->flags & IFF_PROMISC) {
  1154. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1155. mcr |= MAC_CR_PRMS_;
  1156. }
  1157. /*
  1158. * Here, I am setting this to accept all multicast packets.
  1159. * I don't need to zero the multicast table, because the flag is
  1160. * checked before the table is
  1161. */
  1162. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1163. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1164. mcr |= MAC_CR_MCPAS_;
  1165. }
  1166. /*
  1167. * This sets the internal hardware table to filter out unwanted
  1168. * multicast packets before they take up memory.
  1169. *
  1170. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1171. * address are the offset into the table. If that bit is 1, then the
  1172. * multicast packet is accepted. Otherwise, it's dropped silently.
  1173. *
  1174. * To use the 6 bits as an offset into the table, the high 1 bit is
  1175. * the number of the 32 bit register, while the low 5 bits are the bit
  1176. * within that register.
  1177. */
  1178. else if (dev->mc_count) {
  1179. int i;
  1180. struct dev_mc_list *cur_addr;
  1181. /* Set the Hash perfec mode */
  1182. mcr |= MAC_CR_HPFILT_;
  1183. /* start with a table of all zeros: reject all */
  1184. memset(multicast_table, 0, sizeof(multicast_table));
  1185. cur_addr = dev->mc_list;
  1186. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1187. u32 position;
  1188. /* do we have a pointer here? */
  1189. if (!cur_addr)
  1190. break;
  1191. /* make sure this is a multicast address -
  1192. shouldn't this be a given if we have it here ? */
  1193. if (!(*cur_addr->dmi_addr & 1))
  1194. continue;
  1195. /* upper 6 bits are used as hash index */
  1196. position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
  1197. multicast_table[position>>5] |= 1 << (position&0x1f);
  1198. }
  1199. /* be sure I get rid of flags I might have set */
  1200. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1201. /* now, the table can be loaded into the chipset */
  1202. update_multicast = 1;
  1203. } else {
  1204. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1205. dev->name);
  1206. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1207. /*
  1208. * since I'm disabling all multicast entirely, I need to
  1209. * clear the multicast list
  1210. */
  1211. memset(multicast_table, 0, sizeof(multicast_table));
  1212. update_multicast = 1;
  1213. }
  1214. spin_lock_irqsave(&lp->lock, flags);
  1215. SMC_SET_MAC_CR(lp, mcr);
  1216. if (update_multicast) {
  1217. DBG(SMC_DEBUG_MISC,
  1218. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1219. dev->name, multicast_table[0], multicast_table[1]);
  1220. SMC_SET_HASHL(lp, multicast_table[0]);
  1221. SMC_SET_HASHH(lp, multicast_table[1]);
  1222. }
  1223. spin_unlock_irqrestore(&lp->lock, flags);
  1224. }
  1225. /*
  1226. * Open and Initialize the board
  1227. *
  1228. * Set up everything, reset the card, etc..
  1229. */
  1230. static int
  1231. smc911x_open(struct net_device *dev)
  1232. {
  1233. struct smc911x_local *lp = netdev_priv(dev);
  1234. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1235. /*
  1236. * Check that the address is valid. If its not, refuse
  1237. * to bring the device up. The user must specify an
  1238. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1239. */
  1240. if (!is_valid_ether_addr(dev->dev_addr)) {
  1241. PRINTK("%s: no valid ethernet hw addr\n", __func__);
  1242. return -EINVAL;
  1243. }
  1244. /* reset the hardware */
  1245. smc911x_reset(dev);
  1246. /* Configure the PHY, initialize the link state */
  1247. smc911x_phy_configure(&lp->phy_configure);
  1248. /* Turn on Tx + Rx */
  1249. smc911x_enable(dev);
  1250. netif_start_queue(dev);
  1251. return 0;
  1252. }
  1253. /*
  1254. * smc911x_close
  1255. *
  1256. * this makes the board clean up everything that it can
  1257. * and not talk to the outside world. Caused by
  1258. * an 'ifconfig ethX down'
  1259. */
  1260. static int smc911x_close(struct net_device *dev)
  1261. {
  1262. struct smc911x_local *lp = netdev_priv(dev);
  1263. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1264. netif_stop_queue(dev);
  1265. netif_carrier_off(dev);
  1266. /* clear everything */
  1267. smc911x_shutdown(dev);
  1268. if (lp->phy_type != 0) {
  1269. /* We need to ensure that no calls to
  1270. * smc911x_phy_configure are pending.
  1271. */
  1272. cancel_work_sync(&lp->phy_configure);
  1273. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1274. }
  1275. if (lp->pending_tx_skb) {
  1276. dev_kfree_skb(lp->pending_tx_skb);
  1277. lp->pending_tx_skb = NULL;
  1278. }
  1279. return 0;
  1280. }
  1281. /*
  1282. * Ethtool support
  1283. */
  1284. static int
  1285. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1286. {
  1287. struct smc911x_local *lp = netdev_priv(dev);
  1288. int ret, status;
  1289. unsigned long flags;
  1290. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1291. cmd->maxtxpkt = 1;
  1292. cmd->maxrxpkt = 1;
  1293. if (lp->phy_type != 0) {
  1294. spin_lock_irqsave(&lp->lock, flags);
  1295. ret = mii_ethtool_gset(&lp->mii, cmd);
  1296. spin_unlock_irqrestore(&lp->lock, flags);
  1297. } else {
  1298. cmd->supported = SUPPORTED_10baseT_Half |
  1299. SUPPORTED_10baseT_Full |
  1300. SUPPORTED_TP | SUPPORTED_AUI;
  1301. if (lp->ctl_rspeed == 10)
  1302. cmd->speed = SPEED_10;
  1303. else if (lp->ctl_rspeed == 100)
  1304. cmd->speed = SPEED_100;
  1305. cmd->autoneg = AUTONEG_DISABLE;
  1306. if (lp->mii.phy_id==1)
  1307. cmd->transceiver = XCVR_INTERNAL;
  1308. else
  1309. cmd->transceiver = XCVR_EXTERNAL;
  1310. cmd->port = 0;
  1311. SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
  1312. cmd->duplex =
  1313. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1314. DUPLEX_FULL : DUPLEX_HALF;
  1315. ret = 0;
  1316. }
  1317. return ret;
  1318. }
  1319. static int
  1320. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1321. {
  1322. struct smc911x_local *lp = netdev_priv(dev);
  1323. int ret;
  1324. unsigned long flags;
  1325. if (lp->phy_type != 0) {
  1326. spin_lock_irqsave(&lp->lock, flags);
  1327. ret = mii_ethtool_sset(&lp->mii, cmd);
  1328. spin_unlock_irqrestore(&lp->lock, flags);
  1329. } else {
  1330. if (cmd->autoneg != AUTONEG_DISABLE ||
  1331. cmd->speed != SPEED_10 ||
  1332. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1333. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1334. return -EINVAL;
  1335. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1336. ret = 0;
  1337. }
  1338. return ret;
  1339. }
  1340. static void
  1341. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1342. {
  1343. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1344. strncpy(info->version, version, sizeof(info->version));
  1345. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1346. }
  1347. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1348. {
  1349. struct smc911x_local *lp = netdev_priv(dev);
  1350. int ret = -EINVAL;
  1351. unsigned long flags;
  1352. if (lp->phy_type != 0) {
  1353. spin_lock_irqsave(&lp->lock, flags);
  1354. ret = mii_nway_restart(&lp->mii);
  1355. spin_unlock_irqrestore(&lp->lock, flags);
  1356. }
  1357. return ret;
  1358. }
  1359. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1360. {
  1361. struct smc911x_local *lp = netdev_priv(dev);
  1362. return lp->msg_enable;
  1363. }
  1364. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1365. {
  1366. struct smc911x_local *lp = netdev_priv(dev);
  1367. lp->msg_enable = level;
  1368. }
  1369. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1370. {
  1371. /* System regs + MAC regs + PHY regs */
  1372. return (((E2P_CMD - ID_REV)/4 + 1) +
  1373. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1374. }
  1375. static void smc911x_ethtool_getregs(struct net_device *dev,
  1376. struct ethtool_regs* regs, void *buf)
  1377. {
  1378. struct smc911x_local *lp = netdev_priv(dev);
  1379. unsigned long flags;
  1380. u32 reg,i,j=0;
  1381. u32 *data = (u32*)buf;
  1382. regs->version = lp->version;
  1383. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1384. data[j++] = SMC_inl(lp, i);
  1385. }
  1386. for(i=MAC_CR;i<=WUCSR;i++) {
  1387. spin_lock_irqsave(&lp->lock, flags);
  1388. SMC_GET_MAC_CSR(lp, i, reg);
  1389. spin_unlock_irqrestore(&lp->lock, flags);
  1390. data[j++] = reg;
  1391. }
  1392. for(i=0;i<=31;i++) {
  1393. spin_lock_irqsave(&lp->lock, flags);
  1394. SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
  1395. spin_unlock_irqrestore(&lp->lock, flags);
  1396. data[j++] = reg & 0xFFFF;
  1397. }
  1398. }
  1399. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1400. {
  1401. struct smc911x_local *lp = netdev_priv(dev);
  1402. unsigned int timeout;
  1403. int e2p_cmd;
  1404. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1405. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1406. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1407. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1408. dev->name, __func__);
  1409. return -EFAULT;
  1410. }
  1411. mdelay(1);
  1412. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1413. }
  1414. if (timeout == 0) {
  1415. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1416. dev->name, __func__);
  1417. return -ETIMEDOUT;
  1418. }
  1419. return 0;
  1420. }
  1421. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1422. int cmd, int addr)
  1423. {
  1424. struct smc911x_local *lp = netdev_priv(dev);
  1425. int ret;
  1426. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1427. return ret;
  1428. SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
  1429. ((cmd) & (0x7<<28)) |
  1430. ((addr) & 0xFF));
  1431. return 0;
  1432. }
  1433. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1434. u8 *data)
  1435. {
  1436. struct smc911x_local *lp = netdev_priv(dev);
  1437. int ret;
  1438. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1439. return ret;
  1440. *data = SMC_GET_E2P_DATA(lp);
  1441. return 0;
  1442. }
  1443. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1444. u8 data)
  1445. {
  1446. struct smc911x_local *lp = netdev_priv(dev);
  1447. int ret;
  1448. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1449. return ret;
  1450. SMC_SET_E2P_DATA(lp, data);
  1451. return 0;
  1452. }
  1453. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1454. struct ethtool_eeprom *eeprom, u8 *data)
  1455. {
  1456. u8 eebuf[SMC911X_EEPROM_LEN];
  1457. int i, ret;
  1458. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1459. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1460. return ret;
  1461. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1462. return ret;
  1463. }
  1464. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1465. return 0;
  1466. }
  1467. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1468. struct ethtool_eeprom *eeprom, u8 *data)
  1469. {
  1470. int i, ret;
  1471. /* Enable erase */
  1472. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1473. return ret;
  1474. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1475. /* erase byte */
  1476. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1477. return ret;
  1478. /* write byte */
  1479. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1480. return ret;
  1481. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1482. return ret;
  1483. }
  1484. return 0;
  1485. }
  1486. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1487. {
  1488. return SMC911X_EEPROM_LEN;
  1489. }
  1490. static const struct ethtool_ops smc911x_ethtool_ops = {
  1491. .get_settings = smc911x_ethtool_getsettings,
  1492. .set_settings = smc911x_ethtool_setsettings,
  1493. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1494. .get_msglevel = smc911x_ethtool_getmsglevel,
  1495. .set_msglevel = smc911x_ethtool_setmsglevel,
  1496. .nway_reset = smc911x_ethtool_nwayreset,
  1497. .get_link = ethtool_op_get_link,
  1498. .get_regs_len = smc911x_ethtool_getregslen,
  1499. .get_regs = smc911x_ethtool_getregs,
  1500. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1501. .get_eeprom = smc911x_ethtool_geteeprom,
  1502. .set_eeprom = smc911x_ethtool_seteeprom,
  1503. };
  1504. /*
  1505. * smc911x_findirq
  1506. *
  1507. * This routine has a simple purpose -- make the SMC chip generate an
  1508. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1509. */
  1510. static int __init smc911x_findirq(struct net_device *dev)
  1511. {
  1512. struct smc911x_local *lp = netdev_priv(dev);
  1513. int timeout = 20;
  1514. unsigned long cookie;
  1515. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1516. cookie = probe_irq_on();
  1517. /*
  1518. * Force a SW interrupt
  1519. */
  1520. SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
  1521. /*
  1522. * Wait until positive that the interrupt has been generated
  1523. */
  1524. do {
  1525. int int_status;
  1526. udelay(10);
  1527. int_status = SMC_GET_INT_EN(lp);
  1528. if (int_status & INT_EN_SW_INT_EN_)
  1529. break; /* got the interrupt */
  1530. } while (--timeout);
  1531. /*
  1532. * there is really nothing that I can do here if timeout fails,
  1533. * as autoirq_report will return a 0 anyway, which is what I
  1534. * want in this case. Plus, the clean up is needed in both
  1535. * cases.
  1536. */
  1537. /* and disable all interrupts again */
  1538. SMC_SET_INT_EN(lp, 0);
  1539. /* and return what I found */
  1540. return probe_irq_off(cookie);
  1541. }
  1542. /*
  1543. * Function: smc911x_probe(unsigned long ioaddr)
  1544. *
  1545. * Purpose:
  1546. * Tests to see if a given ioaddr points to an SMC911x chip.
  1547. * Returns a 0 on success
  1548. *
  1549. * Algorithm:
  1550. * (1) see if the endian word is OK
  1551. * (1) see if I recognize the chip ID in the appropriate register
  1552. *
  1553. * Here I do typical initialization tasks.
  1554. *
  1555. * o Initialize the structure if needed
  1556. * o print out my vanity message if not done so already
  1557. * o print out what type of hardware is detected
  1558. * o print out the ethernet address
  1559. * o find the IRQ
  1560. * o set up my private data
  1561. * o configure the dev structure with my subroutines
  1562. * o actually GRAB the irq.
  1563. * o GRAB the region
  1564. */
  1565. static int __init smc911x_probe(struct net_device *dev)
  1566. {
  1567. struct smc911x_local *lp = netdev_priv(dev);
  1568. int i, retval;
  1569. unsigned int val, chip_id, revision;
  1570. const char *version_string;
  1571. unsigned long irq_flags;
  1572. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1573. /* First, see if the endian word is recognized */
  1574. val = SMC_GET_BYTE_TEST(lp);
  1575. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1576. if (val != 0x87654321) {
  1577. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1578. retval = -ENODEV;
  1579. goto err_out;
  1580. }
  1581. /*
  1582. * check if the revision register is something that I
  1583. * recognize. These might need to be added to later,
  1584. * as future revisions could be added.
  1585. */
  1586. chip_id = SMC_GET_PN(lp);
  1587. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1588. for(i=0;chip_ids[i].id != 0; i++) {
  1589. if (chip_ids[i].id == chip_id) break;
  1590. }
  1591. if (!chip_ids[i].id) {
  1592. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1593. retval = -ENODEV;
  1594. goto err_out;
  1595. }
  1596. version_string = chip_ids[i].name;
  1597. revision = SMC_GET_REV(lp);
  1598. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1599. /* At this point I'll assume that the chip is an SMC911x. */
  1600. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1601. /* Validate the TX FIFO size requested */
  1602. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1603. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1604. retval = -EINVAL;
  1605. goto err_out;
  1606. }
  1607. /* fill in some of the fields */
  1608. lp->version = chip_ids[i].id;
  1609. lp->revision = revision;
  1610. lp->tx_fifo_kb = tx_fifo_kb;
  1611. /* Reverse calculate the RX FIFO size from the TX */
  1612. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1613. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1614. /* Set the automatic flow control values */
  1615. switch(lp->tx_fifo_kb) {
  1616. /*
  1617. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1618. * AFC_LO is AFC_HI/2
  1619. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1620. */
  1621. case 2:/* 13440 Rx Data Fifo Size */
  1622. lp->afc_cfg=0x008C46AF;break;
  1623. case 3:/* 12480 Rx Data Fifo Size */
  1624. lp->afc_cfg=0x0082419F;break;
  1625. case 4:/* 11520 Rx Data Fifo Size */
  1626. lp->afc_cfg=0x00783C9F;break;
  1627. case 5:/* 10560 Rx Data Fifo Size */
  1628. lp->afc_cfg=0x006E374F;break;
  1629. case 6:/* 9600 Rx Data Fifo Size */
  1630. lp->afc_cfg=0x0064328F;break;
  1631. case 7:/* 8640 Rx Data Fifo Size */
  1632. lp->afc_cfg=0x005A2D7F;break;
  1633. case 8:/* 7680 Rx Data Fifo Size */
  1634. lp->afc_cfg=0x0050287F;break;
  1635. case 9:/* 6720 Rx Data Fifo Size */
  1636. lp->afc_cfg=0x0046236F;break;
  1637. case 10:/* 5760 Rx Data Fifo Size */
  1638. lp->afc_cfg=0x003C1E6F;break;
  1639. case 11:/* 4800 Rx Data Fifo Size */
  1640. lp->afc_cfg=0x0032195F;break;
  1641. /*
  1642. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1643. * AFC_LO is AFC_HI/2
  1644. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1645. */
  1646. case 12:/* 3840 Rx Data Fifo Size */
  1647. lp->afc_cfg=0x0024124F;break;
  1648. case 13:/* 2880 Rx Data Fifo Size */
  1649. lp->afc_cfg=0x0015073F;break;
  1650. case 14:/* 1920 Rx Data Fifo Size */
  1651. lp->afc_cfg=0x0006032F;break;
  1652. default:
  1653. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1654. dev->name);
  1655. break;
  1656. }
  1657. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1658. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1659. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1660. spin_lock_init(&lp->lock);
  1661. /* Get the MAC address */
  1662. SMC_GET_MAC_ADDR(lp, dev->dev_addr);
  1663. /* now, reset the chip, and put it into a known state */
  1664. smc911x_reset(dev);
  1665. /*
  1666. * If dev->irq is 0, then the device has to be banged on to see
  1667. * what the IRQ is.
  1668. *
  1669. * Specifying an IRQ is done with the assumption that the user knows
  1670. * what (s)he is doing. No checking is done!!!!
  1671. */
  1672. if (dev->irq < 1) {
  1673. int trials;
  1674. trials = 3;
  1675. while (trials--) {
  1676. dev->irq = smc911x_findirq(dev);
  1677. if (dev->irq)
  1678. break;
  1679. /* kick the card and try again */
  1680. smc911x_reset(dev);
  1681. }
  1682. }
  1683. if (dev->irq == 0) {
  1684. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1685. dev->name);
  1686. retval = -ENODEV;
  1687. goto err_out;
  1688. }
  1689. dev->irq = irq_canonicalize(dev->irq);
  1690. /* Fill in the fields of the device structure with ethernet values. */
  1691. ether_setup(dev);
  1692. dev->open = smc911x_open;
  1693. dev->stop = smc911x_close;
  1694. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1695. dev->tx_timeout = smc911x_timeout;
  1696. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1697. dev->set_multicast_list = smc911x_set_multicast_list;
  1698. dev->ethtool_ops = &smc911x_ethtool_ops;
  1699. #ifdef CONFIG_NET_POLL_CONTROLLER
  1700. dev->poll_controller = smc911x_poll_controller;
  1701. #endif
  1702. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1703. lp->mii.phy_id_mask = 0x1f;
  1704. lp->mii.reg_num_mask = 0x1f;
  1705. lp->mii.force_media = 0;
  1706. lp->mii.full_duplex = 0;
  1707. lp->mii.dev = dev;
  1708. lp->mii.mdio_read = smc911x_phy_read;
  1709. lp->mii.mdio_write = smc911x_phy_write;
  1710. /*
  1711. * Locate the phy, if any.
  1712. */
  1713. smc911x_phy_detect(dev);
  1714. /* Set default parameters */
  1715. lp->msg_enable = NETIF_MSG_LINK;
  1716. lp->ctl_rfduplx = 1;
  1717. lp->ctl_rspeed = 100;
  1718. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1719. irq_flags = lp->cfg.irq_flags;
  1720. #else
  1721. irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
  1722. #endif
  1723. /* Grab the IRQ */
  1724. retval = request_irq(dev->irq, &smc911x_interrupt,
  1725. irq_flags, dev->name, dev);
  1726. if (retval)
  1727. goto err_out;
  1728. #ifdef SMC_USE_DMA
  1729. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1730. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1731. lp->rxdma_active = 0;
  1732. lp->txdma_active = 0;
  1733. dev->dma = lp->rxdma;
  1734. #endif
  1735. retval = register_netdev(dev);
  1736. if (retval == 0) {
  1737. /* now, print out the card info, in a short format.. */
  1738. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1739. dev->name, version_string, lp->revision,
  1740. dev->base_addr, dev->irq);
  1741. #ifdef SMC_USE_DMA
  1742. if (lp->rxdma != -1)
  1743. printk(" RXDMA %d ", lp->rxdma);
  1744. if (lp->txdma != -1)
  1745. printk("TXDMA %d", lp->txdma);
  1746. #endif
  1747. printk("\n");
  1748. if (!is_valid_ether_addr(dev->dev_addr)) {
  1749. printk("%s: Invalid ethernet MAC address. Please "
  1750. "set using ifconfig\n", dev->name);
  1751. } else {
  1752. /* Print the Ethernet address */
  1753. printk("%s: Ethernet addr: ", dev->name);
  1754. for (i = 0; i < 5; i++)
  1755. printk("%2.2x:", dev->dev_addr[i]);
  1756. printk("%2.2x\n", dev->dev_addr[5]);
  1757. }
  1758. if (lp->phy_type == 0) {
  1759. PRINTK("%s: No PHY found\n", dev->name);
  1760. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1761. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1762. } else {
  1763. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1764. }
  1765. }
  1766. err_out:
  1767. #ifdef SMC_USE_DMA
  1768. if (retval) {
  1769. if (lp->rxdma != -1) {
  1770. SMC_DMA_FREE(dev, lp->rxdma);
  1771. }
  1772. if (lp->txdma != -1) {
  1773. SMC_DMA_FREE(dev, lp->txdma);
  1774. }
  1775. }
  1776. #endif
  1777. return retval;
  1778. }
  1779. /*
  1780. * smc911x_init(void)
  1781. *
  1782. * Output:
  1783. * 0 --> there is a device
  1784. * anything else, error
  1785. */
  1786. static int smc911x_drv_probe(struct platform_device *pdev)
  1787. {
  1788. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1789. struct smc911x_platdata *pd = pdev->dev.platform_data;
  1790. #endif
  1791. struct net_device *ndev;
  1792. struct resource *res;
  1793. struct smc911x_local *lp;
  1794. unsigned int *addr;
  1795. int ret;
  1796. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1797. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1798. if (!res) {
  1799. ret = -ENODEV;
  1800. goto out;
  1801. }
  1802. /*
  1803. * Request the regions.
  1804. */
  1805. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1806. ret = -EBUSY;
  1807. goto out;
  1808. }
  1809. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1810. if (!ndev) {
  1811. printk("%s: could not allocate device.\n", CARDNAME);
  1812. ret = -ENOMEM;
  1813. goto release_1;
  1814. }
  1815. SET_NETDEV_DEV(ndev, &pdev->dev);
  1816. ndev->dma = (unsigned char)-1;
  1817. ndev->irq = platform_get_irq(pdev, 0);
  1818. lp = netdev_priv(ndev);
  1819. lp->netdev = ndev;
  1820. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1821. if (!pd) {
  1822. ret = -EINVAL;
  1823. goto release_both;
  1824. }
  1825. memcpy(&lp->cfg, pd, sizeof(lp->cfg));
  1826. #endif
  1827. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1828. if (!addr) {
  1829. ret = -ENOMEM;
  1830. goto release_both;
  1831. }
  1832. platform_set_drvdata(pdev, ndev);
  1833. lp->base = addr;
  1834. ndev->base_addr = res->start;
  1835. ret = smc911x_probe(ndev);
  1836. if (ret != 0) {
  1837. platform_set_drvdata(pdev, NULL);
  1838. iounmap(addr);
  1839. release_both:
  1840. free_netdev(ndev);
  1841. release_1:
  1842. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1843. out:
  1844. printk("%s: not found (%d).\n", CARDNAME, ret);
  1845. }
  1846. #ifdef SMC_USE_DMA
  1847. else {
  1848. lp->physaddr = res->start;
  1849. lp->dev = &pdev->dev;
  1850. }
  1851. #endif
  1852. return ret;
  1853. }
  1854. static int smc911x_drv_remove(struct platform_device *pdev)
  1855. {
  1856. struct net_device *ndev = platform_get_drvdata(pdev);
  1857. struct smc911x_local *lp = netdev_priv(ndev);
  1858. struct resource *res;
  1859. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1860. platform_set_drvdata(pdev, NULL);
  1861. unregister_netdev(ndev);
  1862. free_irq(ndev->irq, ndev);
  1863. #ifdef SMC_USE_DMA
  1864. {
  1865. if (lp->rxdma != -1) {
  1866. SMC_DMA_FREE(dev, lp->rxdma);
  1867. }
  1868. if (lp->txdma != -1) {
  1869. SMC_DMA_FREE(dev, lp->txdma);
  1870. }
  1871. }
  1872. #endif
  1873. iounmap(lp->base);
  1874. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1875. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1876. free_netdev(ndev);
  1877. return 0;
  1878. }
  1879. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1880. {
  1881. struct net_device *ndev = platform_get_drvdata(dev);
  1882. struct smc911x_local *lp = netdev_priv(ndev);
  1883. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1884. if (ndev) {
  1885. if (netif_running(ndev)) {
  1886. netif_device_detach(ndev);
  1887. smc911x_shutdown(ndev);
  1888. #if POWER_DOWN
  1889. /* Set D2 - Energy detect only setting */
  1890. SMC_SET_PMT_CTRL(lp, 2<<12);
  1891. #endif
  1892. }
  1893. }
  1894. return 0;
  1895. }
  1896. static int smc911x_drv_resume(struct platform_device *dev)
  1897. {
  1898. struct net_device *ndev = platform_get_drvdata(dev);
  1899. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1900. if (ndev) {
  1901. struct smc911x_local *lp = netdev_priv(ndev);
  1902. if (netif_running(ndev)) {
  1903. smc911x_reset(ndev);
  1904. if (lp->phy_type != 0)
  1905. smc911x_phy_configure(&lp->phy_configure);
  1906. smc911x_enable(ndev);
  1907. netif_device_attach(ndev);
  1908. }
  1909. }
  1910. return 0;
  1911. }
  1912. static struct platform_driver smc911x_driver = {
  1913. .probe = smc911x_drv_probe,
  1914. .remove = smc911x_drv_remove,
  1915. .suspend = smc911x_drv_suspend,
  1916. .resume = smc911x_drv_resume,
  1917. .driver = {
  1918. .name = CARDNAME,
  1919. .owner = THIS_MODULE,
  1920. },
  1921. };
  1922. static int __init smc911x_init(void)
  1923. {
  1924. return platform_driver_register(&smc911x_driver);
  1925. }
  1926. static void __exit smc911x_cleanup(void)
  1927. {
  1928. platform_driver_unregister(&smc911x_driver);
  1929. }
  1930. module_init(smc911x_init);
  1931. module_exit(smc911x_cleanup);