baycom_epp.c 34 KB

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  1. /*****************************************************************************/
  2. /*
  3. * baycom_epp.c -- baycom epp radio modem driver.
  4. *
  5. * Copyright (C) 1998-2000
  6. * Thomas Sailer (sailer@ife.ee.ethz.ch)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * Please note that the GPL allows you to use the driver, NOT the radio.
  23. * In order to use the radio, you need a license from the communications
  24. * authority of your country.
  25. *
  26. *
  27. * History:
  28. * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef)
  29. * 0.2 21.04.1998 Massive rework by Thomas Sailer
  30. * Integrated FPGA EPP modem configuration routines
  31. * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program
  32. * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface
  33. * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall
  34. * removed some pre-2.2 kernel compatibility cruft
  35. * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts
  36. * 0.7 12.02.2000 adapted to softnet driver interface
  37. *
  38. */
  39. /*****************************************************************************/
  40. #include <linux/crc-ccitt.h>
  41. #include <linux/module.h>
  42. #include <linux/kernel.h>
  43. #include <linux/init.h>
  44. #include <linux/string.h>
  45. #include <linux/workqueue.h>
  46. #include <linux/fs.h>
  47. #include <linux/parport.h>
  48. #include <linux/if_arp.h>
  49. #include <linux/hdlcdrv.h>
  50. #include <linux/baycom.h>
  51. #include <linux/jiffies.h>
  52. #include <linux/random.h>
  53. #include <net/ax25.h>
  54. #include <asm/uaccess.h>
  55. /* --------------------------------------------------------------------- */
  56. #define BAYCOM_DEBUG
  57. #define BAYCOM_MAGIC 19730510
  58. /* --------------------------------------------------------------------- */
  59. static const char paranoia_str[] = KERN_ERR
  60. "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
  61. static const char bc_drvname[] = "baycom_epp";
  62. static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
  63. KERN_INFO "baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n";
  64. /* --------------------------------------------------------------------- */
  65. #define NR_PORTS 4
  66. static struct net_device *baycom_device[NR_PORTS];
  67. /* --------------------------------------------------------------------- */
  68. /* EPP status register */
  69. #define EPP_DCDBIT 0x80
  70. #define EPP_PTTBIT 0x08
  71. #define EPP_NREF 0x01
  72. #define EPP_NRAEF 0x02
  73. #define EPP_NRHF 0x04
  74. #define EPP_NTHF 0x20
  75. #define EPP_NTAEF 0x10
  76. #define EPP_NTEF EPP_PTTBIT
  77. /* EPP control register */
  78. #define EPP_TX_FIFO_ENABLE 0x10
  79. #define EPP_RX_FIFO_ENABLE 0x08
  80. #define EPP_MODEM_ENABLE 0x20
  81. #define EPP_LEDS 0xC0
  82. #define EPP_IRQ_ENABLE 0x10
  83. /* LPT registers */
  84. #define LPTREG_ECONTROL 0x402
  85. #define LPTREG_CONFIGB 0x401
  86. #define LPTREG_CONFIGA 0x400
  87. #define LPTREG_EPPDATA 0x004
  88. #define LPTREG_EPPADDR 0x003
  89. #define LPTREG_CONTROL 0x002
  90. #define LPTREG_STATUS 0x001
  91. #define LPTREG_DATA 0x000
  92. /* LPT control register */
  93. #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */
  94. #define LPTCTRL_WRITE 0x01
  95. #define LPTCTRL_ADDRSTB 0x08
  96. #define LPTCTRL_DATASTB 0x02
  97. #define LPTCTRL_INTEN 0x10
  98. /* LPT status register */
  99. #define LPTSTAT_SHIFT_NINTR 6
  100. #define LPTSTAT_WAIT 0x80
  101. #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR)
  102. #define LPTSTAT_PE 0x20
  103. #define LPTSTAT_DONE 0x10
  104. #define LPTSTAT_NERROR 0x08
  105. #define LPTSTAT_EPPTIMEOUT 0x01
  106. /* LPT data register */
  107. #define LPTDATA_SHIFT_TDI 0
  108. #define LPTDATA_SHIFT_TMS 2
  109. #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI)
  110. #define LPTDATA_TCK 0x02
  111. #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS)
  112. #define LPTDATA_INITBIAS 0x80
  113. /* EPP modem config/status bits */
  114. #define EPP_DCDBIT 0x80
  115. #define EPP_PTTBIT 0x08
  116. #define EPP_RXEBIT 0x01
  117. #define EPP_RXAEBIT 0x02
  118. #define EPP_RXHFULL 0x04
  119. #define EPP_NTHF 0x20
  120. #define EPP_NTAEF 0x10
  121. #define EPP_NTEF EPP_PTTBIT
  122. #define EPP_TX_FIFO_ENABLE 0x10
  123. #define EPP_RX_FIFO_ENABLE 0x08
  124. #define EPP_MODEM_ENABLE 0x20
  125. #define EPP_LEDS 0xC0
  126. #define EPP_IRQ_ENABLE 0x10
  127. /* Xilinx 4k JTAG instructions */
  128. #define XC4K_IRLENGTH 3
  129. #define XC4K_EXTEST 0
  130. #define XC4K_PRELOAD 1
  131. #define XC4K_CONFIGURE 5
  132. #define XC4K_BYPASS 7
  133. #define EPP_CONVENTIONAL 0
  134. #define EPP_FPGA 1
  135. #define EPP_FPGAEXTSTATUS 2
  136. #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8)
  137. /* ---------------------------------------------------------------------- */
  138. /*
  139. * Information that need to be kept for each board.
  140. */
  141. struct baycom_state {
  142. int magic;
  143. struct pardevice *pdev;
  144. struct net_device *dev;
  145. unsigned int work_running;
  146. struct delayed_work run_work;
  147. unsigned int modem;
  148. unsigned int bitrate;
  149. unsigned char stat;
  150. struct {
  151. unsigned int intclk;
  152. unsigned int fclk;
  153. unsigned int bps;
  154. unsigned int extmodem;
  155. unsigned int loopback;
  156. } cfg;
  157. struct hdlcdrv_channel_params ch_params;
  158. struct {
  159. unsigned int bitbuf, bitstream, numbits, state;
  160. unsigned char *bufptr;
  161. int bufcnt;
  162. unsigned char buf[TXBUFFER_SIZE];
  163. } hdlcrx;
  164. struct {
  165. int calibrate;
  166. int slotcnt;
  167. int flags;
  168. enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
  169. unsigned char *bufptr;
  170. int bufcnt;
  171. unsigned char buf[TXBUFFER_SIZE];
  172. } hdlctx;
  173. struct net_device_stats stats;
  174. unsigned int ptt_keyed;
  175. struct sk_buff *skb; /* next transmit packet */
  176. #ifdef BAYCOM_DEBUG
  177. struct debug_vals {
  178. unsigned long last_jiffies;
  179. unsigned cur_intcnt;
  180. unsigned last_intcnt;
  181. int cur_pllcorr;
  182. int last_pllcorr;
  183. unsigned int mod_cycles;
  184. unsigned int demod_cycles;
  185. } debug_vals;
  186. #endif /* BAYCOM_DEBUG */
  187. };
  188. /* --------------------------------------------------------------------- */
  189. #define KISS_VERBOSE
  190. /* --------------------------------------------------------------------- */
  191. #define PARAM_TXDELAY 1
  192. #define PARAM_PERSIST 2
  193. #define PARAM_SLOTTIME 3
  194. #define PARAM_TXTAIL 4
  195. #define PARAM_FULLDUP 5
  196. #define PARAM_HARDWARE 6
  197. #define PARAM_RETURN 255
  198. /* --------------------------------------------------------------------- */
  199. /*
  200. * the CRC routines are stolen from WAMPES
  201. * by Dieter Deyke
  202. */
  203. /*---------------------------------------------------------------------------*/
  204. #if 0
  205. static inline void append_crc_ccitt(unsigned char *buffer, int len)
  206. {
  207. unsigned int crc = 0xffff;
  208. for (;len>0;len--)
  209. crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
  210. crc ^= 0xffff;
  211. *buffer++ = crc;
  212. *buffer++ = crc >> 8;
  213. }
  214. #endif
  215. /*---------------------------------------------------------------------------*/
  216. static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
  217. {
  218. return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
  219. }
  220. /*---------------------------------------------------------------------------*/
  221. static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
  222. {
  223. return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
  224. }
  225. /* ---------------------------------------------------------------------- */
  226. #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
  227. /* --------------------------------------------------------------------- */
  228. static inline void baycom_int_freq(struct baycom_state *bc)
  229. {
  230. #ifdef BAYCOM_DEBUG
  231. unsigned long cur_jiffies = jiffies;
  232. /*
  233. * measure the interrupt frequency
  234. */
  235. bc->debug_vals.cur_intcnt++;
  236. if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
  237. bc->debug_vals.last_jiffies = cur_jiffies;
  238. bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
  239. bc->debug_vals.cur_intcnt = 0;
  240. bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
  241. bc->debug_vals.cur_pllcorr = 0;
  242. }
  243. #endif /* BAYCOM_DEBUG */
  244. }
  245. /* ---------------------------------------------------------------------- */
  246. /*
  247. * eppconfig_path should be setable via /proc/sys.
  248. */
  249. static char eppconfig_path[256] = "/usr/sbin/eppfpga";
  250. static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
  251. /* eppconfig: called during ifconfig up to configure the modem */
  252. static int eppconfig(struct baycom_state *bc)
  253. {
  254. char modearg[256];
  255. char portarg[16];
  256. char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg,
  257. NULL };
  258. /* set up arguments */
  259. sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
  260. bc->cfg.intclk ? "int" : "ext",
  261. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  262. (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
  263. bc->cfg.loopback ? ",loopback" : "");
  264. sprintf(portarg, "%ld", bc->pdev->port->base);
  265. printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
  266. return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC);
  267. }
  268. /* ---------------------------------------------------------------------- */
  269. static inline void do_kiss_params(struct baycom_state *bc,
  270. unsigned char *data, unsigned long len)
  271. {
  272. #ifdef KISS_VERBOSE
  273. #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
  274. #else /* KISS_VERBOSE */
  275. #define PKP(a,b)
  276. #endif /* KISS_VERBOSE */
  277. if (len < 2)
  278. return;
  279. switch(data[0]) {
  280. case PARAM_TXDELAY:
  281. bc->ch_params.tx_delay = data[1];
  282. PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
  283. break;
  284. case PARAM_PERSIST:
  285. bc->ch_params.ppersist = data[1];
  286. PKP("p persistence = %u", bc->ch_params.ppersist);
  287. break;
  288. case PARAM_SLOTTIME:
  289. bc->ch_params.slottime = data[1];
  290. PKP("slot time = %ums", bc->ch_params.slottime);
  291. break;
  292. case PARAM_TXTAIL:
  293. bc->ch_params.tx_tail = data[1];
  294. PKP("TX tail = %ums", bc->ch_params.tx_tail);
  295. break;
  296. case PARAM_FULLDUP:
  297. bc->ch_params.fulldup = !!data[1];
  298. PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
  299. break;
  300. default:
  301. break;
  302. }
  303. #undef PKP
  304. }
  305. /* --------------------------------------------------------------------- */
  306. static void encode_hdlc(struct baycom_state *bc)
  307. {
  308. struct sk_buff *skb;
  309. unsigned char *wp, *bp;
  310. int pkt_len;
  311. unsigned bitstream, notbitstream, bitbuf, numbit, crc;
  312. unsigned char crcarr[2];
  313. int j;
  314. if (bc->hdlctx.bufcnt > 0)
  315. return;
  316. skb = bc->skb;
  317. if (!skb)
  318. return;
  319. bc->skb = NULL;
  320. pkt_len = skb->len-1; /* strip KISS byte */
  321. wp = bc->hdlctx.buf;
  322. bp = skb->data+1;
  323. crc = calc_crc_ccitt(bp, pkt_len);
  324. crcarr[0] = crc;
  325. crcarr[1] = crc >> 8;
  326. *wp++ = 0x7e;
  327. bitstream = bitbuf = numbit = 0;
  328. while (pkt_len > -2) {
  329. bitstream >>= 8;
  330. bitstream |= ((unsigned int)*bp) << 8;
  331. bitbuf |= ((unsigned int)*bp) << numbit;
  332. notbitstream = ~bitstream;
  333. bp++;
  334. pkt_len--;
  335. if (!pkt_len)
  336. bp = crcarr;
  337. for (j = 0; j < 8; j++)
  338. if (unlikely(!(notbitstream & (0x1f0 << j)))) {
  339. bitstream &= ~(0x100 << j);
  340. bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
  341. ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
  342. numbit++;
  343. notbitstream = ~bitstream;
  344. }
  345. numbit += 8;
  346. while (numbit >= 8) {
  347. *wp++ = bitbuf;
  348. bitbuf >>= 8;
  349. numbit -= 8;
  350. }
  351. }
  352. bitbuf |= 0x7e7e << numbit;
  353. numbit += 16;
  354. while (numbit >= 8) {
  355. *wp++ = bitbuf;
  356. bitbuf >>= 8;
  357. numbit -= 8;
  358. }
  359. bc->hdlctx.bufptr = bc->hdlctx.buf;
  360. bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
  361. dev_kfree_skb(skb);
  362. bc->stats.tx_packets++;
  363. }
  364. /* ---------------------------------------------------------------------- */
  365. static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
  366. {
  367. struct parport *pp = bc->pdev->port;
  368. unsigned char tmp[128];
  369. int i, j;
  370. if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
  371. bc->hdlctx.state = tx_idle;
  372. if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
  373. if (bc->hdlctx.bufcnt <= 0)
  374. encode_hdlc(bc);
  375. if (bc->hdlctx.bufcnt <= 0)
  376. return 0;
  377. if (!bc->ch_params.fulldup) {
  378. if (!(stat & EPP_DCDBIT)) {
  379. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  380. return 0;
  381. }
  382. if ((--bc->hdlctx.slotcnt) > 0)
  383. return 0;
  384. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  385. if ((random32() % 256) > bc->ch_params.ppersist)
  386. return 0;
  387. }
  388. }
  389. if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
  390. bc->hdlctx.state = tx_keyup;
  391. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
  392. bc->ptt_keyed++;
  393. }
  394. while (cnt > 0) {
  395. switch (bc->hdlctx.state) {
  396. case tx_keyup:
  397. i = min_t(int, cnt, bc->hdlctx.flags);
  398. cnt -= i;
  399. bc->hdlctx.flags -= i;
  400. if (bc->hdlctx.flags <= 0)
  401. bc->hdlctx.state = tx_data;
  402. memset(tmp, 0x7e, sizeof(tmp));
  403. while (i > 0) {
  404. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  405. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  406. return -1;
  407. i -= j;
  408. }
  409. break;
  410. case tx_data:
  411. if (bc->hdlctx.bufcnt <= 0) {
  412. encode_hdlc(bc);
  413. if (bc->hdlctx.bufcnt <= 0) {
  414. bc->hdlctx.state = tx_tail;
  415. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
  416. break;
  417. }
  418. }
  419. i = min_t(int, cnt, bc->hdlctx.bufcnt);
  420. bc->hdlctx.bufcnt -= i;
  421. cnt -= i;
  422. if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
  423. return -1;
  424. bc->hdlctx.bufptr += i;
  425. break;
  426. case tx_tail:
  427. encode_hdlc(bc);
  428. if (bc->hdlctx.bufcnt > 0) {
  429. bc->hdlctx.state = tx_data;
  430. break;
  431. }
  432. i = min_t(int, cnt, bc->hdlctx.flags);
  433. if (i) {
  434. cnt -= i;
  435. bc->hdlctx.flags -= i;
  436. memset(tmp, 0x7e, sizeof(tmp));
  437. while (i > 0) {
  438. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  439. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  440. return -1;
  441. i -= j;
  442. }
  443. break;
  444. }
  445. default: /* fall through */
  446. if (bc->hdlctx.calibrate <= 0)
  447. return 0;
  448. i = min_t(int, cnt, bc->hdlctx.calibrate);
  449. cnt -= i;
  450. bc->hdlctx.calibrate -= i;
  451. memset(tmp, 0, sizeof(tmp));
  452. while (i > 0) {
  453. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  454. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  455. return -1;
  456. i -= j;
  457. }
  458. break;
  459. }
  460. }
  461. return 0;
  462. }
  463. /* ---------------------------------------------------------------------- */
  464. static void do_rxpacket(struct net_device *dev)
  465. {
  466. struct baycom_state *bc = netdev_priv(dev);
  467. struct sk_buff *skb;
  468. unsigned char *cp;
  469. unsigned pktlen;
  470. if (bc->hdlcrx.bufcnt < 4)
  471. return;
  472. if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt))
  473. return;
  474. pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
  475. if (!(skb = dev_alloc_skb(pktlen))) {
  476. printk("%s: memory squeeze, dropping packet\n", dev->name);
  477. bc->stats.rx_dropped++;
  478. return;
  479. }
  480. cp = skb_put(skb, pktlen);
  481. *cp++ = 0; /* KISS kludge */
  482. memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
  483. skb->protocol = ax25_type_trans(skb, dev);
  484. netif_rx(skb);
  485. dev->last_rx = jiffies;
  486. bc->stats.rx_packets++;
  487. }
  488. static int receive(struct net_device *dev, int cnt)
  489. {
  490. struct baycom_state *bc = netdev_priv(dev);
  491. struct parport *pp = bc->pdev->port;
  492. unsigned int bitbuf, notbitstream, bitstream, numbits, state;
  493. unsigned char tmp[128];
  494. unsigned char *cp;
  495. int cnt2, ret = 0;
  496. int j;
  497. numbits = bc->hdlcrx.numbits;
  498. state = bc->hdlcrx.state;
  499. bitstream = bc->hdlcrx.bitstream;
  500. bitbuf = bc->hdlcrx.bitbuf;
  501. while (cnt > 0) {
  502. cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
  503. cnt -= cnt2;
  504. if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
  505. ret = -1;
  506. break;
  507. }
  508. cp = tmp;
  509. for (; cnt2 > 0; cnt2--, cp++) {
  510. bitstream >>= 8;
  511. bitstream |= (*cp) << 8;
  512. bitbuf >>= 8;
  513. bitbuf |= (*cp) << 8;
  514. numbits += 8;
  515. notbitstream = ~bitstream;
  516. for (j = 0; j < 8; j++) {
  517. /* flag or abort */
  518. if (unlikely(!(notbitstream & (0x0fc << j)))) {
  519. /* abort received */
  520. if (!(notbitstream & (0x1fc << j)))
  521. state = 0;
  522. /* not flag received */
  523. else if (!(bitstream & (0x1fe << j)) != (0x0fc << j)) {
  524. if (state)
  525. do_rxpacket(dev);
  526. bc->hdlcrx.bufcnt = 0;
  527. bc->hdlcrx.bufptr = bc->hdlcrx.buf;
  528. state = 1;
  529. numbits = 7-j;
  530. }
  531. }
  532. /* stuffed bit */
  533. else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
  534. numbits--;
  535. bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
  536. }
  537. }
  538. while (state && numbits >= 8) {
  539. if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
  540. state = 0;
  541. } else {
  542. *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
  543. bc->hdlcrx.bufcnt++;
  544. numbits -= 8;
  545. }
  546. }
  547. }
  548. }
  549. bc->hdlcrx.numbits = numbits;
  550. bc->hdlcrx.state = state;
  551. bc->hdlcrx.bitstream = bitstream;
  552. bc->hdlcrx.bitbuf = bitbuf;
  553. return ret;
  554. }
  555. /* --------------------------------------------------------------------- */
  556. #ifdef __i386__
  557. #include <asm/msr.h>
  558. #define GETTICK(x) \
  559. ({ \
  560. if (cpu_has_tsc) \
  561. rdtscl(x); \
  562. })
  563. #else /* __i386__ */
  564. #define GETTICK(x)
  565. #endif /* __i386__ */
  566. static void epp_bh(struct work_struct *work)
  567. {
  568. struct net_device *dev;
  569. struct baycom_state *bc;
  570. struct parport *pp;
  571. unsigned char stat;
  572. unsigned char tmp[2];
  573. unsigned int time1 = 0, time2 = 0, time3 = 0;
  574. int cnt, cnt2;
  575. bc = container_of(work, struct baycom_state, run_work.work);
  576. dev = bc->dev;
  577. if (!bc->work_running)
  578. return;
  579. baycom_int_freq(bc);
  580. pp = bc->pdev->port;
  581. /* update status */
  582. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  583. goto epptimeout;
  584. bc->stat = stat;
  585. bc->debug_vals.last_pllcorr = stat;
  586. GETTICK(time1);
  587. if (bc->modem == EPP_FPGAEXTSTATUS) {
  588. /* get input count */
  589. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
  590. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  591. goto epptimeout;
  592. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  593. goto epptimeout;
  594. cnt = tmp[0] | (tmp[1] << 8);
  595. cnt &= 0x7fff;
  596. /* get output count */
  597. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
  598. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  599. goto epptimeout;
  600. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  601. goto epptimeout;
  602. cnt2 = tmp[0] | (tmp[1] << 8);
  603. cnt2 = 16384 - (cnt2 & 0x7fff);
  604. /* return to normal */
  605. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  606. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  607. goto epptimeout;
  608. if (transmit(bc, cnt2, stat))
  609. goto epptimeout;
  610. GETTICK(time2);
  611. if (receive(dev, cnt))
  612. goto epptimeout;
  613. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  614. goto epptimeout;
  615. bc->stat = stat;
  616. } else {
  617. /* try to tx */
  618. switch (stat & (EPP_NTAEF|EPP_NTHF)) {
  619. case EPP_NTHF:
  620. cnt = 2048 - 256;
  621. break;
  622. case EPP_NTAEF:
  623. cnt = 2048 - 1793;
  624. break;
  625. case 0:
  626. cnt = 0;
  627. break;
  628. default:
  629. cnt = 2048 - 1025;
  630. break;
  631. }
  632. if (transmit(bc, cnt, stat))
  633. goto epptimeout;
  634. GETTICK(time2);
  635. /* do receiver */
  636. while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
  637. switch (stat & (EPP_NRAEF|EPP_NRHF)) {
  638. case EPP_NRAEF:
  639. cnt = 1025;
  640. break;
  641. case 0:
  642. cnt = 1793;
  643. break;
  644. default:
  645. cnt = 256;
  646. break;
  647. }
  648. if (receive(dev, cnt))
  649. goto epptimeout;
  650. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  651. goto epptimeout;
  652. }
  653. cnt = 0;
  654. if (bc->bitrate < 50000)
  655. cnt = 256;
  656. else if (bc->bitrate < 100000)
  657. cnt = 128;
  658. while (cnt > 0 && stat & EPP_NREF) {
  659. if (receive(dev, 1))
  660. goto epptimeout;
  661. cnt--;
  662. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  663. goto epptimeout;
  664. }
  665. }
  666. GETTICK(time3);
  667. #ifdef BAYCOM_DEBUG
  668. bc->debug_vals.mod_cycles = time2 - time1;
  669. bc->debug_vals.demod_cycles = time3 - time2;
  670. #endif /* BAYCOM_DEBUG */
  671. schedule_delayed_work(&bc->run_work, 1);
  672. if (!bc->skb)
  673. netif_wake_queue(dev);
  674. return;
  675. epptimeout:
  676. printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
  677. }
  678. /* ---------------------------------------------------------------------- */
  679. /*
  680. * ===================== network driver interface =========================
  681. */
  682. static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
  683. {
  684. struct baycom_state *bc = netdev_priv(dev);
  685. if (skb->data[0] != 0) {
  686. do_kiss_params(bc, skb->data, skb->len);
  687. dev_kfree_skb(skb);
  688. return 0;
  689. }
  690. if (bc->skb)
  691. return -1;
  692. /* strip KISS byte */
  693. if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
  694. dev_kfree_skb(skb);
  695. return 0;
  696. }
  697. netif_stop_queue(dev);
  698. bc->skb = skb;
  699. return 0;
  700. }
  701. /* --------------------------------------------------------------------- */
  702. static int baycom_set_mac_address(struct net_device *dev, void *addr)
  703. {
  704. struct sockaddr *sa = (struct sockaddr *)addr;
  705. /* addr is an AX.25 shifted ASCII mac address */
  706. memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
  707. return 0;
  708. }
  709. /* --------------------------------------------------------------------- */
  710. static struct net_device_stats *baycom_get_stats(struct net_device *dev)
  711. {
  712. struct baycom_state *bc = netdev_priv(dev);
  713. /*
  714. * Get the current statistics. This may be called with the
  715. * card open or closed.
  716. */
  717. return &bc->stats;
  718. }
  719. /* --------------------------------------------------------------------- */
  720. static void epp_wakeup(void *handle)
  721. {
  722. struct net_device *dev = (struct net_device *)handle;
  723. struct baycom_state *bc = netdev_priv(dev);
  724. printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
  725. if (!parport_claim(bc->pdev))
  726. printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
  727. }
  728. /* --------------------------------------------------------------------- */
  729. /*
  730. * Open/initialize the board. This is called (in the current kernel)
  731. * sometime after booting when the 'ifconfig' program is run.
  732. *
  733. * This routine should set everything up anew at each open, even
  734. * registers that "should" only need to be set once at boot, so that
  735. * there is non-reboot way to recover if something goes wrong.
  736. */
  737. static int epp_open(struct net_device *dev)
  738. {
  739. struct baycom_state *bc = netdev_priv(dev);
  740. struct parport *pp = parport_find_base(dev->base_addr);
  741. unsigned int i, j;
  742. unsigned char tmp[128];
  743. unsigned char stat;
  744. unsigned long tstart;
  745. if (!pp) {
  746. printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
  747. return -ENXIO;
  748. }
  749. #if 0
  750. if (pp->irq < 0) {
  751. printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
  752. parport_put_port(pp);
  753. return -ENXIO;
  754. }
  755. #endif
  756. if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
  757. printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
  758. bc_drvname, pp->base);
  759. parport_put_port(pp);
  760. return -EIO;
  761. }
  762. memset(&bc->modem, 0, sizeof(bc->modem));
  763. bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup,
  764. NULL, PARPORT_DEV_EXCL, dev);
  765. parport_put_port(pp);
  766. if (!bc->pdev) {
  767. printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
  768. return -ENXIO;
  769. }
  770. if (parport_claim(bc->pdev)) {
  771. printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
  772. parport_unregister_device(bc->pdev);
  773. return -EBUSY;
  774. }
  775. dev->irq = /*pp->irq*/ 0;
  776. INIT_DELAYED_WORK(&bc->run_work, epp_bh);
  777. bc->work_running = 1;
  778. bc->modem = EPP_CONVENTIONAL;
  779. if (eppconfig(bc))
  780. printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
  781. else
  782. bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
  783. parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
  784. /* reset the modem */
  785. tmp[0] = 0;
  786. tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  787. if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
  788. goto epptimeout;
  789. /* autoprobe baud rate */
  790. tstart = jiffies;
  791. i = 0;
  792. while (time_before(jiffies, tstart + HZ/3)) {
  793. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  794. goto epptimeout;
  795. if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
  796. schedule();
  797. continue;
  798. }
  799. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  800. goto epptimeout;
  801. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  802. goto epptimeout;
  803. i += 256;
  804. }
  805. for (j = 0; j < 256; j++) {
  806. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  807. goto epptimeout;
  808. if (!(stat & EPP_NREF))
  809. break;
  810. if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
  811. goto epptimeout;
  812. i++;
  813. }
  814. tstart = jiffies - tstart;
  815. bc->bitrate = i * (8 * HZ) / tstart;
  816. j = 1;
  817. i = bc->bitrate >> 3;
  818. while (j < 7 && i > 150) {
  819. j++;
  820. i >>= 1;
  821. }
  822. printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n",
  823. bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
  824. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
  825. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  826. goto epptimeout;
  827. /*
  828. * initialise hdlc variables
  829. */
  830. bc->hdlcrx.state = 0;
  831. bc->hdlcrx.numbits = 0;
  832. bc->hdlctx.state = tx_idle;
  833. bc->hdlctx.bufcnt = 0;
  834. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  835. bc->hdlctx.calibrate = 0;
  836. /* start the bottom half stuff */
  837. schedule_delayed_work(&bc->run_work, 1);
  838. netif_start_queue(dev);
  839. return 0;
  840. epptimeout:
  841. printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
  842. parport_write_control(pp, 0); /* reset the adapter */
  843. parport_release(bc->pdev);
  844. parport_unregister_device(bc->pdev);
  845. return -EIO;
  846. }
  847. /* --------------------------------------------------------------------- */
  848. static int epp_close(struct net_device *dev)
  849. {
  850. struct baycom_state *bc = netdev_priv(dev);
  851. struct parport *pp = bc->pdev->port;
  852. unsigned char tmp[1];
  853. bc->work_running = 0;
  854. cancel_delayed_work_sync(&bc->run_work);
  855. bc->stat = EPP_DCDBIT;
  856. tmp[0] = 0;
  857. pp->ops->epp_write_addr(pp, tmp, 1, 0);
  858. parport_write_control(pp, 0); /* reset the adapter */
  859. parport_release(bc->pdev);
  860. parport_unregister_device(bc->pdev);
  861. if (bc->skb)
  862. dev_kfree_skb(bc->skb);
  863. bc->skb = NULL;
  864. printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
  865. bc_drvname, dev->base_addr, dev->irq);
  866. return 0;
  867. }
  868. /* --------------------------------------------------------------------- */
  869. static int baycom_setmode(struct baycom_state *bc, const char *modestr)
  870. {
  871. const char *cp;
  872. if (strstr(modestr,"intclk"))
  873. bc->cfg.intclk = 1;
  874. if (strstr(modestr,"extclk"))
  875. bc->cfg.intclk = 0;
  876. if (strstr(modestr,"intmodem"))
  877. bc->cfg.extmodem = 0;
  878. if (strstr(modestr,"extmodem"))
  879. bc->cfg.extmodem = 1;
  880. if (strstr(modestr,"noloopback"))
  881. bc->cfg.loopback = 0;
  882. if (strstr(modestr,"loopback"))
  883. bc->cfg.loopback = 1;
  884. if ((cp = strstr(modestr,"fclk="))) {
  885. bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
  886. if (bc->cfg.fclk < 1000000)
  887. bc->cfg.fclk = 1000000;
  888. if (bc->cfg.fclk > 25000000)
  889. bc->cfg.fclk = 25000000;
  890. }
  891. if ((cp = strstr(modestr,"bps="))) {
  892. bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
  893. if (bc->cfg.bps < 1000)
  894. bc->cfg.bps = 1000;
  895. if (bc->cfg.bps > 1500000)
  896. bc->cfg.bps = 1500000;
  897. }
  898. return 0;
  899. }
  900. /* --------------------------------------------------------------------- */
  901. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  902. {
  903. struct baycom_state *bc = netdev_priv(dev);
  904. struct hdlcdrv_ioctl hi;
  905. if (cmd != SIOCDEVPRIVATE)
  906. return -ENOIOCTLCMD;
  907. if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
  908. return -EFAULT;
  909. switch (hi.cmd) {
  910. default:
  911. return -ENOIOCTLCMD;
  912. case HDLCDRVCTL_GETCHANNELPAR:
  913. hi.data.cp.tx_delay = bc->ch_params.tx_delay;
  914. hi.data.cp.tx_tail = bc->ch_params.tx_tail;
  915. hi.data.cp.slottime = bc->ch_params.slottime;
  916. hi.data.cp.ppersist = bc->ch_params.ppersist;
  917. hi.data.cp.fulldup = bc->ch_params.fulldup;
  918. break;
  919. case HDLCDRVCTL_SETCHANNELPAR:
  920. if (!capable(CAP_NET_ADMIN))
  921. return -EACCES;
  922. bc->ch_params.tx_delay = hi.data.cp.tx_delay;
  923. bc->ch_params.tx_tail = hi.data.cp.tx_tail;
  924. bc->ch_params.slottime = hi.data.cp.slottime;
  925. bc->ch_params.ppersist = hi.data.cp.ppersist;
  926. bc->ch_params.fulldup = hi.data.cp.fulldup;
  927. bc->hdlctx.slotcnt = 1;
  928. return 0;
  929. case HDLCDRVCTL_GETMODEMPAR:
  930. hi.data.mp.iobase = dev->base_addr;
  931. hi.data.mp.irq = dev->irq;
  932. hi.data.mp.dma = dev->dma;
  933. hi.data.mp.dma2 = 0;
  934. hi.data.mp.seriobase = 0;
  935. hi.data.mp.pariobase = 0;
  936. hi.data.mp.midiiobase = 0;
  937. break;
  938. case HDLCDRVCTL_SETMODEMPAR:
  939. if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
  940. return -EACCES;
  941. dev->base_addr = hi.data.mp.iobase;
  942. dev->irq = /*hi.data.mp.irq*/0;
  943. dev->dma = /*hi.data.mp.dma*/0;
  944. return 0;
  945. case HDLCDRVCTL_GETSTAT:
  946. hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
  947. hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
  948. hi.data.cs.ptt_keyed = bc->ptt_keyed;
  949. hi.data.cs.tx_packets = bc->stats.tx_packets;
  950. hi.data.cs.tx_errors = bc->stats.tx_errors;
  951. hi.data.cs.rx_packets = bc->stats.rx_packets;
  952. hi.data.cs.rx_errors = bc->stats.rx_errors;
  953. break;
  954. case HDLCDRVCTL_OLDGETSTAT:
  955. hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
  956. hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
  957. hi.data.ocs.ptt_keyed = bc->ptt_keyed;
  958. break;
  959. case HDLCDRVCTL_CALIBRATE:
  960. if (!capable(CAP_SYS_RAWIO))
  961. return -EACCES;
  962. bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
  963. return 0;
  964. case HDLCDRVCTL_DRIVERNAME:
  965. strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
  966. break;
  967. case HDLCDRVCTL_GETMODE:
  968. sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s",
  969. bc->cfg.intclk ? "int" : "ext",
  970. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  971. bc->cfg.loopback ? ",loopback" : "");
  972. break;
  973. case HDLCDRVCTL_SETMODE:
  974. if (!capable(CAP_NET_ADMIN) || netif_running(dev))
  975. return -EACCES;
  976. hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
  977. return baycom_setmode(bc, hi.data.modename);
  978. case HDLCDRVCTL_MODELIST:
  979. strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
  980. sizeof(hi.data.modename));
  981. break;
  982. case HDLCDRVCTL_MODEMPARMASK:
  983. return HDLCDRV_PARMASK_IOBASE;
  984. }
  985. if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
  986. return -EFAULT;
  987. return 0;
  988. }
  989. /* --------------------------------------------------------------------- */
  990. /*
  991. * Check for a network adaptor of this type, and return '0' if one exists.
  992. * If dev->base_addr == 0, probe all likely locations.
  993. * If dev->base_addr == 1, always return failure.
  994. * If dev->base_addr == 2, allocate space for the device and return success
  995. * (detachable devices only).
  996. */
  997. static void baycom_probe(struct net_device *dev)
  998. {
  999. const struct hdlcdrv_channel_params dflt_ch_params = {
  1000. 20, 2, 10, 40, 0
  1001. };
  1002. struct baycom_state *bc;
  1003. /*
  1004. * not a real probe! only initialize data structures
  1005. */
  1006. bc = netdev_priv(dev);
  1007. /*
  1008. * initialize the baycom_state struct
  1009. */
  1010. bc->ch_params = dflt_ch_params;
  1011. bc->ptt_keyed = 0;
  1012. /*
  1013. * initialize the device struct
  1014. */
  1015. dev->open = epp_open;
  1016. dev->stop = epp_close;
  1017. dev->do_ioctl = baycom_ioctl;
  1018. dev->hard_start_xmit = baycom_send_packet;
  1019. dev->get_stats = baycom_get_stats;
  1020. /* Fill in the fields of the device structure */
  1021. bc->skb = NULL;
  1022. dev->header_ops = &ax25_header_ops;
  1023. dev->set_mac_address = baycom_set_mac_address;
  1024. dev->type = ARPHRD_AX25; /* AF_AX25 device */
  1025. dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
  1026. dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */
  1027. dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */
  1028. memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
  1029. memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN);
  1030. dev->tx_queue_len = 16;
  1031. /* New style flags */
  1032. dev->flags = 0;
  1033. }
  1034. /* --------------------------------------------------------------------- */
  1035. /*
  1036. * command line settable parameters
  1037. */
  1038. static const char *mode[NR_PORTS] = { "", };
  1039. static int iobase[NR_PORTS] = { 0x378, };
  1040. module_param_array(mode, charp, NULL, 0);
  1041. MODULE_PARM_DESC(mode, "baycom operating mode");
  1042. module_param_array(iobase, int, NULL, 0);
  1043. MODULE_PARM_DESC(iobase, "baycom io base address");
  1044. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  1045. MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
  1046. MODULE_LICENSE("GPL");
  1047. /* --------------------------------------------------------------------- */
  1048. static void __init baycom_epp_dev_setup(struct net_device *dev)
  1049. {
  1050. struct baycom_state *bc = netdev_priv(dev);
  1051. /*
  1052. * initialize part of the baycom_state struct
  1053. */
  1054. bc->dev = dev;
  1055. bc->magic = BAYCOM_MAGIC;
  1056. bc->cfg.fclk = 19666600;
  1057. bc->cfg.bps = 9600;
  1058. /*
  1059. * initialize part of the device struct
  1060. */
  1061. baycom_probe(dev);
  1062. }
  1063. static int __init init_baycomepp(void)
  1064. {
  1065. int i, found = 0;
  1066. char set_hw = 1;
  1067. printk(bc_drvinfo);
  1068. /*
  1069. * register net devices
  1070. */
  1071. for (i = 0; i < NR_PORTS; i++) {
  1072. struct net_device *dev;
  1073. dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
  1074. baycom_epp_dev_setup);
  1075. if (!dev) {
  1076. printk(KERN_WARNING "bce%d : out of memory\n", i);
  1077. return found ? 0 : -ENOMEM;
  1078. }
  1079. sprintf(dev->name, "bce%d", i);
  1080. dev->base_addr = iobase[i];
  1081. if (!mode[i])
  1082. set_hw = 0;
  1083. if (!set_hw)
  1084. iobase[i] = 0;
  1085. if (register_netdev(dev)) {
  1086. printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
  1087. free_netdev(dev);
  1088. break;
  1089. }
  1090. if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
  1091. set_hw = 0;
  1092. baycom_device[i] = dev;
  1093. found++;
  1094. }
  1095. return found ? 0 : -ENXIO;
  1096. }
  1097. static void __exit cleanup_baycomepp(void)
  1098. {
  1099. int i;
  1100. for(i = 0; i < NR_PORTS; i++) {
  1101. struct net_device *dev = baycom_device[i];
  1102. if (dev) {
  1103. struct baycom_state *bc = netdev_priv(dev);
  1104. if (bc->magic == BAYCOM_MAGIC) {
  1105. unregister_netdev(dev);
  1106. free_netdev(dev);
  1107. } else
  1108. printk(paranoia_str, "cleanup_module");
  1109. }
  1110. }
  1111. }
  1112. module_init(init_baycomepp);
  1113. module_exit(cleanup_baycomepp);
  1114. /* --------------------------------------------------------------------- */
  1115. #ifndef MODULE
  1116. /*
  1117. * format: baycom_epp=io,mode
  1118. * mode: fpga config options
  1119. */
  1120. static int __init baycom_epp_setup(char *str)
  1121. {
  1122. static unsigned __initdata nr_dev = 0;
  1123. int ints[2];
  1124. if (nr_dev >= NR_PORTS)
  1125. return 0;
  1126. str = get_options(str, 2, ints);
  1127. if (ints[0] < 1)
  1128. return 0;
  1129. mode[nr_dev] = str;
  1130. iobase[nr_dev] = ints[1];
  1131. nr_dev++;
  1132. return 1;
  1133. }
  1134. __setup("baycom_epp=", baycom_epp_setup);
  1135. #endif /* MODULE */
  1136. /* --------------------------------------------------------------------- */