enic_res.c 8.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370
  1. /*
  2. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/netdevice.h>
  24. #include "wq_enet_desc.h"
  25. #include "rq_enet_desc.h"
  26. #include "cq_enet_desc.h"
  27. #include "vnic_resource.h"
  28. #include "vnic_enet.h"
  29. #include "vnic_dev.h"
  30. #include "vnic_wq.h"
  31. #include "vnic_rq.h"
  32. #include "vnic_cq.h"
  33. #include "vnic_intr.h"
  34. #include "vnic_stats.h"
  35. #include "vnic_nic.h"
  36. #include "vnic_rss.h"
  37. #include "enic_res.h"
  38. #include "enic.h"
  39. int enic_get_vnic_config(struct enic *enic)
  40. {
  41. struct vnic_enet_config *c = &enic->config;
  42. int err;
  43. err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
  44. if (err) {
  45. printk(KERN_ERR PFX "Error getting MAC addr, %d\n", err);
  46. return err;
  47. }
  48. #define GET_CONFIG(m) \
  49. do { \
  50. err = vnic_dev_spec(enic->vdev, \
  51. offsetof(struct vnic_enet_config, m), \
  52. sizeof(c->m), &c->m); \
  53. if (err) { \
  54. printk(KERN_ERR PFX \
  55. "Error getting %s, %d\n", #m, err); \
  56. return err; \
  57. } \
  58. } while (0)
  59. GET_CONFIG(flags);
  60. GET_CONFIG(wq_desc_count);
  61. GET_CONFIG(rq_desc_count);
  62. GET_CONFIG(mtu);
  63. GET_CONFIG(intr_timer);
  64. GET_CONFIG(intr_timer_type);
  65. GET_CONFIG(intr_mode);
  66. c->wq_desc_count =
  67. min_t(u32, ENIC_MAX_WQ_DESCS,
  68. max_t(u32, ENIC_MIN_WQ_DESCS,
  69. c->wq_desc_count));
  70. c->wq_desc_count &= 0xfffffff0; /* must be aligned to groups of 16 */
  71. c->rq_desc_count =
  72. min_t(u32, ENIC_MAX_RQ_DESCS,
  73. max_t(u32, ENIC_MIN_RQ_DESCS,
  74. c->rq_desc_count));
  75. c->rq_desc_count &= 0xfffffff0; /* must be aligned to groups of 16 */
  76. if (c->mtu == 0)
  77. c->mtu = 1500;
  78. c->mtu = min_t(u16, ENIC_MAX_MTU,
  79. max_t(u16, ENIC_MIN_MTU,
  80. c->mtu));
  81. c->intr_timer = min_t(u16, VNIC_INTR_TIMER_MAX, c->intr_timer);
  82. printk(KERN_INFO PFX "vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x "
  83. "wq/rq %d/%d\n",
  84. enic->mac_addr[0], enic->mac_addr[1], enic->mac_addr[2],
  85. enic->mac_addr[3], enic->mac_addr[4], enic->mac_addr[5],
  86. c->wq_desc_count, c->rq_desc_count);
  87. printk(KERN_INFO PFX "vNIC mtu %d csum tx/rx %d/%d tso/lro %d/%d "
  88. "intr timer %d\n",
  89. c->mtu, ENIC_SETTING(enic, TXCSUM),
  90. ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO),
  91. ENIC_SETTING(enic, LRO), c->intr_timer);
  92. return 0;
  93. }
  94. void enic_add_station_addr(struct enic *enic)
  95. {
  96. vnic_dev_add_addr(enic->vdev, enic->mac_addr);
  97. }
  98. void enic_add_multicast_addr(struct enic *enic, u8 *addr)
  99. {
  100. vnic_dev_add_addr(enic->vdev, addr);
  101. }
  102. void enic_del_multicast_addr(struct enic *enic, u8 *addr)
  103. {
  104. vnic_dev_del_addr(enic->vdev, addr);
  105. }
  106. void enic_add_vlan(struct enic *enic, u16 vlanid)
  107. {
  108. u64 a0 = vlanid, a1 = 0;
  109. int wait = 1000;
  110. int err;
  111. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
  112. if (err)
  113. printk(KERN_ERR PFX "Can't add vlan id, %d\n", err);
  114. }
  115. void enic_del_vlan(struct enic *enic, u16 vlanid)
  116. {
  117. u64 a0 = vlanid, a1 = 0;
  118. int wait = 1000;
  119. int err;
  120. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
  121. if (err)
  122. printk(KERN_ERR PFX "Can't delete vlan id, %d\n", err);
  123. }
  124. int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
  125. u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
  126. u8 ig_vlan_strip_en)
  127. {
  128. u64 a0, a1;
  129. u32 nic_cfg;
  130. int wait = 1000;
  131. vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
  132. rss_hash_type, rss_hash_bits, rss_base_cpu,
  133. rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
  134. a0 = nic_cfg;
  135. a1 = 0;
  136. return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
  137. }
  138. void enic_free_vnic_resources(struct enic *enic)
  139. {
  140. unsigned int i;
  141. for (i = 0; i < enic->wq_count; i++)
  142. vnic_wq_free(&enic->wq[i]);
  143. for (i = 0; i < enic->rq_count; i++)
  144. vnic_rq_free(&enic->rq[i]);
  145. for (i = 0; i < enic->cq_count; i++)
  146. vnic_cq_free(&enic->cq[i]);
  147. for (i = 0; i < enic->intr_count; i++)
  148. vnic_intr_free(&enic->intr[i]);
  149. }
  150. void enic_get_res_counts(struct enic *enic)
  151. {
  152. enic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
  153. enic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
  154. enic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
  155. enic->intr_count = vnic_dev_get_res_count(enic->vdev,
  156. RES_TYPE_INTR_CTRL);
  157. printk(KERN_INFO PFX "vNIC resources avail: "
  158. "wq %d rq %d cq %d intr %d\n",
  159. enic->wq_count, enic->rq_count,
  160. enic->cq_count, enic->intr_count);
  161. }
  162. void enic_init_vnic_resources(struct enic *enic)
  163. {
  164. enum vnic_dev_intr_mode intr_mode;
  165. unsigned int mask_on_assertion;
  166. unsigned int interrupt_offset;
  167. unsigned int error_interrupt_enable;
  168. unsigned int error_interrupt_offset;
  169. unsigned int cq_index;
  170. unsigned int i;
  171. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  172. /* Init RQ/WQ resources.
  173. *
  174. * RQ[0 - n-1] point to CQ[0 - n-1]
  175. * WQ[0 - m-1] point to CQ[n - n+m-1]
  176. *
  177. * Error interrupt is not enabled for MSI.
  178. */
  179. switch (intr_mode) {
  180. case VNIC_DEV_INTR_MODE_INTX:
  181. case VNIC_DEV_INTR_MODE_MSIX:
  182. error_interrupt_enable = 1;
  183. error_interrupt_offset = enic->intr_count - 2;
  184. break;
  185. default:
  186. error_interrupt_enable = 0;
  187. error_interrupt_offset = 0;
  188. break;
  189. }
  190. for (i = 0; i < enic->rq_count; i++) {
  191. cq_index = i;
  192. vnic_rq_init(&enic->rq[i],
  193. cq_index,
  194. error_interrupt_enable,
  195. error_interrupt_offset);
  196. }
  197. for (i = 0; i < enic->wq_count; i++) {
  198. cq_index = enic->rq_count + i;
  199. vnic_wq_init(&enic->wq[i],
  200. cq_index,
  201. error_interrupt_enable,
  202. error_interrupt_offset);
  203. }
  204. /* Init CQ resources
  205. *
  206. * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
  207. * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
  208. */
  209. for (i = 0; i < enic->cq_count; i++) {
  210. switch (intr_mode) {
  211. case VNIC_DEV_INTR_MODE_MSIX:
  212. interrupt_offset = i;
  213. break;
  214. default:
  215. interrupt_offset = 0;
  216. break;
  217. }
  218. vnic_cq_init(&enic->cq[i],
  219. 0 /* flow_control_enable */,
  220. 1 /* color_enable */,
  221. 0 /* cq_head */,
  222. 0 /* cq_tail */,
  223. 1 /* cq_tail_color */,
  224. 1 /* interrupt_enable */,
  225. 1 /* cq_entry_enable */,
  226. 0 /* cq_message_enable */,
  227. interrupt_offset,
  228. 0 /* cq_message_addr */);
  229. }
  230. /* Init INTR resources
  231. *
  232. * mask_on_assertion is not used for INTx due to the level-
  233. * triggered nature of INTx
  234. */
  235. switch (intr_mode) {
  236. case VNIC_DEV_INTR_MODE_MSI:
  237. case VNIC_DEV_INTR_MODE_MSIX:
  238. mask_on_assertion = 1;
  239. break;
  240. default:
  241. mask_on_assertion = 0;
  242. break;
  243. }
  244. for (i = 0; i < enic->intr_count; i++) {
  245. vnic_intr_init(&enic->intr[i],
  246. enic->config.intr_timer,
  247. enic->config.intr_timer_type,
  248. mask_on_assertion);
  249. }
  250. /* Clear LIF stats
  251. */
  252. vnic_dev_stats_clear(enic->vdev);
  253. }
  254. int enic_alloc_vnic_resources(struct enic *enic)
  255. {
  256. enum vnic_dev_intr_mode intr_mode;
  257. unsigned int i;
  258. int err;
  259. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  260. printk(KERN_INFO PFX "vNIC resources used: "
  261. "wq %d rq %d cq %d intr %d intr mode %s\n",
  262. enic->wq_count, enic->rq_count,
  263. enic->cq_count, enic->intr_count,
  264. intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
  265. intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
  266. intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
  267. "unknown"
  268. );
  269. /* Allocate queue resources
  270. */
  271. for (i = 0; i < enic->wq_count; i++) {
  272. err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
  273. enic->config.wq_desc_count,
  274. sizeof(struct wq_enet_desc));
  275. if (err)
  276. goto err_out_cleanup;
  277. }
  278. for (i = 0; i < enic->rq_count; i++) {
  279. err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
  280. enic->config.rq_desc_count,
  281. sizeof(struct rq_enet_desc));
  282. if (err)
  283. goto err_out_cleanup;
  284. }
  285. for (i = 0; i < enic->cq_count; i++) {
  286. if (i < enic->rq_count)
  287. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  288. enic->config.rq_desc_count,
  289. sizeof(struct cq_enet_rq_desc));
  290. else
  291. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  292. enic->config.wq_desc_count,
  293. sizeof(struct cq_enet_wq_desc));
  294. if (err)
  295. goto err_out_cleanup;
  296. }
  297. for (i = 0; i < enic->intr_count; i++) {
  298. err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
  299. if (err)
  300. goto err_out_cleanup;
  301. }
  302. /* Hook remaining resource
  303. */
  304. enic->legacy_pba = vnic_dev_get_res(enic->vdev,
  305. RES_TYPE_INTR_PBA_LEGACY, 0);
  306. if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
  307. printk(KERN_ERR PFX "Failed to hook legacy pba resource\n");
  308. err = -ENODEV;
  309. goto err_out_cleanup;
  310. }
  311. return 0;
  312. err_out_cleanup:
  313. enic_free_vnic_resources(enic);
  314. return err;
  315. }