mmu.c 67 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886
  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "mmu.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. static int oos_shadow = 1;
  60. module_param(oos_shadow, bool, 0644);
  61. #ifndef MMU_DEBUG
  62. #define ASSERT(x) do { } while (0)
  63. #else
  64. #define ASSERT(x) \
  65. if (!(x)) { \
  66. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  67. __FILE__, __LINE__, #x); \
  68. }
  69. #endif
  70. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  71. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  72. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  73. #define PT64_LEVEL_BITS 9
  74. #define PT64_LEVEL_SHIFT(level) \
  75. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  76. #define PT64_LEVEL_MASK(level) \
  77. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  78. #define PT64_INDEX(address, level)\
  79. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  80. #define PT32_LEVEL_BITS 10
  81. #define PT32_LEVEL_SHIFT(level) \
  82. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  83. #define PT32_LEVEL_MASK(level) \
  84. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  85. #define PT32_INDEX(address, level)\
  86. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  87. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  88. #define PT64_DIR_BASE_ADDR_MASK \
  89. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  90. #define PT32_BASE_ADDR_MASK PAGE_MASK
  91. #define PT32_DIR_BASE_ADDR_MASK \
  92. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  93. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  94. | PT64_NX_MASK)
  95. #define PFERR_PRESENT_MASK (1U << 0)
  96. #define PFERR_WRITE_MASK (1U << 1)
  97. #define PFERR_USER_MASK (1U << 2)
  98. #define PFERR_FETCH_MASK (1U << 4)
  99. #define PT_DIRECTORY_LEVEL 2
  100. #define PT_PAGE_TABLE_LEVEL 1
  101. #define RMAP_EXT 4
  102. #define ACC_EXEC_MASK 1
  103. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  104. #define ACC_USER_MASK PT_USER_MASK
  105. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  106. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  107. struct kvm_rmap_desc {
  108. u64 *shadow_ptes[RMAP_EXT];
  109. struct kvm_rmap_desc *more;
  110. };
  111. struct kvm_shadow_walk {
  112. int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
  113. u64 addr, u64 *spte, int level);
  114. };
  115. struct kvm_unsync_walk {
  116. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  117. };
  118. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  119. static struct kmem_cache *pte_chain_cache;
  120. static struct kmem_cache *rmap_desc_cache;
  121. static struct kmem_cache *mmu_page_header_cache;
  122. static u64 __read_mostly shadow_trap_nonpresent_pte;
  123. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  124. static u64 __read_mostly shadow_base_present_pte;
  125. static u64 __read_mostly shadow_nx_mask;
  126. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  127. static u64 __read_mostly shadow_user_mask;
  128. static u64 __read_mostly shadow_accessed_mask;
  129. static u64 __read_mostly shadow_dirty_mask;
  130. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  131. {
  132. shadow_trap_nonpresent_pte = trap_pte;
  133. shadow_notrap_nonpresent_pte = notrap_pte;
  134. }
  135. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  136. void kvm_mmu_set_base_ptes(u64 base_pte)
  137. {
  138. shadow_base_present_pte = base_pte;
  139. }
  140. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  141. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  142. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  143. {
  144. shadow_user_mask = user_mask;
  145. shadow_accessed_mask = accessed_mask;
  146. shadow_dirty_mask = dirty_mask;
  147. shadow_nx_mask = nx_mask;
  148. shadow_x_mask = x_mask;
  149. }
  150. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  151. static int is_write_protection(struct kvm_vcpu *vcpu)
  152. {
  153. return vcpu->arch.cr0 & X86_CR0_WP;
  154. }
  155. static int is_cpuid_PSE36(void)
  156. {
  157. return 1;
  158. }
  159. static int is_nx(struct kvm_vcpu *vcpu)
  160. {
  161. return vcpu->arch.shadow_efer & EFER_NX;
  162. }
  163. static int is_present_pte(unsigned long pte)
  164. {
  165. return pte & PT_PRESENT_MASK;
  166. }
  167. static int is_shadow_present_pte(u64 pte)
  168. {
  169. return pte != shadow_trap_nonpresent_pte
  170. && pte != shadow_notrap_nonpresent_pte;
  171. }
  172. static int is_large_pte(u64 pte)
  173. {
  174. return pte & PT_PAGE_SIZE_MASK;
  175. }
  176. static int is_writeble_pte(unsigned long pte)
  177. {
  178. return pte & PT_WRITABLE_MASK;
  179. }
  180. static int is_dirty_pte(unsigned long pte)
  181. {
  182. return pte & shadow_dirty_mask;
  183. }
  184. static int is_rmap_pte(u64 pte)
  185. {
  186. return is_shadow_present_pte(pte);
  187. }
  188. static pfn_t spte_to_pfn(u64 pte)
  189. {
  190. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  191. }
  192. static gfn_t pse36_gfn_delta(u32 gpte)
  193. {
  194. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  195. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  196. }
  197. static void set_shadow_pte(u64 *sptep, u64 spte)
  198. {
  199. #ifdef CONFIG_X86_64
  200. set_64bit((unsigned long *)sptep, spte);
  201. #else
  202. set_64bit((unsigned long long *)sptep, spte);
  203. #endif
  204. }
  205. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  206. struct kmem_cache *base_cache, int min)
  207. {
  208. void *obj;
  209. if (cache->nobjs >= min)
  210. return 0;
  211. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  212. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  213. if (!obj)
  214. return -ENOMEM;
  215. cache->objects[cache->nobjs++] = obj;
  216. }
  217. return 0;
  218. }
  219. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  220. {
  221. while (mc->nobjs)
  222. kfree(mc->objects[--mc->nobjs]);
  223. }
  224. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  225. int min)
  226. {
  227. struct page *page;
  228. if (cache->nobjs >= min)
  229. return 0;
  230. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  231. page = alloc_page(GFP_KERNEL);
  232. if (!page)
  233. return -ENOMEM;
  234. set_page_private(page, 0);
  235. cache->objects[cache->nobjs++] = page_address(page);
  236. }
  237. return 0;
  238. }
  239. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  240. {
  241. while (mc->nobjs)
  242. free_page((unsigned long)mc->objects[--mc->nobjs]);
  243. }
  244. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  245. {
  246. int r;
  247. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  248. pte_chain_cache, 4);
  249. if (r)
  250. goto out;
  251. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  252. rmap_desc_cache, 4);
  253. if (r)
  254. goto out;
  255. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  256. if (r)
  257. goto out;
  258. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  259. mmu_page_header_cache, 4);
  260. out:
  261. return r;
  262. }
  263. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  264. {
  265. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  266. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  267. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  268. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  269. }
  270. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  271. size_t size)
  272. {
  273. void *p;
  274. BUG_ON(!mc->nobjs);
  275. p = mc->objects[--mc->nobjs];
  276. memset(p, 0, size);
  277. return p;
  278. }
  279. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  280. {
  281. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  282. sizeof(struct kvm_pte_chain));
  283. }
  284. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  285. {
  286. kfree(pc);
  287. }
  288. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  289. {
  290. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  291. sizeof(struct kvm_rmap_desc));
  292. }
  293. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  294. {
  295. kfree(rd);
  296. }
  297. /*
  298. * Return the pointer to the largepage write count for a given
  299. * gfn, handling slots that are not large page aligned.
  300. */
  301. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  302. {
  303. unsigned long idx;
  304. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  305. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  306. return &slot->lpage_info[idx].write_count;
  307. }
  308. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  309. {
  310. int *write_count;
  311. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  312. *write_count += 1;
  313. }
  314. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  315. {
  316. int *write_count;
  317. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  318. *write_count -= 1;
  319. WARN_ON(*write_count < 0);
  320. }
  321. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  322. {
  323. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  324. int *largepage_idx;
  325. if (slot) {
  326. largepage_idx = slot_largepage_idx(gfn, slot);
  327. return *largepage_idx;
  328. }
  329. return 1;
  330. }
  331. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  332. {
  333. struct vm_area_struct *vma;
  334. unsigned long addr;
  335. int ret = 0;
  336. addr = gfn_to_hva(kvm, gfn);
  337. if (kvm_is_error_hva(addr))
  338. return ret;
  339. down_read(&current->mm->mmap_sem);
  340. vma = find_vma(current->mm, addr);
  341. if (vma && is_vm_hugetlb_page(vma))
  342. ret = 1;
  343. up_read(&current->mm->mmap_sem);
  344. return ret;
  345. }
  346. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  347. {
  348. struct kvm_memory_slot *slot;
  349. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  350. return 0;
  351. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  352. return 0;
  353. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  354. if (slot && slot->dirty_bitmap)
  355. return 0;
  356. return 1;
  357. }
  358. /*
  359. * Take gfn and return the reverse mapping to it.
  360. * Note: gfn must be unaliased before this function get called
  361. */
  362. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  363. {
  364. struct kvm_memory_slot *slot;
  365. unsigned long idx;
  366. slot = gfn_to_memslot(kvm, gfn);
  367. if (!lpage)
  368. return &slot->rmap[gfn - slot->base_gfn];
  369. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  370. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  371. return &slot->lpage_info[idx].rmap_pde;
  372. }
  373. /*
  374. * Reverse mapping data structures:
  375. *
  376. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  377. * that points to page_address(page).
  378. *
  379. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  380. * containing more mappings.
  381. */
  382. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  383. {
  384. struct kvm_mmu_page *sp;
  385. struct kvm_rmap_desc *desc;
  386. unsigned long *rmapp;
  387. int i;
  388. if (!is_rmap_pte(*spte))
  389. return;
  390. gfn = unalias_gfn(vcpu->kvm, gfn);
  391. sp = page_header(__pa(spte));
  392. sp->gfns[spte - sp->spt] = gfn;
  393. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  394. if (!*rmapp) {
  395. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  396. *rmapp = (unsigned long)spte;
  397. } else if (!(*rmapp & 1)) {
  398. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  399. desc = mmu_alloc_rmap_desc(vcpu);
  400. desc->shadow_ptes[0] = (u64 *)*rmapp;
  401. desc->shadow_ptes[1] = spte;
  402. *rmapp = (unsigned long)desc | 1;
  403. } else {
  404. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  405. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  406. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  407. desc = desc->more;
  408. if (desc->shadow_ptes[RMAP_EXT-1]) {
  409. desc->more = mmu_alloc_rmap_desc(vcpu);
  410. desc = desc->more;
  411. }
  412. for (i = 0; desc->shadow_ptes[i]; ++i)
  413. ;
  414. desc->shadow_ptes[i] = spte;
  415. }
  416. }
  417. static void rmap_desc_remove_entry(unsigned long *rmapp,
  418. struct kvm_rmap_desc *desc,
  419. int i,
  420. struct kvm_rmap_desc *prev_desc)
  421. {
  422. int j;
  423. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  424. ;
  425. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  426. desc->shadow_ptes[j] = NULL;
  427. if (j != 0)
  428. return;
  429. if (!prev_desc && !desc->more)
  430. *rmapp = (unsigned long)desc->shadow_ptes[0];
  431. else
  432. if (prev_desc)
  433. prev_desc->more = desc->more;
  434. else
  435. *rmapp = (unsigned long)desc->more | 1;
  436. mmu_free_rmap_desc(desc);
  437. }
  438. static void rmap_remove(struct kvm *kvm, u64 *spte)
  439. {
  440. struct kvm_rmap_desc *desc;
  441. struct kvm_rmap_desc *prev_desc;
  442. struct kvm_mmu_page *sp;
  443. pfn_t pfn;
  444. unsigned long *rmapp;
  445. int i;
  446. if (!is_rmap_pte(*spte))
  447. return;
  448. sp = page_header(__pa(spte));
  449. pfn = spte_to_pfn(*spte);
  450. if (*spte & shadow_accessed_mask)
  451. kvm_set_pfn_accessed(pfn);
  452. if (is_writeble_pte(*spte))
  453. kvm_release_pfn_dirty(pfn);
  454. else
  455. kvm_release_pfn_clean(pfn);
  456. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  457. if (!*rmapp) {
  458. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  459. BUG();
  460. } else if (!(*rmapp & 1)) {
  461. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  462. if ((u64 *)*rmapp != spte) {
  463. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  464. spte, *spte);
  465. BUG();
  466. }
  467. *rmapp = 0;
  468. } else {
  469. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  470. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  471. prev_desc = NULL;
  472. while (desc) {
  473. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  474. if (desc->shadow_ptes[i] == spte) {
  475. rmap_desc_remove_entry(rmapp,
  476. desc, i,
  477. prev_desc);
  478. return;
  479. }
  480. prev_desc = desc;
  481. desc = desc->more;
  482. }
  483. BUG();
  484. }
  485. }
  486. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  487. {
  488. struct kvm_rmap_desc *desc;
  489. struct kvm_rmap_desc *prev_desc;
  490. u64 *prev_spte;
  491. int i;
  492. if (!*rmapp)
  493. return NULL;
  494. else if (!(*rmapp & 1)) {
  495. if (!spte)
  496. return (u64 *)*rmapp;
  497. return NULL;
  498. }
  499. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  500. prev_desc = NULL;
  501. prev_spte = NULL;
  502. while (desc) {
  503. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  504. if (prev_spte == spte)
  505. return desc->shadow_ptes[i];
  506. prev_spte = desc->shadow_ptes[i];
  507. }
  508. desc = desc->more;
  509. }
  510. return NULL;
  511. }
  512. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  513. {
  514. unsigned long *rmapp;
  515. u64 *spte;
  516. int write_protected = 0;
  517. gfn = unalias_gfn(kvm, gfn);
  518. rmapp = gfn_to_rmap(kvm, gfn, 0);
  519. spte = rmap_next(kvm, rmapp, NULL);
  520. while (spte) {
  521. BUG_ON(!spte);
  522. BUG_ON(!(*spte & PT_PRESENT_MASK));
  523. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  524. if (is_writeble_pte(*spte)) {
  525. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  526. write_protected = 1;
  527. }
  528. spte = rmap_next(kvm, rmapp, spte);
  529. }
  530. if (write_protected) {
  531. pfn_t pfn;
  532. spte = rmap_next(kvm, rmapp, NULL);
  533. pfn = spte_to_pfn(*spte);
  534. kvm_set_pfn_dirty(pfn);
  535. }
  536. /* check for huge page mappings */
  537. rmapp = gfn_to_rmap(kvm, gfn, 1);
  538. spte = rmap_next(kvm, rmapp, NULL);
  539. while (spte) {
  540. BUG_ON(!spte);
  541. BUG_ON(!(*spte & PT_PRESENT_MASK));
  542. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  543. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  544. if (is_writeble_pte(*spte)) {
  545. rmap_remove(kvm, spte);
  546. --kvm->stat.lpages;
  547. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  548. spte = NULL;
  549. write_protected = 1;
  550. }
  551. spte = rmap_next(kvm, rmapp, spte);
  552. }
  553. if (write_protected)
  554. kvm_flush_remote_tlbs(kvm);
  555. }
  556. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  557. {
  558. u64 *spte;
  559. int need_tlb_flush = 0;
  560. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  561. BUG_ON(!(*spte & PT_PRESENT_MASK));
  562. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  563. rmap_remove(kvm, spte);
  564. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  565. need_tlb_flush = 1;
  566. }
  567. return need_tlb_flush;
  568. }
  569. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  570. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  571. {
  572. int i;
  573. int retval = 0;
  574. /*
  575. * If mmap_sem isn't taken, we can look the memslots with only
  576. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  577. */
  578. for (i = 0; i < kvm->nmemslots; i++) {
  579. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  580. unsigned long start = memslot->userspace_addr;
  581. unsigned long end;
  582. /* mmu_lock protects userspace_addr */
  583. if (!start)
  584. continue;
  585. end = start + (memslot->npages << PAGE_SHIFT);
  586. if (hva >= start && hva < end) {
  587. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  588. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  589. retval |= handler(kvm,
  590. &memslot->lpage_info[
  591. gfn_offset /
  592. KVM_PAGES_PER_HPAGE].rmap_pde);
  593. }
  594. }
  595. return retval;
  596. }
  597. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  598. {
  599. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  600. }
  601. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  602. {
  603. u64 *spte;
  604. int young = 0;
  605. /* always return old for EPT */
  606. if (!shadow_accessed_mask)
  607. return 0;
  608. spte = rmap_next(kvm, rmapp, NULL);
  609. while (spte) {
  610. int _young;
  611. u64 _spte = *spte;
  612. BUG_ON(!(_spte & PT_PRESENT_MASK));
  613. _young = _spte & PT_ACCESSED_MASK;
  614. if (_young) {
  615. young = 1;
  616. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  617. }
  618. spte = rmap_next(kvm, rmapp, spte);
  619. }
  620. return young;
  621. }
  622. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  623. {
  624. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  625. }
  626. #ifdef MMU_DEBUG
  627. static int is_empty_shadow_page(u64 *spt)
  628. {
  629. u64 *pos;
  630. u64 *end;
  631. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  632. if (is_shadow_present_pte(*pos)) {
  633. printk(KERN_ERR "%s: %p %llx\n", __func__,
  634. pos, *pos);
  635. return 0;
  636. }
  637. return 1;
  638. }
  639. #endif
  640. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  641. {
  642. ASSERT(is_empty_shadow_page(sp->spt));
  643. list_del(&sp->link);
  644. __free_page(virt_to_page(sp->spt));
  645. __free_page(virt_to_page(sp->gfns));
  646. kfree(sp);
  647. ++kvm->arch.n_free_mmu_pages;
  648. }
  649. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  650. {
  651. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  652. }
  653. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  654. u64 *parent_pte)
  655. {
  656. struct kvm_mmu_page *sp;
  657. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  658. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  659. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  660. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  661. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  662. ASSERT(is_empty_shadow_page(sp->spt));
  663. sp->slot_bitmap = 0;
  664. sp->multimapped = 0;
  665. sp->parent_pte = parent_pte;
  666. --vcpu->kvm->arch.n_free_mmu_pages;
  667. return sp;
  668. }
  669. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  670. struct kvm_mmu_page *sp, u64 *parent_pte)
  671. {
  672. struct kvm_pte_chain *pte_chain;
  673. struct hlist_node *node;
  674. int i;
  675. if (!parent_pte)
  676. return;
  677. if (!sp->multimapped) {
  678. u64 *old = sp->parent_pte;
  679. if (!old) {
  680. sp->parent_pte = parent_pte;
  681. return;
  682. }
  683. sp->multimapped = 1;
  684. pte_chain = mmu_alloc_pte_chain(vcpu);
  685. INIT_HLIST_HEAD(&sp->parent_ptes);
  686. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  687. pte_chain->parent_ptes[0] = old;
  688. }
  689. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  690. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  691. continue;
  692. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  693. if (!pte_chain->parent_ptes[i]) {
  694. pte_chain->parent_ptes[i] = parent_pte;
  695. return;
  696. }
  697. }
  698. pte_chain = mmu_alloc_pte_chain(vcpu);
  699. BUG_ON(!pte_chain);
  700. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  701. pte_chain->parent_ptes[0] = parent_pte;
  702. }
  703. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  704. u64 *parent_pte)
  705. {
  706. struct kvm_pte_chain *pte_chain;
  707. struct hlist_node *node;
  708. int i;
  709. if (!sp->multimapped) {
  710. BUG_ON(sp->parent_pte != parent_pte);
  711. sp->parent_pte = NULL;
  712. return;
  713. }
  714. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  715. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  716. if (!pte_chain->parent_ptes[i])
  717. break;
  718. if (pte_chain->parent_ptes[i] != parent_pte)
  719. continue;
  720. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  721. && pte_chain->parent_ptes[i + 1]) {
  722. pte_chain->parent_ptes[i]
  723. = pte_chain->parent_ptes[i + 1];
  724. ++i;
  725. }
  726. pte_chain->parent_ptes[i] = NULL;
  727. if (i == 0) {
  728. hlist_del(&pte_chain->link);
  729. mmu_free_pte_chain(pte_chain);
  730. if (hlist_empty(&sp->parent_ptes)) {
  731. sp->multimapped = 0;
  732. sp->parent_pte = NULL;
  733. }
  734. }
  735. return;
  736. }
  737. BUG();
  738. }
  739. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  740. mmu_parent_walk_fn fn)
  741. {
  742. struct kvm_pte_chain *pte_chain;
  743. struct hlist_node *node;
  744. struct kvm_mmu_page *parent_sp;
  745. int i;
  746. if (!sp->multimapped && sp->parent_pte) {
  747. parent_sp = page_header(__pa(sp->parent_pte));
  748. fn(vcpu, parent_sp);
  749. mmu_parent_walk(vcpu, parent_sp, fn);
  750. return;
  751. }
  752. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  753. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  754. if (!pte_chain->parent_ptes[i])
  755. break;
  756. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  757. fn(vcpu, parent_sp);
  758. mmu_parent_walk(vcpu, parent_sp, fn);
  759. }
  760. }
  761. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  762. {
  763. unsigned int index;
  764. struct kvm_mmu_page *sp = page_header(__pa(spte));
  765. index = spte - sp->spt;
  766. __set_bit(index, sp->unsync_child_bitmap);
  767. sp->unsync_children = 1;
  768. }
  769. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  770. {
  771. struct kvm_pte_chain *pte_chain;
  772. struct hlist_node *node;
  773. int i;
  774. if (!sp->parent_pte)
  775. return;
  776. if (!sp->multimapped) {
  777. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  778. return;
  779. }
  780. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  781. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  782. if (!pte_chain->parent_ptes[i])
  783. break;
  784. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  785. }
  786. }
  787. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  788. {
  789. sp->unsync_children = 1;
  790. kvm_mmu_update_parents_unsync(sp);
  791. return 1;
  792. }
  793. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  794. struct kvm_mmu_page *sp)
  795. {
  796. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  797. kvm_mmu_update_parents_unsync(sp);
  798. }
  799. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  800. struct kvm_mmu_page *sp)
  801. {
  802. int i;
  803. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  804. sp->spt[i] = shadow_trap_nonpresent_pte;
  805. }
  806. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  807. struct kvm_mmu_page *sp)
  808. {
  809. return 1;
  810. }
  811. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  812. {
  813. }
  814. #define for_each_unsync_children(bitmap, idx) \
  815. for (idx = find_first_bit(bitmap, 512); \
  816. idx < 512; \
  817. idx = find_next_bit(bitmap, 512, idx+1))
  818. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  819. struct kvm_unsync_walk *walker)
  820. {
  821. int i, ret;
  822. if (!sp->unsync_children)
  823. return 0;
  824. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  825. u64 ent = sp->spt[i];
  826. if (is_shadow_present_pte(ent)) {
  827. struct kvm_mmu_page *child;
  828. child = page_header(ent & PT64_BASE_ADDR_MASK);
  829. if (child->unsync_children) {
  830. ret = mmu_unsync_walk(child, walker);
  831. if (ret)
  832. return ret;
  833. __clear_bit(i, sp->unsync_child_bitmap);
  834. }
  835. if (child->unsync) {
  836. ret = walker->entry(child, walker);
  837. __clear_bit(i, sp->unsync_child_bitmap);
  838. if (ret)
  839. return ret;
  840. }
  841. }
  842. }
  843. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  844. sp->unsync_children = 0;
  845. return 0;
  846. }
  847. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  848. {
  849. unsigned index;
  850. struct hlist_head *bucket;
  851. struct kvm_mmu_page *sp;
  852. struct hlist_node *node;
  853. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  854. index = kvm_page_table_hashfn(gfn);
  855. bucket = &kvm->arch.mmu_page_hash[index];
  856. hlist_for_each_entry(sp, node, bucket, hash_link)
  857. if (sp->gfn == gfn && !sp->role.metaphysical
  858. && !sp->role.invalid) {
  859. pgprintk("%s: found role %x\n",
  860. __func__, sp->role.word);
  861. return sp;
  862. }
  863. return NULL;
  864. }
  865. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  866. {
  867. WARN_ON(!sp->unsync);
  868. sp->unsync = 0;
  869. --kvm->stat.mmu_unsync;
  870. }
  871. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  872. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  873. {
  874. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  875. kvm_mmu_zap_page(vcpu->kvm, sp);
  876. return 1;
  877. }
  878. rmap_write_protect(vcpu->kvm, sp->gfn);
  879. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  880. kvm_mmu_zap_page(vcpu->kvm, sp);
  881. return 1;
  882. }
  883. kvm_mmu_flush_tlb(vcpu);
  884. kvm_unlink_unsync_page(vcpu->kvm, sp);
  885. return 0;
  886. }
  887. struct sync_walker {
  888. struct kvm_vcpu *vcpu;
  889. struct kvm_unsync_walk walker;
  890. };
  891. static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
  892. {
  893. struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
  894. walker);
  895. struct kvm_vcpu *vcpu = sync_walk->vcpu;
  896. kvm_sync_page(vcpu, sp);
  897. return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
  898. }
  899. static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  900. {
  901. struct sync_walker walker = {
  902. .walker = { .entry = mmu_sync_fn, },
  903. .vcpu = vcpu,
  904. };
  905. while (mmu_unsync_walk(sp, &walker.walker))
  906. cond_resched_lock(&vcpu->kvm->mmu_lock);
  907. }
  908. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  909. gfn_t gfn,
  910. gva_t gaddr,
  911. unsigned level,
  912. int metaphysical,
  913. unsigned access,
  914. u64 *parent_pte)
  915. {
  916. union kvm_mmu_page_role role;
  917. unsigned index;
  918. unsigned quadrant;
  919. struct hlist_head *bucket;
  920. struct kvm_mmu_page *sp;
  921. struct hlist_node *node, *tmp;
  922. role.word = 0;
  923. role.glevels = vcpu->arch.mmu.root_level;
  924. role.level = level;
  925. role.metaphysical = metaphysical;
  926. role.access = access;
  927. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  928. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  929. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  930. role.quadrant = quadrant;
  931. }
  932. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  933. gfn, role.word);
  934. index = kvm_page_table_hashfn(gfn);
  935. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  936. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  937. if (sp->gfn == gfn) {
  938. if (sp->unsync)
  939. if (kvm_sync_page(vcpu, sp))
  940. continue;
  941. if (sp->role.word != role.word)
  942. continue;
  943. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  944. if (sp->unsync_children) {
  945. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  946. kvm_mmu_mark_parents_unsync(vcpu, sp);
  947. }
  948. pgprintk("%s: found\n", __func__);
  949. return sp;
  950. }
  951. ++vcpu->kvm->stat.mmu_cache_miss;
  952. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  953. if (!sp)
  954. return sp;
  955. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  956. sp->gfn = gfn;
  957. sp->role = role;
  958. hlist_add_head(&sp->hash_link, bucket);
  959. if (!metaphysical) {
  960. rmap_write_protect(vcpu->kvm, gfn);
  961. account_shadowed(vcpu->kvm, gfn);
  962. }
  963. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  964. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  965. else
  966. nonpaging_prefetch_page(vcpu, sp);
  967. return sp;
  968. }
  969. static int walk_shadow(struct kvm_shadow_walk *walker,
  970. struct kvm_vcpu *vcpu, u64 addr)
  971. {
  972. hpa_t shadow_addr;
  973. int level;
  974. int r;
  975. u64 *sptep;
  976. unsigned index;
  977. shadow_addr = vcpu->arch.mmu.root_hpa;
  978. level = vcpu->arch.mmu.shadow_root_level;
  979. if (level == PT32E_ROOT_LEVEL) {
  980. shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  981. shadow_addr &= PT64_BASE_ADDR_MASK;
  982. --level;
  983. }
  984. while (level >= PT_PAGE_TABLE_LEVEL) {
  985. index = SHADOW_PT_INDEX(addr, level);
  986. sptep = ((u64 *)__va(shadow_addr)) + index;
  987. r = walker->entry(walker, vcpu, addr, sptep, level);
  988. if (r)
  989. return r;
  990. shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
  991. --level;
  992. }
  993. return 0;
  994. }
  995. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  996. struct kvm_mmu_page *sp)
  997. {
  998. unsigned i;
  999. u64 *pt;
  1000. u64 ent;
  1001. pt = sp->spt;
  1002. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1003. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1004. if (is_shadow_present_pte(pt[i]))
  1005. rmap_remove(kvm, &pt[i]);
  1006. pt[i] = shadow_trap_nonpresent_pte;
  1007. }
  1008. return;
  1009. }
  1010. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1011. ent = pt[i];
  1012. if (is_shadow_present_pte(ent)) {
  1013. if (!is_large_pte(ent)) {
  1014. ent &= PT64_BASE_ADDR_MASK;
  1015. mmu_page_remove_parent_pte(page_header(ent),
  1016. &pt[i]);
  1017. } else {
  1018. --kvm->stat.lpages;
  1019. rmap_remove(kvm, &pt[i]);
  1020. }
  1021. }
  1022. pt[i] = shadow_trap_nonpresent_pte;
  1023. }
  1024. }
  1025. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1026. {
  1027. mmu_page_remove_parent_pte(sp, parent_pte);
  1028. }
  1029. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1030. {
  1031. int i;
  1032. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  1033. if (kvm->vcpus[i])
  1034. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  1035. }
  1036. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1037. {
  1038. u64 *parent_pte;
  1039. while (sp->multimapped || sp->parent_pte) {
  1040. if (!sp->multimapped)
  1041. parent_pte = sp->parent_pte;
  1042. else {
  1043. struct kvm_pte_chain *chain;
  1044. chain = container_of(sp->parent_ptes.first,
  1045. struct kvm_pte_chain, link);
  1046. parent_pte = chain->parent_ptes[0];
  1047. }
  1048. BUG_ON(!parent_pte);
  1049. kvm_mmu_put_page(sp, parent_pte);
  1050. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1051. }
  1052. }
  1053. struct zap_walker {
  1054. struct kvm_unsync_walk walker;
  1055. struct kvm *kvm;
  1056. int zapped;
  1057. };
  1058. static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
  1059. {
  1060. struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
  1061. walker);
  1062. kvm_mmu_zap_page(zap_walk->kvm, sp);
  1063. zap_walk->zapped = 1;
  1064. return 0;
  1065. }
  1066. static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
  1067. {
  1068. struct zap_walker walker = {
  1069. .walker = { .entry = mmu_zap_fn, },
  1070. .kvm = kvm,
  1071. .zapped = 0,
  1072. };
  1073. if (sp->role.level == PT_PAGE_TABLE_LEVEL)
  1074. return 0;
  1075. mmu_unsync_walk(sp, &walker.walker);
  1076. return walker.zapped;
  1077. }
  1078. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1079. {
  1080. int ret;
  1081. ++kvm->stat.mmu_shadow_zapped;
  1082. ret = mmu_zap_unsync_children(kvm, sp);
  1083. kvm_mmu_page_unlink_children(kvm, sp);
  1084. kvm_mmu_unlink_parents(kvm, sp);
  1085. kvm_flush_remote_tlbs(kvm);
  1086. if (!sp->role.invalid && !sp->role.metaphysical)
  1087. unaccount_shadowed(kvm, sp->gfn);
  1088. if (sp->unsync)
  1089. kvm_unlink_unsync_page(kvm, sp);
  1090. if (!sp->root_count) {
  1091. hlist_del(&sp->hash_link);
  1092. kvm_mmu_free_page(kvm, sp);
  1093. } else {
  1094. sp->role.invalid = 1;
  1095. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1096. kvm_reload_remote_mmus(kvm);
  1097. }
  1098. kvm_mmu_reset_last_pte_updated(kvm);
  1099. return ret;
  1100. }
  1101. /*
  1102. * Changing the number of mmu pages allocated to the vm
  1103. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1104. */
  1105. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1106. {
  1107. /*
  1108. * If we set the number of mmu pages to be smaller be than the
  1109. * number of actived pages , we must to free some mmu pages before we
  1110. * change the value
  1111. */
  1112. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  1113. kvm_nr_mmu_pages) {
  1114. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  1115. - kvm->arch.n_free_mmu_pages;
  1116. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  1117. struct kvm_mmu_page *page;
  1118. page = container_of(kvm->arch.active_mmu_pages.prev,
  1119. struct kvm_mmu_page, link);
  1120. kvm_mmu_zap_page(kvm, page);
  1121. n_used_mmu_pages--;
  1122. }
  1123. kvm->arch.n_free_mmu_pages = 0;
  1124. }
  1125. else
  1126. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1127. - kvm->arch.n_alloc_mmu_pages;
  1128. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1129. }
  1130. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1131. {
  1132. unsigned index;
  1133. struct hlist_head *bucket;
  1134. struct kvm_mmu_page *sp;
  1135. struct hlist_node *node, *n;
  1136. int r;
  1137. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1138. r = 0;
  1139. index = kvm_page_table_hashfn(gfn);
  1140. bucket = &kvm->arch.mmu_page_hash[index];
  1141. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1142. if (sp->gfn == gfn && !sp->role.metaphysical) {
  1143. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1144. sp->role.word);
  1145. r = 1;
  1146. if (kvm_mmu_zap_page(kvm, sp))
  1147. n = bucket->first;
  1148. }
  1149. return r;
  1150. }
  1151. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1152. {
  1153. struct kvm_mmu_page *sp;
  1154. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  1155. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  1156. kvm_mmu_zap_page(kvm, sp);
  1157. }
  1158. }
  1159. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1160. {
  1161. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1162. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1163. __set_bit(slot, &sp->slot_bitmap);
  1164. }
  1165. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1166. {
  1167. int i;
  1168. u64 *pt = sp->spt;
  1169. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1170. return;
  1171. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1172. if (pt[i] == shadow_notrap_nonpresent_pte)
  1173. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1174. }
  1175. }
  1176. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1177. {
  1178. struct page *page;
  1179. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1180. if (gpa == UNMAPPED_GVA)
  1181. return NULL;
  1182. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1183. return page;
  1184. }
  1185. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1186. {
  1187. unsigned index;
  1188. struct hlist_head *bucket;
  1189. struct kvm_mmu_page *s;
  1190. struct hlist_node *node, *n;
  1191. index = kvm_page_table_hashfn(sp->gfn);
  1192. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1193. /* don't unsync if pagetable is shadowed with multiple roles */
  1194. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1195. if (s->gfn != sp->gfn || s->role.metaphysical)
  1196. continue;
  1197. if (s->role.word != sp->role.word)
  1198. return 1;
  1199. }
  1200. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1201. ++vcpu->kvm->stat.mmu_unsync;
  1202. sp->unsync = 1;
  1203. mmu_convert_notrap(sp);
  1204. return 0;
  1205. }
  1206. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1207. bool can_unsync)
  1208. {
  1209. struct kvm_mmu_page *shadow;
  1210. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1211. if (shadow) {
  1212. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1213. return 1;
  1214. if (shadow->unsync)
  1215. return 0;
  1216. if (can_unsync && oos_shadow)
  1217. return kvm_unsync_page(vcpu, shadow);
  1218. return 1;
  1219. }
  1220. return 0;
  1221. }
  1222. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1223. unsigned pte_access, int user_fault,
  1224. int write_fault, int dirty, int largepage,
  1225. gfn_t gfn, pfn_t pfn, bool speculative,
  1226. bool can_unsync)
  1227. {
  1228. u64 spte;
  1229. int ret = 0;
  1230. /*
  1231. * We don't set the accessed bit, since we sometimes want to see
  1232. * whether the guest actually used the pte (in order to detect
  1233. * demand paging).
  1234. */
  1235. spte = shadow_base_present_pte | shadow_dirty_mask;
  1236. if (!speculative)
  1237. spte |= shadow_accessed_mask;
  1238. if (!dirty)
  1239. pte_access &= ~ACC_WRITE_MASK;
  1240. if (pte_access & ACC_EXEC_MASK)
  1241. spte |= shadow_x_mask;
  1242. else
  1243. spte |= shadow_nx_mask;
  1244. if (pte_access & ACC_USER_MASK)
  1245. spte |= shadow_user_mask;
  1246. if (largepage)
  1247. spte |= PT_PAGE_SIZE_MASK;
  1248. spte |= (u64)pfn << PAGE_SHIFT;
  1249. if ((pte_access & ACC_WRITE_MASK)
  1250. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1251. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1252. ret = 1;
  1253. spte = shadow_trap_nonpresent_pte;
  1254. goto set_pte;
  1255. }
  1256. spte |= PT_WRITABLE_MASK;
  1257. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1258. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1259. __func__, gfn);
  1260. ret = 1;
  1261. pte_access &= ~ACC_WRITE_MASK;
  1262. if (is_writeble_pte(spte))
  1263. spte &= ~PT_WRITABLE_MASK;
  1264. }
  1265. }
  1266. if (pte_access & ACC_WRITE_MASK)
  1267. mark_page_dirty(vcpu->kvm, gfn);
  1268. set_pte:
  1269. set_shadow_pte(shadow_pte, spte);
  1270. return ret;
  1271. }
  1272. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1273. unsigned pt_access, unsigned pte_access,
  1274. int user_fault, int write_fault, int dirty,
  1275. int *ptwrite, int largepage, gfn_t gfn,
  1276. pfn_t pfn, bool speculative)
  1277. {
  1278. int was_rmapped = 0;
  1279. int was_writeble = is_writeble_pte(*shadow_pte);
  1280. pgprintk("%s: spte %llx access %x write_fault %d"
  1281. " user_fault %d gfn %lx\n",
  1282. __func__, *shadow_pte, pt_access,
  1283. write_fault, user_fault, gfn);
  1284. if (is_rmap_pte(*shadow_pte)) {
  1285. /*
  1286. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1287. * the parent of the now unreachable PTE.
  1288. */
  1289. if (largepage && !is_large_pte(*shadow_pte)) {
  1290. struct kvm_mmu_page *child;
  1291. u64 pte = *shadow_pte;
  1292. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1293. mmu_page_remove_parent_pte(child, shadow_pte);
  1294. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1295. pgprintk("hfn old %lx new %lx\n",
  1296. spte_to_pfn(*shadow_pte), pfn);
  1297. rmap_remove(vcpu->kvm, shadow_pte);
  1298. } else {
  1299. if (largepage)
  1300. was_rmapped = is_large_pte(*shadow_pte);
  1301. else
  1302. was_rmapped = 1;
  1303. }
  1304. }
  1305. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1306. dirty, largepage, gfn, pfn, speculative, true)) {
  1307. if (write_fault)
  1308. *ptwrite = 1;
  1309. kvm_x86_ops->tlb_flush(vcpu);
  1310. }
  1311. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1312. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1313. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1314. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1315. *shadow_pte, shadow_pte);
  1316. if (!was_rmapped && is_large_pte(*shadow_pte))
  1317. ++vcpu->kvm->stat.lpages;
  1318. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1319. if (!was_rmapped) {
  1320. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1321. if (!is_rmap_pte(*shadow_pte))
  1322. kvm_release_pfn_clean(pfn);
  1323. } else {
  1324. if (was_writeble)
  1325. kvm_release_pfn_dirty(pfn);
  1326. else
  1327. kvm_release_pfn_clean(pfn);
  1328. }
  1329. if (speculative) {
  1330. vcpu->arch.last_pte_updated = shadow_pte;
  1331. vcpu->arch.last_pte_gfn = gfn;
  1332. }
  1333. }
  1334. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1335. {
  1336. }
  1337. struct direct_shadow_walk {
  1338. struct kvm_shadow_walk walker;
  1339. pfn_t pfn;
  1340. int write;
  1341. int largepage;
  1342. int pt_write;
  1343. };
  1344. static int direct_map_entry(struct kvm_shadow_walk *_walk,
  1345. struct kvm_vcpu *vcpu,
  1346. u64 addr, u64 *sptep, int level)
  1347. {
  1348. struct direct_shadow_walk *walk =
  1349. container_of(_walk, struct direct_shadow_walk, walker);
  1350. struct kvm_mmu_page *sp;
  1351. gfn_t pseudo_gfn;
  1352. gfn_t gfn = addr >> PAGE_SHIFT;
  1353. if (level == PT_PAGE_TABLE_LEVEL
  1354. || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
  1355. mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
  1356. 0, walk->write, 1, &walk->pt_write,
  1357. walk->largepage, gfn, walk->pfn, false);
  1358. ++vcpu->stat.pf_fixed;
  1359. return 1;
  1360. }
  1361. if (*sptep == shadow_trap_nonpresent_pte) {
  1362. pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1363. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
  1364. 1, ACC_ALL, sptep);
  1365. if (!sp) {
  1366. pgprintk("nonpaging_map: ENOMEM\n");
  1367. kvm_release_pfn_clean(walk->pfn);
  1368. return -ENOMEM;
  1369. }
  1370. set_shadow_pte(sptep,
  1371. __pa(sp->spt)
  1372. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1373. | shadow_user_mask | shadow_x_mask);
  1374. }
  1375. return 0;
  1376. }
  1377. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1378. int largepage, gfn_t gfn, pfn_t pfn)
  1379. {
  1380. int r;
  1381. struct direct_shadow_walk walker = {
  1382. .walker = { .entry = direct_map_entry, },
  1383. .pfn = pfn,
  1384. .largepage = largepage,
  1385. .write = write,
  1386. .pt_write = 0,
  1387. };
  1388. r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
  1389. if (r < 0)
  1390. return r;
  1391. return walker.pt_write;
  1392. }
  1393. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1394. {
  1395. int r;
  1396. int largepage = 0;
  1397. pfn_t pfn;
  1398. unsigned long mmu_seq;
  1399. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1400. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1401. largepage = 1;
  1402. }
  1403. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1404. smp_rmb();
  1405. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1406. /* mmio */
  1407. if (is_error_pfn(pfn)) {
  1408. kvm_release_pfn_clean(pfn);
  1409. return 1;
  1410. }
  1411. spin_lock(&vcpu->kvm->mmu_lock);
  1412. if (mmu_notifier_retry(vcpu, mmu_seq))
  1413. goto out_unlock;
  1414. kvm_mmu_free_some_pages(vcpu);
  1415. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1416. spin_unlock(&vcpu->kvm->mmu_lock);
  1417. return r;
  1418. out_unlock:
  1419. spin_unlock(&vcpu->kvm->mmu_lock);
  1420. kvm_release_pfn_clean(pfn);
  1421. return 0;
  1422. }
  1423. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1424. {
  1425. int i;
  1426. struct kvm_mmu_page *sp;
  1427. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1428. return;
  1429. spin_lock(&vcpu->kvm->mmu_lock);
  1430. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1431. hpa_t root = vcpu->arch.mmu.root_hpa;
  1432. sp = page_header(root);
  1433. --sp->root_count;
  1434. if (!sp->root_count && sp->role.invalid)
  1435. kvm_mmu_zap_page(vcpu->kvm, sp);
  1436. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1437. spin_unlock(&vcpu->kvm->mmu_lock);
  1438. return;
  1439. }
  1440. for (i = 0; i < 4; ++i) {
  1441. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1442. if (root) {
  1443. root &= PT64_BASE_ADDR_MASK;
  1444. sp = page_header(root);
  1445. --sp->root_count;
  1446. if (!sp->root_count && sp->role.invalid)
  1447. kvm_mmu_zap_page(vcpu->kvm, sp);
  1448. }
  1449. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1450. }
  1451. spin_unlock(&vcpu->kvm->mmu_lock);
  1452. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1453. }
  1454. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1455. {
  1456. int i;
  1457. gfn_t root_gfn;
  1458. struct kvm_mmu_page *sp;
  1459. int metaphysical = 0;
  1460. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1461. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1462. hpa_t root = vcpu->arch.mmu.root_hpa;
  1463. ASSERT(!VALID_PAGE(root));
  1464. if (tdp_enabled)
  1465. metaphysical = 1;
  1466. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1467. PT64_ROOT_LEVEL, metaphysical,
  1468. ACC_ALL, NULL);
  1469. root = __pa(sp->spt);
  1470. ++sp->root_count;
  1471. vcpu->arch.mmu.root_hpa = root;
  1472. return;
  1473. }
  1474. metaphysical = !is_paging(vcpu);
  1475. if (tdp_enabled)
  1476. metaphysical = 1;
  1477. for (i = 0; i < 4; ++i) {
  1478. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1479. ASSERT(!VALID_PAGE(root));
  1480. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1481. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1482. vcpu->arch.mmu.pae_root[i] = 0;
  1483. continue;
  1484. }
  1485. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1486. } else if (vcpu->arch.mmu.root_level == 0)
  1487. root_gfn = 0;
  1488. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1489. PT32_ROOT_LEVEL, metaphysical,
  1490. ACC_ALL, NULL);
  1491. root = __pa(sp->spt);
  1492. ++sp->root_count;
  1493. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1494. }
  1495. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1496. }
  1497. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1498. {
  1499. int i;
  1500. struct kvm_mmu_page *sp;
  1501. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1502. return;
  1503. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1504. hpa_t root = vcpu->arch.mmu.root_hpa;
  1505. sp = page_header(root);
  1506. mmu_sync_children(vcpu, sp);
  1507. return;
  1508. }
  1509. for (i = 0; i < 4; ++i) {
  1510. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1511. if (root) {
  1512. root &= PT64_BASE_ADDR_MASK;
  1513. sp = page_header(root);
  1514. mmu_sync_children(vcpu, sp);
  1515. }
  1516. }
  1517. }
  1518. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1519. {
  1520. spin_lock(&vcpu->kvm->mmu_lock);
  1521. mmu_sync_roots(vcpu);
  1522. spin_unlock(&vcpu->kvm->mmu_lock);
  1523. }
  1524. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1525. {
  1526. return vaddr;
  1527. }
  1528. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1529. u32 error_code)
  1530. {
  1531. gfn_t gfn;
  1532. int r;
  1533. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1534. r = mmu_topup_memory_caches(vcpu);
  1535. if (r)
  1536. return r;
  1537. ASSERT(vcpu);
  1538. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1539. gfn = gva >> PAGE_SHIFT;
  1540. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1541. error_code & PFERR_WRITE_MASK, gfn);
  1542. }
  1543. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1544. u32 error_code)
  1545. {
  1546. pfn_t pfn;
  1547. int r;
  1548. int largepage = 0;
  1549. gfn_t gfn = gpa >> PAGE_SHIFT;
  1550. unsigned long mmu_seq;
  1551. ASSERT(vcpu);
  1552. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1553. r = mmu_topup_memory_caches(vcpu);
  1554. if (r)
  1555. return r;
  1556. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1557. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1558. largepage = 1;
  1559. }
  1560. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1561. smp_rmb();
  1562. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1563. if (is_error_pfn(pfn)) {
  1564. kvm_release_pfn_clean(pfn);
  1565. return 1;
  1566. }
  1567. spin_lock(&vcpu->kvm->mmu_lock);
  1568. if (mmu_notifier_retry(vcpu, mmu_seq))
  1569. goto out_unlock;
  1570. kvm_mmu_free_some_pages(vcpu);
  1571. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1572. largepage, gfn, pfn);
  1573. spin_unlock(&vcpu->kvm->mmu_lock);
  1574. return r;
  1575. out_unlock:
  1576. spin_unlock(&vcpu->kvm->mmu_lock);
  1577. kvm_release_pfn_clean(pfn);
  1578. return 0;
  1579. }
  1580. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1581. {
  1582. mmu_free_roots(vcpu);
  1583. }
  1584. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1585. {
  1586. struct kvm_mmu *context = &vcpu->arch.mmu;
  1587. context->new_cr3 = nonpaging_new_cr3;
  1588. context->page_fault = nonpaging_page_fault;
  1589. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1590. context->free = nonpaging_free;
  1591. context->prefetch_page = nonpaging_prefetch_page;
  1592. context->sync_page = nonpaging_sync_page;
  1593. context->invlpg = nonpaging_invlpg;
  1594. context->root_level = 0;
  1595. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1596. context->root_hpa = INVALID_PAGE;
  1597. return 0;
  1598. }
  1599. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1600. {
  1601. ++vcpu->stat.tlb_flush;
  1602. kvm_x86_ops->tlb_flush(vcpu);
  1603. }
  1604. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1605. {
  1606. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1607. mmu_free_roots(vcpu);
  1608. }
  1609. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1610. u64 addr,
  1611. u32 err_code)
  1612. {
  1613. kvm_inject_page_fault(vcpu, addr, err_code);
  1614. }
  1615. static void paging_free(struct kvm_vcpu *vcpu)
  1616. {
  1617. nonpaging_free(vcpu);
  1618. }
  1619. #define PTTYPE 64
  1620. #include "paging_tmpl.h"
  1621. #undef PTTYPE
  1622. #define PTTYPE 32
  1623. #include "paging_tmpl.h"
  1624. #undef PTTYPE
  1625. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1626. {
  1627. struct kvm_mmu *context = &vcpu->arch.mmu;
  1628. ASSERT(is_pae(vcpu));
  1629. context->new_cr3 = paging_new_cr3;
  1630. context->page_fault = paging64_page_fault;
  1631. context->gva_to_gpa = paging64_gva_to_gpa;
  1632. context->prefetch_page = paging64_prefetch_page;
  1633. context->sync_page = paging64_sync_page;
  1634. context->invlpg = paging64_invlpg;
  1635. context->free = paging_free;
  1636. context->root_level = level;
  1637. context->shadow_root_level = level;
  1638. context->root_hpa = INVALID_PAGE;
  1639. return 0;
  1640. }
  1641. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1642. {
  1643. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1644. }
  1645. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1646. {
  1647. struct kvm_mmu *context = &vcpu->arch.mmu;
  1648. context->new_cr3 = paging_new_cr3;
  1649. context->page_fault = paging32_page_fault;
  1650. context->gva_to_gpa = paging32_gva_to_gpa;
  1651. context->free = paging_free;
  1652. context->prefetch_page = paging32_prefetch_page;
  1653. context->sync_page = paging32_sync_page;
  1654. context->invlpg = paging32_invlpg;
  1655. context->root_level = PT32_ROOT_LEVEL;
  1656. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1657. context->root_hpa = INVALID_PAGE;
  1658. return 0;
  1659. }
  1660. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1661. {
  1662. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1663. }
  1664. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1665. {
  1666. struct kvm_mmu *context = &vcpu->arch.mmu;
  1667. context->new_cr3 = nonpaging_new_cr3;
  1668. context->page_fault = tdp_page_fault;
  1669. context->free = nonpaging_free;
  1670. context->prefetch_page = nonpaging_prefetch_page;
  1671. context->sync_page = nonpaging_sync_page;
  1672. context->invlpg = nonpaging_invlpg;
  1673. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1674. context->root_hpa = INVALID_PAGE;
  1675. if (!is_paging(vcpu)) {
  1676. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1677. context->root_level = 0;
  1678. } else if (is_long_mode(vcpu)) {
  1679. context->gva_to_gpa = paging64_gva_to_gpa;
  1680. context->root_level = PT64_ROOT_LEVEL;
  1681. } else if (is_pae(vcpu)) {
  1682. context->gva_to_gpa = paging64_gva_to_gpa;
  1683. context->root_level = PT32E_ROOT_LEVEL;
  1684. } else {
  1685. context->gva_to_gpa = paging32_gva_to_gpa;
  1686. context->root_level = PT32_ROOT_LEVEL;
  1687. }
  1688. return 0;
  1689. }
  1690. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1691. {
  1692. ASSERT(vcpu);
  1693. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1694. if (!is_paging(vcpu))
  1695. return nonpaging_init_context(vcpu);
  1696. else if (is_long_mode(vcpu))
  1697. return paging64_init_context(vcpu);
  1698. else if (is_pae(vcpu))
  1699. return paging32E_init_context(vcpu);
  1700. else
  1701. return paging32_init_context(vcpu);
  1702. }
  1703. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1704. {
  1705. vcpu->arch.update_pte.pfn = bad_pfn;
  1706. if (tdp_enabled)
  1707. return init_kvm_tdp_mmu(vcpu);
  1708. else
  1709. return init_kvm_softmmu(vcpu);
  1710. }
  1711. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1712. {
  1713. ASSERT(vcpu);
  1714. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1715. vcpu->arch.mmu.free(vcpu);
  1716. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1717. }
  1718. }
  1719. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1720. {
  1721. destroy_kvm_mmu(vcpu);
  1722. return init_kvm_mmu(vcpu);
  1723. }
  1724. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1725. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1726. {
  1727. int r;
  1728. r = mmu_topup_memory_caches(vcpu);
  1729. if (r)
  1730. goto out;
  1731. spin_lock(&vcpu->kvm->mmu_lock);
  1732. kvm_mmu_free_some_pages(vcpu);
  1733. mmu_alloc_roots(vcpu);
  1734. mmu_sync_roots(vcpu);
  1735. spin_unlock(&vcpu->kvm->mmu_lock);
  1736. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1737. kvm_mmu_flush_tlb(vcpu);
  1738. out:
  1739. return r;
  1740. }
  1741. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1742. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1743. {
  1744. mmu_free_roots(vcpu);
  1745. }
  1746. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1747. struct kvm_mmu_page *sp,
  1748. u64 *spte)
  1749. {
  1750. u64 pte;
  1751. struct kvm_mmu_page *child;
  1752. pte = *spte;
  1753. if (is_shadow_present_pte(pte)) {
  1754. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1755. is_large_pte(pte))
  1756. rmap_remove(vcpu->kvm, spte);
  1757. else {
  1758. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1759. mmu_page_remove_parent_pte(child, spte);
  1760. }
  1761. }
  1762. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1763. if (is_large_pte(pte))
  1764. --vcpu->kvm->stat.lpages;
  1765. }
  1766. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1767. struct kvm_mmu_page *sp,
  1768. u64 *spte,
  1769. const void *new)
  1770. {
  1771. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1772. if (!vcpu->arch.update_pte.largepage ||
  1773. sp->role.glevels == PT32_ROOT_LEVEL) {
  1774. ++vcpu->kvm->stat.mmu_pde_zapped;
  1775. return;
  1776. }
  1777. }
  1778. ++vcpu->kvm->stat.mmu_pte_updated;
  1779. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1780. paging32_update_pte(vcpu, sp, spte, new);
  1781. else
  1782. paging64_update_pte(vcpu, sp, spte, new);
  1783. }
  1784. static bool need_remote_flush(u64 old, u64 new)
  1785. {
  1786. if (!is_shadow_present_pte(old))
  1787. return false;
  1788. if (!is_shadow_present_pte(new))
  1789. return true;
  1790. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1791. return true;
  1792. old ^= PT64_NX_MASK;
  1793. new ^= PT64_NX_MASK;
  1794. return (old & ~new & PT64_PERM_MASK) != 0;
  1795. }
  1796. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1797. {
  1798. if (need_remote_flush(old, new))
  1799. kvm_flush_remote_tlbs(vcpu->kvm);
  1800. else
  1801. kvm_mmu_flush_tlb(vcpu);
  1802. }
  1803. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1804. {
  1805. u64 *spte = vcpu->arch.last_pte_updated;
  1806. return !!(spte && (*spte & shadow_accessed_mask));
  1807. }
  1808. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1809. const u8 *new, int bytes)
  1810. {
  1811. gfn_t gfn;
  1812. int r;
  1813. u64 gpte = 0;
  1814. pfn_t pfn;
  1815. vcpu->arch.update_pte.largepage = 0;
  1816. if (bytes != 4 && bytes != 8)
  1817. return;
  1818. /*
  1819. * Assume that the pte write on a page table of the same type
  1820. * as the current vcpu paging mode. This is nearly always true
  1821. * (might be false while changing modes). Note it is verified later
  1822. * by update_pte().
  1823. */
  1824. if (is_pae(vcpu)) {
  1825. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  1826. if ((bytes == 4) && (gpa % 4 == 0)) {
  1827. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  1828. if (r)
  1829. return;
  1830. memcpy((void *)&gpte + (gpa % 8), new, 4);
  1831. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  1832. memcpy((void *)&gpte, new, 8);
  1833. }
  1834. } else {
  1835. if ((bytes == 4) && (gpa % 4 == 0))
  1836. memcpy((void *)&gpte, new, 4);
  1837. }
  1838. if (!is_present_pte(gpte))
  1839. return;
  1840. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1841. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  1842. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1843. vcpu->arch.update_pte.largepage = 1;
  1844. }
  1845. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1846. smp_rmb();
  1847. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1848. if (is_error_pfn(pfn)) {
  1849. kvm_release_pfn_clean(pfn);
  1850. return;
  1851. }
  1852. vcpu->arch.update_pte.gfn = gfn;
  1853. vcpu->arch.update_pte.pfn = pfn;
  1854. }
  1855. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  1856. {
  1857. u64 *spte = vcpu->arch.last_pte_updated;
  1858. if (spte
  1859. && vcpu->arch.last_pte_gfn == gfn
  1860. && shadow_accessed_mask
  1861. && !(*spte & shadow_accessed_mask)
  1862. && is_shadow_present_pte(*spte))
  1863. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  1864. }
  1865. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1866. const u8 *new, int bytes)
  1867. {
  1868. gfn_t gfn = gpa >> PAGE_SHIFT;
  1869. struct kvm_mmu_page *sp;
  1870. struct hlist_node *node, *n;
  1871. struct hlist_head *bucket;
  1872. unsigned index;
  1873. u64 entry, gentry;
  1874. u64 *spte;
  1875. unsigned offset = offset_in_page(gpa);
  1876. unsigned pte_size;
  1877. unsigned page_offset;
  1878. unsigned misaligned;
  1879. unsigned quadrant;
  1880. int level;
  1881. int flooded = 0;
  1882. int npte;
  1883. int r;
  1884. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  1885. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  1886. spin_lock(&vcpu->kvm->mmu_lock);
  1887. kvm_mmu_access_page(vcpu, gfn);
  1888. kvm_mmu_free_some_pages(vcpu);
  1889. ++vcpu->kvm->stat.mmu_pte_write;
  1890. kvm_mmu_audit(vcpu, "pre pte write");
  1891. if (gfn == vcpu->arch.last_pt_write_gfn
  1892. && !last_updated_pte_accessed(vcpu)) {
  1893. ++vcpu->arch.last_pt_write_count;
  1894. if (vcpu->arch.last_pt_write_count >= 3)
  1895. flooded = 1;
  1896. } else {
  1897. vcpu->arch.last_pt_write_gfn = gfn;
  1898. vcpu->arch.last_pt_write_count = 1;
  1899. vcpu->arch.last_pte_updated = NULL;
  1900. }
  1901. index = kvm_page_table_hashfn(gfn);
  1902. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1903. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1904. if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
  1905. continue;
  1906. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1907. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1908. misaligned |= bytes < 4;
  1909. if (misaligned || flooded) {
  1910. /*
  1911. * Misaligned accesses are too much trouble to fix
  1912. * up; also, they usually indicate a page is not used
  1913. * as a page table.
  1914. *
  1915. * If we're seeing too many writes to a page,
  1916. * it may no longer be a page table, or we may be
  1917. * forking, in which case it is better to unmap the
  1918. * page.
  1919. */
  1920. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1921. gpa, bytes, sp->role.word);
  1922. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  1923. n = bucket->first;
  1924. ++vcpu->kvm->stat.mmu_flooded;
  1925. continue;
  1926. }
  1927. page_offset = offset;
  1928. level = sp->role.level;
  1929. npte = 1;
  1930. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1931. page_offset <<= 1; /* 32->64 */
  1932. /*
  1933. * A 32-bit pde maps 4MB while the shadow pdes map
  1934. * only 2MB. So we need to double the offset again
  1935. * and zap two pdes instead of one.
  1936. */
  1937. if (level == PT32_ROOT_LEVEL) {
  1938. page_offset &= ~7; /* kill rounding error */
  1939. page_offset <<= 1;
  1940. npte = 2;
  1941. }
  1942. quadrant = page_offset >> PAGE_SHIFT;
  1943. page_offset &= ~PAGE_MASK;
  1944. if (quadrant != sp->role.quadrant)
  1945. continue;
  1946. }
  1947. spte = &sp->spt[page_offset / sizeof(*spte)];
  1948. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  1949. gentry = 0;
  1950. r = kvm_read_guest_atomic(vcpu->kvm,
  1951. gpa & ~(u64)(pte_size - 1),
  1952. &gentry, pte_size);
  1953. new = (const void *)&gentry;
  1954. if (r < 0)
  1955. new = NULL;
  1956. }
  1957. while (npte--) {
  1958. entry = *spte;
  1959. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1960. if (new)
  1961. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  1962. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1963. ++spte;
  1964. }
  1965. }
  1966. kvm_mmu_audit(vcpu, "post pte write");
  1967. spin_unlock(&vcpu->kvm->mmu_lock);
  1968. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  1969. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  1970. vcpu->arch.update_pte.pfn = bad_pfn;
  1971. }
  1972. }
  1973. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1974. {
  1975. gpa_t gpa;
  1976. int r;
  1977. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1978. spin_lock(&vcpu->kvm->mmu_lock);
  1979. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1980. spin_unlock(&vcpu->kvm->mmu_lock);
  1981. return r;
  1982. }
  1983. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  1984. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1985. {
  1986. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  1987. struct kvm_mmu_page *sp;
  1988. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  1989. struct kvm_mmu_page, link);
  1990. kvm_mmu_zap_page(vcpu->kvm, sp);
  1991. ++vcpu->kvm->stat.mmu_recycled;
  1992. }
  1993. }
  1994. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1995. {
  1996. int r;
  1997. enum emulation_result er;
  1998. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  1999. if (r < 0)
  2000. goto out;
  2001. if (!r) {
  2002. r = 1;
  2003. goto out;
  2004. }
  2005. r = mmu_topup_memory_caches(vcpu);
  2006. if (r)
  2007. goto out;
  2008. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2009. switch (er) {
  2010. case EMULATE_DONE:
  2011. return 1;
  2012. case EMULATE_DO_MMIO:
  2013. ++vcpu->stat.mmio_exits;
  2014. return 0;
  2015. case EMULATE_FAIL:
  2016. kvm_report_emulation_failure(vcpu, "pagetable");
  2017. return 1;
  2018. default:
  2019. BUG();
  2020. }
  2021. out:
  2022. return r;
  2023. }
  2024. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2025. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2026. {
  2027. spin_lock(&vcpu->kvm->mmu_lock);
  2028. vcpu->arch.mmu.invlpg(vcpu, gva);
  2029. spin_unlock(&vcpu->kvm->mmu_lock);
  2030. kvm_mmu_flush_tlb(vcpu);
  2031. ++vcpu->stat.invlpg;
  2032. }
  2033. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2034. void kvm_enable_tdp(void)
  2035. {
  2036. tdp_enabled = true;
  2037. }
  2038. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2039. void kvm_disable_tdp(void)
  2040. {
  2041. tdp_enabled = false;
  2042. }
  2043. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2044. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2045. {
  2046. struct kvm_mmu_page *sp;
  2047. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  2048. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  2049. struct kvm_mmu_page, link);
  2050. kvm_mmu_zap_page(vcpu->kvm, sp);
  2051. cond_resched();
  2052. }
  2053. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2054. }
  2055. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2056. {
  2057. struct page *page;
  2058. int i;
  2059. ASSERT(vcpu);
  2060. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2061. vcpu->kvm->arch.n_free_mmu_pages =
  2062. vcpu->kvm->arch.n_requested_mmu_pages;
  2063. else
  2064. vcpu->kvm->arch.n_free_mmu_pages =
  2065. vcpu->kvm->arch.n_alloc_mmu_pages;
  2066. /*
  2067. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2068. * Therefore we need to allocate shadow page tables in the first
  2069. * 4GB of memory, which happens to fit the DMA32 zone.
  2070. */
  2071. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2072. if (!page)
  2073. goto error_1;
  2074. vcpu->arch.mmu.pae_root = page_address(page);
  2075. for (i = 0; i < 4; ++i)
  2076. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2077. return 0;
  2078. error_1:
  2079. free_mmu_pages(vcpu);
  2080. return -ENOMEM;
  2081. }
  2082. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2083. {
  2084. ASSERT(vcpu);
  2085. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2086. return alloc_mmu_pages(vcpu);
  2087. }
  2088. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2089. {
  2090. ASSERT(vcpu);
  2091. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2092. return init_kvm_mmu(vcpu);
  2093. }
  2094. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2095. {
  2096. ASSERT(vcpu);
  2097. destroy_kvm_mmu(vcpu);
  2098. free_mmu_pages(vcpu);
  2099. mmu_free_memory_caches(vcpu);
  2100. }
  2101. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2102. {
  2103. struct kvm_mmu_page *sp;
  2104. spin_lock(&kvm->mmu_lock);
  2105. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2106. int i;
  2107. u64 *pt;
  2108. if (!test_bit(slot, &sp->slot_bitmap))
  2109. continue;
  2110. pt = sp->spt;
  2111. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2112. /* avoid RMW */
  2113. if (pt[i] & PT_WRITABLE_MASK)
  2114. pt[i] &= ~PT_WRITABLE_MASK;
  2115. }
  2116. kvm_flush_remote_tlbs(kvm);
  2117. spin_unlock(&kvm->mmu_lock);
  2118. }
  2119. void kvm_mmu_zap_all(struct kvm *kvm)
  2120. {
  2121. struct kvm_mmu_page *sp, *node;
  2122. spin_lock(&kvm->mmu_lock);
  2123. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2124. if (kvm_mmu_zap_page(kvm, sp))
  2125. node = container_of(kvm->arch.active_mmu_pages.next,
  2126. struct kvm_mmu_page, link);
  2127. spin_unlock(&kvm->mmu_lock);
  2128. kvm_flush_remote_tlbs(kvm);
  2129. }
  2130. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2131. {
  2132. struct kvm_mmu_page *page;
  2133. page = container_of(kvm->arch.active_mmu_pages.prev,
  2134. struct kvm_mmu_page, link);
  2135. kvm_mmu_zap_page(kvm, page);
  2136. }
  2137. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2138. {
  2139. struct kvm *kvm;
  2140. struct kvm *kvm_freed = NULL;
  2141. int cache_count = 0;
  2142. spin_lock(&kvm_lock);
  2143. list_for_each_entry(kvm, &vm_list, vm_list) {
  2144. int npages;
  2145. if (!down_read_trylock(&kvm->slots_lock))
  2146. continue;
  2147. spin_lock(&kvm->mmu_lock);
  2148. npages = kvm->arch.n_alloc_mmu_pages -
  2149. kvm->arch.n_free_mmu_pages;
  2150. cache_count += npages;
  2151. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2152. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2153. cache_count--;
  2154. kvm_freed = kvm;
  2155. }
  2156. nr_to_scan--;
  2157. spin_unlock(&kvm->mmu_lock);
  2158. up_read(&kvm->slots_lock);
  2159. }
  2160. if (kvm_freed)
  2161. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2162. spin_unlock(&kvm_lock);
  2163. return cache_count;
  2164. }
  2165. static struct shrinker mmu_shrinker = {
  2166. .shrink = mmu_shrink,
  2167. .seeks = DEFAULT_SEEKS * 10,
  2168. };
  2169. static void mmu_destroy_caches(void)
  2170. {
  2171. if (pte_chain_cache)
  2172. kmem_cache_destroy(pte_chain_cache);
  2173. if (rmap_desc_cache)
  2174. kmem_cache_destroy(rmap_desc_cache);
  2175. if (mmu_page_header_cache)
  2176. kmem_cache_destroy(mmu_page_header_cache);
  2177. }
  2178. void kvm_mmu_module_exit(void)
  2179. {
  2180. mmu_destroy_caches();
  2181. unregister_shrinker(&mmu_shrinker);
  2182. }
  2183. int kvm_mmu_module_init(void)
  2184. {
  2185. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2186. sizeof(struct kvm_pte_chain),
  2187. 0, 0, NULL);
  2188. if (!pte_chain_cache)
  2189. goto nomem;
  2190. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2191. sizeof(struct kvm_rmap_desc),
  2192. 0, 0, NULL);
  2193. if (!rmap_desc_cache)
  2194. goto nomem;
  2195. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2196. sizeof(struct kvm_mmu_page),
  2197. 0, 0, NULL);
  2198. if (!mmu_page_header_cache)
  2199. goto nomem;
  2200. register_shrinker(&mmu_shrinker);
  2201. return 0;
  2202. nomem:
  2203. mmu_destroy_caches();
  2204. return -ENOMEM;
  2205. }
  2206. /*
  2207. * Caculate mmu pages needed for kvm.
  2208. */
  2209. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2210. {
  2211. int i;
  2212. unsigned int nr_mmu_pages;
  2213. unsigned int nr_pages = 0;
  2214. for (i = 0; i < kvm->nmemslots; i++)
  2215. nr_pages += kvm->memslots[i].npages;
  2216. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2217. nr_mmu_pages = max(nr_mmu_pages,
  2218. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2219. return nr_mmu_pages;
  2220. }
  2221. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2222. unsigned len)
  2223. {
  2224. if (len > buffer->len)
  2225. return NULL;
  2226. return buffer->ptr;
  2227. }
  2228. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2229. unsigned len)
  2230. {
  2231. void *ret;
  2232. ret = pv_mmu_peek_buffer(buffer, len);
  2233. if (!ret)
  2234. return ret;
  2235. buffer->ptr += len;
  2236. buffer->len -= len;
  2237. buffer->processed += len;
  2238. return ret;
  2239. }
  2240. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2241. gpa_t addr, gpa_t value)
  2242. {
  2243. int bytes = 8;
  2244. int r;
  2245. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2246. bytes = 4;
  2247. r = mmu_topup_memory_caches(vcpu);
  2248. if (r)
  2249. return r;
  2250. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2251. return -EFAULT;
  2252. return 1;
  2253. }
  2254. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2255. {
  2256. kvm_x86_ops->tlb_flush(vcpu);
  2257. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  2258. return 1;
  2259. }
  2260. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2261. {
  2262. spin_lock(&vcpu->kvm->mmu_lock);
  2263. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2264. spin_unlock(&vcpu->kvm->mmu_lock);
  2265. return 1;
  2266. }
  2267. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2268. struct kvm_pv_mmu_op_buffer *buffer)
  2269. {
  2270. struct kvm_mmu_op_header *header;
  2271. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2272. if (!header)
  2273. return 0;
  2274. switch (header->op) {
  2275. case KVM_MMU_OP_WRITE_PTE: {
  2276. struct kvm_mmu_op_write_pte *wpte;
  2277. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2278. if (!wpte)
  2279. return 0;
  2280. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2281. wpte->pte_val);
  2282. }
  2283. case KVM_MMU_OP_FLUSH_TLB: {
  2284. struct kvm_mmu_op_flush_tlb *ftlb;
  2285. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2286. if (!ftlb)
  2287. return 0;
  2288. return kvm_pv_mmu_flush_tlb(vcpu);
  2289. }
  2290. case KVM_MMU_OP_RELEASE_PT: {
  2291. struct kvm_mmu_op_release_pt *rpt;
  2292. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2293. if (!rpt)
  2294. return 0;
  2295. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2296. }
  2297. default: return 0;
  2298. }
  2299. }
  2300. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2301. gpa_t addr, unsigned long *ret)
  2302. {
  2303. int r;
  2304. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2305. buffer->ptr = buffer->buf;
  2306. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2307. buffer->processed = 0;
  2308. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2309. if (r)
  2310. goto out;
  2311. while (buffer->len) {
  2312. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2313. if (r < 0)
  2314. goto out;
  2315. if (r == 0)
  2316. break;
  2317. }
  2318. r = 1;
  2319. out:
  2320. *ret = buffer->processed;
  2321. return r;
  2322. }
  2323. #ifdef AUDIT
  2324. static const char *audit_msg;
  2325. static gva_t canonicalize(gva_t gva)
  2326. {
  2327. #ifdef CONFIG_X86_64
  2328. gva = (long long)(gva << 16) >> 16;
  2329. #endif
  2330. return gva;
  2331. }
  2332. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2333. gva_t va, int level)
  2334. {
  2335. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2336. int i;
  2337. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2338. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2339. u64 ent = pt[i];
  2340. if (ent == shadow_trap_nonpresent_pte)
  2341. continue;
  2342. va = canonicalize(va);
  2343. if (level > 1) {
  2344. if (ent == shadow_notrap_nonpresent_pte)
  2345. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2346. " in nonleaf level: levels %d gva %lx"
  2347. " level %d pte %llx\n", audit_msg,
  2348. vcpu->arch.mmu.root_level, va, level, ent);
  2349. audit_mappings_page(vcpu, ent, va, level - 1);
  2350. } else {
  2351. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2352. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  2353. if (is_shadow_present_pte(ent)
  2354. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2355. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2356. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2357. audit_msg, vcpu->arch.mmu.root_level,
  2358. va, gpa, hpa, ent,
  2359. is_shadow_present_pte(ent));
  2360. else if (ent == shadow_notrap_nonpresent_pte
  2361. && !is_error_hpa(hpa))
  2362. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2363. " valid guest gva %lx\n", audit_msg, va);
  2364. kvm_release_pfn_clean(pfn);
  2365. }
  2366. }
  2367. }
  2368. static void audit_mappings(struct kvm_vcpu *vcpu)
  2369. {
  2370. unsigned i;
  2371. if (vcpu->arch.mmu.root_level == 4)
  2372. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2373. else
  2374. for (i = 0; i < 4; ++i)
  2375. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2376. audit_mappings_page(vcpu,
  2377. vcpu->arch.mmu.pae_root[i],
  2378. i << 30,
  2379. 2);
  2380. }
  2381. static int count_rmaps(struct kvm_vcpu *vcpu)
  2382. {
  2383. int nmaps = 0;
  2384. int i, j, k;
  2385. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2386. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2387. struct kvm_rmap_desc *d;
  2388. for (j = 0; j < m->npages; ++j) {
  2389. unsigned long *rmapp = &m->rmap[j];
  2390. if (!*rmapp)
  2391. continue;
  2392. if (!(*rmapp & 1)) {
  2393. ++nmaps;
  2394. continue;
  2395. }
  2396. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2397. while (d) {
  2398. for (k = 0; k < RMAP_EXT; ++k)
  2399. if (d->shadow_ptes[k])
  2400. ++nmaps;
  2401. else
  2402. break;
  2403. d = d->more;
  2404. }
  2405. }
  2406. }
  2407. return nmaps;
  2408. }
  2409. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2410. {
  2411. int nmaps = 0;
  2412. struct kvm_mmu_page *sp;
  2413. int i;
  2414. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2415. u64 *pt = sp->spt;
  2416. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2417. continue;
  2418. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2419. u64 ent = pt[i];
  2420. if (!(ent & PT_PRESENT_MASK))
  2421. continue;
  2422. if (!(ent & PT_WRITABLE_MASK))
  2423. continue;
  2424. ++nmaps;
  2425. }
  2426. }
  2427. return nmaps;
  2428. }
  2429. static void audit_rmap(struct kvm_vcpu *vcpu)
  2430. {
  2431. int n_rmap = count_rmaps(vcpu);
  2432. int n_actual = count_writable_mappings(vcpu);
  2433. if (n_rmap != n_actual)
  2434. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2435. __func__, audit_msg, n_rmap, n_actual);
  2436. }
  2437. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2438. {
  2439. struct kvm_mmu_page *sp;
  2440. struct kvm_memory_slot *slot;
  2441. unsigned long *rmapp;
  2442. gfn_t gfn;
  2443. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2444. if (sp->role.metaphysical)
  2445. continue;
  2446. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  2447. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2448. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2449. if (*rmapp)
  2450. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2451. " mappings: gfn %lx role %x\n",
  2452. __func__, audit_msg, sp->gfn,
  2453. sp->role.word);
  2454. }
  2455. }
  2456. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2457. {
  2458. int olddbg = dbg;
  2459. dbg = 0;
  2460. audit_msg = msg;
  2461. audit_rmap(vcpu);
  2462. audit_write_protection(vcpu);
  2463. audit_mappings(vcpu);
  2464. dbg = olddbg;
  2465. }
  2466. #endif