apic.h 4.4 KB

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  1. #ifndef __ASM_ES7000_APIC_H
  2. #define __ASM_ES7000_APIC_H
  3. #define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
  4. #define esr_disable (1)
  5. static inline int apic_id_registered(void)
  6. {
  7. return (1);
  8. }
  9. static inline cpumask_t target_cpus(void)
  10. {
  11. #if defined CONFIG_ES7000_CLUSTERED_APIC
  12. return CPU_MASK_ALL;
  13. #else
  14. return cpumask_of_cpu(smp_processor_id());
  15. #endif
  16. }
  17. #if defined CONFIG_ES7000_CLUSTERED_APIC
  18. #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
  19. #define INT_DELIVERY_MODE (dest_LowestPrio)
  20. #define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */
  21. #define NO_BALANCE_IRQ (1)
  22. #undef WAKE_SECONDARY_VIA_INIT
  23. #define WAKE_SECONDARY_VIA_MIP
  24. #else
  25. #define APIC_DFR_VALUE (APIC_DFR_FLAT)
  26. #define INT_DELIVERY_MODE (dest_Fixed)
  27. #define INT_DEST_MODE (0) /* phys delivery to target procs */
  28. #define NO_BALANCE_IRQ (0)
  29. #undef APIC_DEST_LOGICAL
  30. #define APIC_DEST_LOGICAL 0x0
  31. #define WAKE_SECONDARY_VIA_INIT
  32. #endif
  33. static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
  34. {
  35. return 0;
  36. }
  37. static inline unsigned long check_apicid_present(int bit)
  38. {
  39. return physid_isset(bit, phys_cpu_present_map);
  40. }
  41. #define apicid_cluster(apicid) (apicid & 0xF0)
  42. static inline unsigned long calculate_ldr(int cpu)
  43. {
  44. unsigned long id;
  45. id = xapic_phys_to_log_apicid(cpu);
  46. return (SET_APIC_LOGICAL_ID(id));
  47. }
  48. /*
  49. * Set up the logical destination ID.
  50. *
  51. * Intel recommends to set DFR, LdR and TPR before enabling
  52. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  53. * document number 292116). So here it goes...
  54. */
  55. static inline void init_apic_ldr(void)
  56. {
  57. unsigned long val;
  58. int cpu = smp_processor_id();
  59. apic_write(APIC_DFR, APIC_DFR_VALUE);
  60. val = calculate_ldr(cpu);
  61. apic_write(APIC_LDR, val);
  62. }
  63. #ifndef CONFIG_X86_GENERICARCH
  64. extern void enable_apic_mode(void);
  65. #endif
  66. extern int apic_version [MAX_APICS];
  67. static inline void setup_apic_routing(void)
  68. {
  69. int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
  70. printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
  71. (apic_version[apic] == 0x14) ?
  72. "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(target_cpus())[0]);
  73. }
  74. static inline int multi_timer_check(int apic, int irq)
  75. {
  76. return 0;
  77. }
  78. static inline int apicid_to_node(int logical_apicid)
  79. {
  80. return 0;
  81. }
  82. static inline int cpu_present_to_apicid(int mps_cpu)
  83. {
  84. if (!mps_cpu)
  85. return boot_cpu_physical_apicid;
  86. else if (mps_cpu < NR_CPUS)
  87. return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
  88. else
  89. return BAD_APICID;
  90. }
  91. static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
  92. {
  93. static int id = 0;
  94. physid_mask_t mask;
  95. mask = physid_mask_of_physid(id);
  96. ++id;
  97. return mask;
  98. }
  99. extern u8 cpu_2_logical_apicid[];
  100. /* Mapping from cpu number to logical apicid */
  101. static inline int cpu_to_logical_apicid(int cpu)
  102. {
  103. #ifdef CONFIG_SMP
  104. if (cpu >= NR_CPUS)
  105. return BAD_APICID;
  106. return (int)cpu_2_logical_apicid[cpu];
  107. #else
  108. return logical_smp_processor_id();
  109. #endif
  110. }
  111. static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
  112. {
  113. /* For clustered we don't have a good way to do this yet - hack */
  114. return physids_promote(0xff);
  115. }
  116. static inline void setup_portio_remap(void)
  117. {
  118. }
  119. extern unsigned int boot_cpu_physical_apicid;
  120. static inline int check_phys_apicid_present(int cpu_physical_apicid)
  121. {
  122. boot_cpu_physical_apicid = read_apic_id();
  123. return (1);
  124. }
  125. static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
  126. {
  127. int num_bits_set;
  128. int cpus_found = 0;
  129. int cpu;
  130. int apicid;
  131. num_bits_set = cpus_weight(cpumask);
  132. /* Return id to all */
  133. if (num_bits_set == NR_CPUS)
  134. #if defined CONFIG_ES7000_CLUSTERED_APIC
  135. return 0xFF;
  136. #else
  137. return cpu_to_logical_apicid(0);
  138. #endif
  139. /*
  140. * The cpus in the mask must all be on the apic cluster. If are not
  141. * on the same apicid cluster return default value of TARGET_CPUS.
  142. */
  143. cpu = first_cpu(cpumask);
  144. apicid = cpu_to_logical_apicid(cpu);
  145. while (cpus_found < num_bits_set) {
  146. if (cpu_isset(cpu, cpumask)) {
  147. int new_apicid = cpu_to_logical_apicid(cpu);
  148. if (apicid_cluster(apicid) !=
  149. apicid_cluster(new_apicid)){
  150. printk ("%s: Not a valid mask!\n", __func__);
  151. #if defined CONFIG_ES7000_CLUSTERED_APIC
  152. return 0xFF;
  153. #else
  154. return cpu_to_logical_apicid(0);
  155. #endif
  156. }
  157. apicid = new_apicid;
  158. cpus_found++;
  159. }
  160. cpu++;
  161. }
  162. return apicid;
  163. }
  164. static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
  165. {
  166. return cpuid_apic >> index_msb;
  167. }
  168. #endif /* __ASM_ES7000_APIC_H */