pci_32.c 15 KB

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  1. /*
  2. * Common pmac/prep/chrp pci routines. -- Cort
  3. */
  4. #include <linux/kernel.h>
  5. #include <linux/pci.h>
  6. #include <linux/delay.h>
  7. #include <linux/string.h>
  8. #include <linux/init.h>
  9. #include <linux/capability.h>
  10. #include <linux/sched.h>
  11. #include <linux/errno.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/irq.h>
  14. #include <linux/list.h>
  15. #include <linux/of.h>
  16. #include <asm/processor.h>
  17. #include <asm/io.h>
  18. #include <asm/prom.h>
  19. #include <asm/sections.h>
  20. #include <asm/pci-bridge.h>
  21. #include <asm/byteorder.h>
  22. #include <asm/uaccess.h>
  23. #include <asm/machdep.h>
  24. #undef DEBUG
  25. #ifdef DEBUG
  26. #define DBG(x...) printk(x)
  27. #else
  28. #define DBG(x...)
  29. #endif
  30. unsigned long isa_io_base = 0;
  31. unsigned long pci_dram_offset = 0;
  32. int pcibios_assign_bus_offset = 1;
  33. void pcibios_make_OF_bus_map(void);
  34. static void fixup_broken_pcnet32(struct pci_dev* dev);
  35. static void fixup_cpc710_pci64(struct pci_dev* dev);
  36. #ifdef CONFIG_PPC_OF
  37. static u8* pci_to_OF_bus_map;
  38. #endif
  39. /* By default, we don't re-assign bus numbers. We do this only on
  40. * some pmacs
  41. */
  42. static int pci_assign_all_buses;
  43. LIST_HEAD(hose_list);
  44. static int pci_bus_count;
  45. /* This will remain NULL for now, until isa-bridge.c is made common
  46. * to both 32-bit and 64-bit.
  47. */
  48. struct pci_dev *isa_bridge_pcidev;
  49. EXPORT_SYMBOL_GPL(isa_bridge_pcidev);
  50. static void
  51. fixup_hide_host_resource_fsl(struct pci_dev *dev)
  52. {
  53. int i, class = dev->class >> 8;
  54. if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
  55. class == PCI_CLASS_BRIDGE_OTHER) &&
  56. (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
  57. (dev->bus->parent == NULL)) {
  58. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  59. dev->resource[i].start = 0;
  60. dev->resource[i].end = 0;
  61. dev->resource[i].flags = 0;
  62. }
  63. }
  64. }
  65. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
  66. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
  67. static void
  68. fixup_broken_pcnet32(struct pci_dev* dev)
  69. {
  70. if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
  71. dev->vendor = PCI_VENDOR_ID_AMD;
  72. pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
  73. }
  74. }
  75. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
  76. static void
  77. fixup_cpc710_pci64(struct pci_dev* dev)
  78. {
  79. /* Hide the PCI64 BARs from the kernel as their content doesn't
  80. * fit well in the resource management
  81. */
  82. dev->resource[0].start = dev->resource[0].end = 0;
  83. dev->resource[0].flags = 0;
  84. dev->resource[1].start = dev->resource[1].end = 0;
  85. dev->resource[1].flags = 0;
  86. }
  87. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
  88. #ifdef CONFIG_PPC_OF
  89. /*
  90. * Functions below are used on OpenFirmware machines.
  91. */
  92. static void
  93. make_one_node_map(struct device_node* node, u8 pci_bus)
  94. {
  95. const int *bus_range;
  96. int len;
  97. if (pci_bus >= pci_bus_count)
  98. return;
  99. bus_range = of_get_property(node, "bus-range", &len);
  100. if (bus_range == NULL || len < 2 * sizeof(int)) {
  101. printk(KERN_WARNING "Can't get bus-range for %s, "
  102. "assuming it starts at 0\n", node->full_name);
  103. pci_to_OF_bus_map[pci_bus] = 0;
  104. } else
  105. pci_to_OF_bus_map[pci_bus] = bus_range[0];
  106. for_each_child_of_node(node, node) {
  107. struct pci_dev* dev;
  108. const unsigned int *class_code, *reg;
  109. class_code = of_get_property(node, "class-code", NULL);
  110. if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
  111. (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
  112. continue;
  113. reg = of_get_property(node, "reg", NULL);
  114. if (!reg)
  115. continue;
  116. dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
  117. if (!dev || !dev->subordinate) {
  118. pci_dev_put(dev);
  119. continue;
  120. }
  121. make_one_node_map(node, dev->subordinate->number);
  122. pci_dev_put(dev);
  123. }
  124. }
  125. void
  126. pcibios_make_OF_bus_map(void)
  127. {
  128. int i;
  129. struct pci_controller *hose, *tmp;
  130. struct property *map_prop;
  131. struct device_node *dn;
  132. pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
  133. if (!pci_to_OF_bus_map) {
  134. printk(KERN_ERR "Can't allocate OF bus map !\n");
  135. return;
  136. }
  137. /* We fill the bus map with invalid values, that helps
  138. * debugging.
  139. */
  140. for (i=0; i<pci_bus_count; i++)
  141. pci_to_OF_bus_map[i] = 0xff;
  142. /* For each hose, we begin searching bridges */
  143. list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
  144. struct device_node* node = hose->dn;
  145. if (!node)
  146. continue;
  147. make_one_node_map(node, hose->first_busno);
  148. }
  149. dn = of_find_node_by_path("/");
  150. map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
  151. if (map_prop) {
  152. BUG_ON(pci_bus_count > map_prop->length);
  153. memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
  154. }
  155. of_node_put(dn);
  156. #ifdef DEBUG
  157. printk("PCI->OF bus map:\n");
  158. for (i=0; i<pci_bus_count; i++) {
  159. if (pci_to_OF_bus_map[i] == 0xff)
  160. continue;
  161. printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
  162. }
  163. #endif
  164. }
  165. typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
  166. static struct device_node*
  167. scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data)
  168. {
  169. struct device_node *node;
  170. struct device_node* sub_node;
  171. for_each_child_of_node(parent, node) {
  172. const unsigned int *class_code;
  173. if (filter(node, data)) {
  174. of_node_put(node);
  175. return node;
  176. }
  177. /* For PCI<->PCI bridges or CardBus bridges, we go down
  178. * Note: some OFs create a parent node "multifunc-device" as
  179. * a fake root for all functions of a multi-function device,
  180. * we go down them as well.
  181. */
  182. class_code = of_get_property(node, "class-code", NULL);
  183. if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
  184. (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
  185. strcmp(node->name, "multifunc-device"))
  186. continue;
  187. sub_node = scan_OF_pci_childs(node, filter, data);
  188. if (sub_node) {
  189. of_node_put(node);
  190. return sub_node;
  191. }
  192. }
  193. return NULL;
  194. }
  195. static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
  196. unsigned int devfn)
  197. {
  198. struct device_node *np;
  199. const u32 *reg;
  200. unsigned int psize;
  201. for_each_child_of_node(parent, np) {
  202. reg = of_get_property(np, "reg", &psize);
  203. if (reg == NULL || psize < 4)
  204. continue;
  205. if (((reg[0] >> 8) & 0xff) == devfn)
  206. return np;
  207. }
  208. return NULL;
  209. }
  210. static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
  211. {
  212. struct device_node *parent, *np;
  213. /* Are we a root bus ? */
  214. if (bus->self == NULL || bus->parent == NULL) {
  215. struct pci_controller *hose = pci_bus_to_host(bus);
  216. if (hose == NULL)
  217. return NULL;
  218. return of_node_get(hose->dn);
  219. }
  220. /* not a root bus, we need to get our parent */
  221. parent = scan_OF_for_pci_bus(bus->parent);
  222. if (parent == NULL)
  223. return NULL;
  224. /* now iterate for children for a match */
  225. np = scan_OF_for_pci_dev(parent, bus->self->devfn);
  226. of_node_put(parent);
  227. return np;
  228. }
  229. /*
  230. * Scans the OF tree for a device node matching a PCI device
  231. */
  232. struct device_node *
  233. pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
  234. {
  235. struct device_node *parent, *np;
  236. if (!have_of)
  237. return NULL;
  238. DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
  239. parent = scan_OF_for_pci_bus(bus);
  240. if (parent == NULL)
  241. return NULL;
  242. DBG(" parent is %s\n", parent ? parent->full_name : "<NULL>");
  243. np = scan_OF_for_pci_dev(parent, devfn);
  244. of_node_put(parent);
  245. DBG(" result is %s\n", np ? np->full_name : "<NULL>");
  246. /* XXX most callers don't release the returned node
  247. * mostly because ppc64 doesn't increase the refcount,
  248. * we need to fix that.
  249. */
  250. return np;
  251. }
  252. EXPORT_SYMBOL(pci_busdev_to_OF_node);
  253. struct device_node*
  254. pci_device_to_OF_node(struct pci_dev *dev)
  255. {
  256. return pci_busdev_to_OF_node(dev->bus, dev->devfn);
  257. }
  258. EXPORT_SYMBOL(pci_device_to_OF_node);
  259. static int
  260. find_OF_pci_device_filter(struct device_node* node, void* data)
  261. {
  262. return ((void *)node == data);
  263. }
  264. /*
  265. * Returns the PCI device matching a given OF node
  266. */
  267. int
  268. pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
  269. {
  270. const unsigned int *reg;
  271. struct pci_controller* hose;
  272. struct pci_dev* dev = NULL;
  273. if (!have_of)
  274. return -ENODEV;
  275. /* Make sure it's really a PCI device */
  276. hose = pci_find_hose_for_OF_device(node);
  277. if (!hose || !hose->dn)
  278. return -ENODEV;
  279. if (!scan_OF_pci_childs(hose->dn,
  280. find_OF_pci_device_filter, (void *)node))
  281. return -ENODEV;
  282. reg = of_get_property(node, "reg", NULL);
  283. if (!reg)
  284. return -ENODEV;
  285. *bus = (reg[0] >> 16) & 0xff;
  286. *devfn = ((reg[0] >> 8) & 0xff);
  287. /* Ok, here we need some tweak. If we have already renumbered
  288. * all busses, we can't rely on the OF bus number any more.
  289. * the pci_to_OF_bus_map is not enough as several PCI busses
  290. * may match the same OF bus number.
  291. */
  292. if (!pci_to_OF_bus_map)
  293. return 0;
  294. for_each_pci_dev(dev)
  295. if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
  296. dev->devfn == *devfn) {
  297. *bus = dev->bus->number;
  298. pci_dev_put(dev);
  299. return 0;
  300. }
  301. return -ENODEV;
  302. }
  303. EXPORT_SYMBOL(pci_device_from_OF_node);
  304. /* We create the "pci-OF-bus-map" property now so it appears in the
  305. * /proc device tree
  306. */
  307. void __init
  308. pci_create_OF_bus_map(void)
  309. {
  310. struct property* of_prop;
  311. struct device_node *dn;
  312. of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
  313. if (!of_prop)
  314. return;
  315. dn = of_find_node_by_path("/");
  316. if (dn) {
  317. memset(of_prop, -1, sizeof(struct property) + 256);
  318. of_prop->name = "pci-OF-bus-map";
  319. of_prop->length = 256;
  320. of_prop->value = &of_prop[1];
  321. prom_add_property(dn, of_prop);
  322. of_node_put(dn);
  323. }
  324. }
  325. #else /* CONFIG_PPC_OF */
  326. void pcibios_make_OF_bus_map(void)
  327. {
  328. }
  329. #endif /* CONFIG_PPC_OF */
  330. static int __init pcibios_init(void)
  331. {
  332. struct pci_controller *hose, *tmp;
  333. struct pci_bus *bus;
  334. int next_busno = 0;
  335. printk(KERN_INFO "PCI: Probing PCI hardware\n");
  336. if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
  337. pci_assign_all_buses = 1;
  338. /* Scan all of the recorded PCI controllers. */
  339. list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
  340. if (pci_assign_all_buses)
  341. hose->first_busno = next_busno;
  342. hose->last_busno = 0xff;
  343. bus = pci_scan_bus_parented(hose->parent, hose->first_busno,
  344. hose->ops, hose);
  345. if (bus) {
  346. pci_bus_add_devices(bus);
  347. hose->last_busno = bus->subordinate;
  348. }
  349. if (pci_assign_all_buses || next_busno <= hose->last_busno)
  350. next_busno = hose->last_busno + pcibios_assign_bus_offset;
  351. }
  352. pci_bus_count = next_busno;
  353. /* OpenFirmware based machines need a map of OF bus
  354. * numbers vs. kernel bus numbers since we may have to
  355. * remap them.
  356. */
  357. if (pci_assign_all_buses && have_of)
  358. pcibios_make_OF_bus_map();
  359. /* Call common code to handle resource allocation */
  360. pcibios_resource_survey();
  361. /* Call machine dependent post-init code */
  362. if (ppc_md.pcibios_after_init)
  363. ppc_md.pcibios_after_init();
  364. return 0;
  365. }
  366. subsys_initcall(pcibios_init);
  367. void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
  368. {
  369. struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
  370. unsigned long io_offset;
  371. struct resource *res;
  372. int i;
  373. struct pci_dev *dev;
  374. /* Hookup PHB resources */
  375. io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
  376. if (bus->parent == NULL) {
  377. /* This is a host bridge - fill in its resources */
  378. hose->bus = bus;
  379. bus->resource[0] = res = &hose->io_resource;
  380. if (!res->flags) {
  381. if (io_offset)
  382. printk(KERN_ERR "I/O resource not set for host"
  383. " bridge %d\n", hose->global_number);
  384. res->start = 0;
  385. res->end = IO_SPACE_LIMIT;
  386. res->flags = IORESOURCE_IO;
  387. }
  388. res->start = (res->start + io_offset) & 0xffffffffu;
  389. res->end = (res->end + io_offset) & 0xffffffffu;
  390. for (i = 0; i < 3; ++i) {
  391. res = &hose->mem_resources[i];
  392. if (!res->flags) {
  393. if (i > 0)
  394. continue;
  395. printk(KERN_ERR "Memory resource not set for "
  396. "host bridge %d\n", hose->global_number);
  397. res->start = hose->pci_mem_offset;
  398. res->end = ~0U;
  399. res->flags = IORESOURCE_MEM;
  400. }
  401. bus->resource[i+1] = res;
  402. }
  403. }
  404. if (ppc_md.pci_dma_bus_setup)
  405. ppc_md.pci_dma_bus_setup(bus);
  406. list_for_each_entry(dev, &bus->devices, bus_list)
  407. pcibios_setup_new_device(dev);
  408. }
  409. /* the next one is stolen from the alpha port... */
  410. void __init
  411. pcibios_update_irq(struct pci_dev *dev, int irq)
  412. {
  413. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
  414. /* XXX FIXME - update OF device tree node interrupt property */
  415. }
  416. static struct pci_controller*
  417. pci_bus_to_hose(int bus)
  418. {
  419. struct pci_controller *hose, *tmp;
  420. list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
  421. if (bus >= hose->first_busno && bus <= hose->last_busno)
  422. return hose;
  423. return NULL;
  424. }
  425. /* Provide information on locations of various I/O regions in physical
  426. * memory. Do this on a per-card basis so that we choose the right
  427. * root bridge.
  428. * Note that the returned IO or memory base is a physical address
  429. */
  430. long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
  431. {
  432. struct pci_controller* hose;
  433. long result = -EOPNOTSUPP;
  434. hose = pci_bus_to_hose(bus);
  435. if (!hose)
  436. return -ENODEV;
  437. switch (which) {
  438. case IOBASE_BRIDGE_NUMBER:
  439. return (long)hose->first_busno;
  440. case IOBASE_MEMORY:
  441. return (long)hose->pci_mem_offset;
  442. case IOBASE_IO:
  443. return (long)hose->io_base_phys;
  444. case IOBASE_ISA_IO:
  445. return (long)isa_io_base;
  446. case IOBASE_ISA_MEM:
  447. return (long)isa_mem_base;
  448. }
  449. return result;
  450. }
  451. unsigned long pci_address_to_pio(phys_addr_t address)
  452. {
  453. struct pci_controller *hose, *tmp;
  454. list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
  455. unsigned int size = hose->io_resource.end -
  456. hose->io_resource.start + 1;
  457. if (address >= hose->io_base_phys &&
  458. address < (hose->io_base_phys + size)) {
  459. unsigned long base =
  460. (unsigned long)hose->io_base_virt - _IO_BASE;
  461. return base + (address - hose->io_base_phys);
  462. }
  463. }
  464. return (unsigned int)-1;
  465. }
  466. EXPORT_SYMBOL(pci_address_to_pio);
  467. /*
  468. * Null PCI config access functions, for the case when we can't
  469. * find a hose.
  470. */
  471. #define NULL_PCI_OP(rw, size, type) \
  472. static int \
  473. null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
  474. { \
  475. return PCIBIOS_DEVICE_NOT_FOUND; \
  476. }
  477. static int
  478. null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
  479. int len, u32 *val)
  480. {
  481. return PCIBIOS_DEVICE_NOT_FOUND;
  482. }
  483. static int
  484. null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
  485. int len, u32 val)
  486. {
  487. return PCIBIOS_DEVICE_NOT_FOUND;
  488. }
  489. static struct pci_ops null_pci_ops =
  490. {
  491. .read = null_read_config,
  492. .write = null_write_config,
  493. };
  494. /*
  495. * These functions are used early on before PCI scanning is done
  496. * and all of the pci_dev and pci_bus structures have been created.
  497. */
  498. static struct pci_bus *
  499. fake_pci_bus(struct pci_controller *hose, int busnr)
  500. {
  501. static struct pci_bus bus;
  502. if (hose == 0) {
  503. hose = pci_bus_to_hose(busnr);
  504. if (hose == 0)
  505. printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
  506. }
  507. bus.number = busnr;
  508. bus.sysdata = hose;
  509. bus.ops = hose? hose->ops: &null_pci_ops;
  510. return &bus;
  511. }
  512. #define EARLY_PCI_OP(rw, size, type) \
  513. int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
  514. int devfn, int offset, type value) \
  515. { \
  516. return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
  517. devfn, offset, value); \
  518. }
  519. EARLY_PCI_OP(read, byte, u8 *)
  520. EARLY_PCI_OP(read, word, u16 *)
  521. EARLY_PCI_OP(read, dword, u32 *)
  522. EARLY_PCI_OP(write, byte, u8)
  523. EARLY_PCI_OP(write, word, u16)
  524. EARLY_PCI_OP(write, dword, u32)
  525. extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
  526. int early_find_capability(struct pci_controller *hose, int bus, int devfn,
  527. int cap)
  528. {
  529. return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
  530. }