mpc8349emitx.dts 7.5 KB

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  1. /*
  2. * MPC8349E-mITX Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "MPC8349EMITX";
  14. compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. pci0 = &pci0;
  23. pci1 = &pci1;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8349@0 {
  29. device_type = "cpu";
  30. reg = <0x0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <32768>;
  34. i-cache-size = <32768>;
  35. timebase-frequency = <0>; // from bootloader
  36. bus-frequency = <0>; // from bootloader
  37. clock-frequency = <0>; // from bootloader
  38. };
  39. };
  40. memory {
  41. device_type = "memory";
  42. reg = <0x00000000 0x10000000>;
  43. };
  44. soc8349@e0000000 {
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. device_type = "soc";
  48. compatible = "simple-bus";
  49. ranges = <0x0 0xe0000000 0x00100000>;
  50. reg = <0xe0000000 0x00000200>;
  51. bus-frequency = <0>; // from bootloader
  52. wdt@200 {
  53. device_type = "watchdog";
  54. compatible = "mpc83xx_wdt";
  55. reg = <0x200 0x100>;
  56. };
  57. i2c@3000 {
  58. #address-cells = <1>;
  59. #size-cells = <0>;
  60. cell-index = <0>;
  61. compatible = "fsl-i2c";
  62. reg = <0x3000 0x100>;
  63. interrupts = <14 0x8>;
  64. interrupt-parent = <&ipic>;
  65. dfsrr;
  66. };
  67. i2c@3100 {
  68. #address-cells = <1>;
  69. #size-cells = <0>;
  70. cell-index = <1>;
  71. compatible = "fsl-i2c";
  72. reg = <0x3100 0x100>;
  73. interrupts = <15 0x8>;
  74. interrupt-parent = <&ipic>;
  75. dfsrr;
  76. rtc@68 {
  77. device_type = "rtc";
  78. compatible = "dallas,ds1339";
  79. reg = <0x68>;
  80. interrupts = <18 0x8>;
  81. interrupt-parent = <&ipic>;
  82. };
  83. };
  84. spi@7000 {
  85. cell-index = <0>;
  86. compatible = "fsl,spi";
  87. reg = <0x7000 0x1000>;
  88. interrupts = <16 0x8>;
  89. interrupt-parent = <&ipic>;
  90. mode = "cpu";
  91. };
  92. dma@82a8 {
  93. #address-cells = <1>;
  94. #size-cells = <1>;
  95. compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
  96. reg = <0x82a8 4>;
  97. ranges = <0 0x8100 0x1a8>;
  98. interrupt-parent = <&ipic>;
  99. interrupts = <71 8>;
  100. cell-index = <0>;
  101. dma-channel@0 {
  102. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  103. reg = <0 0x80>;
  104. cell-index = <0>;
  105. interrupt-parent = <&ipic>;
  106. interrupts = <71 8>;
  107. };
  108. dma-channel@80 {
  109. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  110. reg = <0x80 0x80>;
  111. cell-index = <1>;
  112. interrupt-parent = <&ipic>;
  113. interrupts = <71 8>;
  114. };
  115. dma-channel@100 {
  116. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  117. reg = <0x100 0x80>;
  118. cell-index = <2>;
  119. interrupt-parent = <&ipic>;
  120. interrupts = <71 8>;
  121. };
  122. dma-channel@180 {
  123. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  124. reg = <0x180 0x28>;
  125. cell-index = <3>;
  126. interrupt-parent = <&ipic>;
  127. interrupts = <71 8>;
  128. };
  129. mcu_pio: mcu@a {
  130. #gpio-cells = <2>;
  131. compatible = "fsl,mc9s08qg8-mpc8349emitx",
  132. "fsl,mcu-mpc8349emitx";
  133. reg = <0x0a>;
  134. gpio-controller;
  135. };
  136. };
  137. usb@22000 {
  138. compatible = "fsl-usb2-mph";
  139. reg = <0x22000 0x1000>;
  140. #address-cells = <1>;
  141. #size-cells = <0>;
  142. interrupt-parent = <&ipic>;
  143. interrupts = <39 0x8>;
  144. phy_type = "ulpi";
  145. port1;
  146. };
  147. usb@23000 {
  148. compatible = "fsl-usb2-dr";
  149. reg = <0x23000 0x1000>;
  150. #address-cells = <1>;
  151. #size-cells = <0>;
  152. interrupt-parent = <&ipic>;
  153. interrupts = <38 0x8>;
  154. dr_mode = "peripheral";
  155. phy_type = "ulpi";
  156. };
  157. mdio@24520 {
  158. #address-cells = <1>;
  159. #size-cells = <0>;
  160. compatible = "fsl,gianfar-mdio";
  161. reg = <0x24520 0x20>;
  162. /* Vitesse 8201 */
  163. phy1c: ethernet-phy@1c {
  164. interrupt-parent = <&ipic>;
  165. interrupts = <18 0x8>;
  166. reg = <0x1c>;
  167. device_type = "ethernet-phy";
  168. };
  169. };
  170. enet0: ethernet@24000 {
  171. cell-index = <0>;
  172. device_type = "network";
  173. model = "TSEC";
  174. compatible = "gianfar";
  175. reg = <0x24000 0x1000>;
  176. local-mac-address = [ 00 00 00 00 00 00 ];
  177. interrupts = <32 0x8 33 0x8 34 0x8>;
  178. interrupt-parent = <&ipic>;
  179. phy-handle = <&phy1c>;
  180. linux,network-index = <0>;
  181. };
  182. enet1: ethernet@25000 {
  183. cell-index = <1>;
  184. device_type = "network";
  185. model = "TSEC";
  186. compatible = "gianfar";
  187. reg = <0x25000 0x1000>;
  188. local-mac-address = [ 00 00 00 00 00 00 ];
  189. interrupts = <35 0x8 36 0x8 37 0x8>;
  190. interrupt-parent = <&ipic>;
  191. /* Vitesse 7385 isn't on the MDIO bus */
  192. fixed-link = <1 1 1000 0 0>;
  193. linux,network-index = <1>;
  194. };
  195. serial0: serial@4500 {
  196. cell-index = <0>;
  197. device_type = "serial";
  198. compatible = "ns16550";
  199. reg = <0x4500 0x100>;
  200. clock-frequency = <0>; // from bootloader
  201. interrupts = <9 0x8>;
  202. interrupt-parent = <&ipic>;
  203. };
  204. serial1: serial@4600 {
  205. cell-index = <1>;
  206. device_type = "serial";
  207. compatible = "ns16550";
  208. reg = <0x4600 0x100>;
  209. clock-frequency = <0>; // from bootloader
  210. interrupts = <10 0x8>;
  211. interrupt-parent = <&ipic>;
  212. };
  213. crypto@30000 {
  214. compatible = "fsl,sec2.0";
  215. reg = <0x30000 0x10000>;
  216. interrupts = <11 0x8>;
  217. interrupt-parent = <&ipic>;
  218. fsl,num-channels = <4>;
  219. fsl,channel-fifo-len = <24>;
  220. fsl,exec-units-mask = <0x7e>;
  221. fsl,descriptor-types-mask = <0x01010ebf>;
  222. };
  223. ipic: pic@700 {
  224. interrupt-controller;
  225. #address-cells = <0>;
  226. #interrupt-cells = <2>;
  227. reg = <0x700 0x100>;
  228. device_type = "ipic";
  229. };
  230. };
  231. pci0: pci@e0008500 {
  232. cell-index = <1>;
  233. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  234. interrupt-map = <
  235. /* IDSEL 0x10 - SATA */
  236. 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
  237. >;
  238. interrupt-parent = <&ipic>;
  239. interrupts = <66 0x8>;
  240. bus-range = <0x0 0x0>;
  241. ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
  242. 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
  243. 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
  244. clock-frequency = <66666666>;
  245. #interrupt-cells = <1>;
  246. #size-cells = <2>;
  247. #address-cells = <3>;
  248. reg = <0xe0008500 0x100 /* internal registers */
  249. 0xe0008300 0x8>; /* config space access registers */
  250. compatible = "fsl,mpc8349-pci";
  251. device_type = "pci";
  252. };
  253. pci1: pci@e0008600 {
  254. cell-index = <2>;
  255. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  256. interrupt-map = <
  257. /* IDSEL 0x0E - MiniPCI Slot */
  258. 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
  259. /* IDSEL 0x0F - PCI Slot */
  260. 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
  261. 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
  262. >;
  263. interrupt-parent = <&ipic>;
  264. interrupts = <67 0x8>;
  265. bus-range = <0x0 0x0>;
  266. ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
  267. 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
  268. 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
  269. clock-frequency = <66666666>;
  270. #interrupt-cells = <1>;
  271. #size-cells = <2>;
  272. #address-cells = <3>;
  273. reg = <0xe0008600 0x100 /* internal registers */
  274. 0xe0008380 0x8>; /* config space access registers */
  275. compatible = "fsl,mpc8349-pci";
  276. device_type = "pci";
  277. };
  278. localbus@e0005000 {
  279. #address-cells = <2>;
  280. #size-cells = <1>;
  281. compatible = "fsl,mpc8349e-localbus",
  282. "fsl,pq2pro-localbus";
  283. reg = <0xe0005000 0xd8>;
  284. ranges = <0x3 0x0 0xf0000000 0x210>;
  285. pata@3,0 {
  286. compatible = "fsl,mpc8349emitx-pata", "ata-generic";
  287. reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
  288. reg-shift = <1>;
  289. pio-mode = <6>;
  290. interrupts = <23 0x8>;
  291. interrupt-parent = <&ipic>;
  292. };
  293. };
  294. };