pio.c 10.0 KB

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  1. /*
  2. * Atmel PIO2 Port Multiplexer support
  3. *
  4. * Copyright (C) 2004-2006 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/fs.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/irq.h>
  15. #include <asm/gpio.h>
  16. #include <asm/io.h>
  17. #include <mach/portmux.h>
  18. #include "pio.h"
  19. #define MAX_NR_PIO_DEVICES 8
  20. struct pio_device {
  21. struct gpio_chip chip;
  22. void __iomem *regs;
  23. const struct platform_device *pdev;
  24. struct clk *clk;
  25. u32 pinmux_mask;
  26. char name[8];
  27. };
  28. static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
  29. static struct pio_device *gpio_to_pio(unsigned int gpio)
  30. {
  31. struct pio_device *pio;
  32. unsigned int index;
  33. index = gpio >> 5;
  34. if (index >= MAX_NR_PIO_DEVICES)
  35. return NULL;
  36. pio = &pio_dev[index];
  37. if (!pio->regs)
  38. return NULL;
  39. return pio;
  40. }
  41. /* Pin multiplexing API */
  42. static DEFINE_SPINLOCK(pio_lock);
  43. void __init at32_select_periph(unsigned int port, u32 pin_mask,
  44. unsigned int periph, unsigned long flags)
  45. {
  46. struct pio_device *pio;
  47. /* assign and verify pio */
  48. pio = gpio_to_pio(port);
  49. if (unlikely(!pio)) {
  50. printk(KERN_WARNING "pio: invalid port %u\n", port);
  51. goto fail;
  52. }
  53. /* Test if any of the requested pins is already muxed */
  54. spin_lock(&pio_lock);
  55. if (unlikely(pio->pinmux_mask & pin_mask)) {
  56. printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n",
  57. pio->name, pin_mask, pio->pinmux_mask & pin_mask);
  58. spin_unlock(&pio_lock);
  59. goto fail;
  60. }
  61. pio->pinmux_mask |= pin_mask;
  62. /* enable pull ups */
  63. pio_writel(pio, PUER, pin_mask);
  64. /* select either peripheral A or B */
  65. if (periph)
  66. pio_writel(pio, BSR, pin_mask);
  67. else
  68. pio_writel(pio, ASR, pin_mask);
  69. /* enable peripheral control */
  70. pio_writel(pio, PDR, pin_mask);
  71. /* Disable pull ups if not requested. */
  72. if (!(flags & AT32_GPIOF_PULLUP))
  73. pio_writel(pio, PUDR, pin_mask);
  74. spin_unlock(&pio_lock);
  75. return;
  76. fail:
  77. dump_stack();
  78. }
  79. void __init at32_select_gpio(unsigned int pin, unsigned long flags)
  80. {
  81. struct pio_device *pio;
  82. unsigned int pin_index = pin & 0x1f;
  83. u32 mask = 1 << pin_index;
  84. pio = gpio_to_pio(pin);
  85. if (unlikely(!pio)) {
  86. printk("pio: invalid pin %u\n", pin);
  87. goto fail;
  88. }
  89. if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
  90. printk("%s: pin %u is busy\n", pio->name, pin_index);
  91. goto fail;
  92. }
  93. if (flags & AT32_GPIOF_OUTPUT) {
  94. if (flags & AT32_GPIOF_HIGH)
  95. pio_writel(pio, SODR, mask);
  96. else
  97. pio_writel(pio, CODR, mask);
  98. if (flags & AT32_GPIOF_MULTIDRV)
  99. pio_writel(pio, MDER, mask);
  100. else
  101. pio_writel(pio, MDDR, mask);
  102. pio_writel(pio, PUDR, mask);
  103. pio_writel(pio, OER, mask);
  104. } else {
  105. if (flags & AT32_GPIOF_PULLUP)
  106. pio_writel(pio, PUER, mask);
  107. else
  108. pio_writel(pio, PUDR, mask);
  109. if (flags & AT32_GPIOF_DEGLITCH)
  110. pio_writel(pio, IFER, mask);
  111. else
  112. pio_writel(pio, IFDR, mask);
  113. pio_writel(pio, ODR, mask);
  114. }
  115. pio_writel(pio, PER, mask);
  116. return;
  117. fail:
  118. dump_stack();
  119. }
  120. /*
  121. * Undo a previous pin reservation. Will not affect the hardware
  122. * configuration.
  123. */
  124. void at32_deselect_pin(unsigned int pin)
  125. {
  126. struct pio_device *pio;
  127. unsigned int pin_index = pin & 0x1f;
  128. pio = gpio_to_pio(pin);
  129. if (unlikely(!pio)) {
  130. printk("pio: invalid pin %u\n", pin);
  131. dump_stack();
  132. return;
  133. }
  134. clear_bit(pin_index, &pio->pinmux_mask);
  135. }
  136. /* Reserve a pin, preventing anyone else from changing its configuration. */
  137. void __init at32_reserve_pin(unsigned int pin)
  138. {
  139. struct pio_device *pio;
  140. unsigned int pin_index = pin & 0x1f;
  141. pio = gpio_to_pio(pin);
  142. if (unlikely(!pio)) {
  143. printk("pio: invalid pin %u\n", pin);
  144. goto fail;
  145. }
  146. if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
  147. printk("%s: pin %u is busy\n", pio->name, pin_index);
  148. goto fail;
  149. }
  150. return;
  151. fail:
  152. dump_stack();
  153. }
  154. /*--------------------------------------------------------------------------*/
  155. /* GPIO API */
  156. static int direction_input(struct gpio_chip *chip, unsigned offset)
  157. {
  158. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  159. u32 mask = 1 << offset;
  160. if (!(pio_readl(pio, PSR) & mask))
  161. return -EINVAL;
  162. pio_writel(pio, ODR, mask);
  163. return 0;
  164. }
  165. static int gpio_get(struct gpio_chip *chip, unsigned offset)
  166. {
  167. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  168. return (pio_readl(pio, PDSR) >> offset) & 1;
  169. }
  170. static void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
  171. static int direction_output(struct gpio_chip *chip, unsigned offset, int value)
  172. {
  173. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  174. u32 mask = 1 << offset;
  175. if (!(pio_readl(pio, PSR) & mask))
  176. return -EINVAL;
  177. gpio_set(chip, offset, value);
  178. pio_writel(pio, OER, mask);
  179. return 0;
  180. }
  181. static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  182. {
  183. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  184. u32 mask = 1 << offset;
  185. if (value)
  186. pio_writel(pio, SODR, mask);
  187. else
  188. pio_writel(pio, CODR, mask);
  189. }
  190. /*--------------------------------------------------------------------------*/
  191. /* GPIO IRQ support */
  192. static void gpio_irq_mask(unsigned irq)
  193. {
  194. unsigned gpio = irq_to_gpio(irq);
  195. struct pio_device *pio = &pio_dev[gpio >> 5];
  196. pio_writel(pio, IDR, 1 << (gpio & 0x1f));
  197. }
  198. static void gpio_irq_unmask(unsigned irq)
  199. {
  200. unsigned gpio = irq_to_gpio(irq);
  201. struct pio_device *pio = &pio_dev[gpio >> 5];
  202. pio_writel(pio, IER, 1 << (gpio & 0x1f));
  203. }
  204. static int gpio_irq_type(unsigned irq, unsigned type)
  205. {
  206. if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
  207. return -EINVAL;
  208. return 0;
  209. }
  210. static struct irq_chip gpio_irqchip = {
  211. .name = "gpio",
  212. .mask = gpio_irq_mask,
  213. .unmask = gpio_irq_unmask,
  214. .set_type = gpio_irq_type,
  215. };
  216. static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
  217. {
  218. struct pio_device *pio = get_irq_chip_data(irq);
  219. unsigned gpio_irq;
  220. gpio_irq = (unsigned) get_irq_data(irq);
  221. for (;;) {
  222. u32 isr;
  223. struct irq_desc *d;
  224. /* ack pending GPIO interrupts */
  225. isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
  226. if (!isr)
  227. break;
  228. do {
  229. int i;
  230. i = ffs(isr) - 1;
  231. isr &= ~(1 << i);
  232. i += gpio_irq;
  233. d = &irq_desc[i];
  234. d->handle_irq(i, d);
  235. } while (isr);
  236. }
  237. }
  238. static void __init
  239. gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
  240. {
  241. unsigned i;
  242. set_irq_chip_data(irq, pio);
  243. set_irq_data(irq, (void *) gpio_irq);
  244. for (i = 0; i < 32; i++, gpio_irq++) {
  245. set_irq_chip_data(gpio_irq, pio);
  246. set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
  247. handle_simple_irq);
  248. }
  249. set_irq_chained_handler(irq, gpio_irq_handler);
  250. }
  251. /*--------------------------------------------------------------------------*/
  252. #ifdef CONFIG_DEBUG_FS
  253. #include <linux/seq_file.h>
  254. /*
  255. * This shows more info than the generic gpio dump code:
  256. * pullups, deglitching, open drain drive.
  257. */
  258. static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip)
  259. {
  260. struct pio_device *pio = container_of(chip, struct pio_device, chip);
  261. u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr;
  262. unsigned i;
  263. u32 mask;
  264. char bank;
  265. psr = pio_readl(pio, PSR);
  266. osr = pio_readl(pio, OSR);
  267. imr = pio_readl(pio, IMR);
  268. pdsr = pio_readl(pio, PDSR);
  269. pusr = pio_readl(pio, PUSR);
  270. ifsr = pio_readl(pio, IFSR);
  271. mdsr = pio_readl(pio, MDSR);
  272. bank = 'A' + pio->pdev->id;
  273. for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
  274. const char *label;
  275. label = gpiochip_is_requested(chip, i);
  276. if (!label && (imr & mask))
  277. label = "[irq]";
  278. if (!label)
  279. continue;
  280. seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
  281. chip->base + i, bank, i,
  282. label,
  283. (osr & mask) ? "out" : "in ",
  284. (mask & pdsr) ? "hi" : "lo",
  285. (mask & pusr) ? " " : "up");
  286. if (ifsr & mask)
  287. seq_printf(s, " deglitch");
  288. if ((osr & mdsr) & mask)
  289. seq_printf(s, " open-drain");
  290. if (imr & mask)
  291. seq_printf(s, " irq-%d edge-both",
  292. gpio_to_irq(chip->base + i));
  293. seq_printf(s, "\n");
  294. }
  295. }
  296. #else
  297. #define pio_bank_show NULL
  298. #endif
  299. /*--------------------------------------------------------------------------*/
  300. static int __init pio_probe(struct platform_device *pdev)
  301. {
  302. struct pio_device *pio = NULL;
  303. int irq = platform_get_irq(pdev, 0);
  304. int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
  305. BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
  306. pio = &pio_dev[pdev->id];
  307. BUG_ON(!pio->regs);
  308. pio->chip.label = pio->name;
  309. pio->chip.base = pdev->id * 32;
  310. pio->chip.ngpio = 32;
  311. pio->chip.dev = &pdev->dev;
  312. pio->chip.owner = THIS_MODULE;
  313. pio->chip.direction_input = direction_input;
  314. pio->chip.get = gpio_get;
  315. pio->chip.direction_output = direction_output;
  316. pio->chip.set = gpio_set;
  317. pio->chip.dbg_show = pio_bank_show;
  318. gpiochip_add(&pio->chip);
  319. gpio_irq_setup(pio, irq, gpio_irq_base);
  320. platform_set_drvdata(pdev, pio);
  321. printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
  322. pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
  323. return 0;
  324. }
  325. static struct platform_driver pio_driver = {
  326. .driver = {
  327. .name = "pio",
  328. },
  329. };
  330. static int __init pio_init(void)
  331. {
  332. return platform_driver_probe(&pio_driver, pio_probe);
  333. }
  334. postcore_initcall(pio_init);
  335. void __init at32_init_pio(struct platform_device *pdev)
  336. {
  337. struct resource *regs;
  338. struct pio_device *pio;
  339. if (pdev->id > MAX_NR_PIO_DEVICES) {
  340. dev_err(&pdev->dev, "only %d PIO devices supported\n",
  341. MAX_NR_PIO_DEVICES);
  342. return;
  343. }
  344. pio = &pio_dev[pdev->id];
  345. snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id);
  346. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  347. if (!regs) {
  348. dev_err(&pdev->dev, "no mmio resource defined\n");
  349. return;
  350. }
  351. pio->clk = clk_get(&pdev->dev, "mck");
  352. if (IS_ERR(pio->clk))
  353. /*
  354. * This is a fatal error, but if we continue we might
  355. * be so lucky that we manage to initialize the
  356. * console and display this message...
  357. */
  358. dev_err(&pdev->dev, "no mck clock defined\n");
  359. else
  360. clk_enable(pio->clk);
  361. pio->pdev = pdev;
  362. pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
  363. /* start with irqs disabled and acked */
  364. pio_writel(pio, IDR, ~0UL);
  365. (void) pio_readl(pio, ISR);
  366. }