mainstone.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638
  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/input.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/pwm_backlight.h>
  28. #include <linux/smc91x.h>
  29. #include <asm/types.h>
  30. #include <asm/setup.h>
  31. #include <asm/memory.h>
  32. #include <asm/mach-types.h>
  33. #include <mach/hardware.h>
  34. #include <asm/irq.h>
  35. #include <asm/sizes.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/irq.h>
  39. #include <asm/mach/flash.h>
  40. #include <mach/pxa-regs.h>
  41. #include <mach/pxa2xx-regs.h>
  42. #include <mach/mfp-pxa27x.h>
  43. #include <mach/mainstone.h>
  44. #include <mach/audio.h>
  45. #include <mach/pxafb.h>
  46. #include <mach/i2c.h>
  47. #include <mach/mmc.h>
  48. #include <mach/irda.h>
  49. #include <mach/ohci.h>
  50. #include <mach/pxa27x_keypad.h>
  51. #include "generic.h"
  52. #include "devices.h"
  53. static unsigned long mainstone_pin_config[] = {
  54. /* Chip Select */
  55. GPIO15_nCS_1,
  56. /* LCD - 16bpp Active TFT */
  57. GPIO58_LCD_LDD_0,
  58. GPIO59_LCD_LDD_1,
  59. GPIO60_LCD_LDD_2,
  60. GPIO61_LCD_LDD_3,
  61. GPIO62_LCD_LDD_4,
  62. GPIO63_LCD_LDD_5,
  63. GPIO64_LCD_LDD_6,
  64. GPIO65_LCD_LDD_7,
  65. GPIO66_LCD_LDD_8,
  66. GPIO67_LCD_LDD_9,
  67. GPIO68_LCD_LDD_10,
  68. GPIO69_LCD_LDD_11,
  69. GPIO70_LCD_LDD_12,
  70. GPIO71_LCD_LDD_13,
  71. GPIO72_LCD_LDD_14,
  72. GPIO73_LCD_LDD_15,
  73. GPIO74_LCD_FCLK,
  74. GPIO75_LCD_LCLK,
  75. GPIO76_LCD_PCLK,
  76. GPIO77_LCD_BIAS,
  77. GPIO16_PWM0_OUT, /* Backlight */
  78. /* MMC */
  79. GPIO32_MMC_CLK,
  80. GPIO112_MMC_CMD,
  81. GPIO92_MMC_DAT_0,
  82. GPIO109_MMC_DAT_1,
  83. GPIO110_MMC_DAT_2,
  84. GPIO111_MMC_DAT_3,
  85. /* USB Host Port 1 */
  86. GPIO88_USBH1_PWR,
  87. GPIO89_USBH1_PEN,
  88. /* PC Card */
  89. GPIO48_nPOE,
  90. GPIO49_nPWE,
  91. GPIO50_nPIOR,
  92. GPIO51_nPIOW,
  93. GPIO85_nPCE_1,
  94. GPIO54_nPCE_2,
  95. GPIO79_PSKTSEL,
  96. GPIO55_nPREG,
  97. GPIO56_nPWAIT,
  98. GPIO57_nIOIS16,
  99. /* AC97 */
  100. GPIO45_AC97_SYSCLK,
  101. /* Keypad */
  102. GPIO93_KP_DKIN_0,
  103. GPIO94_KP_DKIN_1,
  104. GPIO95_KP_DKIN_2,
  105. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  106. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  107. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  108. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  109. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  110. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  111. GPIO103_KP_MKOUT_0,
  112. GPIO104_KP_MKOUT_1,
  113. GPIO105_KP_MKOUT_2,
  114. GPIO106_KP_MKOUT_3,
  115. GPIO107_KP_MKOUT_4,
  116. GPIO108_KP_MKOUT_5,
  117. GPIO96_KP_MKOUT_6,
  118. /* GPIO */
  119. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  120. };
  121. static unsigned long mainstone_irq_enabled;
  122. static void mainstone_mask_irq(unsigned int irq)
  123. {
  124. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  125. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  126. }
  127. static void mainstone_unmask_irq(unsigned int irq)
  128. {
  129. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  130. /* the irq can be acknowledged only if deasserted, so it's done here */
  131. MST_INTSETCLR &= ~(1 << mainstone_irq);
  132. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  133. }
  134. static struct irq_chip mainstone_irq_chip = {
  135. .name = "FPGA",
  136. .ack = mainstone_mask_irq,
  137. .mask = mainstone_mask_irq,
  138. .unmask = mainstone_unmask_irq,
  139. };
  140. static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
  141. {
  142. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  143. do {
  144. GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
  145. if (likely(pending)) {
  146. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  147. generic_handle_irq(irq);
  148. }
  149. pending = MST_INTSETCLR & mainstone_irq_enabled;
  150. } while (pending);
  151. }
  152. static void __init mainstone_init_irq(void)
  153. {
  154. int irq;
  155. pxa27x_init_irq();
  156. /* setup extra Mainstone irqs */
  157. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  158. set_irq_chip(irq, &mainstone_irq_chip);
  159. set_irq_handler(irq, handle_level_irq);
  160. if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
  161. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
  162. else
  163. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  164. }
  165. set_irq_flags(MAINSTONE_IRQ(8), 0);
  166. set_irq_flags(MAINSTONE_IRQ(12), 0);
  167. MST_INTMSKENA = 0;
  168. MST_INTSETCLR = 0;
  169. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  170. set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
  171. }
  172. #ifdef CONFIG_PM
  173. static int mainstone_irq_resume(struct sys_device *dev)
  174. {
  175. MST_INTMSKENA = mainstone_irq_enabled;
  176. return 0;
  177. }
  178. static struct sysdev_class mainstone_irq_sysclass = {
  179. .name = "cpld_irq",
  180. .resume = mainstone_irq_resume,
  181. };
  182. static struct sys_device mainstone_irq_device = {
  183. .cls = &mainstone_irq_sysclass,
  184. };
  185. static int __init mainstone_irq_device_init(void)
  186. {
  187. int ret = -ENODEV;
  188. if (machine_is_mainstone()) {
  189. ret = sysdev_class_register(&mainstone_irq_sysclass);
  190. if (ret == 0)
  191. ret = sysdev_register(&mainstone_irq_device);
  192. }
  193. return ret;
  194. }
  195. device_initcall(mainstone_irq_device_init);
  196. #endif
  197. static struct resource smc91x_resources[] = {
  198. [0] = {
  199. .start = (MST_ETH_PHYS + 0x300),
  200. .end = (MST_ETH_PHYS + 0xfffff),
  201. .flags = IORESOURCE_MEM,
  202. },
  203. [1] = {
  204. .start = MAINSTONE_IRQ(3),
  205. .end = MAINSTONE_IRQ(3),
  206. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  207. }
  208. };
  209. static struct smc91x_platdata mainstone_smc91x_info = {
  210. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  211. SMC91X_NOWAIT | SMC91X_USE_DMA,
  212. };
  213. static struct platform_device smc91x_device = {
  214. .name = "smc91x",
  215. .id = 0,
  216. .num_resources = ARRAY_SIZE(smc91x_resources),
  217. .resource = smc91x_resources,
  218. .dev = {
  219. .platform_data = &mainstone_smc91x_info,
  220. },
  221. };
  222. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  223. {
  224. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  225. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  226. return 0;
  227. }
  228. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  229. {
  230. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  231. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  232. }
  233. static long mst_audio_suspend_mask;
  234. static void mst_audio_suspend(void *priv)
  235. {
  236. mst_audio_suspend_mask = MST_MSCWR2;
  237. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  238. }
  239. static void mst_audio_resume(void *priv)
  240. {
  241. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  242. }
  243. static pxa2xx_audio_ops_t mst_audio_ops = {
  244. .startup = mst_audio_startup,
  245. .shutdown = mst_audio_shutdown,
  246. .suspend = mst_audio_suspend,
  247. .resume = mst_audio_resume,
  248. };
  249. static struct resource flash_resources[] = {
  250. [0] = {
  251. .start = PXA_CS0_PHYS,
  252. .end = PXA_CS0_PHYS + SZ_64M - 1,
  253. .flags = IORESOURCE_MEM,
  254. },
  255. [1] = {
  256. .start = PXA_CS1_PHYS,
  257. .end = PXA_CS1_PHYS + SZ_64M - 1,
  258. .flags = IORESOURCE_MEM,
  259. },
  260. };
  261. static struct mtd_partition mainstoneflash0_partitions[] = {
  262. {
  263. .name = "Bootloader",
  264. .size = 0x00040000,
  265. .offset = 0,
  266. .mask_flags = MTD_WRITEABLE /* force read-only */
  267. },{
  268. .name = "Kernel",
  269. .size = 0x00400000,
  270. .offset = 0x00040000,
  271. },{
  272. .name = "Filesystem",
  273. .size = MTDPART_SIZ_FULL,
  274. .offset = 0x00440000
  275. }
  276. };
  277. static struct flash_platform_data mst_flash_data[2] = {
  278. {
  279. .map_name = "cfi_probe",
  280. .parts = mainstoneflash0_partitions,
  281. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  282. }, {
  283. .map_name = "cfi_probe",
  284. .parts = NULL,
  285. .nr_parts = 0,
  286. }
  287. };
  288. static struct platform_device mst_flash_device[2] = {
  289. {
  290. .name = "pxa2xx-flash",
  291. .id = 0,
  292. .dev = {
  293. .platform_data = &mst_flash_data[0],
  294. },
  295. .resource = &flash_resources[0],
  296. .num_resources = 1,
  297. },
  298. {
  299. .name = "pxa2xx-flash",
  300. .id = 1,
  301. .dev = {
  302. .platform_data = &mst_flash_data[1],
  303. },
  304. .resource = &flash_resources[1],
  305. .num_resources = 1,
  306. },
  307. };
  308. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  309. static struct platform_pwm_backlight_data mainstone_backlight_data = {
  310. .pwm_id = 0,
  311. .max_brightness = 1023,
  312. .dft_brightness = 1023,
  313. .pwm_period_ns = 78770,
  314. };
  315. static struct platform_device mainstone_backlight_device = {
  316. .name = "pwm-backlight",
  317. .dev = {
  318. .parent = &pxa27x_device_pwm0.dev,
  319. .platform_data = &mainstone_backlight_data,
  320. },
  321. };
  322. static void __init mainstone_backlight_register(void)
  323. {
  324. int ret = platform_device_register(&mainstone_backlight_device);
  325. if (ret)
  326. printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
  327. }
  328. #else
  329. #define mainstone_backlight_register() do { } while (0)
  330. #endif
  331. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  332. .pixclock = 50000,
  333. .xres = 640,
  334. .yres = 480,
  335. .bpp = 16,
  336. .hsync_len = 1,
  337. .left_margin = 0x9f,
  338. .right_margin = 1,
  339. .vsync_len = 44,
  340. .upper_margin = 0,
  341. .lower_margin = 0,
  342. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  343. };
  344. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  345. .pixclock = 110000,
  346. .xres = 240,
  347. .yres = 320,
  348. .bpp = 16,
  349. .hsync_len = 4,
  350. .left_margin = 8,
  351. .right_margin = 20,
  352. .vsync_len = 3,
  353. .upper_margin = 1,
  354. .lower_margin = 10,
  355. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  356. };
  357. static struct pxafb_mach_info mainstone_pxafb_info = {
  358. .num_modes = 1,
  359. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  360. };
  361. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  362. {
  363. int err;
  364. /* make sure SD/Memory Stick multiplexer's signals
  365. * are routed to MMC controller
  366. */
  367. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  368. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
  369. "MMC card detect", data);
  370. if (err)
  371. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  372. return err;
  373. }
  374. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  375. {
  376. struct pxamci_platform_data* p_d = dev->platform_data;
  377. if (( 1 << vdd) & p_d->ocr_mask) {
  378. printk(KERN_DEBUG "%s: on\n", __func__);
  379. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  380. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  381. } else {
  382. printk(KERN_DEBUG "%s: off\n", __func__);
  383. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  384. }
  385. }
  386. static void mainstone_mci_exit(struct device *dev, void *data)
  387. {
  388. free_irq(MAINSTONE_MMC_IRQ, data);
  389. }
  390. static struct pxamci_platform_data mainstone_mci_platform_data = {
  391. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  392. .init = mainstone_mci_init,
  393. .setpower = mainstone_mci_setpower,
  394. .exit = mainstone_mci_exit,
  395. };
  396. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  397. {
  398. unsigned long flags;
  399. local_irq_save(flags);
  400. if (mode & IR_SIRMODE) {
  401. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  402. } else if (mode & IR_FIRMODE) {
  403. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  404. }
  405. pxa2xx_transceiver_mode(dev, mode);
  406. if (mode & IR_OFF) {
  407. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  408. } else {
  409. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  410. }
  411. local_irq_restore(flags);
  412. }
  413. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  414. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  415. .transceiver_mode = mainstone_irda_transceiver_mode,
  416. };
  417. static struct gpio_keys_button gpio_keys_button[] = {
  418. [0] = {
  419. .desc = "wakeup",
  420. .code = KEY_SUSPEND,
  421. .type = EV_KEY,
  422. .gpio = 1,
  423. .wakeup = 1,
  424. },
  425. };
  426. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  427. .buttons = gpio_keys_button,
  428. .nbuttons = 1,
  429. };
  430. static struct platform_device mst_gpio_keys_device = {
  431. .name = "gpio-keys",
  432. .id = -1,
  433. .dev = {
  434. .platform_data = &mainstone_gpio_keys,
  435. },
  436. };
  437. static struct platform_device *platform_devices[] __initdata = {
  438. &smc91x_device,
  439. &mst_flash_device[0],
  440. &mst_flash_device[1],
  441. &mst_gpio_keys_device,
  442. };
  443. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  444. .port_mode = PMM_PERPORT_MODE,
  445. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  446. };
  447. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
  448. static unsigned int mainstone_matrix_keys[] = {
  449. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  450. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  451. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  452. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  453. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  454. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  455. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  456. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  457. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  458. KEY(0, 4, KEY_DOT), /* . */
  459. KEY(1, 4, KEY_CLOSE), /* @ */
  460. KEY(4, 4, KEY_SLASH),
  461. KEY(5, 4, KEY_BACKSLASH),
  462. KEY(0, 5, KEY_HOME),
  463. KEY(1, 5, KEY_LEFTSHIFT),
  464. KEY(2, 5, KEY_SPACE),
  465. KEY(3, 5, KEY_SPACE),
  466. KEY(4, 5, KEY_ENTER),
  467. KEY(5, 5, KEY_BACKSPACE),
  468. KEY(0, 6, KEY_UP),
  469. KEY(1, 6, KEY_DOWN),
  470. KEY(2, 6, KEY_LEFT),
  471. KEY(3, 6, KEY_RIGHT),
  472. KEY(4, 6, KEY_SELECT),
  473. };
  474. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  475. .matrix_key_rows = 6,
  476. .matrix_key_cols = 7,
  477. .matrix_key_map = mainstone_matrix_keys,
  478. .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
  479. .enable_rotary0 = 1,
  480. .rotary0_up_key = KEY_UP,
  481. .rotary0_down_key = KEY_DOWN,
  482. .debounce_interval = 30,
  483. };
  484. static void __init mainstone_init_keypad(void)
  485. {
  486. pxa_set_keypad_info(&mainstone_keypad_info);
  487. }
  488. #else
  489. static inline void mainstone_init_keypad(void) {}
  490. #endif
  491. static void __init mainstone_init(void)
  492. {
  493. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  494. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  495. mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
  496. mst_flash_data[1].width = 4;
  497. /* Compensate for SW7 which swaps the flash banks */
  498. mst_flash_data[SW7].name = "processor-flash";
  499. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  500. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  501. mst_flash_data[0].name);
  502. /* system bus arbiter setting
  503. * - Core_Park
  504. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  505. */
  506. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  507. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  508. /* reading Mainstone's "Virtual Configuration Register"
  509. might be handy to select LCD type here */
  510. if (0)
  511. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  512. else
  513. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  514. set_pxa_fb_info(&mainstone_pxafb_info);
  515. mainstone_backlight_register();
  516. pxa_set_mci_info(&mainstone_mci_platform_data);
  517. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  518. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  519. pxa_set_i2c_info(NULL);
  520. pxa_set_ac97_info(&mst_audio_ops);
  521. mainstone_init_keypad();
  522. }
  523. static struct map_desc mainstone_io_desc[] __initdata = {
  524. { /* CPLD */
  525. .virtual = MST_FPGA_VIRT,
  526. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  527. .length = 0x00100000,
  528. .type = MT_DEVICE
  529. }
  530. };
  531. static void __init mainstone_map_io(void)
  532. {
  533. pxa_map_io();
  534. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  535. /* for use I SRAM as framebuffer. */
  536. PSLR |= 0xF04;
  537. PCFR = 0x66;
  538. }
  539. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  540. /* Maintainer: MontaVista Software Inc. */
  541. .phys_io = 0x40000000,
  542. .boot_params = 0xa0000100, /* BLOB boot parameter setting */
  543. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  544. .map_io = mainstone_map_io,
  545. .init_irq = mainstone_init_irq,
  546. .timer = &pxa_timer,
  547. .init_machine = mainstone_init,
  548. MACHINE_END