mcbsp.c 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267
  1. /*
  2. * linux/arch/arm/mach-omap1/mcbsp.c
  3. *
  4. * Copyright (C) 2008 Instituto Nokia de Tecnologia
  5. * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Multichannel mode not supported.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/clk.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <linux/platform_device.h>
  19. #include <mach/dma.h>
  20. #include <mach/mux.h>
  21. #include <mach/cpu.h>
  22. #include <mach/mcbsp.h>
  23. #include <mach/dsp_common.h>
  24. #define DPS_RSTCT2_PER_EN (1 << 0)
  25. #define DSP_RSTCT2_WD_PER_EN (1 << 1)
  26. struct mcbsp_internal_clk {
  27. struct clk clk;
  28. struct clk **childs;
  29. int n_childs;
  30. };
  31. #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
  32. static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
  33. {
  34. const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
  35. int i;
  36. mclk->n_childs = ARRAY_SIZE(clk_names);
  37. mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
  38. GFP_KERNEL);
  39. for (i = 0; i < mclk->n_childs; i++) {
  40. /* We fake a platform device to get correct device id */
  41. struct platform_device pdev;
  42. pdev.dev.bus = &platform_bus_type;
  43. pdev.id = mclk->clk.id;
  44. mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
  45. if (IS_ERR(mclk->childs[i]))
  46. printk(KERN_ERR "Could not get clock %s (%d).\n",
  47. clk_names[i], mclk->clk.id);
  48. }
  49. }
  50. static int omap_mcbsp_clk_enable(struct clk *clk)
  51. {
  52. struct mcbsp_internal_clk *mclk = container_of(clk,
  53. struct mcbsp_internal_clk, clk);
  54. int i;
  55. for (i = 0; i < mclk->n_childs; i++)
  56. clk_enable(mclk->childs[i]);
  57. return 0;
  58. }
  59. static void omap_mcbsp_clk_disable(struct clk *clk)
  60. {
  61. struct mcbsp_internal_clk *mclk = container_of(clk,
  62. struct mcbsp_internal_clk, clk);
  63. int i;
  64. for (i = 0; i < mclk->n_childs; i++)
  65. clk_disable(mclk->childs[i]);
  66. }
  67. static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
  68. {
  69. .clk = {
  70. .name = "mcbsp_clk",
  71. .id = 1,
  72. .enable = omap_mcbsp_clk_enable,
  73. .disable = omap_mcbsp_clk_disable,
  74. },
  75. },
  76. {
  77. .clk = {
  78. .name = "mcbsp_clk",
  79. .id = 3,
  80. .enable = omap_mcbsp_clk_enable,
  81. .disable = omap_mcbsp_clk_disable,
  82. },
  83. },
  84. };
  85. #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
  86. #else
  87. #define omap_mcbsp_clks_size 0
  88. static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
  89. static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
  90. { }
  91. #endif
  92. static void omap1_mcbsp_request(unsigned int id)
  93. {
  94. /*
  95. * On 1510, 1610 and 1710, McBSP1 and McBSP3
  96. * are DSP public peripherals.
  97. */
  98. if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
  99. omap_dsp_request_mem();
  100. /*
  101. * DSP external peripheral reset
  102. * FIXME: This should be moved to dsp code
  103. */
  104. __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
  105. DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
  106. }
  107. }
  108. static void omap1_mcbsp_free(unsigned int id)
  109. {
  110. if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
  111. omap_dsp_release_mem();
  112. }
  113. static struct omap_mcbsp_ops omap1_mcbsp_ops = {
  114. .request = omap1_mcbsp_request,
  115. .free = omap1_mcbsp_free,
  116. };
  117. #ifdef CONFIG_ARCH_OMAP730
  118. static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
  119. {
  120. .phys_base = OMAP730_MCBSP1_BASE,
  121. .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
  122. .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
  123. .rx_irq = INT_730_McBSP1RX,
  124. .tx_irq = INT_730_McBSP1TX,
  125. .ops = &omap1_mcbsp_ops,
  126. },
  127. {
  128. .phys_base = OMAP730_MCBSP2_BASE,
  129. .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
  130. .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
  131. .rx_irq = INT_730_McBSP2RX,
  132. .tx_irq = INT_730_McBSP2TX,
  133. .ops = &omap1_mcbsp_ops,
  134. },
  135. };
  136. #define OMAP730_MCBSP_PDATA_SZ ARRAY_SIZE(omap730_mcbsp_pdata)
  137. #else
  138. #define omap730_mcbsp_pdata NULL
  139. #define OMAP730_MCBSP_PDATA_SZ 0
  140. #endif
  141. #ifdef CONFIG_ARCH_OMAP15XX
  142. static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
  143. {
  144. .phys_base = OMAP1510_MCBSP1_BASE,
  145. .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
  146. .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
  147. .rx_irq = INT_McBSP1RX,
  148. .tx_irq = INT_McBSP1TX,
  149. .ops = &omap1_mcbsp_ops,
  150. .clk_name = "mcbsp_clk",
  151. },
  152. {
  153. .phys_base = OMAP1510_MCBSP2_BASE,
  154. .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
  155. .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
  156. .rx_irq = INT_1510_SPI_RX,
  157. .tx_irq = INT_1510_SPI_TX,
  158. .ops = &omap1_mcbsp_ops,
  159. },
  160. {
  161. .phys_base = OMAP1510_MCBSP3_BASE,
  162. .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
  163. .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
  164. .rx_irq = INT_McBSP3RX,
  165. .tx_irq = INT_McBSP3TX,
  166. .ops = &omap1_mcbsp_ops,
  167. .clk_name = "mcbsp_clk",
  168. },
  169. };
  170. #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
  171. #else
  172. #define omap15xx_mcbsp_pdata NULL
  173. #define OMAP15XX_MCBSP_PDATA_SZ 0
  174. #endif
  175. #ifdef CONFIG_ARCH_OMAP16XX
  176. static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
  177. {
  178. .phys_base = OMAP1610_MCBSP1_BASE,
  179. .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
  180. .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
  181. .rx_irq = INT_McBSP1RX,
  182. .tx_irq = INT_McBSP1TX,
  183. .ops = &omap1_mcbsp_ops,
  184. .clk_name = "mcbsp_clk",
  185. },
  186. {
  187. .phys_base = OMAP1610_MCBSP2_BASE,
  188. .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
  189. .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
  190. .rx_irq = INT_1610_McBSP2_RX,
  191. .tx_irq = INT_1610_McBSP2_TX,
  192. .ops = &omap1_mcbsp_ops,
  193. },
  194. {
  195. .phys_base = OMAP1610_MCBSP3_BASE,
  196. .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
  197. .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
  198. .rx_irq = INT_McBSP3RX,
  199. .tx_irq = INT_McBSP3TX,
  200. .ops = &omap1_mcbsp_ops,
  201. .clk_name = "mcbsp_clk",
  202. },
  203. };
  204. #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
  205. #else
  206. #define omap16xx_mcbsp_pdata NULL
  207. #define OMAP16XX_MCBSP_PDATA_SZ 0
  208. #endif
  209. int __init omap1_mcbsp_init(void)
  210. {
  211. int i;
  212. for (i = 0; i < omap_mcbsp_clks_size; i++) {
  213. if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
  214. omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
  215. clk_register(&omap_mcbsp_clks[i].clk);
  216. }
  217. }
  218. if (cpu_is_omap730())
  219. omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
  220. if (cpu_is_omap15xx())
  221. omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
  222. if (cpu_is_omap16xx())
  223. omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
  224. mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
  225. GFP_KERNEL);
  226. if (!mcbsp_ptr)
  227. return -ENOMEM;
  228. if (cpu_is_omap730())
  229. omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata,
  230. OMAP730_MCBSP_PDATA_SZ);
  231. if (cpu_is_omap15xx())
  232. omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
  233. OMAP15XX_MCBSP_PDATA_SZ);
  234. if (cpu_is_omap16xx())
  235. omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata,
  236. OMAP16XX_MCBSP_PDATA_SZ);
  237. return omap_mcbsp_init();
  238. }
  239. arch_initcall(omap1_mcbsp_init);