wm8523.c 18 KB

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  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/initval.h>
  27. #include <sound/tlv.h>
  28. #include "wm8523.h"
  29. static struct snd_soc_codec *wm8523_codec;
  30. struct snd_soc_codec_device soc_codec_dev_wm8523;
  31. #define WM8523_NUM_SUPPLIES 2
  32. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  33. "AVDD",
  34. "LINEVDD",
  35. };
  36. #define WM8523_NUM_RATES 7
  37. /* codec private data */
  38. struct wm8523_priv {
  39. struct snd_soc_codec codec;
  40. u16 reg_cache[WM8523_REGISTER_COUNT];
  41. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  42. unsigned int sysclk;
  43. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  44. struct snd_pcm_hw_constraint_list rate_constraint;
  45. };
  46. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  47. 0x8523, /* R0 - DEVICE_ID */
  48. 0x0001, /* R1 - REVISION */
  49. 0x0000, /* R2 - PSCTRL1 */
  50. 0x1812, /* R3 - AIF_CTRL1 */
  51. 0x0000, /* R4 - AIF_CTRL2 */
  52. 0x0001, /* R5 - DAC_CTRL3 */
  53. 0x0190, /* R6 - DAC_GAINL */
  54. 0x0190, /* R7 - DAC_GAINR */
  55. 0x0000, /* R8 - ZERO_DETECT */
  56. };
  57. static int wm8523_volatile(unsigned int reg)
  58. {
  59. switch (reg) {
  60. case WM8523_DEVICE_ID:
  61. case WM8523_REVISION:
  62. return 1;
  63. default:
  64. return 0;
  65. }
  66. }
  67. static int wm8523_write(struct snd_soc_codec *codec, unsigned int reg,
  68. unsigned int value)
  69. {
  70. struct wm8523_priv *wm8523 = codec->private_data;
  71. u8 data[3];
  72. BUG_ON(reg > WM8523_MAX_REGISTER);
  73. data[0] = reg;
  74. data[1] = (value >> 8) & 0x00ff;
  75. data[2] = value & 0x00ff;
  76. if (!wm8523_volatile(reg))
  77. wm8523->reg_cache[reg] = value;
  78. if (codec->hw_write(codec->control_data, data, 3) == 3)
  79. return 0;
  80. else
  81. return -EIO;
  82. }
  83. static int wm8523_reset(struct snd_soc_codec *codec)
  84. {
  85. return wm8523_write(codec, WM8523_DEVICE_ID, 0);
  86. }
  87. static unsigned int wm8523_read_hw(struct snd_soc_codec *codec, u8 reg)
  88. {
  89. struct i2c_msg xfer[2];
  90. u16 data;
  91. int ret;
  92. struct i2c_client *i2c = codec->control_data;
  93. /* Write register */
  94. xfer[0].addr = i2c->addr;
  95. xfer[0].flags = 0;
  96. xfer[0].len = 1;
  97. xfer[0].buf = &reg;
  98. /* Read data */
  99. xfer[1].addr = i2c->addr;
  100. xfer[1].flags = I2C_M_RD;
  101. xfer[1].len = 2;
  102. xfer[1].buf = (u8 *)&data;
  103. ret = i2c_transfer(i2c->adapter, xfer, 2);
  104. if (ret != 2) {
  105. dev_err(codec->dev, "Failed to read 0x%x: %d\n", reg, ret);
  106. return 0;
  107. }
  108. return (data >> 8) | ((data & 0xff) << 8);
  109. }
  110. static unsigned int wm8523_read(struct snd_soc_codec *codec,
  111. unsigned int reg)
  112. {
  113. u16 *reg_cache = codec->reg_cache;
  114. BUG_ON(reg > WM8523_MAX_REGISTER);
  115. if (wm8523_volatile(reg))
  116. return wm8523_read_hw(codec, reg);
  117. else
  118. return reg_cache[reg];
  119. }
  120. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  121. static const char *wm8523_zd_count_text[] = {
  122. "1024",
  123. "2048",
  124. };
  125. static const struct soc_enum wm8523_zc_count =
  126. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  127. static const struct snd_kcontrol_new wm8523_snd_controls[] = {
  128. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  129. 0, 448, 0, dac_tlv),
  130. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  131. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  132. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  133. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  134. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  135. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  136. };
  137. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  138. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  139. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  140. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  141. };
  142. static const struct snd_soc_dapm_route intercon[] = {
  143. { "LINEVOUTL", NULL, "DAC" },
  144. { "LINEVOUTR", NULL, "DAC" },
  145. };
  146. static int wm8523_add_widgets(struct snd_soc_codec *codec)
  147. {
  148. snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
  149. ARRAY_SIZE(wm8523_dapm_widgets));
  150. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  151. snd_soc_dapm_new_widgets(codec);
  152. return 0;
  153. }
  154. static struct {
  155. int value;
  156. int ratio;
  157. } lrclk_ratios[WM8523_NUM_RATES] = {
  158. { 1, 128 },
  159. { 2, 192 },
  160. { 3, 256 },
  161. { 4, 384 },
  162. { 5, 512 },
  163. { 6, 768 },
  164. { 7, 1152 },
  165. };
  166. static int wm8523_startup(struct snd_pcm_substream *substream,
  167. struct snd_soc_dai *dai)
  168. {
  169. struct snd_soc_codec *codec = dai->codec;
  170. struct wm8523_priv *wm8523 = codec->private_data;
  171. /* The set of sample rates that can be supported depends on the
  172. * MCLK supplied to the CODEC - enforce this.
  173. */
  174. if (!wm8523->sysclk) {
  175. dev_err(codec->dev,
  176. "No MCLK configured, call set_sysclk() on init\n");
  177. return -EINVAL;
  178. }
  179. return 0;
  180. snd_pcm_hw_constraint_list(substream->runtime, 0,
  181. SNDRV_PCM_HW_PARAM_RATE,
  182. &wm8523->rate_constraint);
  183. return 0;
  184. }
  185. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  186. struct snd_pcm_hw_params *params,
  187. struct snd_soc_dai *dai)
  188. {
  189. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  190. struct snd_soc_device *socdev = rtd->socdev;
  191. struct snd_soc_codec *codec = socdev->card->codec;
  192. struct wm8523_priv *wm8523 = codec->private_data;
  193. int i;
  194. u16 aifctrl1 = wm8523_read(codec, WM8523_AIF_CTRL1);
  195. u16 aifctrl2 = wm8523_read(codec, WM8523_AIF_CTRL2);
  196. /* Find a supported LRCLK ratio */
  197. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  198. if (wm8523->sysclk / params_rate(params) ==
  199. lrclk_ratios[i].ratio)
  200. break;
  201. }
  202. /* Should never happen, should be handled by constraints */
  203. if (i == ARRAY_SIZE(lrclk_ratios)) {
  204. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  205. wm8523->sysclk / params_rate(params));
  206. return -EINVAL;
  207. }
  208. aifctrl2 &= ~WM8523_SR_MASK;
  209. aifctrl2 |= lrclk_ratios[i].value;
  210. aifctrl1 &= ~WM8523_WL_MASK;
  211. switch (params_format(params)) {
  212. case SNDRV_PCM_FORMAT_S16_LE:
  213. break;
  214. case SNDRV_PCM_FORMAT_S20_3LE:
  215. aifctrl1 |= 0x8;
  216. break;
  217. case SNDRV_PCM_FORMAT_S24_LE:
  218. aifctrl1 |= 0x10;
  219. break;
  220. case SNDRV_PCM_FORMAT_S32_LE:
  221. aifctrl1 |= 0x18;
  222. break;
  223. }
  224. wm8523_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  225. wm8523_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  226. return 0;
  227. }
  228. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  229. int clk_id, unsigned int freq, int dir)
  230. {
  231. struct snd_soc_codec *codec = codec_dai->codec;
  232. struct wm8523_priv *wm8523 = codec->private_data;
  233. unsigned int val;
  234. int i;
  235. wm8523->sysclk = freq;
  236. wm8523->rate_constraint.count = 0;
  237. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  238. val = freq / lrclk_ratios[i].ratio;
  239. /* Check that it's a standard rate since core can't
  240. * cope with others and having the odd rates confuses
  241. * constraint matching.
  242. */
  243. switch (val) {
  244. case 8000:
  245. case 11025:
  246. case 16000:
  247. case 22050:
  248. case 32000:
  249. case 44100:
  250. case 48000:
  251. case 64000:
  252. case 88200:
  253. case 96000:
  254. case 176400:
  255. case 192000:
  256. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  257. val);
  258. wm8523->rate_constraint_list[i] = val;
  259. wm8523->rate_constraint.count++;
  260. break;
  261. default:
  262. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  263. val);
  264. }
  265. }
  266. /* Need at least one supported rate... */
  267. if (wm8523->rate_constraint.count == 0)
  268. return -EINVAL;
  269. return 0;
  270. }
  271. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  272. unsigned int fmt)
  273. {
  274. struct snd_soc_codec *codec = codec_dai->codec;
  275. u16 aifctrl1 = wm8523_read(codec, WM8523_AIF_CTRL1);
  276. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  277. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  278. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  279. case SND_SOC_DAIFMT_CBM_CFM:
  280. aifctrl1 |= WM8523_AIF_MSTR;
  281. break;
  282. case SND_SOC_DAIFMT_CBS_CFS:
  283. break;
  284. default:
  285. return -EINVAL;
  286. }
  287. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  288. case SND_SOC_DAIFMT_I2S:
  289. aifctrl1 |= 0x0002;
  290. break;
  291. case SND_SOC_DAIFMT_RIGHT_J:
  292. break;
  293. case SND_SOC_DAIFMT_LEFT_J:
  294. aifctrl1 |= 0x0001;
  295. break;
  296. case SND_SOC_DAIFMT_DSP_A:
  297. aifctrl1 |= 0x0003;
  298. break;
  299. case SND_SOC_DAIFMT_DSP_B:
  300. aifctrl1 |= 0x0023;
  301. break;
  302. default:
  303. return -EINVAL;
  304. }
  305. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  306. case SND_SOC_DAIFMT_NB_NF:
  307. break;
  308. case SND_SOC_DAIFMT_IB_IF:
  309. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  310. break;
  311. case SND_SOC_DAIFMT_IB_NF:
  312. aifctrl1 |= WM8523_BCLK_INV;
  313. break;
  314. case SND_SOC_DAIFMT_NB_IF:
  315. aifctrl1 |= WM8523_LRCLK_INV;
  316. break;
  317. default:
  318. return -EINVAL;
  319. }
  320. wm8523_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  321. return 0;
  322. }
  323. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  324. enum snd_soc_bias_level level)
  325. {
  326. struct wm8523_priv *wm8523 = codec->private_data;
  327. int ret, i;
  328. switch (level) {
  329. case SND_SOC_BIAS_ON:
  330. break;
  331. case SND_SOC_BIAS_PREPARE:
  332. /* Full power on */
  333. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  334. WM8523_SYS_ENA_MASK, 3);
  335. break;
  336. case SND_SOC_BIAS_STANDBY:
  337. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  338. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  339. wm8523->supplies);
  340. if (ret != 0) {
  341. dev_err(codec->dev,
  342. "Failed to enable supplies: %d\n",
  343. ret);
  344. return ret;
  345. }
  346. /* Initial power up */
  347. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  348. WM8523_SYS_ENA_MASK, 1);
  349. /* Sync back default/cached values */
  350. for (i = WM8523_AIF_CTRL1;
  351. i < WM8523_MAX_REGISTER; i++)
  352. wm8523_write(codec, i, wm8523->reg_cache[i]);
  353. msleep(100);
  354. }
  355. /* Power up to mute */
  356. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  357. WM8523_SYS_ENA_MASK, 2);
  358. break;
  359. case SND_SOC_BIAS_OFF:
  360. /* The chip runs through the power down sequence for us. */
  361. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  362. WM8523_SYS_ENA_MASK, 0);
  363. msleep(100);
  364. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  365. wm8523->supplies);
  366. break;
  367. }
  368. codec->bias_level = level;
  369. return 0;
  370. }
  371. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  372. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  373. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  374. static struct snd_soc_dai_ops wm8523_dai_ops = {
  375. .startup = wm8523_startup,
  376. .hw_params = wm8523_hw_params,
  377. .set_sysclk = wm8523_set_dai_sysclk,
  378. .set_fmt = wm8523_set_dai_fmt,
  379. };
  380. struct snd_soc_dai wm8523_dai = {
  381. .name = "WM8523",
  382. .playback = {
  383. .stream_name = "Playback",
  384. .channels_min = 2, /* Mono modes not yet supported */
  385. .channels_max = 2,
  386. .rates = WM8523_RATES,
  387. .formats = WM8523_FORMATS,
  388. },
  389. .ops = &wm8523_dai_ops,
  390. };
  391. EXPORT_SYMBOL_GPL(wm8523_dai);
  392. #ifdef CONFIG_PM
  393. static int wm8523_suspend(struct platform_device *pdev, pm_message_t state)
  394. {
  395. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  396. struct snd_soc_codec *codec = socdev->card->codec;
  397. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  398. return 0;
  399. }
  400. static int wm8523_resume(struct platform_device *pdev)
  401. {
  402. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  403. struct snd_soc_codec *codec = socdev->card->codec;
  404. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  405. return 0;
  406. }
  407. #else
  408. #define wm8523_suspend NULL
  409. #define wm8523_resume NULL
  410. #endif
  411. static int wm8523_probe(struct platform_device *pdev)
  412. {
  413. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  414. struct snd_soc_codec *codec;
  415. int ret = 0;
  416. if (wm8523_codec == NULL) {
  417. dev_err(&pdev->dev, "Codec device not registered\n");
  418. return -ENODEV;
  419. }
  420. socdev->card->codec = wm8523_codec;
  421. codec = wm8523_codec;
  422. /* register pcms */
  423. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  424. if (ret < 0) {
  425. dev_err(codec->dev, "failed to create pcms: %d\n", ret);
  426. goto pcm_err;
  427. }
  428. snd_soc_add_controls(codec, wm8523_snd_controls,
  429. ARRAY_SIZE(wm8523_snd_controls));
  430. wm8523_add_widgets(codec);
  431. ret = snd_soc_init_card(socdev);
  432. if (ret < 0) {
  433. dev_err(codec->dev, "failed to register card: %d\n", ret);
  434. goto card_err;
  435. }
  436. return ret;
  437. card_err:
  438. snd_soc_free_pcms(socdev);
  439. snd_soc_dapm_free(socdev);
  440. pcm_err:
  441. return ret;
  442. }
  443. static int wm8523_remove(struct platform_device *pdev)
  444. {
  445. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  446. snd_soc_free_pcms(socdev);
  447. snd_soc_dapm_free(socdev);
  448. return 0;
  449. }
  450. struct snd_soc_codec_device soc_codec_dev_wm8523 = {
  451. .probe = wm8523_probe,
  452. .remove = wm8523_remove,
  453. .suspend = wm8523_suspend,
  454. .resume = wm8523_resume,
  455. };
  456. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8523);
  457. static int wm8523_register(struct wm8523_priv *wm8523)
  458. {
  459. int ret;
  460. struct snd_soc_codec *codec = &wm8523->codec;
  461. int i;
  462. if (wm8523_codec) {
  463. dev_err(codec->dev, "Another WM8523 is registered\n");
  464. return -EINVAL;
  465. }
  466. mutex_init(&codec->mutex);
  467. INIT_LIST_HEAD(&codec->dapm_widgets);
  468. INIT_LIST_HEAD(&codec->dapm_paths);
  469. codec->private_data = wm8523;
  470. codec->name = "WM8523";
  471. codec->owner = THIS_MODULE;
  472. codec->read = wm8523_read;
  473. codec->write = wm8523_write;
  474. codec->bias_level = SND_SOC_BIAS_OFF;
  475. codec->set_bias_level = wm8523_set_bias_level;
  476. codec->dai = &wm8523_dai;
  477. codec->num_dai = 1;
  478. codec->reg_cache_size = WM8523_REGISTER_COUNT;
  479. codec->reg_cache = &wm8523->reg_cache;
  480. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  481. wm8523->rate_constraint.count =
  482. ARRAY_SIZE(wm8523->rate_constraint_list);
  483. memcpy(codec->reg_cache, wm8523_reg, sizeof(wm8523_reg));
  484. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  485. wm8523->supplies[i].supply = wm8523_supply_names[i];
  486. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  487. wm8523->supplies);
  488. if (ret != 0) {
  489. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  490. goto err;
  491. }
  492. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  493. wm8523->supplies);
  494. if (ret != 0) {
  495. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  496. goto err_get;
  497. }
  498. ret = wm8523_read(codec, WM8523_DEVICE_ID);
  499. if (ret < 0) {
  500. dev_err(codec->dev, "Failed to read ID register\n");
  501. goto err_enable;
  502. }
  503. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  504. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  505. ret = -EINVAL;
  506. goto err_enable;
  507. }
  508. ret = wm8523_read(codec, WM8523_REVISION);
  509. if (ret < 0) {
  510. dev_err(codec->dev, "Failed to read revision register\n");
  511. goto err_enable;
  512. }
  513. dev_info(codec->dev, "revision %c\n",
  514. (ret & WM8523_CHIP_REV_MASK) + 'A');
  515. ret = wm8523_reset(codec);
  516. if (ret < 0) {
  517. dev_err(codec->dev, "Failed to issue reset\n");
  518. goto err_enable;
  519. }
  520. wm8523_dai.dev = codec->dev;
  521. /* Change some default settings - latch VU and enable ZC */
  522. wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
  523. wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
  524. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  525. /* Bias level configuration will have done an extra enable */
  526. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  527. wm8523_codec = codec;
  528. ret = snd_soc_register_codec(codec);
  529. if (ret != 0) {
  530. dev_err(codec->dev, "Failed to register codec: %d\n", ret);
  531. return ret;
  532. }
  533. ret = snd_soc_register_dai(&wm8523_dai);
  534. if (ret != 0) {
  535. dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
  536. snd_soc_unregister_codec(codec);
  537. return ret;
  538. }
  539. return 0;
  540. err_enable:
  541. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  542. err_get:
  543. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  544. err:
  545. kfree(wm8523);
  546. return ret;
  547. }
  548. static void wm8523_unregister(struct wm8523_priv *wm8523)
  549. {
  550. wm8523_set_bias_level(&wm8523->codec, SND_SOC_BIAS_OFF);
  551. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  552. snd_soc_unregister_dai(&wm8523_dai);
  553. snd_soc_unregister_codec(&wm8523->codec);
  554. kfree(wm8523);
  555. wm8523_codec = NULL;
  556. }
  557. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  558. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  559. const struct i2c_device_id *id)
  560. {
  561. struct wm8523_priv *wm8523;
  562. struct snd_soc_codec *codec;
  563. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  564. if (wm8523 == NULL)
  565. return -ENOMEM;
  566. codec = &wm8523->codec;
  567. codec->hw_write = (hw_write_t)i2c_master_send;
  568. i2c_set_clientdata(i2c, wm8523);
  569. codec->control_data = i2c;
  570. codec->dev = &i2c->dev;
  571. return wm8523_register(wm8523);
  572. }
  573. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  574. {
  575. struct wm8523_priv *wm8523 = i2c_get_clientdata(client);
  576. wm8523_unregister(wm8523);
  577. return 0;
  578. }
  579. #ifdef CONFIG_PM
  580. static int wm8523_i2c_suspend(struct i2c_client *i2c, pm_message_t msg)
  581. {
  582. return snd_soc_suspend_device(&i2c->dev);
  583. }
  584. static int wm8523_i2c_resume(struct i2c_client *i2c)
  585. {
  586. return snd_soc_resume_device(&i2c->dev);
  587. }
  588. #else
  589. #define wm8523_i2c_suspend NULL
  590. #define wm8523_i2c_resume NULL
  591. #endif
  592. static const struct i2c_device_id wm8523_i2c_id[] = {
  593. { "wm8523", 0 },
  594. { }
  595. };
  596. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  597. static struct i2c_driver wm8523_i2c_driver = {
  598. .driver = {
  599. .name = "WM8523",
  600. .owner = THIS_MODULE,
  601. },
  602. .probe = wm8523_i2c_probe,
  603. .remove = __devexit_p(wm8523_i2c_remove),
  604. .suspend = wm8523_i2c_suspend,
  605. .resume = wm8523_i2c_resume,
  606. .id_table = wm8523_i2c_id,
  607. };
  608. #endif
  609. static int __init wm8523_modinit(void)
  610. {
  611. int ret;
  612. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  613. ret = i2c_add_driver(&wm8523_i2c_driver);
  614. if (ret != 0) {
  615. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  616. ret);
  617. }
  618. #endif
  619. return 0;
  620. }
  621. module_init(wm8523_modinit);
  622. static void __exit wm8523_exit(void)
  623. {
  624. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  625. i2c_del_driver(&wm8523_i2c_driver);
  626. #endif
  627. }
  628. module_exit(wm8523_exit);
  629. MODULE_DESCRIPTION("ASoC WM8523 driver");
  630. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  631. MODULE_LICENSE("GPL");