genapic.h 6.5 KB

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  1. #ifndef _ASM_X86_GENAPIC_H
  2. #define _ASM_X86_GENAPIC_H
  3. #include <linux/cpumask.h>
  4. #include <asm/mpspec.h>
  5. #include <asm/atomic.h>
  6. /*
  7. * Copyright 2004 James Cleverdon, IBM.
  8. * Subject to the GNU Public License, v.2
  9. *
  10. * Generic APIC sub-arch data struct.
  11. *
  12. * Hacked for x86-64 by James Cleverdon from i386 architecture code by
  13. * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
  14. * James Cleverdon.
  15. */
  16. struct genapic {
  17. char *name;
  18. int (*probe)(void);
  19. int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
  20. int (*apic_id_registered)(void);
  21. u32 irq_delivery_mode;
  22. u32 irq_dest_mode;
  23. const struct cpumask *(*target_cpus)(void);
  24. int disable_esr;
  25. int dest_logical;
  26. unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
  27. unsigned long (*check_apicid_present)(int apicid);
  28. void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
  29. void (*init_apic_ldr)(void);
  30. physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
  31. void (*setup_apic_routing)(void);
  32. int (*multi_timer_check)(int apic, int irq);
  33. int (*apicid_to_node)(int logical_apicid);
  34. int (*cpu_to_logical_apicid)(int cpu);
  35. int (*cpu_present_to_apicid)(int mps_cpu);
  36. physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
  37. void (*setup_portio_remap)(void);
  38. int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
  39. void (*enable_apic_mode)(void);
  40. int (*phys_pkg_id)(int cpuid_apic, int index_msb);
  41. /*
  42. * When one of the next two hooks returns 1 the genapic
  43. * is switched to this. Essentially they are additional
  44. * probe functions:
  45. */
  46. int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
  47. unsigned int (*get_apic_id)(unsigned long x);
  48. unsigned long (*set_apic_id)(unsigned int id);
  49. unsigned long apic_id_mask;
  50. unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
  51. unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
  52. const struct cpumask *andmask);
  53. /* ipi */
  54. void (*send_IPI_mask)(const struct cpumask *mask, int vector);
  55. void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
  56. int vector);
  57. void (*send_IPI_allbutself)(int vector);
  58. void (*send_IPI_all)(int vector);
  59. void (*send_IPI_self)(int vector);
  60. /* wakeup_secondary_cpu */
  61. int (*wakeup_cpu)(int apicid, unsigned long start_eip);
  62. int trampoline_phys_low;
  63. int trampoline_phys_high;
  64. void (*wait_for_init_deassert)(atomic_t *deassert);
  65. void (*smp_callin_clear_local_apic)(void);
  66. void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
  67. void (*inquire_remote_apic)(int apicid);
  68. };
  69. extern struct genapic *apic;
  70. /*
  71. * Warm reset vector default position:
  72. */
  73. #define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
  74. #define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
  75. #ifdef CONFIG_X86_32
  76. extern void es7000_update_genapic_to_cluster(void);
  77. #else
  78. extern struct genapic apic_flat;
  79. extern struct genapic apic_physflat;
  80. extern struct genapic apic_x2apic_cluster;
  81. extern struct genapic apic_x2apic_phys;
  82. extern int default_acpi_madt_oem_check(char *, char *);
  83. extern void apic_send_IPI_self(int vector);
  84. extern struct genapic apic_x2apic_uv_x;
  85. DECLARE_PER_CPU(int, x2apic_extra_bits);
  86. extern void default_setup_apic_routing(void);
  87. extern int default_cpu_present_to_apicid(int mps_cpu);
  88. extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
  89. #endif
  90. static inline void default_wait_for_init_deassert(atomic_t *deassert)
  91. {
  92. while (!atomic_read(deassert))
  93. cpu_relax();
  94. return;
  95. }
  96. extern void generic_bigsmp_probe(void);
  97. #ifdef CONFIG_X86_LOCAL_APIC
  98. #include <asm/smp.h>
  99. #define APIC_DFR_VALUE (APIC_DFR_FLAT)
  100. static inline const struct cpumask *default_target_cpus(void)
  101. {
  102. #ifdef CONFIG_SMP
  103. return cpu_online_mask;
  104. #else
  105. return cpumask_of(0);
  106. #endif
  107. }
  108. DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
  109. static inline unsigned int read_apic_id(void)
  110. {
  111. unsigned int reg;
  112. reg = *(u32 *)(APIC_BASE + APIC_ID);
  113. return apic->get_apic_id(reg);
  114. }
  115. #ifdef CONFIG_X86_64
  116. extern void default_setup_apic_routing(void);
  117. #else
  118. /*
  119. * Set up the logical destination ID.
  120. *
  121. * Intel recommends to set DFR, LDR and TPR before enabling
  122. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  123. * document number 292116). So here it goes...
  124. */
  125. extern void default_init_apic_ldr(void);
  126. static inline int default_apic_id_registered(void)
  127. {
  128. return physid_isset(read_apic_id(), phys_cpu_present_map);
  129. }
  130. static inline unsigned int
  131. default_cpu_mask_to_apicid(const struct cpumask *cpumask)
  132. {
  133. return cpumask_bits(cpumask)[0];
  134. }
  135. static inline unsigned int
  136. default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  137. const struct cpumask *andmask)
  138. {
  139. unsigned long mask1 = cpumask_bits(cpumask)[0];
  140. unsigned long mask2 = cpumask_bits(andmask)[0];
  141. unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
  142. return (unsigned int)(mask1 & mask2 & mask3);
  143. }
  144. static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
  145. {
  146. return cpuid_apic >> index_msb;
  147. }
  148. static inline void default_setup_apic_routing(void)
  149. {
  150. #ifdef CONFIG_X86_IO_APIC
  151. printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
  152. "Flat", nr_ioapics);
  153. #endif
  154. }
  155. extern int default_apicid_to_node(int logical_apicid);
  156. #endif
  157. static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
  158. {
  159. return physid_isset(apicid, bitmap);
  160. }
  161. static inline unsigned long default_check_apicid_present(int bit)
  162. {
  163. return physid_isset(bit, phys_cpu_present_map);
  164. }
  165. static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
  166. {
  167. return phys_map;
  168. }
  169. /* Mapping from cpu number to logical apicid */
  170. static inline int default_cpu_to_logical_apicid(int cpu)
  171. {
  172. return 1 << cpu;
  173. }
  174. static inline int __default_cpu_present_to_apicid(int mps_cpu)
  175. {
  176. if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
  177. return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
  178. else
  179. return BAD_APICID;
  180. }
  181. static inline int
  182. __default_check_phys_apicid_present(int boot_cpu_physical_apicid)
  183. {
  184. return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
  185. }
  186. #ifdef CONFIG_X86_32
  187. static inline int default_cpu_present_to_apicid(int mps_cpu)
  188. {
  189. return __default_cpu_present_to_apicid(mps_cpu);
  190. }
  191. static inline int
  192. default_check_phys_apicid_present(int boot_cpu_physical_apicid)
  193. {
  194. return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
  195. }
  196. #else
  197. extern int default_cpu_present_to_apicid(int mps_cpu);
  198. extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
  199. #endif
  200. static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
  201. {
  202. return physid_mask_of_physid(phys_apicid);
  203. }
  204. #endif /* CONFIG_X86_LOCAL_APIC */
  205. #endif /* _ASM_X86_GENAPIC_64_H */