i915_debugfs.c 32 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. * Keith Packard <keithp@keithp.com>
  26. *
  27. */
  28. #include <linux/seq_file.h>
  29. #include <linux/debugfs.h>
  30. #include <linux/slab.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "intel_drv.h"
  34. #include "i915_drm.h"
  35. #include "i915_drv.h"
  36. #define DRM_I915_RING_DEBUG 1
  37. #if defined(CONFIG_DEBUG_FS)
  38. enum {
  39. ACTIVE_LIST,
  40. FLUSHING_LIST,
  41. INACTIVE_LIST,
  42. PINNED_LIST,
  43. DEFERRED_FREE_LIST,
  44. };
  45. enum {
  46. RENDER_RING,
  47. BSD_RING,
  48. BLT_RING,
  49. };
  50. static const char *yesno(int v)
  51. {
  52. return v ? "yes" : "no";
  53. }
  54. static int i915_capabilities(struct seq_file *m, void *data)
  55. {
  56. struct drm_info_node *node = (struct drm_info_node *) m->private;
  57. struct drm_device *dev = node->minor->dev;
  58. const struct intel_device_info *info = INTEL_INFO(dev);
  59. seq_printf(m, "gen: %d\n", info->gen);
  60. #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
  61. B(is_mobile);
  62. B(is_i85x);
  63. B(is_i915g);
  64. B(is_i945gm);
  65. B(is_g33);
  66. B(need_gfx_hws);
  67. B(is_g4x);
  68. B(is_pineview);
  69. B(is_broadwater);
  70. B(is_crestline);
  71. B(has_fbc);
  72. B(has_rc6);
  73. B(has_pipe_cxsr);
  74. B(has_hotplug);
  75. B(cursor_needs_physical);
  76. B(has_overlay);
  77. B(overlay_needs_physical);
  78. B(supports_tv);
  79. B(has_bsd_ring);
  80. B(has_blt_ring);
  81. #undef B
  82. return 0;
  83. }
  84. static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
  85. {
  86. if (obj_priv->user_pin_count > 0)
  87. return "P";
  88. else if (obj_priv->pin_count > 0)
  89. return "p";
  90. else
  91. return " ";
  92. }
  93. static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
  94. {
  95. switch (obj_priv->tiling_mode) {
  96. default:
  97. case I915_TILING_NONE: return " ";
  98. case I915_TILING_X: return "X";
  99. case I915_TILING_Y: return "Y";
  100. }
  101. }
  102. static void
  103. describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
  104. {
  105. seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
  106. &obj->base,
  107. get_pin_flag(obj),
  108. get_tiling_flag(obj),
  109. obj->base.size,
  110. obj->base.read_domains,
  111. obj->base.write_domain,
  112. obj->last_rendering_seqno,
  113. obj->dirty ? " dirty" : "",
  114. obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
  115. if (obj->base.name)
  116. seq_printf(m, " (name: %d)", obj->base.name);
  117. if (obj->fence_reg != I915_FENCE_REG_NONE)
  118. seq_printf(m, " (fence: %d)", obj->fence_reg);
  119. if (obj->gtt_space != NULL)
  120. seq_printf(m, " (gtt offset: %08x, size: %08x)",
  121. obj->gtt_offset, (unsigned int)obj->gtt_space->size);
  122. if (obj->pin_mappable || obj->fault_mappable)
  123. seq_printf(m, " (mappable)");
  124. if (obj->ring != NULL)
  125. seq_printf(m, " (%s)", obj->ring->name);
  126. }
  127. static int i915_gem_object_list_info(struct seq_file *m, void *data)
  128. {
  129. struct drm_info_node *node = (struct drm_info_node *) m->private;
  130. uintptr_t list = (uintptr_t) node->info_ent->data;
  131. struct list_head *head;
  132. struct drm_device *dev = node->minor->dev;
  133. drm_i915_private_t *dev_priv = dev->dev_private;
  134. struct drm_i915_gem_object *obj_priv;
  135. size_t total_obj_size, total_gtt_size;
  136. int count, ret;
  137. ret = mutex_lock_interruptible(&dev->struct_mutex);
  138. if (ret)
  139. return ret;
  140. switch (list) {
  141. case ACTIVE_LIST:
  142. seq_printf(m, "Active:\n");
  143. head = &dev_priv->mm.active_list;
  144. break;
  145. case INACTIVE_LIST:
  146. seq_printf(m, "Inactive:\n");
  147. head = &dev_priv->mm.inactive_list;
  148. break;
  149. case PINNED_LIST:
  150. seq_printf(m, "Pinned:\n");
  151. head = &dev_priv->mm.pinned_list;
  152. break;
  153. case FLUSHING_LIST:
  154. seq_printf(m, "Flushing:\n");
  155. head = &dev_priv->mm.flushing_list;
  156. break;
  157. case DEFERRED_FREE_LIST:
  158. seq_printf(m, "Deferred free:\n");
  159. head = &dev_priv->mm.deferred_free_list;
  160. break;
  161. default:
  162. mutex_unlock(&dev->struct_mutex);
  163. return -EINVAL;
  164. }
  165. total_obj_size = total_gtt_size = count = 0;
  166. list_for_each_entry(obj_priv, head, mm_list) {
  167. seq_printf(m, " ");
  168. describe_obj(m, obj_priv);
  169. seq_printf(m, "\n");
  170. total_obj_size += obj_priv->base.size;
  171. total_gtt_size += obj_priv->gtt_space->size;
  172. count++;
  173. }
  174. mutex_unlock(&dev->struct_mutex);
  175. seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
  176. count, total_obj_size, total_gtt_size);
  177. return 0;
  178. }
  179. static int i915_gem_object_info(struct seq_file *m, void* data)
  180. {
  181. struct drm_info_node *node = (struct drm_info_node *) m->private;
  182. struct drm_device *dev = node->minor->dev;
  183. struct drm_i915_private *dev_priv = dev->dev_private;
  184. int ret;
  185. ret = mutex_lock_interruptible(&dev->struct_mutex);
  186. if (ret)
  187. return ret;
  188. seq_printf(m, "%u objects\n", dev_priv->mm.object_count);
  189. seq_printf(m, "%zu object bytes\n", dev_priv->mm.object_memory);
  190. seq_printf(m, "%u pinned\n", dev_priv->mm.pin_count);
  191. seq_printf(m, "%zu pin bytes\n", dev_priv->mm.pin_memory);
  192. seq_printf(m, "%u mappable objects in gtt\n", dev_priv->mm.gtt_mappable_count);
  193. seq_printf(m, "%zu mappable gtt bytes\n", dev_priv->mm.gtt_mappable_memory);
  194. seq_printf(m, "%zu mappable gtt used bytes\n", dev_priv->mm.mappable_gtt_used);
  195. seq_printf(m, "%zu mappable gtt total\n", dev_priv->mm.mappable_gtt_total);
  196. seq_printf(m, "%u objects in gtt\n", dev_priv->mm.gtt_count);
  197. seq_printf(m, "%zu gtt bytes\n", dev_priv->mm.gtt_memory);
  198. seq_printf(m, "%zu gtt total\n", dev_priv->mm.gtt_total);
  199. mutex_unlock(&dev->struct_mutex);
  200. return 0;
  201. }
  202. static int i915_gem_pageflip_info(struct seq_file *m, void *data)
  203. {
  204. struct drm_info_node *node = (struct drm_info_node *) m->private;
  205. struct drm_device *dev = node->minor->dev;
  206. unsigned long flags;
  207. struct intel_crtc *crtc;
  208. list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
  209. const char *pipe = crtc->pipe ? "B" : "A";
  210. const char *plane = crtc->plane ? "B" : "A";
  211. struct intel_unpin_work *work;
  212. spin_lock_irqsave(&dev->event_lock, flags);
  213. work = crtc->unpin_work;
  214. if (work == NULL) {
  215. seq_printf(m, "No flip due on pipe %s (plane %s)\n",
  216. pipe, plane);
  217. } else {
  218. if (!work->pending) {
  219. seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
  220. pipe, plane);
  221. } else {
  222. seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
  223. pipe, plane);
  224. }
  225. if (work->enable_stall_check)
  226. seq_printf(m, "Stall check enabled, ");
  227. else
  228. seq_printf(m, "Stall check waiting for page flip ioctl, ");
  229. seq_printf(m, "%d prepares\n", work->pending);
  230. if (work->old_fb_obj) {
  231. struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
  232. if(obj_priv)
  233. seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
  234. }
  235. if (work->pending_flip_obj) {
  236. struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
  237. if(obj_priv)
  238. seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
  239. }
  240. }
  241. spin_unlock_irqrestore(&dev->event_lock, flags);
  242. }
  243. return 0;
  244. }
  245. static int i915_gem_request_info(struct seq_file *m, void *data)
  246. {
  247. struct drm_info_node *node = (struct drm_info_node *) m->private;
  248. struct drm_device *dev = node->minor->dev;
  249. drm_i915_private_t *dev_priv = dev->dev_private;
  250. struct drm_i915_gem_request *gem_request;
  251. int ret, count;
  252. ret = mutex_lock_interruptible(&dev->struct_mutex);
  253. if (ret)
  254. return ret;
  255. count = 0;
  256. if (!list_empty(&dev_priv->render_ring.request_list)) {
  257. seq_printf(m, "Render requests:\n");
  258. list_for_each_entry(gem_request,
  259. &dev_priv->render_ring.request_list,
  260. list) {
  261. seq_printf(m, " %d @ %d\n",
  262. gem_request->seqno,
  263. (int) (jiffies - gem_request->emitted_jiffies));
  264. }
  265. count++;
  266. }
  267. if (!list_empty(&dev_priv->bsd_ring.request_list)) {
  268. seq_printf(m, "BSD requests:\n");
  269. list_for_each_entry(gem_request,
  270. &dev_priv->bsd_ring.request_list,
  271. list) {
  272. seq_printf(m, " %d @ %d\n",
  273. gem_request->seqno,
  274. (int) (jiffies - gem_request->emitted_jiffies));
  275. }
  276. count++;
  277. }
  278. if (!list_empty(&dev_priv->blt_ring.request_list)) {
  279. seq_printf(m, "BLT requests:\n");
  280. list_for_each_entry(gem_request,
  281. &dev_priv->blt_ring.request_list,
  282. list) {
  283. seq_printf(m, " %d @ %d\n",
  284. gem_request->seqno,
  285. (int) (jiffies - gem_request->emitted_jiffies));
  286. }
  287. count++;
  288. }
  289. mutex_unlock(&dev->struct_mutex);
  290. if (count == 0)
  291. seq_printf(m, "No requests\n");
  292. return 0;
  293. }
  294. static void i915_ring_seqno_info(struct seq_file *m,
  295. struct intel_ring_buffer *ring)
  296. {
  297. if (ring->get_seqno) {
  298. seq_printf(m, "Current sequence (%s): %d\n",
  299. ring->name, ring->get_seqno(ring));
  300. seq_printf(m, "Waiter sequence (%s): %d\n",
  301. ring->name, ring->waiting_seqno);
  302. seq_printf(m, "IRQ sequence (%s): %d\n",
  303. ring->name, ring->irq_seqno);
  304. }
  305. }
  306. static int i915_gem_seqno_info(struct seq_file *m, void *data)
  307. {
  308. struct drm_info_node *node = (struct drm_info_node *) m->private;
  309. struct drm_device *dev = node->minor->dev;
  310. drm_i915_private_t *dev_priv = dev->dev_private;
  311. int ret;
  312. ret = mutex_lock_interruptible(&dev->struct_mutex);
  313. if (ret)
  314. return ret;
  315. i915_ring_seqno_info(m, &dev_priv->render_ring);
  316. i915_ring_seqno_info(m, &dev_priv->bsd_ring);
  317. i915_ring_seqno_info(m, &dev_priv->blt_ring);
  318. mutex_unlock(&dev->struct_mutex);
  319. return 0;
  320. }
  321. static int i915_interrupt_info(struct seq_file *m, void *data)
  322. {
  323. struct drm_info_node *node = (struct drm_info_node *) m->private;
  324. struct drm_device *dev = node->minor->dev;
  325. drm_i915_private_t *dev_priv = dev->dev_private;
  326. int ret;
  327. ret = mutex_lock_interruptible(&dev->struct_mutex);
  328. if (ret)
  329. return ret;
  330. if (!HAS_PCH_SPLIT(dev)) {
  331. seq_printf(m, "Interrupt enable: %08x\n",
  332. I915_READ(IER));
  333. seq_printf(m, "Interrupt identity: %08x\n",
  334. I915_READ(IIR));
  335. seq_printf(m, "Interrupt mask: %08x\n",
  336. I915_READ(IMR));
  337. seq_printf(m, "Pipe A stat: %08x\n",
  338. I915_READ(PIPEASTAT));
  339. seq_printf(m, "Pipe B stat: %08x\n",
  340. I915_READ(PIPEBSTAT));
  341. } else {
  342. seq_printf(m, "North Display Interrupt enable: %08x\n",
  343. I915_READ(DEIER));
  344. seq_printf(m, "North Display Interrupt identity: %08x\n",
  345. I915_READ(DEIIR));
  346. seq_printf(m, "North Display Interrupt mask: %08x\n",
  347. I915_READ(DEIMR));
  348. seq_printf(m, "South Display Interrupt enable: %08x\n",
  349. I915_READ(SDEIER));
  350. seq_printf(m, "South Display Interrupt identity: %08x\n",
  351. I915_READ(SDEIIR));
  352. seq_printf(m, "South Display Interrupt mask: %08x\n",
  353. I915_READ(SDEIMR));
  354. seq_printf(m, "Graphics Interrupt enable: %08x\n",
  355. I915_READ(GTIER));
  356. seq_printf(m, "Graphics Interrupt identity: %08x\n",
  357. I915_READ(GTIIR));
  358. seq_printf(m, "Graphics Interrupt mask: %08x\n",
  359. I915_READ(GTIMR));
  360. }
  361. seq_printf(m, "Interrupts received: %d\n",
  362. atomic_read(&dev_priv->irq_received));
  363. i915_ring_seqno_info(m, &dev_priv->render_ring);
  364. i915_ring_seqno_info(m, &dev_priv->bsd_ring);
  365. i915_ring_seqno_info(m, &dev_priv->blt_ring);
  366. mutex_unlock(&dev->struct_mutex);
  367. return 0;
  368. }
  369. static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
  370. {
  371. struct drm_info_node *node = (struct drm_info_node *) m->private;
  372. struct drm_device *dev = node->minor->dev;
  373. drm_i915_private_t *dev_priv = dev->dev_private;
  374. int i, ret;
  375. ret = mutex_lock_interruptible(&dev->struct_mutex);
  376. if (ret)
  377. return ret;
  378. seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
  379. seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
  380. for (i = 0; i < dev_priv->num_fence_regs; i++) {
  381. struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
  382. seq_printf(m, "Fenced object[%2d] = ", i);
  383. if (obj == NULL)
  384. seq_printf(m, "unused");
  385. else
  386. describe_obj(m, to_intel_bo(obj));
  387. seq_printf(m, "\n");
  388. }
  389. mutex_unlock(&dev->struct_mutex);
  390. return 0;
  391. }
  392. static int i915_hws_info(struct seq_file *m, void *data)
  393. {
  394. struct drm_info_node *node = (struct drm_info_node *) m->private;
  395. struct drm_device *dev = node->minor->dev;
  396. drm_i915_private_t *dev_priv = dev->dev_private;
  397. int i;
  398. volatile u32 *hws;
  399. hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
  400. if (hws == NULL)
  401. return 0;
  402. for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
  403. seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
  404. i * 4,
  405. hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
  406. }
  407. return 0;
  408. }
  409. static void i915_dump_object(struct seq_file *m,
  410. struct io_mapping *mapping,
  411. struct drm_i915_gem_object *obj_priv)
  412. {
  413. int page, page_count, i;
  414. page_count = obj_priv->base.size / PAGE_SIZE;
  415. for (page = 0; page < page_count; page++) {
  416. u32 *mem = io_mapping_map_wc(mapping,
  417. obj_priv->gtt_offset + page * PAGE_SIZE);
  418. for (i = 0; i < PAGE_SIZE; i += 4)
  419. seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
  420. io_mapping_unmap(mem);
  421. }
  422. }
  423. static int i915_batchbuffer_info(struct seq_file *m, void *data)
  424. {
  425. struct drm_info_node *node = (struct drm_info_node *) m->private;
  426. struct drm_device *dev = node->minor->dev;
  427. drm_i915_private_t *dev_priv = dev->dev_private;
  428. struct drm_gem_object *obj;
  429. struct drm_i915_gem_object *obj_priv;
  430. int ret;
  431. ret = mutex_lock_interruptible(&dev->struct_mutex);
  432. if (ret)
  433. return ret;
  434. list_for_each_entry(obj_priv, &dev_priv->mm.active_list, mm_list) {
  435. obj = &obj_priv->base;
  436. if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
  437. seq_printf(m, "--- gtt_offset = 0x%08x\n",
  438. obj_priv->gtt_offset);
  439. i915_dump_object(m, dev_priv->mm.gtt_mapping, obj_priv);
  440. }
  441. }
  442. mutex_unlock(&dev->struct_mutex);
  443. return 0;
  444. }
  445. static int i915_ringbuffer_data(struct seq_file *m, void *data)
  446. {
  447. struct drm_info_node *node = (struct drm_info_node *) m->private;
  448. struct drm_device *dev = node->minor->dev;
  449. drm_i915_private_t *dev_priv = dev->dev_private;
  450. struct intel_ring_buffer *ring;
  451. int ret;
  452. switch ((uintptr_t)node->info_ent->data) {
  453. case RENDER_RING: ring = &dev_priv->render_ring; break;
  454. case BSD_RING: ring = &dev_priv->bsd_ring; break;
  455. case BLT_RING: ring = &dev_priv->blt_ring; break;
  456. default: return -EINVAL;
  457. }
  458. ret = mutex_lock_interruptible(&dev->struct_mutex);
  459. if (ret)
  460. return ret;
  461. if (!ring->gem_object) {
  462. seq_printf(m, "No ringbuffer setup\n");
  463. } else {
  464. u8 *virt = ring->virtual_start;
  465. uint32_t off;
  466. for (off = 0; off < ring->size; off += 4) {
  467. uint32_t *ptr = (uint32_t *)(virt + off);
  468. seq_printf(m, "%08x : %08x\n", off, *ptr);
  469. }
  470. }
  471. mutex_unlock(&dev->struct_mutex);
  472. return 0;
  473. }
  474. static int i915_ringbuffer_info(struct seq_file *m, void *data)
  475. {
  476. struct drm_info_node *node = (struct drm_info_node *) m->private;
  477. struct drm_device *dev = node->minor->dev;
  478. drm_i915_private_t *dev_priv = dev->dev_private;
  479. struct intel_ring_buffer *ring;
  480. switch ((uintptr_t)node->info_ent->data) {
  481. case RENDER_RING: ring = &dev_priv->render_ring; break;
  482. case BSD_RING: ring = &dev_priv->bsd_ring; break;
  483. case BLT_RING: ring = &dev_priv->blt_ring; break;
  484. default: return -EINVAL;
  485. }
  486. if (ring->size == 0)
  487. return 0;
  488. seq_printf(m, "Ring %s:\n", ring->name);
  489. seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
  490. seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
  491. seq_printf(m, " Size : %08x\n", ring->size);
  492. seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
  493. seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
  494. seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
  495. return 0;
  496. }
  497. static const char *pin_flag(int pinned)
  498. {
  499. if (pinned > 0)
  500. return " P";
  501. else if (pinned < 0)
  502. return " p";
  503. else
  504. return "";
  505. }
  506. static const char *tiling_flag(int tiling)
  507. {
  508. switch (tiling) {
  509. default:
  510. case I915_TILING_NONE: return "";
  511. case I915_TILING_X: return " X";
  512. case I915_TILING_Y: return " Y";
  513. }
  514. }
  515. static const char *dirty_flag(int dirty)
  516. {
  517. return dirty ? " dirty" : "";
  518. }
  519. static const char *purgeable_flag(int purgeable)
  520. {
  521. return purgeable ? " purgeable" : "";
  522. }
  523. static int i915_error_state(struct seq_file *m, void *unused)
  524. {
  525. struct drm_info_node *node = (struct drm_info_node *) m->private;
  526. struct drm_device *dev = node->minor->dev;
  527. drm_i915_private_t *dev_priv = dev->dev_private;
  528. struct drm_i915_error_state *error;
  529. unsigned long flags;
  530. int i, page, offset, elt;
  531. spin_lock_irqsave(&dev_priv->error_lock, flags);
  532. if (!dev_priv->first_error) {
  533. seq_printf(m, "no error state collected\n");
  534. goto out;
  535. }
  536. error = dev_priv->first_error;
  537. seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
  538. error->time.tv_usec);
  539. seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
  540. seq_printf(m, "EIR: 0x%08x\n", error->eir);
  541. seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
  542. if (INTEL_INFO(dev)->gen >= 6) {
  543. seq_printf(m, "ERROR: 0x%08x\n", error->error);
  544. seq_printf(m, "Blitter command stream:\n");
  545. seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
  546. seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
  547. seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
  548. seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
  549. seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
  550. }
  551. seq_printf(m, "Render command stream:\n");
  552. seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
  553. seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
  554. seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
  555. seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
  556. if (INTEL_INFO(dev)->gen >= 4) {
  557. seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
  558. seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
  559. }
  560. seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
  561. seq_printf(m, " seqno: 0x%08x\n", error->seqno);
  562. if (error->active_bo_count) {
  563. seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
  564. for (i = 0; i < error->active_bo_count; i++) {
  565. seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
  566. error->active_bo[i].gtt_offset,
  567. error->active_bo[i].size,
  568. error->active_bo[i].read_domains,
  569. error->active_bo[i].write_domain,
  570. error->active_bo[i].seqno,
  571. pin_flag(error->active_bo[i].pinned),
  572. tiling_flag(error->active_bo[i].tiling),
  573. dirty_flag(error->active_bo[i].dirty),
  574. purgeable_flag(error->active_bo[i].purgeable));
  575. if (error->active_bo[i].name)
  576. seq_printf(m, " (name: %d)", error->active_bo[i].name);
  577. if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
  578. seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
  579. seq_printf(m, "\n");
  580. }
  581. }
  582. for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
  583. if (error->batchbuffer[i]) {
  584. struct drm_i915_error_object *obj = error->batchbuffer[i];
  585. seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
  586. offset = 0;
  587. for (page = 0; page < obj->page_count; page++) {
  588. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  589. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  590. offset += 4;
  591. }
  592. }
  593. }
  594. }
  595. if (error->ringbuffer) {
  596. struct drm_i915_error_object *obj = error->ringbuffer;
  597. seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
  598. offset = 0;
  599. for (page = 0; page < obj->page_count; page++) {
  600. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  601. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  602. offset += 4;
  603. }
  604. }
  605. }
  606. if (error->overlay)
  607. intel_overlay_print_error_state(m, error->overlay);
  608. out:
  609. spin_unlock_irqrestore(&dev_priv->error_lock, flags);
  610. return 0;
  611. }
  612. static int i915_rstdby_delays(struct seq_file *m, void *unused)
  613. {
  614. struct drm_info_node *node = (struct drm_info_node *) m->private;
  615. struct drm_device *dev = node->minor->dev;
  616. drm_i915_private_t *dev_priv = dev->dev_private;
  617. u16 crstanddelay = I915_READ16(CRSTANDVID);
  618. seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
  619. return 0;
  620. }
  621. static int i915_cur_delayinfo(struct seq_file *m, void *unused)
  622. {
  623. struct drm_info_node *node = (struct drm_info_node *) m->private;
  624. struct drm_device *dev = node->minor->dev;
  625. drm_i915_private_t *dev_priv = dev->dev_private;
  626. u16 rgvswctl = I915_READ16(MEMSWCTL);
  627. u16 rgvstat = I915_READ16(MEMSTAT_ILK);
  628. seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
  629. seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
  630. seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
  631. MEMSTAT_VID_SHIFT);
  632. seq_printf(m, "Current P-state: %d\n",
  633. (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
  634. return 0;
  635. }
  636. static int i915_delayfreq_table(struct seq_file *m, void *unused)
  637. {
  638. struct drm_info_node *node = (struct drm_info_node *) m->private;
  639. struct drm_device *dev = node->minor->dev;
  640. drm_i915_private_t *dev_priv = dev->dev_private;
  641. u32 delayfreq;
  642. int i;
  643. for (i = 0; i < 16; i++) {
  644. delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
  645. seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
  646. (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
  647. }
  648. return 0;
  649. }
  650. static inline int MAP_TO_MV(int map)
  651. {
  652. return 1250 - (map * 25);
  653. }
  654. static int i915_inttoext_table(struct seq_file *m, void *unused)
  655. {
  656. struct drm_info_node *node = (struct drm_info_node *) m->private;
  657. struct drm_device *dev = node->minor->dev;
  658. drm_i915_private_t *dev_priv = dev->dev_private;
  659. u32 inttoext;
  660. int i;
  661. for (i = 1; i <= 32; i++) {
  662. inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
  663. seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
  664. }
  665. return 0;
  666. }
  667. static int i915_drpc_info(struct seq_file *m, void *unused)
  668. {
  669. struct drm_info_node *node = (struct drm_info_node *) m->private;
  670. struct drm_device *dev = node->minor->dev;
  671. drm_i915_private_t *dev_priv = dev->dev_private;
  672. u32 rgvmodectl = I915_READ(MEMMODECTL);
  673. u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
  674. u16 crstandvid = I915_READ16(CRSTANDVID);
  675. seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
  676. "yes" : "no");
  677. seq_printf(m, "Boost freq: %d\n",
  678. (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
  679. MEMMODE_BOOST_FREQ_SHIFT);
  680. seq_printf(m, "HW control enabled: %s\n",
  681. rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
  682. seq_printf(m, "SW control enabled: %s\n",
  683. rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
  684. seq_printf(m, "Gated voltage change: %s\n",
  685. rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
  686. seq_printf(m, "Starting frequency: P%d\n",
  687. (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
  688. seq_printf(m, "Max P-state: P%d\n",
  689. (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
  690. seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
  691. seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
  692. seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
  693. seq_printf(m, "Render standby enabled: %s\n",
  694. (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
  695. return 0;
  696. }
  697. static int i915_fbc_status(struct seq_file *m, void *unused)
  698. {
  699. struct drm_info_node *node = (struct drm_info_node *) m->private;
  700. struct drm_device *dev = node->minor->dev;
  701. drm_i915_private_t *dev_priv = dev->dev_private;
  702. if (!I915_HAS_FBC(dev)) {
  703. seq_printf(m, "FBC unsupported on this chipset\n");
  704. return 0;
  705. }
  706. if (intel_fbc_enabled(dev)) {
  707. seq_printf(m, "FBC enabled\n");
  708. } else {
  709. seq_printf(m, "FBC disabled: ");
  710. switch (dev_priv->no_fbc_reason) {
  711. case FBC_NO_OUTPUT:
  712. seq_printf(m, "no outputs");
  713. break;
  714. case FBC_STOLEN_TOO_SMALL:
  715. seq_printf(m, "not enough stolen memory");
  716. break;
  717. case FBC_UNSUPPORTED_MODE:
  718. seq_printf(m, "mode not supported");
  719. break;
  720. case FBC_MODE_TOO_LARGE:
  721. seq_printf(m, "mode too large");
  722. break;
  723. case FBC_BAD_PLANE:
  724. seq_printf(m, "FBC unsupported on plane");
  725. break;
  726. case FBC_NOT_TILED:
  727. seq_printf(m, "scanout buffer not tiled");
  728. break;
  729. case FBC_MULTIPLE_PIPES:
  730. seq_printf(m, "multiple pipes are enabled");
  731. break;
  732. default:
  733. seq_printf(m, "unknown reason");
  734. }
  735. seq_printf(m, "\n");
  736. }
  737. return 0;
  738. }
  739. static int i915_sr_status(struct seq_file *m, void *unused)
  740. {
  741. struct drm_info_node *node = (struct drm_info_node *) m->private;
  742. struct drm_device *dev = node->minor->dev;
  743. drm_i915_private_t *dev_priv = dev->dev_private;
  744. bool sr_enabled = false;
  745. if (IS_GEN5(dev))
  746. sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
  747. else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
  748. sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
  749. else if (IS_I915GM(dev))
  750. sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
  751. else if (IS_PINEVIEW(dev))
  752. sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
  753. seq_printf(m, "self-refresh: %s\n",
  754. sr_enabled ? "enabled" : "disabled");
  755. return 0;
  756. }
  757. static int i915_emon_status(struct seq_file *m, void *unused)
  758. {
  759. struct drm_info_node *node = (struct drm_info_node *) m->private;
  760. struct drm_device *dev = node->minor->dev;
  761. drm_i915_private_t *dev_priv = dev->dev_private;
  762. unsigned long temp, chipset, gfx;
  763. int ret;
  764. ret = mutex_lock_interruptible(&dev->struct_mutex);
  765. if (ret)
  766. return ret;
  767. temp = i915_mch_val(dev_priv);
  768. chipset = i915_chipset_val(dev_priv);
  769. gfx = i915_gfx_val(dev_priv);
  770. mutex_unlock(&dev->struct_mutex);
  771. seq_printf(m, "GMCH temp: %ld\n", temp);
  772. seq_printf(m, "Chipset power: %ld\n", chipset);
  773. seq_printf(m, "GFX power: %ld\n", gfx);
  774. seq_printf(m, "Total power: %ld\n", chipset + gfx);
  775. return 0;
  776. }
  777. static int i915_gfxec(struct seq_file *m, void *unused)
  778. {
  779. struct drm_info_node *node = (struct drm_info_node *) m->private;
  780. struct drm_device *dev = node->minor->dev;
  781. drm_i915_private_t *dev_priv = dev->dev_private;
  782. seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
  783. return 0;
  784. }
  785. static int i915_opregion(struct seq_file *m, void *unused)
  786. {
  787. struct drm_info_node *node = (struct drm_info_node *) m->private;
  788. struct drm_device *dev = node->minor->dev;
  789. drm_i915_private_t *dev_priv = dev->dev_private;
  790. struct intel_opregion *opregion = &dev_priv->opregion;
  791. int ret;
  792. ret = mutex_lock_interruptible(&dev->struct_mutex);
  793. if (ret)
  794. return ret;
  795. if (opregion->header)
  796. seq_write(m, opregion->header, OPREGION_SIZE);
  797. mutex_unlock(&dev->struct_mutex);
  798. return 0;
  799. }
  800. static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
  801. {
  802. struct drm_info_node *node = (struct drm_info_node *) m->private;
  803. struct drm_device *dev = node->minor->dev;
  804. drm_i915_private_t *dev_priv = dev->dev_private;
  805. struct intel_fbdev *ifbdev;
  806. struct intel_framebuffer *fb;
  807. int ret;
  808. ret = mutex_lock_interruptible(&dev->mode_config.mutex);
  809. if (ret)
  810. return ret;
  811. ifbdev = dev_priv->fbdev;
  812. fb = to_intel_framebuffer(ifbdev->helper.fb);
  813. seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
  814. fb->base.width,
  815. fb->base.height,
  816. fb->base.depth,
  817. fb->base.bits_per_pixel);
  818. describe_obj(m, to_intel_bo(fb->obj));
  819. seq_printf(m, "\n");
  820. list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
  821. if (&fb->base == ifbdev->helper.fb)
  822. continue;
  823. seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
  824. fb->base.width,
  825. fb->base.height,
  826. fb->base.depth,
  827. fb->base.bits_per_pixel);
  828. describe_obj(m, to_intel_bo(fb->obj));
  829. seq_printf(m, "\n");
  830. }
  831. mutex_unlock(&dev->mode_config.mutex);
  832. return 0;
  833. }
  834. static int
  835. i915_wedged_open(struct inode *inode,
  836. struct file *filp)
  837. {
  838. filp->private_data = inode->i_private;
  839. return 0;
  840. }
  841. static ssize_t
  842. i915_wedged_read(struct file *filp,
  843. char __user *ubuf,
  844. size_t max,
  845. loff_t *ppos)
  846. {
  847. struct drm_device *dev = filp->private_data;
  848. drm_i915_private_t *dev_priv = dev->dev_private;
  849. char buf[80];
  850. int len;
  851. len = snprintf(buf, sizeof (buf),
  852. "wedged : %d\n",
  853. atomic_read(&dev_priv->mm.wedged));
  854. if (len > sizeof (buf))
  855. len = sizeof (buf);
  856. return simple_read_from_buffer(ubuf, max, ppos, buf, len);
  857. }
  858. static ssize_t
  859. i915_wedged_write(struct file *filp,
  860. const char __user *ubuf,
  861. size_t cnt,
  862. loff_t *ppos)
  863. {
  864. struct drm_device *dev = filp->private_data;
  865. drm_i915_private_t *dev_priv = dev->dev_private;
  866. char buf[20];
  867. int val = 1;
  868. if (cnt > 0) {
  869. if (cnt > sizeof (buf) - 1)
  870. return -EINVAL;
  871. if (copy_from_user(buf, ubuf, cnt))
  872. return -EFAULT;
  873. buf[cnt] = 0;
  874. val = simple_strtoul(buf, NULL, 0);
  875. }
  876. DRM_INFO("Manually setting wedged to %d\n", val);
  877. atomic_set(&dev_priv->mm.wedged, val);
  878. if (val) {
  879. wake_up_all(&dev_priv->irq_queue);
  880. queue_work(dev_priv->wq, &dev_priv->error_work);
  881. }
  882. return cnt;
  883. }
  884. static const struct file_operations i915_wedged_fops = {
  885. .owner = THIS_MODULE,
  886. .open = i915_wedged_open,
  887. .read = i915_wedged_read,
  888. .write = i915_wedged_write,
  889. .llseek = default_llseek,
  890. };
  891. /* As the drm_debugfs_init() routines are called before dev->dev_private is
  892. * allocated we need to hook into the minor for release. */
  893. static int
  894. drm_add_fake_info_node(struct drm_minor *minor,
  895. struct dentry *ent,
  896. const void *key)
  897. {
  898. struct drm_info_node *node;
  899. node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
  900. if (node == NULL) {
  901. debugfs_remove(ent);
  902. return -ENOMEM;
  903. }
  904. node->minor = minor;
  905. node->dent = ent;
  906. node->info_ent = (void *) key;
  907. list_add(&node->list, &minor->debugfs_nodes.list);
  908. return 0;
  909. }
  910. static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
  911. {
  912. struct drm_device *dev = minor->dev;
  913. struct dentry *ent;
  914. ent = debugfs_create_file("i915_wedged",
  915. S_IRUGO | S_IWUSR,
  916. root, dev,
  917. &i915_wedged_fops);
  918. if (IS_ERR(ent))
  919. return PTR_ERR(ent);
  920. return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
  921. }
  922. static struct drm_info_list i915_debugfs_list[] = {
  923. {"i915_capabilities", i915_capabilities, 0, 0},
  924. {"i915_gem_objects", i915_gem_object_info, 0},
  925. {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
  926. {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
  927. {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
  928. {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
  929. {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
  930. {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
  931. {"i915_gem_request", i915_gem_request_info, 0},
  932. {"i915_gem_seqno", i915_gem_seqno_info, 0},
  933. {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
  934. {"i915_gem_interrupt", i915_interrupt_info, 0},
  935. {"i915_gem_hws", i915_hws_info, 0},
  936. {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RENDER_RING},
  937. {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RENDER_RING},
  938. {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BSD_RING},
  939. {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BSD_RING},
  940. {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BLT_RING},
  941. {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BLT_RING},
  942. {"i915_batchbuffers", i915_batchbuffer_info, 0},
  943. {"i915_error_state", i915_error_state, 0},
  944. {"i915_rstdby_delays", i915_rstdby_delays, 0},
  945. {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
  946. {"i915_delayfreq_table", i915_delayfreq_table, 0},
  947. {"i915_inttoext_table", i915_inttoext_table, 0},
  948. {"i915_drpc_info", i915_drpc_info, 0},
  949. {"i915_emon_status", i915_emon_status, 0},
  950. {"i915_gfxec", i915_gfxec, 0},
  951. {"i915_fbc_status", i915_fbc_status, 0},
  952. {"i915_sr_status", i915_sr_status, 0},
  953. {"i915_opregion", i915_opregion, 0},
  954. {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
  955. };
  956. #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
  957. int i915_debugfs_init(struct drm_minor *minor)
  958. {
  959. int ret;
  960. ret = i915_wedged_create(minor->debugfs_root, minor);
  961. if (ret)
  962. return ret;
  963. return drm_debugfs_create_files(i915_debugfs_list,
  964. I915_DEBUGFS_ENTRIES,
  965. minor->debugfs_root, minor);
  966. }
  967. void i915_debugfs_cleanup(struct drm_minor *minor)
  968. {
  969. drm_debugfs_remove_files(i915_debugfs_list,
  970. I915_DEBUGFS_ENTRIES, minor);
  971. drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
  972. 1, minor);
  973. }
  974. #endif /* CONFIG_DEBUG_FS */