mpc5200_dma.c 15 KB

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  1. /*
  2. * Freescale MPC5200 PSC DMA
  3. * ALSA SoC Platform driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. * Copyright (C) 2009 Jon Smirl, Digispeaker
  7. */
  8. #include <linux/module.h>
  9. #include <linux/of_device.h>
  10. #include <sound/soc.h>
  11. #include <sysdev/bestcomm/bestcomm.h>
  12. #include <sysdev/bestcomm/gen_bd.h>
  13. #include <asm/mpc52xx_psc.h>
  14. #include "mpc5200_dma.h"
  15. /*
  16. * Interrupt handlers
  17. */
  18. static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
  19. {
  20. struct psc_dma *psc_dma = _psc_dma;
  21. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  22. u16 isr;
  23. isr = in_be16(&regs->mpc52xx_psc_isr);
  24. /* Playback underrun error */
  25. if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
  26. psc_dma->stats.underrun_count++;
  27. /* Capture overrun error */
  28. if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
  29. psc_dma->stats.overrun_count++;
  30. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  31. return IRQ_HANDLED;
  32. }
  33. /**
  34. * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
  35. * @s: pointer to stream private data structure
  36. *
  37. * Enqueues another audio period buffer into the bestcomm queue.
  38. *
  39. * Note: The routine must only be called when there is space available in
  40. * the queue. Otherwise the enqueue will fail and the audio ring buffer
  41. * will get out of sync
  42. */
  43. static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
  44. {
  45. struct bcom_bd *bd;
  46. /* Prepare and enqueue the next buffer descriptor */
  47. bd = bcom_prepare_next_buffer(s->bcom_task);
  48. bd->status = s->period_bytes;
  49. bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
  50. bcom_submit_next_buffer(s->bcom_task, NULL);
  51. /* Update for next period */
  52. s->period_next = (s->period_next + 1) % s->runtime->periods;
  53. }
  54. /* Bestcomm DMA irq handler */
  55. static irqreturn_t psc_dma_bcom_irq_tx(int irq, void *_psc_dma_stream)
  56. {
  57. struct psc_dma_stream *s = _psc_dma_stream;
  58. spin_lock(&s->psc_dma->lock);
  59. /* For each finished period, dequeue the completed period buffer
  60. * and enqueue a new one in it's place. */
  61. while (bcom_buffer_done(s->bcom_task)) {
  62. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  63. s->period_current = (s->period_current+1) % s->runtime->periods;
  64. s->period_count++;
  65. psc_dma_bcom_enqueue_next_buffer(s);
  66. }
  67. spin_unlock(&s->psc_dma->lock);
  68. /* If the stream is active, then also inform the PCM middle layer
  69. * of the period finished event. */
  70. if (s->active)
  71. snd_pcm_period_elapsed(s->stream);
  72. return IRQ_HANDLED;
  73. }
  74. static irqreturn_t psc_dma_bcom_irq_rx(int irq, void *_psc_dma_stream)
  75. {
  76. struct psc_dma_stream *s = _psc_dma_stream;
  77. spin_lock(&s->psc_dma->lock);
  78. /* For each finished period, dequeue the completed period buffer
  79. * and enqueue a new one in it's place. */
  80. while (bcom_buffer_done(s->bcom_task)) {
  81. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  82. s->period_current = (s->period_current+1) % s->runtime->periods;
  83. s->period_count++;
  84. psc_dma_bcom_enqueue_next_buffer(s);
  85. }
  86. spin_unlock(&s->psc_dma->lock);
  87. /* If the stream is active, then also inform the PCM middle layer
  88. * of the period finished event. */
  89. if (s->active)
  90. snd_pcm_period_elapsed(s->stream);
  91. return IRQ_HANDLED;
  92. }
  93. static int psc_dma_hw_free(struct snd_pcm_substream *substream)
  94. {
  95. snd_pcm_set_runtime_buffer(substream, NULL);
  96. return 0;
  97. }
  98. /**
  99. * psc_dma_trigger: start and stop the DMA transfer.
  100. *
  101. * This function is called by ALSA to start, stop, pause, and resume the DMA
  102. * transfer of data.
  103. */
  104. static int psc_dma_trigger(struct snd_pcm_substream *substream, int cmd)
  105. {
  106. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  107. struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
  108. struct snd_pcm_runtime *runtime = substream->runtime;
  109. struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
  110. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  111. u16 imr;
  112. unsigned long flags;
  113. int i;
  114. switch (cmd) {
  115. case SNDRV_PCM_TRIGGER_START:
  116. dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n",
  117. substream->pstr->stream, runtime->frame_bits,
  118. (int)runtime->period_size, runtime->periods);
  119. s->period_bytes = frames_to_bytes(runtime,
  120. runtime->period_size);
  121. s->period_next = 0;
  122. s->period_current = 0;
  123. s->active = 1;
  124. s->period_count = 0;
  125. s->runtime = runtime;
  126. /* Fill up the bestcomm bd queue and enable DMA.
  127. * This will begin filling the PSC's fifo.
  128. */
  129. spin_lock_irqsave(&psc_dma->lock, flags);
  130. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  131. bcom_gen_bd_rx_reset(s->bcom_task);
  132. else
  133. bcom_gen_bd_tx_reset(s->bcom_task);
  134. for (i = 0; i < runtime->periods; i++)
  135. if (!bcom_queue_full(s->bcom_task))
  136. psc_dma_bcom_enqueue_next_buffer(s);
  137. bcom_enable(s->bcom_task);
  138. spin_unlock_irqrestore(&psc_dma->lock, flags);
  139. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  140. break;
  141. case SNDRV_PCM_TRIGGER_STOP:
  142. dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n",
  143. substream->pstr->stream, s->period_count);
  144. s->active = 0;
  145. spin_lock_irqsave(&psc_dma->lock, flags);
  146. bcom_disable(s->bcom_task);
  147. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  148. bcom_gen_bd_rx_reset(s->bcom_task);
  149. else
  150. bcom_gen_bd_tx_reset(s->bcom_task);
  151. spin_unlock_irqrestore(&psc_dma->lock, flags);
  152. break;
  153. default:
  154. dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n",
  155. substream->pstr->stream, cmd);
  156. return -EINVAL;
  157. }
  158. /* Update interrupt enable settings */
  159. imr = 0;
  160. if (psc_dma->playback.active)
  161. imr |= MPC52xx_PSC_IMR_TXEMP;
  162. if (psc_dma->capture.active)
  163. imr |= MPC52xx_PSC_IMR_ORERR;
  164. out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);
  165. return 0;
  166. }
  167. /* ---------------------------------------------------------------------
  168. * The PSC DMA 'ASoC platform' driver
  169. *
  170. * Can be referenced by an 'ASoC machine' driver
  171. * This driver only deals with the audio bus; it doesn't have any
  172. * interaction with the attached codec
  173. */
  174. static const struct snd_pcm_hardware psc_dma_hardware = {
  175. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  176. SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  177. SNDRV_PCM_INFO_BATCH,
  178. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
  179. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
  180. .rate_min = 8000,
  181. .rate_max = 48000,
  182. .channels_min = 1,
  183. .channels_max = 2,
  184. .period_bytes_max = 1024 * 1024,
  185. .period_bytes_min = 32,
  186. .periods_min = 2,
  187. .periods_max = 256,
  188. .buffer_bytes_max = 2 * 1024 * 1024,
  189. .fifo_size = 512,
  190. };
  191. static int psc_dma_open(struct snd_pcm_substream *substream)
  192. {
  193. struct snd_pcm_runtime *runtime = substream->runtime;
  194. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  195. struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
  196. struct psc_dma_stream *s;
  197. int rc;
  198. dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
  199. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  200. s = &psc_dma->capture;
  201. else
  202. s = &psc_dma->playback;
  203. snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
  204. rc = snd_pcm_hw_constraint_integer(runtime,
  205. SNDRV_PCM_HW_PARAM_PERIODS);
  206. if (rc < 0) {
  207. dev_err(substream->pcm->card->dev, "invalid buffer size\n");
  208. return rc;
  209. }
  210. s->stream = substream;
  211. return 0;
  212. }
  213. static int psc_dma_close(struct snd_pcm_substream *substream)
  214. {
  215. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  216. struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
  217. struct psc_dma_stream *s;
  218. dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
  219. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  220. s = &psc_dma->capture;
  221. else
  222. s = &psc_dma->playback;
  223. if (!psc_dma->playback.active &&
  224. !psc_dma->capture.active) {
  225. /* Disable all interrupts and reset the PSC */
  226. out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
  227. out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
  228. }
  229. s->stream = NULL;
  230. return 0;
  231. }
  232. static snd_pcm_uframes_t
  233. psc_dma_pointer(struct snd_pcm_substream *substream)
  234. {
  235. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  236. struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
  237. struct psc_dma_stream *s;
  238. dma_addr_t count;
  239. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  240. s = &psc_dma->capture;
  241. else
  242. s = &psc_dma->playback;
  243. count = s->period_current * s->period_bytes;
  244. return bytes_to_frames(substream->runtime, count);
  245. }
  246. static int
  247. psc_dma_hw_params(struct snd_pcm_substream *substream,
  248. struct snd_pcm_hw_params *params)
  249. {
  250. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  251. return 0;
  252. }
  253. static struct snd_pcm_ops psc_dma_ops = {
  254. .open = psc_dma_open,
  255. .close = psc_dma_close,
  256. .hw_free = psc_dma_hw_free,
  257. .ioctl = snd_pcm_lib_ioctl,
  258. .pointer = psc_dma_pointer,
  259. .trigger = psc_dma_trigger,
  260. .hw_params = psc_dma_hw_params,
  261. };
  262. static u64 psc_dma_dmamask = 0xffffffff;
  263. static int psc_dma_new(struct snd_card *card, struct snd_soc_dai *dai,
  264. struct snd_pcm *pcm)
  265. {
  266. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  267. struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
  268. size_t size = psc_dma_hardware.buffer_bytes_max;
  269. int rc = 0;
  270. dev_dbg(rtd->socdev->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
  271. card, dai, pcm);
  272. if (!card->dev->dma_mask)
  273. card->dev->dma_mask = &psc_dma_dmamask;
  274. if (!card->dev->coherent_dma_mask)
  275. card->dev->coherent_dma_mask = 0xffffffff;
  276. if (pcm->streams[0].substream) {
  277. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
  278. size, &pcm->streams[0].substream->dma_buffer);
  279. if (rc)
  280. goto playback_alloc_err;
  281. }
  282. if (pcm->streams[1].substream) {
  283. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
  284. size, &pcm->streams[1].substream->dma_buffer);
  285. if (rc)
  286. goto capture_alloc_err;
  287. }
  288. if (rtd->socdev->card->codec->ac97)
  289. rtd->socdev->card->codec->ac97->private_data = psc_dma;
  290. return 0;
  291. capture_alloc_err:
  292. if (pcm->streams[0].substream)
  293. snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
  294. playback_alloc_err:
  295. dev_err(card->dev, "Cannot allocate buffer(s)\n");
  296. return -ENOMEM;
  297. }
  298. static void psc_dma_free(struct snd_pcm *pcm)
  299. {
  300. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  301. struct snd_pcm_substream *substream;
  302. int stream;
  303. dev_dbg(rtd->socdev->dev, "psc_dma_free(pcm=%p)\n", pcm);
  304. for (stream = 0; stream < 2; stream++) {
  305. substream = pcm->streams[stream].substream;
  306. if (substream) {
  307. snd_dma_free_pages(&substream->dma_buffer);
  308. substream->dma_buffer.area = NULL;
  309. substream->dma_buffer.addr = 0;
  310. }
  311. }
  312. }
  313. struct snd_soc_platform mpc5200_audio_dma_platform = {
  314. .name = "mpc5200-psc-audio",
  315. .pcm_ops = &psc_dma_ops,
  316. .pcm_new = &psc_dma_new,
  317. .pcm_free = &psc_dma_free,
  318. };
  319. EXPORT_SYMBOL_GPL(mpc5200_audio_dma_platform);
  320. int mpc5200_audio_dma_create(struct of_device *op)
  321. {
  322. phys_addr_t fifo;
  323. struct psc_dma *psc_dma;
  324. struct resource res;
  325. int size, irq, rc;
  326. const __be32 *prop;
  327. void __iomem *regs;
  328. int ret;
  329. /* Fetch the registers and IRQ of the PSC */
  330. irq = irq_of_parse_and_map(op->node, 0);
  331. if (of_address_to_resource(op->node, 0, &res)) {
  332. dev_err(&op->dev, "Missing reg property\n");
  333. return -ENODEV;
  334. }
  335. regs = ioremap(res.start, 1 + res.end - res.start);
  336. if (!regs) {
  337. dev_err(&op->dev, "Could not map registers\n");
  338. return -ENODEV;
  339. }
  340. /* Allocate and initialize the driver private data */
  341. psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
  342. if (!psc_dma) {
  343. ret = -ENOMEM;
  344. goto out_unmap;
  345. }
  346. /* Get the PSC ID */
  347. prop = of_get_property(op->node, "cell-index", &size);
  348. if (!prop || size < sizeof *prop) {
  349. ret = -ENODEV;
  350. goto out_free;
  351. }
  352. spin_lock_init(&psc_dma->lock);
  353. mutex_init(&psc_dma->mutex);
  354. psc_dma->id = be32_to_cpu(*prop);
  355. psc_dma->irq = irq;
  356. psc_dma->psc_regs = regs;
  357. psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
  358. psc_dma->dev = &op->dev;
  359. psc_dma->playback.psc_dma = psc_dma;
  360. psc_dma->capture.psc_dma = psc_dma;
  361. snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id);
  362. /* Find the address of the fifo data registers and setup the
  363. * DMA tasks */
  364. fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
  365. psc_dma->capture.bcom_task =
  366. bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
  367. psc_dma->playback.bcom_task =
  368. bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
  369. if (!psc_dma->capture.bcom_task ||
  370. !psc_dma->playback.bcom_task) {
  371. dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
  372. ret = -ENODEV;
  373. goto out_free;
  374. }
  375. /* Disable all interrupts and reset the PSC */
  376. out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
  377. /* reset receiver */
  378. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
  379. /* reset transmitter */
  380. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
  381. /* reset error */
  382. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
  383. /* reset mode */
  384. out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
  385. /* Set up mode register;
  386. * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
  387. * Second write: register Normal mode for non loopback
  388. */
  389. out_8(&psc_dma->psc_regs->mode, 0);
  390. out_8(&psc_dma->psc_regs->mode, 0);
  391. /* Set the TX and RX fifo alarm thresholds */
  392. out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
  393. out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
  394. out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
  395. out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
  396. /* Lookup the IRQ numbers */
  397. psc_dma->playback.irq =
  398. bcom_get_task_irq(psc_dma->playback.bcom_task);
  399. psc_dma->capture.irq =
  400. bcom_get_task_irq(psc_dma->capture.bcom_task);
  401. rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
  402. "psc-dma-status", psc_dma);
  403. rc |= request_irq(psc_dma->capture.irq,
  404. &psc_dma_bcom_irq_rx, IRQF_SHARED,
  405. "psc-dma-capture", &psc_dma->capture);
  406. rc |= request_irq(psc_dma->playback.irq,
  407. &psc_dma_bcom_irq_tx, IRQF_SHARED,
  408. "psc-dma-playback", &psc_dma->playback);
  409. if (rc) {
  410. ret = -ENODEV;
  411. goto out_irq;
  412. }
  413. /* Save what we've done so it can be found again later */
  414. dev_set_drvdata(&op->dev, psc_dma);
  415. /* Tell the ASoC OF helpers about it */
  416. return snd_soc_register_platform(&mpc5200_audio_dma_platform);
  417. out_irq:
  418. free_irq(psc_dma->irq, psc_dma);
  419. free_irq(psc_dma->capture.irq, &psc_dma->capture);
  420. free_irq(psc_dma->playback.irq, &psc_dma->playback);
  421. out_free:
  422. kfree(psc_dma);
  423. out_unmap:
  424. iounmap(regs);
  425. return ret;
  426. }
  427. EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
  428. int mpc5200_audio_dma_destroy(struct of_device *op)
  429. {
  430. struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
  431. dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
  432. snd_soc_unregister_platform(&mpc5200_audio_dma_platform);
  433. bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
  434. bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
  435. /* Release irqs */
  436. free_irq(psc_dma->irq, psc_dma);
  437. free_irq(psc_dma->capture.irq, &psc_dma->capture);
  438. free_irq(psc_dma->playback.irq, &psc_dma->playback);
  439. iounmap(psc_dma->psc_regs);
  440. kfree(psc_dma);
  441. dev_set_drvdata(&op->dev, NULL);
  442. return 0;
  443. }
  444. EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
  445. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  446. MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
  447. MODULE_LICENSE("GPL");