mac.c 32 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. ****************************************************************************/
  29. #include <linux/module.h>
  30. #include "../wifi.h"
  31. #include "../pci.h"
  32. #include "../usb.h"
  33. #include "../ps.h"
  34. #include "../cam.h"
  35. #include "reg.h"
  36. #include "def.h"
  37. #include "phy.h"
  38. #include "rf.h"
  39. #include "dm.h"
  40. #include "mac.h"
  41. #include "trx.h"
  42. /* macro to shorten lines */
  43. #define LINK_Q ui_link_quality
  44. #define RX_EVM rx_evm_percentage
  45. #define RX_SIGQ rx_mimo_signalquality
  46. void rtl92c_read_chip_version(struct ieee80211_hw *hw)
  47. {
  48. struct rtl_priv *rtlpriv = rtl_priv(hw);
  49. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  50. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  51. enum version_8192c chip_version = VERSION_UNKNOWN;
  52. u32 value32;
  53. value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
  54. if (value32 & TRP_VAUX_EN) {
  55. chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
  56. VERSION_TEST_CHIP_88C;
  57. } else {
  58. /* Normal mass production chip. */
  59. chip_version = NORMAL_CHIP;
  60. chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
  61. chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
  62. /* RTL8723 with BT function. */
  63. chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
  64. if (IS_VENDOR_UMC(chip_version))
  65. chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
  66. CHIP_VENDOR_UMC_B_CUT : 0);
  67. if (IS_92C_SERIAL(chip_version)) {
  68. value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
  69. chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
  70. CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
  71. } else if (IS_8723_SERIES(chip_version)) {
  72. value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
  73. chip_version |= ((value32 & RF_RL_ID) ?
  74. CHIP_8723_DRV_REV : 0);
  75. }
  76. }
  77. rtlhal->version = (enum version_8192c)chip_version;
  78. switch (rtlhal->version) {
  79. case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
  80. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  81. ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
  82. break;
  83. case VERSION_NORMAL_TSMC_CHIP_92C:
  84. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  85. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"));
  86. break;
  87. case VERSION_NORMAL_TSMC_CHIP_88C:
  88. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  89. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"));
  90. break;
  91. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
  92. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  93. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_i"
  94. "92C_1T2R_A_CUT.\n"));
  95. break;
  96. case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
  97. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  98. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_"
  99. "92C_A_CUT.\n"));
  100. break;
  101. case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
  102. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  103. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  104. "_88C_A_CUT.\n"));
  105. break;
  106. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
  107. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  108. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  109. "_92C_1T2R_B_CUT.\n"));
  110. break;
  111. case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
  112. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  113. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  114. "_92C_B_CUT.\n"));
  115. break;
  116. case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
  117. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  118. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  119. "_88C_B_CUT.\n"));
  120. break;
  121. case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
  122. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  123. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  124. "_8723_1T1R_A_CUT.\n"));
  125. break;
  126. case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
  127. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  128. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  129. "_8723_1T1R_B_CUT.\n"));
  130. break;
  131. case VERSION_TEST_CHIP_92C:
  132. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  133. ("Chip Version ID: VERSION_TEST_CHIP_92C.\n"));
  134. break;
  135. case VERSION_TEST_CHIP_88C:
  136. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  137. ("Chip Version ID: VERSION_TEST_CHIP_88C.\n"));
  138. break;
  139. default:
  140. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  141. ("Chip Version ID: ???????????????.\n"));
  142. break;
  143. }
  144. if (IS_92C_SERIAL(rtlhal->version))
  145. rtlphy->rf_type =
  146. (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
  147. else
  148. rtlphy->rf_type = RF_1T1R;
  149. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  150. ("Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
  151. "RF_2T2R" : "RF_1T1R"));
  152. if (get_rf_type(rtlphy) == RF_1T1R)
  153. rtlpriv->dm.rfpath_rxenable[0] = true;
  154. else
  155. rtlpriv->dm.rfpath_rxenable[0] =
  156. rtlpriv->dm.rfpath_rxenable[1] = true;
  157. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
  158. rtlhal->version));
  159. }
  160. /**
  161. * writeLLT - LLT table write access
  162. * @io: io callback
  163. * @address: LLT logical address.
  164. * @data: LLT data content
  165. *
  166. * Realtek hardware access function.
  167. *
  168. */
  169. bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
  170. {
  171. struct rtl_priv *rtlpriv = rtl_priv(hw);
  172. bool status = true;
  173. long count = 0;
  174. u32 value = _LLT_INIT_ADDR(address) |
  175. _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
  176. rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
  177. do {
  178. value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
  179. if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
  180. break;
  181. if (count > POLLING_LLT_THRESHOLD) {
  182. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  183. ("Failed to polling write LLT done at"
  184. " address %d! _LLT_OP_VALUE(%x)\n",
  185. address, _LLT_OP_VALUE(value)));
  186. status = false;
  187. break;
  188. }
  189. } while (++count);
  190. return status;
  191. }
  192. /**
  193. * rtl92c_init_LLT_table - Init LLT table
  194. * @io: io callback
  195. * @boundary:
  196. *
  197. * Realtek hardware access function.
  198. *
  199. */
  200. bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
  201. {
  202. bool rst = true;
  203. u32 i;
  204. for (i = 0; i < (boundary - 1); i++) {
  205. rst = rtl92c_llt_write(hw, i , i + 1);
  206. if (true != rst) {
  207. printk(KERN_ERR "===> %s #1 fail\n", __func__);
  208. return rst;
  209. }
  210. }
  211. /* end of list */
  212. rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
  213. if (true != rst) {
  214. printk(KERN_ERR "===> %s #2 fail\n", __func__);
  215. return rst;
  216. }
  217. /* Make the other pages as ring buffer
  218. * This ring buffer is used as beacon buffer if we config this MAC
  219. * as two MAC transfer.
  220. * Otherwise used as local loopback buffer.
  221. */
  222. for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
  223. rst = rtl92c_llt_write(hw, i, (i + 1));
  224. if (true != rst) {
  225. printk(KERN_ERR "===> %s #3 fail\n", __func__);
  226. return rst;
  227. }
  228. }
  229. /* Let last entry point to the start entry of ring buffer */
  230. rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
  231. if (true != rst) {
  232. printk(KERN_ERR "===> %s #4 fail\n", __func__);
  233. return rst;
  234. }
  235. return rst;
  236. }
  237. void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
  238. u8 *p_macaddr, bool is_group, u8 enc_algo,
  239. bool is_wepkey, bool clear_all)
  240. {
  241. struct rtl_priv *rtlpriv = rtl_priv(hw);
  242. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  243. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  244. u8 *macaddr = p_macaddr;
  245. u32 entry_id = 0;
  246. bool is_pairwise = false;
  247. static u8 cam_const_addr[4][6] = {
  248. {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
  249. {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
  250. {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
  251. {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
  252. };
  253. static u8 cam_const_broad[] = {
  254. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
  255. };
  256. if (clear_all) {
  257. u8 idx = 0;
  258. u8 cam_offset = 0;
  259. u8 clear_number = 5;
  260. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("clear_all\n"));
  261. for (idx = 0; idx < clear_number; idx++) {
  262. rtl_cam_mark_invalid(hw, cam_offset + idx);
  263. rtl_cam_empty_entry(hw, cam_offset + idx);
  264. if (idx < 5) {
  265. memset(rtlpriv->sec.key_buf[idx], 0,
  266. MAX_KEY_LEN);
  267. rtlpriv->sec.key_len[idx] = 0;
  268. }
  269. }
  270. } else {
  271. switch (enc_algo) {
  272. case WEP40_ENCRYPTION:
  273. enc_algo = CAM_WEP40;
  274. break;
  275. case WEP104_ENCRYPTION:
  276. enc_algo = CAM_WEP104;
  277. break;
  278. case TKIP_ENCRYPTION:
  279. enc_algo = CAM_TKIP;
  280. break;
  281. case AESCCMP_ENCRYPTION:
  282. enc_algo = CAM_AES;
  283. break;
  284. default:
  285. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  286. ("iillegal switch case\n"));
  287. enc_algo = CAM_TKIP;
  288. break;
  289. }
  290. if (is_wepkey || rtlpriv->sec.use_defaultkey) {
  291. macaddr = cam_const_addr[key_index];
  292. entry_id = key_index;
  293. } else {
  294. if (is_group) {
  295. macaddr = cam_const_broad;
  296. entry_id = key_index;
  297. } else {
  298. key_index = PAIRWISE_KEYIDX;
  299. entry_id = CAM_PAIRWISE_KEY_POSITION;
  300. is_pairwise = true;
  301. }
  302. }
  303. if (rtlpriv->sec.key_len[key_index] == 0) {
  304. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  305. ("delete one entry\n"));
  306. rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
  307. } else {
  308. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  309. ("The insert KEY length is %d\n",
  310. rtlpriv->sec.key_len[PAIRWISE_KEYIDX]));
  311. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  312. ("The insert KEY is %x %x\n",
  313. rtlpriv->sec.key_buf[0][0],
  314. rtlpriv->sec.key_buf[0][1]));
  315. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  316. ("add one entry\n"));
  317. if (is_pairwise) {
  318. RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
  319. "Pairwiase Key content :",
  320. rtlpriv->sec.pairwise_key,
  321. rtlpriv->sec.
  322. key_len[PAIRWISE_KEYIDX]);
  323. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  324. ("set Pairwiase key\n"));
  325. rtl_cam_add_one_entry(hw, macaddr, key_index,
  326. entry_id, enc_algo,
  327. CAM_CONFIG_NO_USEDK,
  328. rtlpriv->sec.
  329. key_buf[key_index]);
  330. } else {
  331. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  332. ("set group key\n"));
  333. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  334. rtl_cam_add_one_entry(hw,
  335. rtlefuse->dev_addr,
  336. PAIRWISE_KEYIDX,
  337. CAM_PAIRWISE_KEY_POSITION,
  338. enc_algo,
  339. CAM_CONFIG_NO_USEDK,
  340. rtlpriv->sec.key_buf
  341. [entry_id]);
  342. }
  343. rtl_cam_add_one_entry(hw, macaddr, key_index,
  344. entry_id, enc_algo,
  345. CAM_CONFIG_NO_USEDK,
  346. rtlpriv->sec.key_buf[entry_id]);
  347. }
  348. }
  349. }
  350. }
  351. u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
  352. {
  353. struct rtl_priv *rtlpriv = rtl_priv(hw);
  354. return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
  355. }
  356. void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
  357. {
  358. struct rtl_priv *rtlpriv = rtl_priv(hw);
  359. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  360. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  361. struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
  362. if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
  363. rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
  364. 0xFFFFFFFF);
  365. rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
  366. 0xFFFFFFFF);
  367. } else {
  368. rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
  369. 0xFFFFFFFF);
  370. rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
  371. 0xFFFFFFFF);
  372. }
  373. }
  374. void rtl92c_init_interrupt(struct ieee80211_hw *hw)
  375. {
  376. rtl92c_enable_interrupt(hw);
  377. }
  378. void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
  379. {
  380. struct rtl_priv *rtlpriv = rtl_priv(hw);
  381. rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
  382. rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
  383. }
  384. void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
  385. {
  386. struct rtl_priv *rtlpriv = rtl_priv(hw);
  387. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  388. u32 u4b_ac_param;
  389. rtl92c_dm_init_edca_turbo(hw);
  390. u4b_ac_param = (u32) mac->ac[aci].aifs;
  391. u4b_ac_param |=
  392. ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
  393. AC_PARAM_ECW_MIN_OFFSET;
  394. u4b_ac_param |=
  395. ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
  396. AC_PARAM_ECW_MAX_OFFSET;
  397. u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
  398. AC_PARAM_TXOP_OFFSET;
  399. RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD,
  400. ("queue:%x, ac_param:%x\n", aci, u4b_ac_param));
  401. switch (aci) {
  402. case AC1_BK:
  403. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
  404. break;
  405. case AC0_BE:
  406. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
  407. break;
  408. case AC2_VI:
  409. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
  410. break;
  411. case AC3_VO:
  412. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
  413. break;
  414. default:
  415. RT_ASSERT(false, ("invalid aci: %d !\n", aci));
  416. break;
  417. }
  418. }
  419. /*-------------------------------------------------------------------------
  420. * HW MAC Address
  421. *-------------------------------------------------------------------------*/
  422. void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
  423. {
  424. u32 i;
  425. struct rtl_priv *rtlpriv = rtl_priv(hw);
  426. for (i = 0 ; i < ETH_ALEN ; i++)
  427. rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
  428. RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, ("MAC Address: %02X-%02X-%02X-"
  429. "%02X-%02X-%02X\n",
  430. rtl_read_byte(rtlpriv, REG_MACID),
  431. rtl_read_byte(rtlpriv, REG_MACID+1),
  432. rtl_read_byte(rtlpriv, REG_MACID+2),
  433. rtl_read_byte(rtlpriv, REG_MACID+3),
  434. rtl_read_byte(rtlpriv, REG_MACID+4),
  435. rtl_read_byte(rtlpriv, REG_MACID+5)));
  436. }
  437. void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
  438. {
  439. struct rtl_priv *rtlpriv = rtl_priv(hw);
  440. rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
  441. }
  442. int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
  443. {
  444. u8 value;
  445. struct rtl_priv *rtlpriv = rtl_priv(hw);
  446. switch (type) {
  447. case NL80211_IFTYPE_UNSPECIFIED:
  448. value = NT_NO_LINK;
  449. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  450. ("Set Network type to NO LINK!\n"));
  451. break;
  452. case NL80211_IFTYPE_ADHOC:
  453. value = NT_LINK_AD_HOC;
  454. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  455. ("Set Network type to Ad Hoc!\n"));
  456. break;
  457. case NL80211_IFTYPE_STATION:
  458. value = NT_LINK_AP;
  459. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  460. ("Set Network type to STA!\n"));
  461. break;
  462. case NL80211_IFTYPE_AP:
  463. value = NT_AS_AP;
  464. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  465. ("Set Network type to AP!\n"));
  466. break;
  467. default:
  468. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  469. ("Network type %d not support!\n", type));
  470. return -EOPNOTSUPP;
  471. }
  472. rtl_write_byte(rtlpriv, (REG_CR + 2), value);
  473. return 0;
  474. }
  475. void rtl92c_init_network_type(struct ieee80211_hw *hw)
  476. {
  477. rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
  478. }
  479. void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
  480. {
  481. u16 value16;
  482. u32 value32;
  483. struct rtl_priv *rtlpriv = rtl_priv(hw);
  484. /* Response Rate Set */
  485. value32 = rtl_read_dword(rtlpriv, REG_RRSR);
  486. value32 &= ~RATE_BITMAP_ALL;
  487. value32 |= RATE_RRSR_CCK_ONLY_1M;
  488. rtl_write_dword(rtlpriv, REG_RRSR, value32);
  489. /* SIFS (used in NAV) */
  490. value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
  491. rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
  492. /* Retry Limit */
  493. value16 = _LRL(0x30) | _SRL(0x30);
  494. rtl_write_dword(rtlpriv, REG_RL, value16);
  495. }
  496. void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
  497. {
  498. struct rtl_priv *rtlpriv = rtl_priv(hw);
  499. /* Set Data Auto Rate Fallback Retry Count register. */
  500. rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
  501. rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
  502. rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
  503. rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
  504. }
  505. static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  506. u8 ctx_sifs)
  507. {
  508. struct rtl_priv *rtlpriv = rtl_priv(hw);
  509. rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
  510. rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
  511. }
  512. static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  513. u8 ctx_sifs)
  514. {
  515. struct rtl_priv *rtlpriv = rtl_priv(hw);
  516. rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
  517. rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
  518. }
  519. void rtl92c_init_edca_param(struct ieee80211_hw *hw,
  520. u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
  521. {
  522. /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
  523. * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
  524. */
  525. u32 value;
  526. struct rtl_priv *rtlpriv = rtl_priv(hw);
  527. value = (u32)aifs;
  528. value |= ((u32)cw_min & 0xF) << 8;
  529. value |= ((u32)cw_max & 0xF) << 12;
  530. value |= (u32)txop << 16;
  531. /* 92C hardware register sequence is the same as queue number. */
  532. rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
  533. }
  534. void rtl92c_init_edca(struct ieee80211_hw *hw)
  535. {
  536. u16 value16;
  537. struct rtl_priv *rtlpriv = rtl_priv(hw);
  538. /* disable EDCCA count down, to reduce collison and retry */
  539. value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
  540. value16 |= DIS_EDCA_CNT_DWN;
  541. rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
  542. /* Update SIFS timing. ??????????
  543. * pHalData->SifsTime = 0x0e0e0a0a; */
  544. rtl92c_set_cck_sifs(hw, 0xa, 0xa);
  545. rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
  546. /* Set CCK/OFDM SIFS to be 10us. */
  547. rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
  548. rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
  549. rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
  550. rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
  551. /* TXOP */
  552. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
  553. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
  554. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
  555. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
  556. /* PIFS */
  557. rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
  558. /* AGGR BREAK TIME Register */
  559. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  560. rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
  561. rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
  562. rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
  563. }
  564. void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
  565. {
  566. struct rtl_priv *rtlpriv = rtl_priv(hw);
  567. rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
  568. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  569. /* init AMPDU aggregation number, tuning for Tx's TP, */
  570. rtl_write_word(rtlpriv, 0x4CA, 0x0708);
  571. }
  572. void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
  573. {
  574. struct rtl_priv *rtlpriv = rtl_priv(hw);
  575. rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
  576. }
  577. void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
  578. {
  579. struct rtl_priv *rtlpriv = rtl_priv(hw);
  580. rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
  581. rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
  582. rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
  583. }
  584. void rtl92c_init_retry_function(struct ieee80211_hw *hw)
  585. {
  586. u8 value8;
  587. struct rtl_priv *rtlpriv = rtl_priv(hw);
  588. value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
  589. value8 |= EN_AMPDU_RTY_NEW;
  590. rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
  591. /* Set ACK timeout */
  592. rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
  593. }
  594. void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
  595. enum version_8192c version)
  596. {
  597. struct rtl_priv *rtlpriv = rtl_priv(hw);
  598. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  599. rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
  600. rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
  601. rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
  602. if (IS_NORMAL_CHIP(rtlhal->version))
  603. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
  604. else
  605. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
  606. }
  607. void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
  608. {
  609. struct rtl_priv *rtlpriv = rtl_priv(hw);
  610. rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
  611. }
  612. void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
  613. {
  614. struct rtl_priv *rtlpriv = rtl_priv(hw);
  615. u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
  616. rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
  617. }
  618. u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
  619. {
  620. struct rtl_priv *rtlpriv = rtl_priv(hw);
  621. return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
  622. }
  623. void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
  624. {
  625. struct rtl_priv *rtlpriv = rtl_priv(hw);
  626. rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
  627. }
  628. u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
  629. {
  630. struct rtl_priv *rtlpriv = rtl_priv(hw);
  631. return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
  632. }
  633. void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
  634. {
  635. struct rtl_priv *rtlpriv = rtl_priv(hw);
  636. rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
  637. }
  638. u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
  639. {
  640. struct rtl_priv *rtlpriv = rtl_priv(hw);
  641. return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
  642. }
  643. void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
  644. {
  645. struct rtl_priv *rtlpriv = rtl_priv(hw);
  646. rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
  647. }
  648. /*==============================================================*/
  649. static u8 _rtl92c_query_rxpwrpercentage(char antpower)
  650. {
  651. if ((antpower <= -100) || (antpower >= 20))
  652. return 0;
  653. else if (antpower >= 0)
  654. return 100;
  655. else
  656. return 100 + antpower;
  657. }
  658. static u8 _rtl92c_evm_db_to_percentage(char value)
  659. {
  660. char ret_val;
  661. ret_val = value;
  662. if (ret_val >= 0)
  663. ret_val = 0;
  664. if (ret_val <= -33)
  665. ret_val = -33;
  666. ret_val = 0 - ret_val;
  667. ret_val *= 3;
  668. if (ret_val == 99)
  669. ret_val = 100;
  670. return ret_val;
  671. }
  672. static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
  673. u8 signal_strength_index)
  674. {
  675. long signal_power;
  676. signal_power = (long)((signal_strength_index + 1) >> 1);
  677. signal_power -= 95;
  678. return signal_power;
  679. }
  680. static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
  681. long currsig)
  682. {
  683. long retsig;
  684. if (currsig >= 61 && currsig <= 100)
  685. retsig = 90 + ((currsig - 60) / 4);
  686. else if (currsig >= 41 && currsig <= 60)
  687. retsig = 78 + ((currsig - 40) / 2);
  688. else if (currsig >= 31 && currsig <= 40)
  689. retsig = 66 + (currsig - 30);
  690. else if (currsig >= 21 && currsig <= 30)
  691. retsig = 54 + (currsig - 20);
  692. else if (currsig >= 5 && currsig <= 20)
  693. retsig = 42 + (((currsig - 5) * 2) / 3);
  694. else if (currsig == 4)
  695. retsig = 36;
  696. else if (currsig == 3)
  697. retsig = 27;
  698. else if (currsig == 2)
  699. retsig = 18;
  700. else if (currsig == 1)
  701. retsig = 9;
  702. else
  703. retsig = currsig;
  704. return retsig;
  705. }
  706. static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
  707. struct rtl_stats *pstats,
  708. struct rx_desc_92c *pdesc,
  709. struct rx_fwinfo_92c *p_drvinfo,
  710. bool packet_match_bssid,
  711. bool packet_toself,
  712. bool packet_beacon)
  713. {
  714. struct rtl_priv *rtlpriv = rtl_priv(hw);
  715. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  716. struct phy_sts_cck_8192s_t *cck_buf;
  717. s8 rx_pwr_all = 0, rx_pwr[4];
  718. u8 rf_rx_num = 0, evm, pwdb_all;
  719. u8 i, max_spatial_stream;
  720. u32 rssi, total_rssi = 0;
  721. bool in_powersavemode = false;
  722. bool is_cck_rate;
  723. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  724. pstats->packet_matchbssid = packet_match_bssid;
  725. pstats->packet_toself = packet_toself;
  726. pstats->is_cck = is_cck_rate;
  727. pstats->packet_beacon = packet_beacon;
  728. pstats->is_cck = is_cck_rate;
  729. pstats->RX_SIGQ[0] = -1;
  730. pstats->RX_SIGQ[1] = -1;
  731. if (is_cck_rate) {
  732. u8 report, cck_highpwr;
  733. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  734. if (!in_powersavemode)
  735. cck_highpwr = rtlphy->cck_high_power;
  736. else
  737. cck_highpwr = false;
  738. if (!cck_highpwr) {
  739. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  740. report = cck_buf->cck_agc_rpt & 0xc0;
  741. report = report >> 6;
  742. switch (report) {
  743. case 0x3:
  744. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  745. break;
  746. case 0x2:
  747. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  748. break;
  749. case 0x1:
  750. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  751. break;
  752. case 0x0:
  753. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  754. break;
  755. }
  756. } else {
  757. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  758. report = p_drvinfo->cfosho[0] & 0x60;
  759. report = report >> 5;
  760. switch (report) {
  761. case 0x3:
  762. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  763. break;
  764. case 0x2:
  765. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  766. break;
  767. case 0x1:
  768. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  769. break;
  770. case 0x0:
  771. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  772. break;
  773. }
  774. }
  775. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  776. pstats->rx_pwdb_all = pwdb_all;
  777. pstats->recvsignalpower = rx_pwr_all;
  778. if (packet_match_bssid) {
  779. u8 sq;
  780. if (pstats->rx_pwdb_all > 40)
  781. sq = 100;
  782. else {
  783. sq = cck_buf->sq_rpt;
  784. if (sq > 64)
  785. sq = 0;
  786. else if (sq < 20)
  787. sq = 100;
  788. else
  789. sq = ((64 - sq) * 100) / 44;
  790. }
  791. pstats->signalquality = sq;
  792. pstats->RX_SIGQ[0] = sq;
  793. pstats->RX_SIGQ[1] = -1;
  794. }
  795. } else {
  796. rtlpriv->dm.rfpath_rxenable[0] =
  797. rtlpriv->dm.rfpath_rxenable[1] = true;
  798. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  799. if (rtlpriv->dm.rfpath_rxenable[i])
  800. rf_rx_num++;
  801. rx_pwr[i] =
  802. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  803. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  804. total_rssi += rssi;
  805. rtlpriv->stats.rx_snr_db[i] =
  806. (long)(p_drvinfo->rxsnr[i] / 2);
  807. if (packet_match_bssid)
  808. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  809. }
  810. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  811. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  812. pstats->rx_pwdb_all = pwdb_all;
  813. pstats->rxpower = rx_pwr_all;
  814. pstats->recvsignalpower = rx_pwr_all;
  815. if (GET_RX_DESC_RX_MCS(pdesc) &&
  816. GET_RX_DESC_RX_MCS(pdesc) >= DESC92C_RATEMCS8 &&
  817. GET_RX_DESC_RX_MCS(pdesc) <= DESC92C_RATEMCS15)
  818. max_spatial_stream = 2;
  819. else
  820. max_spatial_stream = 1;
  821. for (i = 0; i < max_spatial_stream; i++) {
  822. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  823. if (packet_match_bssid) {
  824. if (i == 0)
  825. pstats->signalquality =
  826. (u8) (evm & 0xff);
  827. pstats->RX_SIGQ[i] =
  828. (u8) (evm & 0xff);
  829. }
  830. }
  831. }
  832. if (is_cck_rate)
  833. pstats->signalstrength =
  834. (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
  835. else if (rf_rx_num != 0)
  836. pstats->signalstrength =
  837. (u8) (_rtl92c_signal_scale_mapping
  838. (hw, total_rssi /= rf_rx_num));
  839. }
  840. static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
  841. struct rtl_stats *pstats)
  842. {
  843. struct rtl_priv *rtlpriv = rtl_priv(hw);
  844. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  845. u8 rfpath;
  846. u32 last_rssi, tmpval;
  847. if (pstats->packet_toself || pstats->packet_beacon) {
  848. rtlpriv->stats.rssi_calculate_cnt++;
  849. if (rtlpriv->stats.ui_rssi.total_num++ >=
  850. PHY_RSSI_SLID_WIN_MAX) {
  851. rtlpriv->stats.ui_rssi.total_num =
  852. PHY_RSSI_SLID_WIN_MAX;
  853. last_rssi =
  854. rtlpriv->stats.ui_rssi.elements[rtlpriv->
  855. stats.ui_rssi.index];
  856. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  857. }
  858. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  859. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
  860. index++] = pstats->signalstrength;
  861. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  862. rtlpriv->stats.ui_rssi.index = 0;
  863. tmpval = rtlpriv->stats.ui_rssi.total_val /
  864. rtlpriv->stats.ui_rssi.total_num;
  865. rtlpriv->stats.signal_strength =
  866. _rtl92c_translate_todbm(hw, (u8) tmpval);
  867. pstats->rssi = rtlpriv->stats.signal_strength;
  868. }
  869. if (!pstats->is_cck && pstats->packet_toself) {
  870. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  871. rfpath++) {
  872. if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
  873. continue;
  874. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  875. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  876. pstats->rx_mimo_signalstrength[rfpath];
  877. }
  878. if (pstats->rx_mimo_signalstrength[rfpath] >
  879. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  880. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  881. ((rtlpriv->stats.
  882. rx_rssi_percentage[rfpath] *
  883. (RX_SMOOTH_FACTOR - 1)) +
  884. (pstats->rx_mimo_signalstrength[rfpath])) /
  885. (RX_SMOOTH_FACTOR);
  886. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  887. rtlpriv->stats.rx_rssi_percentage[rfpath] +
  888. 1;
  889. } else {
  890. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  891. ((rtlpriv->stats.
  892. rx_rssi_percentage[rfpath] *
  893. (RX_SMOOTH_FACTOR - 1)) +
  894. (pstats->rx_mimo_signalstrength[rfpath])) /
  895. (RX_SMOOTH_FACTOR);
  896. }
  897. }
  898. }
  899. }
  900. static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
  901. struct rtl_stats *pstats)
  902. {
  903. struct rtl_priv *rtlpriv = rtl_priv(hw);
  904. int weighting = 0;
  905. if (rtlpriv->stats.recv_signal_power == 0)
  906. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  907. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  908. weighting = 5;
  909. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  910. weighting = (-5);
  911. rtlpriv->stats.recv_signal_power =
  912. (rtlpriv->stats.recv_signal_power * 5 +
  913. pstats->recvsignalpower + weighting) / 6;
  914. }
  915. static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
  916. struct rtl_stats *pstats)
  917. {
  918. struct rtl_priv *rtlpriv = rtl_priv(hw);
  919. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  920. long undecorated_smoothed_pwdb = 0;
  921. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  922. return;
  923. } else {
  924. undecorated_smoothed_pwdb =
  925. rtlpriv->dm.undecorated_smoothed_pwdb;
  926. }
  927. if (pstats->packet_toself || pstats->packet_beacon) {
  928. if (undecorated_smoothed_pwdb < 0)
  929. undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
  930. if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
  931. undecorated_smoothed_pwdb =
  932. (((undecorated_smoothed_pwdb) *
  933. (RX_SMOOTH_FACTOR - 1)) +
  934. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  935. undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
  936. + 1;
  937. } else {
  938. undecorated_smoothed_pwdb =
  939. (((undecorated_smoothed_pwdb) *
  940. (RX_SMOOTH_FACTOR - 1)) +
  941. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  942. }
  943. rtlpriv->dm.undecorated_smoothed_pwdb =
  944. undecorated_smoothed_pwdb;
  945. _rtl92c_update_rxsignalstatistics(hw, pstats);
  946. }
  947. }
  948. static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
  949. struct rtl_stats *pstats)
  950. {
  951. struct rtl_priv *rtlpriv = rtl_priv(hw);
  952. u32 last_evm = 0, n_stream, tmpval;
  953. if (pstats->signalquality != 0) {
  954. if (pstats->packet_toself || pstats->packet_beacon) {
  955. if (rtlpriv->stats.LINK_Q.total_num++ >=
  956. PHY_LINKQUALITY_SLID_WIN_MAX) {
  957. rtlpriv->stats.LINK_Q.total_num =
  958. PHY_LINKQUALITY_SLID_WIN_MAX;
  959. last_evm =
  960. rtlpriv->stats.LINK_Q.elements
  961. [rtlpriv->stats.LINK_Q.index];
  962. rtlpriv->stats.LINK_Q.total_val -=
  963. last_evm;
  964. }
  965. rtlpriv->stats.LINK_Q.total_val +=
  966. pstats->signalquality;
  967. rtlpriv->stats.LINK_Q.elements
  968. [rtlpriv->stats.LINK_Q.index++] =
  969. pstats->signalquality;
  970. if (rtlpriv->stats.LINK_Q.index >=
  971. PHY_LINKQUALITY_SLID_WIN_MAX)
  972. rtlpriv->stats.LINK_Q.index = 0;
  973. tmpval = rtlpriv->stats.LINK_Q.total_val /
  974. rtlpriv->stats.LINK_Q.total_num;
  975. rtlpriv->stats.signal_quality = tmpval;
  976. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  977. for (n_stream = 0; n_stream < 2;
  978. n_stream++) {
  979. if (pstats->RX_SIGQ[n_stream] != -1) {
  980. if (!rtlpriv->stats.RX_EVM[n_stream]) {
  981. rtlpriv->stats.RX_EVM[n_stream]
  982. = pstats->RX_SIGQ[n_stream];
  983. }
  984. rtlpriv->stats.RX_EVM[n_stream] =
  985. ((rtlpriv->stats.RX_EVM
  986. [n_stream] *
  987. (RX_SMOOTH_FACTOR - 1)) +
  988. (pstats->RX_SIGQ
  989. [n_stream] * 1)) /
  990. (RX_SMOOTH_FACTOR);
  991. }
  992. }
  993. }
  994. } else {
  995. ;
  996. }
  997. }
  998. static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
  999. u8 *buffer,
  1000. struct rtl_stats *pcurrent_stats)
  1001. {
  1002. if (!pcurrent_stats->packet_matchbssid &&
  1003. !pcurrent_stats->packet_beacon)
  1004. return;
  1005. _rtl92c_process_ui_rssi(hw, pcurrent_stats);
  1006. _rtl92c_process_pwdb(hw, pcurrent_stats);
  1007. _rtl92c_process_LINK_Q(hw, pcurrent_stats);
  1008. }
  1009. void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  1010. struct sk_buff *skb,
  1011. struct rtl_stats *pstats,
  1012. struct rx_desc_92c *pdesc,
  1013. struct rx_fwinfo_92c *p_drvinfo)
  1014. {
  1015. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  1016. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  1017. struct ieee80211_hdr *hdr;
  1018. u8 *tmp_buf;
  1019. u8 *praddr;
  1020. __le16 fc;
  1021. u16 type, cpu_fc;
  1022. bool packet_matchbssid, packet_toself, packet_beacon;
  1023. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  1024. hdr = (struct ieee80211_hdr *)tmp_buf;
  1025. fc = hdr->frame_control;
  1026. cpu_fc = le16_to_cpu(fc);
  1027. type = WLAN_FC_GET_TYPE(fc);
  1028. praddr = hdr->addr1;
  1029. packet_matchbssid =
  1030. ((IEEE80211_FTYPE_CTL != type) &&
  1031. (!compare_ether_addr(mac->bssid,
  1032. (cpu_fc & IEEE80211_FCTL_TODS) ?
  1033. hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
  1034. hdr->addr2 : hdr->addr3)) &&
  1035. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  1036. packet_toself = packet_matchbssid &&
  1037. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  1038. if (ieee80211_is_beacon(fc))
  1039. packet_beacon = true;
  1040. _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  1041. packet_matchbssid, packet_toself,
  1042. packet_beacon);
  1043. _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
  1044. }