Kconfig 8.5 KB

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  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for PCI-attached cryptographic adapters"
  52. depends on S390
  53. select ZCRYPT_MONOLITHIC if ZCRYPT="y"
  54. select HW_RANDOM
  55. help
  56. Select this option if you want to use a PCI-attached cryptographic
  57. adapter like:
  58. + PCI Cryptographic Accelerator (PCICA)
  59. + PCI Cryptographic Coprocessor (PCICC)
  60. + PCI-X Cryptographic Coprocessor (PCIXCC)
  61. + Crypto Express2 Coprocessor (CEX2C)
  62. + Crypto Express2 Accelerator (CEX2A)
  63. config ZCRYPT_MONOLITHIC
  64. bool "Monolithic zcrypt module"
  65. depends on ZCRYPT
  66. help
  67. Select this option if you want to have a single module z90crypt,
  68. that contains all parts of the crypto device driver (ap bus,
  69. request router and all the card drivers).
  70. config CRYPTO_SHA1_S390
  71. tristate "SHA1 digest algorithm"
  72. depends on S390
  73. select CRYPTO_HASH
  74. help
  75. This is the s390 hardware accelerated implementation of the
  76. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  77. It is available as of z990.
  78. config CRYPTO_SHA256_S390
  79. tristate "SHA256 digest algorithm"
  80. depends on S390
  81. select CRYPTO_HASH
  82. help
  83. This is the s390 hardware accelerated implementation of the
  84. SHA256 secure hash standard (DFIPS 180-2).
  85. It is available as of z9.
  86. config CRYPTO_SHA512_S390
  87. tristate "SHA384 and SHA512 digest algorithm"
  88. depends on S390
  89. select CRYPTO_HASH
  90. help
  91. This is the s390 hardware accelerated implementation of the
  92. SHA512 secure hash standard.
  93. It is available as of z10.
  94. config CRYPTO_DES_S390
  95. tristate "DES and Triple DES cipher algorithms"
  96. depends on S390
  97. select CRYPTO_ALGAPI
  98. select CRYPTO_BLKCIPHER
  99. help
  100. This is the s390 hardware accelerated implementation of the
  101. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  102. As of z990 the ECB and CBC mode are hardware accelerated.
  103. As of z196 the CTR mode is hardware accelerated.
  104. config CRYPTO_AES_S390
  105. tristate "AES cipher algorithms"
  106. depends on S390
  107. select CRYPTO_ALGAPI
  108. select CRYPTO_BLKCIPHER
  109. help
  110. This is the s390 hardware accelerated implementation of the
  111. AES cipher algorithms (FIPS-197).
  112. As of z9 the ECB and CBC modes are hardware accelerated
  113. for 128 bit keys.
  114. As of z10 the ECB and CBC modes are hardware accelerated
  115. for all AES key sizes.
  116. As of z196 the CTR mode is hardware accelerated for all AES
  117. key sizes and XTS mode is hardware accelerated for 256 and
  118. 512 bit keys.
  119. config S390_PRNG
  120. tristate "Pseudo random number generator device driver"
  121. depends on S390
  122. default "m"
  123. help
  124. Select this option if you want to use the s390 pseudo random number
  125. generator. The PRNG is part of the cryptographic processor functions
  126. and uses triple-DES to generate secure random numbers like the
  127. ANSI X9.17 standard. User-space programs access the
  128. pseudo-random-number device through the char device /dev/prandom.
  129. It is available as of z9.
  130. config CRYPTO_GHASH_S390
  131. tristate "GHASH digest algorithm"
  132. depends on S390
  133. select CRYPTO_HASH
  134. help
  135. This is the s390 hardware accelerated implementation of the
  136. GHASH message digest algorithm for GCM (Galois/Counter Mode).
  137. It is available as of z196.
  138. config CRYPTO_DEV_MV_CESA
  139. tristate "Marvell's Cryptographic Engine"
  140. depends on PLAT_ORION
  141. select CRYPTO_ALGAPI
  142. select CRYPTO_AES
  143. select CRYPTO_BLKCIPHER2
  144. help
  145. This driver allows you to utilize the Cryptographic Engines and
  146. Security Accelerator (CESA) which can be found on the Marvell Orion
  147. and Kirkwood SoCs, such as QNAP's TS-209.
  148. Currently the driver supports AES in ECB and CBC mode without DMA.
  149. config CRYPTO_DEV_NIAGARA2
  150. tristate "Niagara2 Stream Processing Unit driver"
  151. select CRYPTO_DES
  152. select CRYPTO_ALGAPI
  153. depends on SPARC64
  154. help
  155. Each core of a Niagara2 processor contains a Stream
  156. Processing Unit, which itself contains several cryptographic
  157. sub-units. One set provides the Modular Arithmetic Unit,
  158. used for SSL offload. The other set provides the Cipher
  159. Group, which can perform encryption, decryption, hashing,
  160. checksumming, and raw copies.
  161. config CRYPTO_DEV_HIFN_795X
  162. tristate "Driver HIFN 795x crypto accelerator chips"
  163. select CRYPTO_DES
  164. select CRYPTO_ALGAPI
  165. select CRYPTO_BLKCIPHER
  166. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  167. depends on PCI
  168. help
  169. This option allows you to have support for HIFN 795x crypto adapters.
  170. config CRYPTO_DEV_HIFN_795X_RNG
  171. bool "HIFN 795x random number generator"
  172. depends on CRYPTO_DEV_HIFN_795X
  173. help
  174. Select this option if you want to enable the random number generator
  175. on the HIFN 795x crypto adapters.
  176. source drivers/crypto/caam/Kconfig
  177. config CRYPTO_DEV_TALITOS
  178. tristate "Talitos Freescale Security Engine (SEC)"
  179. select CRYPTO_ALGAPI
  180. select CRYPTO_AUTHENC
  181. select HW_RANDOM
  182. depends on FSL_SOC
  183. help
  184. Say 'Y' here to use the Freescale Security Engine (SEC)
  185. to offload cryptographic algorithm computation.
  186. The Freescale SEC is present on PowerQUICC 'E' processors, such
  187. as the MPC8349E and MPC8548E.
  188. To compile this driver as a module, choose M here: the module
  189. will be called talitos.
  190. config CRYPTO_DEV_IXP4XX
  191. tristate "Driver for IXP4xx crypto hardware acceleration"
  192. depends on ARCH_IXP4XX
  193. select CRYPTO_DES
  194. select CRYPTO_ALGAPI
  195. select CRYPTO_AUTHENC
  196. select CRYPTO_BLKCIPHER
  197. help
  198. Driver for the IXP4xx NPE crypto engine.
  199. config CRYPTO_DEV_PPC4XX
  200. tristate "Driver AMCC PPC4xx crypto accelerator"
  201. depends on PPC && 4xx
  202. select CRYPTO_HASH
  203. select CRYPTO_ALGAPI
  204. select CRYPTO_BLKCIPHER
  205. help
  206. This option allows you to have support for AMCC crypto acceleration.
  207. config CRYPTO_DEV_OMAP_SHAM
  208. tristate "Support for OMAP SHA1/MD5 hw accelerator"
  209. depends on ARCH_OMAP2 || ARCH_OMAP3
  210. select CRYPTO_SHA1
  211. select CRYPTO_MD5
  212. help
  213. OMAP processors have SHA1/MD5 hw accelerator. Select this if you
  214. want to use the OMAP module for SHA1/MD5 algorithms.
  215. config CRYPTO_DEV_OMAP_AES
  216. tristate "Support for OMAP AES hw engine"
  217. depends on ARCH_OMAP2 || ARCH_OMAP3
  218. select CRYPTO_AES
  219. help
  220. OMAP processors have AES module accelerator. Select this if you
  221. want to use the OMAP module for AES algorithms.
  222. config CRYPTO_DEV_PICOXCELL
  223. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  224. depends on ARCH_PICOXCELL
  225. select CRYPTO_AES
  226. select CRYPTO_AUTHENC
  227. select CRYPTO_ALGAPI
  228. select CRYPTO_DES
  229. select CRYPTO_CBC
  230. select CRYPTO_ECB
  231. select CRYPTO_SEQIV
  232. help
  233. This option enables support for the hardware offload engines in the
  234. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  235. and for 3gpp Layer 2 ciphering support.
  236. Saying m here will build a module named pipcoxcell_crypto.
  237. config CRYPTO_DEV_S5P
  238. tristate "Support for Samsung S5PV210 crypto accelerator"
  239. depends on ARCH_S5PV210
  240. select CRYPTO_AES
  241. select CRYPTO_ALGAPI
  242. select CRYPTO_BLKCIPHER
  243. help
  244. This option allows you to have support for S5P crypto acceleration.
  245. Select this to offload Samsung S5PV210 or S5PC110 from AES
  246. algorithms execution.
  247. endif # CRYPTO_HW