hpet.c 24 KB

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  1. /*
  2. * Intel & MS High Precision Event Timer Implementation.
  3. *
  4. * Copyright (C) 2003 Intel Corporation
  5. * Venki Pallipadi
  6. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  7. * Bob Picco <robert.picco@hp.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/major.h>
  19. #include <linux/ioport.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/init.h>
  22. #include <linux/poll.h>
  23. #include <linux/mm.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sysctl.h>
  27. #include <linux/wait.h>
  28. #include <linux/bcd.h>
  29. #include <linux/seq_file.h>
  30. #include <linux/bitops.h>
  31. #include <linux/compat.h>
  32. #include <linux/clocksource.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/slab.h>
  35. #include <linux/io.h>
  36. #include <asm/current.h>
  37. #include <asm/system.h>
  38. #include <asm/irq.h>
  39. #include <asm/div64.h>
  40. #include <linux/acpi.h>
  41. #include <acpi/acpi_bus.h>
  42. #include <linux/hpet.h>
  43. /*
  44. * The High Precision Event Timer driver.
  45. * This driver is closely modelled after the rtc.c driver.
  46. * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
  47. */
  48. #define HPET_USER_FREQ (64)
  49. #define HPET_DRIFT (500)
  50. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  51. /* WARNING -- don't get confused. These macros are never used
  52. * to write the (single) counter, and rarely to read it.
  53. * They're badly named; to fix, someday.
  54. */
  55. #if BITS_PER_LONG == 64
  56. #define write_counter(V, MC) writeq(V, MC)
  57. #define read_counter(MC) readq(MC)
  58. #else
  59. #define write_counter(V, MC) writel(V, MC)
  60. #define read_counter(MC) readl(MC)
  61. #endif
  62. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  63. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  64. /* This clocksource driver currently only works on ia64 */
  65. #ifdef CONFIG_IA64
  66. static void __iomem *hpet_mctr;
  67. static cycle_t read_hpet(struct clocksource *cs)
  68. {
  69. return (cycle_t)read_counter((void __iomem *)hpet_mctr);
  70. }
  71. static struct clocksource clocksource_hpet = {
  72. .name = "hpet",
  73. .rating = 250,
  74. .read = read_hpet,
  75. .mask = CLOCKSOURCE_MASK(64),
  76. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  77. };
  78. static struct clocksource *hpet_clocksource;
  79. #endif
  80. /* A lock for concurrent access by app and isr hpet activity. */
  81. static DEFINE_SPINLOCK(hpet_lock);
  82. #define HPET_DEV_NAME (7)
  83. struct hpet_dev {
  84. struct hpets *hd_hpets;
  85. struct hpet __iomem *hd_hpet;
  86. struct hpet_timer __iomem *hd_timer;
  87. unsigned long hd_ireqfreq;
  88. unsigned long hd_irqdata;
  89. wait_queue_head_t hd_waitqueue;
  90. struct fasync_struct *hd_async_queue;
  91. unsigned int hd_flags;
  92. unsigned int hd_irq;
  93. unsigned int hd_hdwirq;
  94. char hd_name[HPET_DEV_NAME];
  95. };
  96. struct hpets {
  97. struct hpets *hp_next;
  98. struct hpet __iomem *hp_hpet;
  99. unsigned long hp_hpet_phys;
  100. struct clocksource *hp_clocksource;
  101. unsigned long long hp_tick_freq;
  102. unsigned long hp_delta;
  103. unsigned int hp_ntimer;
  104. unsigned int hp_which;
  105. struct hpet_dev hp_dev[1];
  106. };
  107. static struct hpets *hpets;
  108. #define HPET_OPEN 0x0001
  109. #define HPET_IE 0x0002 /* interrupt enabled */
  110. #define HPET_PERIODIC 0x0004
  111. #define HPET_SHARED_IRQ 0x0008
  112. #ifndef readq
  113. static inline unsigned long long readq(void __iomem *addr)
  114. {
  115. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  116. }
  117. #endif
  118. #ifndef writeq
  119. static inline void writeq(unsigned long long v, void __iomem *addr)
  120. {
  121. writel(v & 0xffffffff, addr);
  122. writel(v >> 32, addr + 4);
  123. }
  124. #endif
  125. static irqreturn_t hpet_interrupt(int irq, void *data)
  126. {
  127. struct hpet_dev *devp;
  128. unsigned long isr;
  129. devp = data;
  130. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  131. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  132. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  133. return IRQ_NONE;
  134. spin_lock(&hpet_lock);
  135. devp->hd_irqdata++;
  136. /*
  137. * For non-periodic timers, increment the accumulator.
  138. * This has the effect of treating non-periodic like periodic.
  139. */
  140. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  141. unsigned long m, t;
  142. t = devp->hd_ireqfreq;
  143. m = read_counter(&devp->hd_timer->hpet_compare);
  144. write_counter(t + m, &devp->hd_timer->hpet_compare);
  145. }
  146. if (devp->hd_flags & HPET_SHARED_IRQ)
  147. writel(isr, &devp->hd_hpet->hpet_isr);
  148. spin_unlock(&hpet_lock);
  149. wake_up_interruptible(&devp->hd_waitqueue);
  150. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  151. return IRQ_HANDLED;
  152. }
  153. static void hpet_timer_set_irq(struct hpet_dev *devp)
  154. {
  155. unsigned long v;
  156. int irq, gsi;
  157. struct hpet_timer __iomem *timer;
  158. spin_lock_irq(&hpet_lock);
  159. if (devp->hd_hdwirq) {
  160. spin_unlock_irq(&hpet_lock);
  161. return;
  162. }
  163. timer = devp->hd_timer;
  164. /* we prefer level triggered mode */
  165. v = readl(&timer->hpet_config);
  166. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  167. v |= Tn_INT_TYPE_CNF_MASK;
  168. writel(v, &timer->hpet_config);
  169. }
  170. spin_unlock_irq(&hpet_lock);
  171. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  172. Tn_INT_ROUTE_CAP_SHIFT;
  173. /*
  174. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  175. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  176. */
  177. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  178. v &= ~0xf3df;
  179. else
  180. v &= ~0xffff;
  181. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  182. if (irq >= nr_irqs) {
  183. irq = HPET_MAX_IRQ;
  184. break;
  185. }
  186. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  187. ACPI_ACTIVE_LOW);
  188. if (gsi > 0)
  189. break;
  190. /* FIXME: Setup interrupt source table */
  191. }
  192. if (irq < HPET_MAX_IRQ) {
  193. spin_lock_irq(&hpet_lock);
  194. v = readl(&timer->hpet_config);
  195. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  196. writel(v, &timer->hpet_config);
  197. devp->hd_hdwirq = gsi;
  198. spin_unlock_irq(&hpet_lock);
  199. }
  200. return;
  201. }
  202. static int hpet_open(struct inode *inode, struct file *file)
  203. {
  204. struct hpet_dev *devp;
  205. struct hpets *hpetp;
  206. int i;
  207. if (file->f_mode & FMODE_WRITE)
  208. return -EINVAL;
  209. mutex_lock(&hpet_mutex);
  210. spin_lock_irq(&hpet_lock);
  211. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  212. for (i = 0; i < hpetp->hp_ntimer; i++)
  213. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  214. continue;
  215. else {
  216. devp = &hpetp->hp_dev[i];
  217. break;
  218. }
  219. if (!devp) {
  220. spin_unlock_irq(&hpet_lock);
  221. mutex_unlock(&hpet_mutex);
  222. return -EBUSY;
  223. }
  224. file->private_data = devp;
  225. devp->hd_irqdata = 0;
  226. devp->hd_flags |= HPET_OPEN;
  227. spin_unlock_irq(&hpet_lock);
  228. mutex_unlock(&hpet_mutex);
  229. hpet_timer_set_irq(devp);
  230. return 0;
  231. }
  232. static ssize_t
  233. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  234. {
  235. DECLARE_WAITQUEUE(wait, current);
  236. unsigned long data;
  237. ssize_t retval;
  238. struct hpet_dev *devp;
  239. devp = file->private_data;
  240. if (!devp->hd_ireqfreq)
  241. return -EIO;
  242. if (count < sizeof(unsigned long))
  243. return -EINVAL;
  244. add_wait_queue(&devp->hd_waitqueue, &wait);
  245. for ( ; ; ) {
  246. set_current_state(TASK_INTERRUPTIBLE);
  247. spin_lock_irq(&hpet_lock);
  248. data = devp->hd_irqdata;
  249. devp->hd_irqdata = 0;
  250. spin_unlock_irq(&hpet_lock);
  251. if (data)
  252. break;
  253. else if (file->f_flags & O_NONBLOCK) {
  254. retval = -EAGAIN;
  255. goto out;
  256. } else if (signal_pending(current)) {
  257. retval = -ERESTARTSYS;
  258. goto out;
  259. }
  260. schedule();
  261. }
  262. retval = put_user(data, (unsigned long __user *)buf);
  263. if (!retval)
  264. retval = sizeof(unsigned long);
  265. out:
  266. __set_current_state(TASK_RUNNING);
  267. remove_wait_queue(&devp->hd_waitqueue, &wait);
  268. return retval;
  269. }
  270. static unsigned int hpet_poll(struct file *file, poll_table * wait)
  271. {
  272. unsigned long v;
  273. struct hpet_dev *devp;
  274. devp = file->private_data;
  275. if (!devp->hd_ireqfreq)
  276. return 0;
  277. poll_wait(file, &devp->hd_waitqueue, wait);
  278. spin_lock_irq(&hpet_lock);
  279. v = devp->hd_irqdata;
  280. spin_unlock_irq(&hpet_lock);
  281. if (v != 0)
  282. return POLLIN | POLLRDNORM;
  283. return 0;
  284. }
  285. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  286. {
  287. #ifdef CONFIG_HPET_MMAP
  288. struct hpet_dev *devp;
  289. unsigned long addr;
  290. if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
  291. return -EINVAL;
  292. devp = file->private_data;
  293. addr = devp->hd_hpets->hp_hpet_phys;
  294. if (addr & (PAGE_SIZE - 1))
  295. return -ENOSYS;
  296. vma->vm_flags |= VM_IO;
  297. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  298. if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
  299. PAGE_SIZE, vma->vm_page_prot)) {
  300. printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
  301. __func__);
  302. return -EAGAIN;
  303. }
  304. return 0;
  305. #else
  306. return -ENOSYS;
  307. #endif
  308. }
  309. static int hpet_fasync(int fd, struct file *file, int on)
  310. {
  311. struct hpet_dev *devp;
  312. devp = file->private_data;
  313. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  314. return 0;
  315. else
  316. return -EIO;
  317. }
  318. static int hpet_release(struct inode *inode, struct file *file)
  319. {
  320. struct hpet_dev *devp;
  321. struct hpet_timer __iomem *timer;
  322. int irq = 0;
  323. devp = file->private_data;
  324. timer = devp->hd_timer;
  325. spin_lock_irq(&hpet_lock);
  326. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  327. &timer->hpet_config);
  328. irq = devp->hd_irq;
  329. devp->hd_irq = 0;
  330. devp->hd_ireqfreq = 0;
  331. if (devp->hd_flags & HPET_PERIODIC
  332. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  333. unsigned long v;
  334. v = readq(&timer->hpet_config);
  335. v ^= Tn_TYPE_CNF_MASK;
  336. writeq(v, &timer->hpet_config);
  337. }
  338. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  339. spin_unlock_irq(&hpet_lock);
  340. if (irq)
  341. free_irq(irq, devp);
  342. file->private_data = NULL;
  343. return 0;
  344. }
  345. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  346. {
  347. struct hpet_timer __iomem *timer;
  348. struct hpet __iomem *hpet;
  349. struct hpets *hpetp;
  350. int irq;
  351. unsigned long g, v, t, m;
  352. unsigned long flags, isr;
  353. timer = devp->hd_timer;
  354. hpet = devp->hd_hpet;
  355. hpetp = devp->hd_hpets;
  356. if (!devp->hd_ireqfreq)
  357. return -EIO;
  358. spin_lock_irq(&hpet_lock);
  359. if (devp->hd_flags & HPET_IE) {
  360. spin_unlock_irq(&hpet_lock);
  361. return -EBUSY;
  362. }
  363. devp->hd_flags |= HPET_IE;
  364. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  365. devp->hd_flags |= HPET_SHARED_IRQ;
  366. spin_unlock_irq(&hpet_lock);
  367. irq = devp->hd_hdwirq;
  368. if (irq) {
  369. unsigned long irq_flags;
  370. if (devp->hd_flags & HPET_SHARED_IRQ) {
  371. /*
  372. * To prevent the interrupt handler from seeing an
  373. * unwanted interrupt status bit, program the timer
  374. * so that it will not fire in the near future ...
  375. */
  376. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  377. &timer->hpet_config);
  378. write_counter(read_counter(&hpet->hpet_mc),
  379. &timer->hpet_compare);
  380. /* ... and clear any left-over status. */
  381. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  382. writel(isr, &hpet->hpet_isr);
  383. }
  384. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  385. irq_flags = devp->hd_flags & HPET_SHARED_IRQ
  386. ? IRQF_SHARED : IRQF_DISABLED;
  387. if (request_irq(irq, hpet_interrupt, irq_flags,
  388. devp->hd_name, (void *)devp)) {
  389. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  390. irq = 0;
  391. }
  392. }
  393. if (irq == 0) {
  394. spin_lock_irq(&hpet_lock);
  395. devp->hd_flags ^= HPET_IE;
  396. spin_unlock_irq(&hpet_lock);
  397. return -EIO;
  398. }
  399. devp->hd_irq = irq;
  400. t = devp->hd_ireqfreq;
  401. v = readq(&timer->hpet_config);
  402. /* 64-bit comparators are not yet supported through the ioctls,
  403. * so force this into 32-bit mode if it supports both modes
  404. */
  405. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  406. if (devp->hd_flags & HPET_PERIODIC) {
  407. g |= Tn_TYPE_CNF_MASK;
  408. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  409. writeq(v, &timer->hpet_config);
  410. local_irq_save(flags);
  411. /*
  412. * NOTE: First we modify the hidden accumulator
  413. * register supported by periodic-capable comparators.
  414. * We never want to modify the (single) counter; that
  415. * would affect all the comparators. The value written
  416. * is the counter value when the first interrupt is due.
  417. */
  418. m = read_counter(&hpet->hpet_mc);
  419. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  420. /*
  421. * Then we modify the comparator, indicating the period
  422. * for subsequent interrupt.
  423. */
  424. write_counter(t, &timer->hpet_compare);
  425. } else {
  426. local_irq_save(flags);
  427. m = read_counter(&hpet->hpet_mc);
  428. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  429. }
  430. if (devp->hd_flags & HPET_SHARED_IRQ) {
  431. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  432. writel(isr, &hpet->hpet_isr);
  433. }
  434. writeq(g, &timer->hpet_config);
  435. local_irq_restore(flags);
  436. return 0;
  437. }
  438. /* converts Hz to number of timer ticks */
  439. static inline unsigned long hpet_time_div(struct hpets *hpets,
  440. unsigned long dis)
  441. {
  442. unsigned long long m;
  443. m = hpets->hp_tick_freq + (dis >> 1);
  444. do_div(m, dis);
  445. return (unsigned long)m;
  446. }
  447. static int
  448. hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
  449. struct hpet_info *info)
  450. {
  451. struct hpet_timer __iomem *timer;
  452. struct hpet __iomem *hpet;
  453. struct hpets *hpetp;
  454. int err;
  455. unsigned long v;
  456. switch (cmd) {
  457. case HPET_IE_OFF:
  458. case HPET_INFO:
  459. case HPET_EPI:
  460. case HPET_DPI:
  461. case HPET_IRQFREQ:
  462. timer = devp->hd_timer;
  463. hpet = devp->hd_hpet;
  464. hpetp = devp->hd_hpets;
  465. break;
  466. case HPET_IE_ON:
  467. return hpet_ioctl_ieon(devp);
  468. default:
  469. return -EINVAL;
  470. }
  471. err = 0;
  472. switch (cmd) {
  473. case HPET_IE_OFF:
  474. if ((devp->hd_flags & HPET_IE) == 0)
  475. break;
  476. v = readq(&timer->hpet_config);
  477. v &= ~Tn_INT_ENB_CNF_MASK;
  478. writeq(v, &timer->hpet_config);
  479. if (devp->hd_irq) {
  480. free_irq(devp->hd_irq, devp);
  481. devp->hd_irq = 0;
  482. }
  483. devp->hd_flags ^= HPET_IE;
  484. break;
  485. case HPET_INFO:
  486. {
  487. memset(info, 0, sizeof(*info));
  488. if (devp->hd_ireqfreq)
  489. info->hi_ireqfreq =
  490. hpet_time_div(hpetp, devp->hd_ireqfreq);
  491. info->hi_flags =
  492. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  493. info->hi_hpet = hpetp->hp_which;
  494. info->hi_timer = devp - hpetp->hp_dev;
  495. break;
  496. }
  497. case HPET_EPI:
  498. v = readq(&timer->hpet_config);
  499. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  500. err = -ENXIO;
  501. break;
  502. }
  503. devp->hd_flags |= HPET_PERIODIC;
  504. break;
  505. case HPET_DPI:
  506. v = readq(&timer->hpet_config);
  507. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  508. err = -ENXIO;
  509. break;
  510. }
  511. if (devp->hd_flags & HPET_PERIODIC &&
  512. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  513. v = readq(&timer->hpet_config);
  514. v ^= Tn_TYPE_CNF_MASK;
  515. writeq(v, &timer->hpet_config);
  516. }
  517. devp->hd_flags &= ~HPET_PERIODIC;
  518. break;
  519. case HPET_IRQFREQ:
  520. if ((arg > hpet_max_freq) &&
  521. !capable(CAP_SYS_RESOURCE)) {
  522. err = -EACCES;
  523. break;
  524. }
  525. if (!arg) {
  526. err = -EINVAL;
  527. break;
  528. }
  529. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  530. }
  531. return err;
  532. }
  533. static long
  534. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  535. {
  536. struct hpet_info info;
  537. int err;
  538. mutex_lock(&hpet_mutex);
  539. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  540. mutex_unlock(&hpet_mutex);
  541. if ((cmd == HPET_INFO) && !err &&
  542. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  543. err = -EFAULT;
  544. return err;
  545. }
  546. #ifdef CONFIG_COMPAT
  547. struct compat_hpet_info {
  548. compat_ulong_t hi_ireqfreq; /* Hz */
  549. compat_ulong_t hi_flags; /* information */
  550. unsigned short hi_hpet;
  551. unsigned short hi_timer;
  552. };
  553. static long
  554. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  555. {
  556. struct hpet_info info;
  557. int err;
  558. mutex_lock(&hpet_mutex);
  559. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  560. mutex_unlock(&hpet_mutex);
  561. if ((cmd == HPET_INFO) && !err) {
  562. struct compat_hpet_info __user *u = compat_ptr(arg);
  563. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  564. put_user(info.hi_flags, &u->hi_flags) ||
  565. put_user(info.hi_hpet, &u->hi_hpet) ||
  566. put_user(info.hi_timer, &u->hi_timer))
  567. err = -EFAULT;
  568. }
  569. return err;
  570. }
  571. #endif
  572. static const struct file_operations hpet_fops = {
  573. .owner = THIS_MODULE,
  574. .llseek = no_llseek,
  575. .read = hpet_read,
  576. .poll = hpet_poll,
  577. .unlocked_ioctl = hpet_ioctl,
  578. #ifdef CONFIG_COMPAT
  579. .compat_ioctl = hpet_compat_ioctl,
  580. #endif
  581. .open = hpet_open,
  582. .release = hpet_release,
  583. .fasync = hpet_fasync,
  584. .mmap = hpet_mmap,
  585. };
  586. static int hpet_is_known(struct hpet_data *hdp)
  587. {
  588. struct hpets *hpetp;
  589. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  590. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  591. return 1;
  592. return 0;
  593. }
  594. static ctl_table hpet_table[] = {
  595. {
  596. .procname = "max-user-freq",
  597. .data = &hpet_max_freq,
  598. .maxlen = sizeof(int),
  599. .mode = 0644,
  600. .proc_handler = proc_dointvec,
  601. },
  602. {}
  603. };
  604. static ctl_table hpet_root[] = {
  605. {
  606. .procname = "hpet",
  607. .maxlen = 0,
  608. .mode = 0555,
  609. .child = hpet_table,
  610. },
  611. {}
  612. };
  613. static ctl_table dev_root[] = {
  614. {
  615. .procname = "dev",
  616. .maxlen = 0,
  617. .mode = 0555,
  618. .child = hpet_root,
  619. },
  620. {}
  621. };
  622. static struct ctl_table_header *sysctl_header;
  623. /*
  624. * Adjustment for when arming the timer with
  625. * initial conditions. That is, main counter
  626. * ticks expired before interrupts are enabled.
  627. */
  628. #define TICK_CALIBRATE (1000UL)
  629. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  630. {
  631. struct hpet_timer __iomem *timer = NULL;
  632. unsigned long t, m, count, i, flags, start;
  633. struct hpet_dev *devp;
  634. int j;
  635. struct hpet __iomem *hpet;
  636. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  637. if ((devp->hd_flags & HPET_OPEN) == 0) {
  638. timer = devp->hd_timer;
  639. break;
  640. }
  641. if (!timer)
  642. return 0;
  643. hpet = hpetp->hp_hpet;
  644. t = read_counter(&timer->hpet_compare);
  645. i = 0;
  646. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  647. local_irq_save(flags);
  648. start = read_counter(&hpet->hpet_mc);
  649. do {
  650. m = read_counter(&hpet->hpet_mc);
  651. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  652. } while (i++, (m - start) < count);
  653. local_irq_restore(flags);
  654. return (m - start) / i;
  655. }
  656. static unsigned long hpet_calibrate(struct hpets *hpetp)
  657. {
  658. unsigned long ret = -1;
  659. unsigned long tmp;
  660. /*
  661. * Try to calibrate until return value becomes stable small value.
  662. * If SMI interruption occurs in calibration loop, the return value
  663. * will be big. This avoids its impact.
  664. */
  665. for ( ; ; ) {
  666. tmp = __hpet_calibrate(hpetp);
  667. if (ret <= tmp)
  668. break;
  669. ret = tmp;
  670. }
  671. return ret;
  672. }
  673. int hpet_alloc(struct hpet_data *hdp)
  674. {
  675. u64 cap, mcfg;
  676. struct hpet_dev *devp;
  677. u32 i, ntimer;
  678. struct hpets *hpetp;
  679. size_t siz;
  680. struct hpet __iomem *hpet;
  681. static struct hpets *last;
  682. unsigned long period;
  683. unsigned long long temp;
  684. u32 remainder;
  685. /*
  686. * hpet_alloc can be called by platform dependent code.
  687. * If platform dependent code has allocated the hpet that
  688. * ACPI has also reported, then we catch it here.
  689. */
  690. if (hpet_is_known(hdp)) {
  691. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  692. __func__);
  693. return 0;
  694. }
  695. siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
  696. sizeof(struct hpet_dev));
  697. hpetp = kzalloc(siz, GFP_KERNEL);
  698. if (!hpetp)
  699. return -ENOMEM;
  700. hpetp->hp_which = hpet_nhpet++;
  701. hpetp->hp_hpet = hdp->hd_address;
  702. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  703. hpetp->hp_ntimer = hdp->hd_nirqs;
  704. for (i = 0; i < hdp->hd_nirqs; i++)
  705. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  706. hpet = hpetp->hp_hpet;
  707. cap = readq(&hpet->hpet_cap);
  708. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  709. if (hpetp->hp_ntimer != ntimer) {
  710. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  711. " with number of timers\n");
  712. kfree(hpetp);
  713. return -ENODEV;
  714. }
  715. if (last)
  716. last->hp_next = hpetp;
  717. else
  718. hpets = hpetp;
  719. last = hpetp;
  720. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  721. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  722. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  723. temp += period >> 1; /* round */
  724. do_div(temp, period);
  725. hpetp->hp_tick_freq = temp; /* ticks per second */
  726. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  727. hpetp->hp_which, hdp->hd_phys_address,
  728. hpetp->hp_ntimer > 1 ? "s" : "");
  729. for (i = 0; i < hpetp->hp_ntimer; i++)
  730. printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  731. printk("\n");
  732. temp = hpetp->hp_tick_freq;
  733. remainder = do_div(temp, 1000000);
  734. printk(KERN_INFO
  735. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  736. hpetp->hp_which, hpetp->hp_ntimer,
  737. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  738. (unsigned) temp, remainder);
  739. mcfg = readq(&hpet->hpet_config);
  740. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  741. write_counter(0L, &hpet->hpet_mc);
  742. mcfg |= HPET_ENABLE_CNF_MASK;
  743. writeq(mcfg, &hpet->hpet_config);
  744. }
  745. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  746. struct hpet_timer __iomem *timer;
  747. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  748. devp->hd_hpets = hpetp;
  749. devp->hd_hpet = hpet;
  750. devp->hd_timer = timer;
  751. /*
  752. * If the timer was reserved by platform code,
  753. * then make timer unavailable for opens.
  754. */
  755. if (hdp->hd_state & (1 << i)) {
  756. devp->hd_flags = HPET_OPEN;
  757. continue;
  758. }
  759. init_waitqueue_head(&devp->hd_waitqueue);
  760. }
  761. hpetp->hp_delta = hpet_calibrate(hpetp);
  762. /* This clocksource driver currently only works on ia64 */
  763. #ifdef CONFIG_IA64
  764. if (!hpet_clocksource) {
  765. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  766. CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
  767. clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
  768. hpetp->hp_clocksource = &clocksource_hpet;
  769. hpet_clocksource = &clocksource_hpet;
  770. }
  771. #endif
  772. return 0;
  773. }
  774. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  775. {
  776. struct hpet_data *hdp;
  777. acpi_status status;
  778. struct acpi_resource_address64 addr;
  779. hdp = data;
  780. status = acpi_resource_to_address64(res, &addr);
  781. if (ACPI_SUCCESS(status)) {
  782. hdp->hd_phys_address = addr.minimum;
  783. hdp->hd_address = ioremap(addr.minimum, addr.address_length);
  784. if (hpet_is_known(hdp)) {
  785. iounmap(hdp->hd_address);
  786. return AE_ALREADY_EXISTS;
  787. }
  788. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  789. struct acpi_resource_fixed_memory32 *fixmem32;
  790. fixmem32 = &res->data.fixed_memory32;
  791. if (!fixmem32)
  792. return AE_NO_MEMORY;
  793. hdp->hd_phys_address = fixmem32->address;
  794. hdp->hd_address = ioremap(fixmem32->address,
  795. HPET_RANGE_SIZE);
  796. if (hpet_is_known(hdp)) {
  797. iounmap(hdp->hd_address);
  798. return AE_ALREADY_EXISTS;
  799. }
  800. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  801. struct acpi_resource_extended_irq *irqp;
  802. int i, irq;
  803. irqp = &res->data.extended_irq;
  804. for (i = 0; i < irqp->interrupt_count; i++) {
  805. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  806. irqp->triggering, irqp->polarity);
  807. if (irq < 0)
  808. return AE_ERROR;
  809. hdp->hd_irq[hdp->hd_nirqs] = irq;
  810. hdp->hd_nirqs++;
  811. }
  812. }
  813. return AE_OK;
  814. }
  815. static int hpet_acpi_add(struct acpi_device *device)
  816. {
  817. acpi_status result;
  818. struct hpet_data data;
  819. memset(&data, 0, sizeof(data));
  820. result =
  821. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  822. hpet_resources, &data);
  823. if (ACPI_FAILURE(result))
  824. return -ENODEV;
  825. if (!data.hd_address || !data.hd_nirqs) {
  826. if (data.hd_address)
  827. iounmap(data.hd_address);
  828. printk("%s: no address or irqs in _CRS\n", __func__);
  829. return -ENODEV;
  830. }
  831. return hpet_alloc(&data);
  832. }
  833. static int hpet_acpi_remove(struct acpi_device *device, int type)
  834. {
  835. /* XXX need to unregister clocksource, dealloc mem, etc */
  836. return -EINVAL;
  837. }
  838. static const struct acpi_device_id hpet_device_ids[] = {
  839. {"PNP0103", 0},
  840. {"", 0},
  841. };
  842. MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
  843. static struct acpi_driver hpet_acpi_driver = {
  844. .name = "hpet",
  845. .ids = hpet_device_ids,
  846. .ops = {
  847. .add = hpet_acpi_add,
  848. .remove = hpet_acpi_remove,
  849. },
  850. };
  851. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  852. static int __init hpet_init(void)
  853. {
  854. int result;
  855. result = misc_register(&hpet_misc);
  856. if (result < 0)
  857. return -ENODEV;
  858. sysctl_header = register_sysctl_table(dev_root);
  859. result = acpi_bus_register_driver(&hpet_acpi_driver);
  860. if (result < 0) {
  861. if (sysctl_header)
  862. unregister_sysctl_table(sysctl_header);
  863. misc_deregister(&hpet_misc);
  864. return result;
  865. }
  866. return 0;
  867. }
  868. static void __exit hpet_exit(void)
  869. {
  870. acpi_bus_unregister_driver(&hpet_acpi_driver);
  871. if (sysctl_header)
  872. unregister_sysctl_table(sysctl_header);
  873. misc_deregister(&hpet_misc);
  874. return;
  875. }
  876. module_init(hpet_init);
  877. module_exit(hpet_exit);
  878. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  879. MODULE_LICENSE("GPL");