icp-native.c 6.4 KB

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  1. /*
  2. * Copyright 2011 IBM Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. *
  9. */
  10. #include <linux/types.h>
  11. #include <linux/kernel.h>
  12. #include <linux/irq.h>
  13. #include <linux/smp.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/init.h>
  16. #include <linux/cpu.h>
  17. #include <linux/of.h>
  18. #include <linux/spinlock.h>
  19. #include <asm/prom.h>
  20. #include <asm/io.h>
  21. #include <asm/smp.h>
  22. #include <asm/irq.h>
  23. #include <asm/errno.h>
  24. #include <asm/xics.h>
  25. struct icp_ipl {
  26. union {
  27. u32 word;
  28. u8 bytes[4];
  29. } xirr_poll;
  30. union {
  31. u32 word;
  32. u8 bytes[4];
  33. } xirr;
  34. u32 dummy;
  35. union {
  36. u32 word;
  37. u8 bytes[4];
  38. } qirr;
  39. u32 link_a;
  40. u32 link_b;
  41. u32 link_c;
  42. };
  43. static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
  44. static inline unsigned int icp_native_get_xirr(void)
  45. {
  46. int cpu = smp_processor_id();
  47. return in_be32(&icp_native_regs[cpu]->xirr.word);
  48. }
  49. static inline void icp_native_set_xirr(unsigned int value)
  50. {
  51. int cpu = smp_processor_id();
  52. out_be32(&icp_native_regs[cpu]->xirr.word, value);
  53. }
  54. static inline void icp_native_set_cppr(u8 value)
  55. {
  56. int cpu = smp_processor_id();
  57. out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
  58. }
  59. static inline void icp_native_set_qirr(int n_cpu, u8 value)
  60. {
  61. out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
  62. }
  63. static void icp_native_set_cpu_priority(unsigned char cppr)
  64. {
  65. xics_set_base_cppr(cppr);
  66. icp_native_set_cppr(cppr);
  67. iosync();
  68. }
  69. static void icp_native_eoi(struct irq_data *d)
  70. {
  71. unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
  72. iosync();
  73. icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
  74. }
  75. static void icp_native_teardown_cpu(void)
  76. {
  77. int cpu = smp_processor_id();
  78. /* Clear any pending IPI */
  79. icp_native_set_qirr(cpu, 0xff);
  80. }
  81. static void icp_native_flush_ipi(void)
  82. {
  83. /* We take the ipi irq but and never return so we
  84. * need to EOI the IPI, but want to leave our priority 0
  85. *
  86. * should we check all the other interrupts too?
  87. * should we be flagging idle loop instead?
  88. * or creating some task to be scheduled?
  89. */
  90. icp_native_set_xirr((0x00 << 24) | XICS_IPI);
  91. }
  92. static unsigned int icp_native_get_irq(void)
  93. {
  94. unsigned int xirr = icp_native_get_xirr();
  95. unsigned int vec = xirr & 0x00ffffff;
  96. unsigned int irq;
  97. if (vec == XICS_IRQ_SPURIOUS)
  98. return NO_IRQ;
  99. irq = irq_radix_revmap_lookup(xics_host, vec);
  100. if (likely(irq != NO_IRQ)) {
  101. xics_push_cppr(vec);
  102. return irq;
  103. }
  104. /* We don't have a linux mapping, so have rtas mask it. */
  105. xics_mask_unknown_vec(vec);
  106. /* We might learn about it later, so EOI it */
  107. icp_native_set_xirr(xirr);
  108. return NO_IRQ;
  109. }
  110. #ifdef CONFIG_SMP
  111. static void icp_native_cause_ipi(int cpu, unsigned long data)
  112. {
  113. icp_native_set_qirr(cpu, IPI_PRIORITY);
  114. }
  115. static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
  116. {
  117. int cpu = smp_processor_id();
  118. icp_native_set_qirr(cpu, 0xff);
  119. return smp_ipi_demux();
  120. }
  121. #endif /* CONFIG_SMP */
  122. static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
  123. unsigned long size)
  124. {
  125. char *rname;
  126. int i, cpu = -1;
  127. /* This may look gross but it's good enough for now, we don't quite
  128. * have a hard -> linux processor id matching.
  129. */
  130. for_each_possible_cpu(i) {
  131. if (!cpu_present(i))
  132. continue;
  133. if (hw_id == get_hard_smp_processor_id(i)) {
  134. cpu = i;
  135. break;
  136. }
  137. }
  138. /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
  139. * with way more entries in there than you have CPUs
  140. */
  141. if (cpu == -1)
  142. return 0;
  143. rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
  144. cpu, hw_id);
  145. if (!request_mem_region(addr, size, rname)) {
  146. pr_warning("icp_native: Could not reserve ICP MMIO"
  147. " for CPU %d, interrupt server #0x%x\n",
  148. cpu, hw_id);
  149. return -EBUSY;
  150. }
  151. icp_native_regs[cpu] = ioremap(addr, size);
  152. if (!icp_native_regs[cpu]) {
  153. pr_warning("icp_native: Failed ioremap for CPU %d, "
  154. "interrupt server #0x%x, addr %#lx\n",
  155. cpu, hw_id, addr);
  156. release_mem_region(addr, size);
  157. return -ENOMEM;
  158. }
  159. return 0;
  160. }
  161. static int __init icp_native_init_one_node(struct device_node *np,
  162. unsigned int *indx)
  163. {
  164. unsigned int ilen;
  165. const u32 *ireg;
  166. int i;
  167. int reg_tuple_size;
  168. int num_servers = 0;
  169. /* This code does the theorically broken assumption that the interrupt
  170. * server numbers are the same as the hard CPU numbers.
  171. * This happens to be the case so far but we are playing with fire...
  172. * should be fixed one of these days. -BenH.
  173. */
  174. ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
  175. /* Do that ever happen ? we'll know soon enough... but even good'old
  176. * f80 does have that property ..
  177. */
  178. WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
  179. if (ireg) {
  180. *indx = of_read_number(ireg, 1);
  181. if (ilen >= 2*sizeof(u32))
  182. num_servers = of_read_number(ireg + 1, 1);
  183. }
  184. ireg = of_get_property(np, "reg", &ilen);
  185. if (!ireg) {
  186. pr_err("icp_native: Can't find interrupt reg property");
  187. return -1;
  188. }
  189. reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
  190. if (((ilen % reg_tuple_size) != 0)
  191. || (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
  192. pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
  193. ilen / reg_tuple_size, num_servers);
  194. return -1;
  195. }
  196. for (i = 0; i < (ilen / reg_tuple_size); i++) {
  197. struct resource r;
  198. int err;
  199. err = of_address_to_resource(np, i, &r);
  200. if (err) {
  201. pr_err("icp_native: Could not translate ICP MMIO"
  202. " for interrupt server 0x%x (%d)\n", *indx, err);
  203. return -1;
  204. }
  205. if (icp_native_map_one_cpu(*indx, r.start, r.end - r.start))
  206. return -1;
  207. (*indx)++;
  208. }
  209. return 0;
  210. }
  211. static const struct icp_ops icp_native_ops = {
  212. .get_irq = icp_native_get_irq,
  213. .eoi = icp_native_eoi,
  214. .set_priority = icp_native_set_cpu_priority,
  215. .teardown_cpu = icp_native_teardown_cpu,
  216. .flush_ipi = icp_native_flush_ipi,
  217. #ifdef CONFIG_SMP
  218. .ipi_action = icp_native_ipi_action,
  219. .cause_ipi = icp_native_cause_ipi,
  220. #endif
  221. };
  222. int icp_native_init(void)
  223. {
  224. struct device_node *np;
  225. u32 indx = 0;
  226. int found = 0;
  227. for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
  228. if (icp_native_init_one_node(np, &indx) == 0)
  229. found = 1;
  230. if (!found) {
  231. for_each_node_by_type(np,
  232. "PowerPC-External-Interrupt-Presentation") {
  233. if (icp_native_init_one_node(np, &indx) == 0)
  234. found = 1;
  235. }
  236. }
  237. if (found == 0)
  238. return -ENODEV;
  239. icp_ops = &icp_native_ops;
  240. return 0;
  241. }