qla_init.c 121 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  51. {
  52. int rval;
  53. struct qla_hw_data *ha = vha->hw;
  54. struct req_que *req = ha->req_q_map[0];
  55. /* Clear adapter flags. */
  56. vha->flags.online = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->mbx_flags = 0;
  65. ha->isp_abort_cnt = 0;
  66. ha->beacon_blink_led = 0;
  67. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  68. set_bit(0, ha->req_qid_map);
  69. set_bit(0, ha->rsp_qid_map);
  70. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  71. rval = ha->isp_ops->pci_config(vha);
  72. if (rval) {
  73. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  74. vha->host_no));
  75. return (rval);
  76. }
  77. ha->isp_ops->reset_chip(vha);
  78. rval = qla2xxx_get_flash_info(vha);
  79. if (rval) {
  80. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  81. vha->host_no));
  82. return (rval);
  83. }
  84. ha->isp_ops->get_flash_version(vha, req->ring);
  85. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  86. ha->isp_ops->nvram_config(vha);
  87. if (ha->flags.disable_serdes) {
  88. /* Mask HBA via NVRAM settings? */
  89. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  90. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  91. vha->port_name[0], vha->port_name[1],
  92. vha->port_name[2], vha->port_name[3],
  93. vha->port_name[4], vha->port_name[5],
  94. vha->port_name[6], vha->port_name[7]);
  95. return QLA_FUNCTION_FAILED;
  96. }
  97. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  98. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  99. rval = ha->isp_ops->chip_diag(vha);
  100. if (rval)
  101. return (rval);
  102. rval = qla2x00_setup_chip(vha);
  103. if (rval)
  104. return (rval);
  105. }
  106. if (IS_QLA84XX(ha)) {
  107. ha->cs84xx = qla84xx_get_chip(vha);
  108. if (!ha->cs84xx) {
  109. qla_printk(KERN_ERR, ha,
  110. "Unable to configure ISP84XX.\n");
  111. return QLA_FUNCTION_FAILED;
  112. }
  113. }
  114. rval = qla2x00_init_rings(vha);
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct qla_hw_data *ha = vha->hw;
  425. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  426. uint32_t cnt, d2;
  427. uint16_t wd;
  428. spin_lock_irqsave(&ha->hardware_lock, flags);
  429. /* Reset RISC. */
  430. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  431. for (cnt = 0; cnt < 30000; cnt++) {
  432. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  433. break;
  434. udelay(10);
  435. }
  436. WRT_REG_DWORD(&reg->ctrl_status,
  437. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  438. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  439. udelay(100);
  440. /* Wait for firmware to complete NVRAM accesses. */
  441. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  442. for (cnt = 10000 ; cnt && d2; cnt--) {
  443. udelay(5);
  444. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  445. barrier();
  446. }
  447. if (cnt == 0)
  448. hw_evt = 1;
  449. /* Wait for soft-reset to complete. */
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  452. udelay(5);
  453. d2 = RD_REG_DWORD(&reg->ctrl_status);
  454. barrier();
  455. }
  456. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  457. RD_REG_DWORD(&reg->hccr);
  458. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  459. RD_REG_DWORD(&reg->hccr);
  460. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  461. RD_REG_DWORD(&reg->hccr);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. for (cnt = 6000000 ; cnt && d2; cnt--) {
  464. udelay(5);
  465. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  466. barrier();
  467. }
  468. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  469. if (IS_NOPOLLING_TYPE(ha))
  470. ha->isp_ops->enable_intrs(ha);
  471. }
  472. /**
  473. * qla24xx_reset_chip() - Reset ISP24xx chip.
  474. * @ha: HA context
  475. *
  476. * Returns 0 on success.
  477. */
  478. void
  479. qla24xx_reset_chip(scsi_qla_host_t *vha)
  480. {
  481. struct qla_hw_data *ha = vha->hw;
  482. ha->isp_ops->disable_intrs(ha);
  483. /* Perform RISC reset. */
  484. qla24xx_reset_risc(vha);
  485. }
  486. /**
  487. * qla2x00_chip_diag() - Test chip for proper operation.
  488. * @ha: HA context
  489. *
  490. * Returns 0 on success.
  491. */
  492. int
  493. qla2x00_chip_diag(scsi_qla_host_t *vha)
  494. {
  495. int rval;
  496. struct qla_hw_data *ha = vha->hw;
  497. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  498. unsigned long flags = 0;
  499. uint16_t data;
  500. uint32_t cnt;
  501. uint16_t mb[5];
  502. struct req_que *req = ha->req_q_map[0];
  503. /* Assume a failed state */
  504. rval = QLA_FUNCTION_FAILED;
  505. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  506. vha->host_no, (u_long)&reg->flash_address));
  507. spin_lock_irqsave(&ha->hardware_lock, flags);
  508. /* Reset ISP chip. */
  509. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  510. /*
  511. * We need to have a delay here since the card will not respond while
  512. * in reset causing an MCA on some architectures.
  513. */
  514. udelay(20);
  515. data = qla2x00_debounce_register(&reg->ctrl_status);
  516. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  517. udelay(5);
  518. data = RD_REG_WORD(&reg->ctrl_status);
  519. barrier();
  520. }
  521. if (!cnt)
  522. goto chip_diag_failed;
  523. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  524. ha->host_no));
  525. /* Reset RISC processor. */
  526. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  527. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  528. /* Workaround for QLA2312 PCI parity error */
  529. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  530. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  531. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  532. udelay(5);
  533. data = RD_MAILBOX_REG(ha, reg, 0);
  534. barrier();
  535. }
  536. } else
  537. udelay(10);
  538. if (!cnt)
  539. goto chip_diag_failed;
  540. /* Check product ID of chip */
  541. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  542. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  543. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  544. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  545. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  546. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  547. mb[3] != PROD_ID_3) {
  548. qla_printk(KERN_WARNING, ha,
  549. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  550. goto chip_diag_failed;
  551. }
  552. ha->product_id[0] = mb[1];
  553. ha->product_id[1] = mb[2];
  554. ha->product_id[2] = mb[3];
  555. ha->product_id[3] = mb[4];
  556. /* Adjust fw RISC transfer size */
  557. if (req->length > 1024)
  558. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  559. else
  560. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  561. req->length;
  562. if (IS_QLA2200(ha) &&
  563. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  564. /* Limit firmware transfer size with a 2200A */
  565. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  566. vha->host_no));
  567. ha->device_type |= DT_ISP2200A;
  568. ha->fw_transfer_size = 128;
  569. }
  570. /* Wrap Incoming Mailboxes Test. */
  571. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  572. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  573. rval = qla2x00_mbx_reg_test(vha);
  574. if (rval) {
  575. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  576. vha->host_no));
  577. qla_printk(KERN_WARNING, ha,
  578. "Failed mailbox send register test\n");
  579. }
  580. else {
  581. /* Flag a successful rval */
  582. rval = QLA_SUCCESS;
  583. }
  584. spin_lock_irqsave(&ha->hardware_lock, flags);
  585. chip_diag_failed:
  586. if (rval)
  587. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  588. "****\n", vha->host_no));
  589. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  590. return (rval);
  591. }
  592. /**
  593. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  594. * @ha: HA context
  595. *
  596. * Returns 0 on success.
  597. */
  598. int
  599. qla24xx_chip_diag(scsi_qla_host_t *vha)
  600. {
  601. int rval;
  602. struct qla_hw_data *ha = vha->hw;
  603. struct req_que *req = ha->req_q_map[0];
  604. /* Perform RISC reset. */
  605. qla24xx_reset_risc(vha);
  606. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  607. rval = qla2x00_mbx_reg_test(vha);
  608. if (rval) {
  609. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  610. vha->host_no));
  611. qla_printk(KERN_WARNING, ha,
  612. "Failed mailbox send register test\n");
  613. } else {
  614. /* Flag a successful rval */
  615. rval = QLA_SUCCESS;
  616. }
  617. return rval;
  618. }
  619. void
  620. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  621. {
  622. int rval;
  623. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  624. eft_size, fce_size, mq_size;
  625. dma_addr_t tc_dma;
  626. void *tc;
  627. struct qla_hw_data *ha = vha->hw;
  628. struct req_que *req = ha->req_q_map[0];
  629. struct rsp_que *rsp = ha->rsp_q_map[0];
  630. if (ha->fw_dump) {
  631. qla_printk(KERN_WARNING, ha,
  632. "Firmware dump previously allocated.\n");
  633. return;
  634. }
  635. ha->fw_dumped = 0;
  636. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  637. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  638. fixed_size = sizeof(struct qla2100_fw_dump);
  639. } else if (IS_QLA23XX(ha)) {
  640. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  641. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  642. sizeof(uint16_t);
  643. } else if (IS_FWI2_CAPABLE(ha)) {
  644. if (IS_QLA81XX(ha))
  645. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  646. else if (IS_QLA25XX(ha))
  647. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  648. else
  649. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  650. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  651. sizeof(uint32_t);
  652. if (ha->mqenable)
  653. mq_size = sizeof(struct qla2xxx_mq_chain);
  654. /* Allocate memory for Fibre Channel Event Buffer. */
  655. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  656. goto try_eft;
  657. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  658. GFP_KERNEL);
  659. if (!tc) {
  660. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  661. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  662. goto try_eft;
  663. }
  664. memset(tc, 0, FCE_SIZE);
  665. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  666. ha->fce_mb, &ha->fce_bufs);
  667. if (rval) {
  668. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  669. "FCE (%d).\n", rval);
  670. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  671. tc_dma);
  672. ha->flags.fce_enabled = 0;
  673. goto try_eft;
  674. }
  675. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  676. FCE_SIZE / 1024);
  677. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  678. ha->flags.fce_enabled = 1;
  679. ha->fce_dma = tc_dma;
  680. ha->fce = tc;
  681. try_eft:
  682. /* Allocate memory for Extended Trace Buffer. */
  683. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  684. GFP_KERNEL);
  685. if (!tc) {
  686. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  687. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  688. goto cont_alloc;
  689. }
  690. memset(tc, 0, EFT_SIZE);
  691. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  692. if (rval) {
  693. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  694. "EFT (%d).\n", rval);
  695. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  696. tc_dma);
  697. goto cont_alloc;
  698. }
  699. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  700. EFT_SIZE / 1024);
  701. eft_size = EFT_SIZE;
  702. ha->eft_dma = tc_dma;
  703. ha->eft = tc;
  704. }
  705. cont_alloc:
  706. req_q_size = req->length * sizeof(request_t);
  707. rsp_q_size = rsp->length * sizeof(response_t);
  708. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  709. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  710. eft_size;
  711. ha->chain_offset = dump_size;
  712. dump_size += mq_size + fce_size;
  713. ha->fw_dump = vmalloc(dump_size);
  714. if (!ha->fw_dump) {
  715. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  716. "firmware dump!!!\n", dump_size / 1024);
  717. if (ha->eft) {
  718. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  719. ha->eft_dma);
  720. ha->eft = NULL;
  721. ha->eft_dma = 0;
  722. }
  723. return;
  724. }
  725. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  726. dump_size / 1024);
  727. ha->fw_dump_len = dump_size;
  728. ha->fw_dump->signature[0] = 'Q';
  729. ha->fw_dump->signature[1] = 'L';
  730. ha->fw_dump->signature[2] = 'G';
  731. ha->fw_dump->signature[3] = 'C';
  732. ha->fw_dump->version = __constant_htonl(1);
  733. ha->fw_dump->fixed_size = htonl(fixed_size);
  734. ha->fw_dump->mem_size = htonl(mem_size);
  735. ha->fw_dump->req_q_size = htonl(req_q_size);
  736. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  737. ha->fw_dump->eft_size = htonl(eft_size);
  738. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  739. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  740. ha->fw_dump->header_size =
  741. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  742. }
  743. /**
  744. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  745. * @ha: HA context
  746. *
  747. * Returns 0 on success.
  748. */
  749. static void
  750. qla2x00_resize_request_q(scsi_qla_host_t *vha)
  751. {
  752. int rval;
  753. uint16_t fw_iocb_cnt = 0;
  754. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  755. dma_addr_t request_dma;
  756. request_t *request_ring;
  757. struct qla_hw_data *ha = vha->hw;
  758. struct req_que *req = ha->req_q_map[0];
  759. /* Valid only on recent ISPs. */
  760. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  761. return;
  762. /* Retrieve IOCB counts available to the firmware. */
  763. rval = qla2x00_get_resource_cnts(vha, NULL, NULL, NULL, &fw_iocb_cnt,
  764. &ha->max_npiv_vports);
  765. if (rval)
  766. return;
  767. /* No point in continuing if current settings are sufficient. */
  768. if (fw_iocb_cnt < 1024)
  769. return;
  770. if (req->length >= request_q_length)
  771. return;
  772. /* Attempt to claim larger area for request queue. */
  773. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  774. (request_q_length + 1) * sizeof(request_t), &request_dma,
  775. GFP_KERNEL);
  776. if (request_ring == NULL)
  777. return;
  778. /* Resize successful, report extensions. */
  779. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  780. (ha->fw_memory_size + 1) / 1024);
  781. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  782. "(%d -> %d)...\n", req->length, request_q_length);
  783. /* Clear old allocations. */
  784. dma_free_coherent(&ha->pdev->dev,
  785. (req->length + 1) * sizeof(request_t), req->ring,
  786. req->dma);
  787. /* Begin using larger queue. */
  788. req->length = request_q_length;
  789. req->ring = request_ring;
  790. req->dma = request_dma;
  791. }
  792. /**
  793. * qla2x00_setup_chip() - Load and start RISC firmware.
  794. * @ha: HA context
  795. *
  796. * Returns 0 on success.
  797. */
  798. static int
  799. qla2x00_setup_chip(scsi_qla_host_t *vha)
  800. {
  801. int rval;
  802. uint32_t srisc_address = 0;
  803. struct qla_hw_data *ha = vha->hw;
  804. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  805. unsigned long flags;
  806. uint16_t fw_major_version;
  807. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  808. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  809. spin_lock_irqsave(&ha->hardware_lock, flags);
  810. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  811. RD_REG_WORD(&reg->hccr);
  812. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  813. }
  814. /* Load firmware sequences */
  815. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  816. if (rval == QLA_SUCCESS) {
  817. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  818. "code.\n", vha->host_no));
  819. rval = qla2x00_verify_checksum(vha, srisc_address);
  820. if (rval == QLA_SUCCESS) {
  821. /* Start firmware execution. */
  822. DEBUG(printk("scsi(%ld): Checksum OK, start "
  823. "firmware.\n", vha->host_no));
  824. rval = qla2x00_execute_fw(vha, srisc_address);
  825. /* Retrieve firmware information. */
  826. if (rval == QLA_SUCCESS) {
  827. fw_major_version = ha->fw_major_version;
  828. qla2x00_get_fw_version(vha,
  829. &ha->fw_major_version,
  830. &ha->fw_minor_version,
  831. &ha->fw_subminor_version,
  832. &ha->fw_attributes, &ha->fw_memory_size,
  833. ha->mpi_version, &ha->mpi_capabilities,
  834. ha->phy_version);
  835. ha->flags.npiv_supported = 0;
  836. if (IS_QLA2XXX_MIDTYPE(ha) &&
  837. (ha->fw_attributes & BIT_2)) {
  838. ha->flags.npiv_supported = 1;
  839. if ((!ha->max_npiv_vports) ||
  840. ((ha->max_npiv_vports + 1) %
  841. MIN_MULTI_ID_FABRIC))
  842. ha->max_npiv_vports =
  843. MIN_MULTI_ID_FABRIC - 1;
  844. }
  845. if (!fw_major_version) {
  846. qla2x00_resize_request_q(vha);
  847. if (ql2xallocfwdump)
  848. qla2x00_alloc_fw_dump(vha);
  849. }
  850. }
  851. } else {
  852. DEBUG2(printk(KERN_INFO
  853. "scsi(%ld): ISP Firmware failed checksum.\n",
  854. vha->host_no));
  855. }
  856. }
  857. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  858. /* Enable proper parity. */
  859. spin_lock_irqsave(&ha->hardware_lock, flags);
  860. if (IS_QLA2300(ha))
  861. /* SRAM parity */
  862. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  863. else
  864. /* SRAM, Instruction RAM and GP RAM parity */
  865. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  866. RD_REG_WORD(&reg->hccr);
  867. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  868. }
  869. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  870. uint32_t size;
  871. rval = qla81xx_fac_get_sector_size(vha, &size);
  872. if (rval == QLA_SUCCESS) {
  873. ha->flags.fac_supported = 1;
  874. ha->fdt_block_size = size << 2;
  875. } else {
  876. qla_printk(KERN_ERR, ha,
  877. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  878. ha->fw_major_version, ha->fw_minor_version,
  879. ha->fw_subminor_version);
  880. }
  881. }
  882. if (rval) {
  883. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  884. vha->host_no));
  885. }
  886. return (rval);
  887. }
  888. /**
  889. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  890. * @ha: HA context
  891. *
  892. * Beginning of request ring has initialization control block already built
  893. * by nvram config routine.
  894. *
  895. * Returns 0 on success.
  896. */
  897. void
  898. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  899. {
  900. uint16_t cnt;
  901. response_t *pkt;
  902. pkt = rsp->ring_ptr;
  903. for (cnt = 0; cnt < rsp->length; cnt++) {
  904. pkt->signature = RESPONSE_PROCESSED;
  905. pkt++;
  906. }
  907. }
  908. /**
  909. * qla2x00_update_fw_options() - Read and process firmware options.
  910. * @ha: HA context
  911. *
  912. * Returns 0 on success.
  913. */
  914. void
  915. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  916. {
  917. uint16_t swing, emphasis, tx_sens, rx_sens;
  918. struct qla_hw_data *ha = vha->hw;
  919. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  920. qla2x00_get_fw_options(vha, ha->fw_options);
  921. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  922. return;
  923. /* Serial Link options. */
  924. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  925. vha->host_no));
  926. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  927. sizeof(ha->fw_seriallink_options)));
  928. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  929. if (ha->fw_seriallink_options[3] & BIT_2) {
  930. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  931. /* 1G settings */
  932. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  933. emphasis = (ha->fw_seriallink_options[2] &
  934. (BIT_4 | BIT_3)) >> 3;
  935. tx_sens = ha->fw_seriallink_options[0] &
  936. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  937. rx_sens = (ha->fw_seriallink_options[0] &
  938. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  939. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  940. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  941. if (rx_sens == 0x0)
  942. rx_sens = 0x3;
  943. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  944. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  945. ha->fw_options[10] |= BIT_5 |
  946. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  947. (tx_sens & (BIT_1 | BIT_0));
  948. /* 2G settings */
  949. swing = (ha->fw_seriallink_options[2] &
  950. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  951. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  952. tx_sens = ha->fw_seriallink_options[1] &
  953. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  954. rx_sens = (ha->fw_seriallink_options[1] &
  955. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  956. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  957. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  958. if (rx_sens == 0x0)
  959. rx_sens = 0x3;
  960. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  961. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  962. ha->fw_options[11] |= BIT_5 |
  963. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  964. (tx_sens & (BIT_1 | BIT_0));
  965. }
  966. /* FCP2 options. */
  967. /* Return command IOCBs without waiting for an ABTS to complete. */
  968. ha->fw_options[3] |= BIT_13;
  969. /* LED scheme. */
  970. if (ha->flags.enable_led_scheme)
  971. ha->fw_options[2] |= BIT_12;
  972. /* Detect ISP6312. */
  973. if (IS_QLA6312(ha))
  974. ha->fw_options[2] |= BIT_13;
  975. /* Update firmware options. */
  976. qla2x00_set_fw_options(vha, ha->fw_options);
  977. }
  978. void
  979. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  980. {
  981. int rval;
  982. struct qla_hw_data *ha = vha->hw;
  983. /* Update Serial Link options. */
  984. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  985. return;
  986. rval = qla2x00_set_serdes_params(vha,
  987. le16_to_cpu(ha->fw_seriallink_options24[1]),
  988. le16_to_cpu(ha->fw_seriallink_options24[2]),
  989. le16_to_cpu(ha->fw_seriallink_options24[3]));
  990. if (rval != QLA_SUCCESS) {
  991. qla_printk(KERN_WARNING, ha,
  992. "Unable to update Serial Link options (%x).\n", rval);
  993. }
  994. }
  995. void
  996. qla2x00_config_rings(struct scsi_qla_host *vha)
  997. {
  998. struct qla_hw_data *ha = vha->hw;
  999. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1000. struct req_que *req = ha->req_q_map[0];
  1001. struct rsp_que *rsp = ha->rsp_q_map[0];
  1002. /* Setup ring parameters in initialization control block. */
  1003. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1004. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1005. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1006. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1007. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1008. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1009. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1010. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1011. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1012. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1013. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1014. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1015. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1016. }
  1017. void
  1018. qla24xx_config_rings(struct scsi_qla_host *vha)
  1019. {
  1020. struct qla_hw_data *ha = vha->hw;
  1021. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1022. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1023. struct qla_msix_entry *msix;
  1024. struct init_cb_24xx *icb;
  1025. uint16_t rid = 0;
  1026. struct req_que *req = ha->req_q_map[0];
  1027. struct rsp_que *rsp = ha->rsp_q_map[0];
  1028. /* Setup ring parameters in initialization control block. */
  1029. icb = (struct init_cb_24xx *)ha->init_cb;
  1030. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1031. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1032. icb->request_q_length = cpu_to_le16(req->length);
  1033. icb->response_q_length = cpu_to_le16(rsp->length);
  1034. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1035. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1036. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1037. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1038. if (ha->mqenable) {
  1039. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1040. icb->rid = __constant_cpu_to_le16(rid);
  1041. if (ha->flags.msix_enabled) {
  1042. msix = &ha->msix_entries[1];
  1043. DEBUG2_17(printk(KERN_INFO
  1044. "Reistering vector 0x%x for base que\n", msix->entry));
  1045. icb->msix = cpu_to_le16(msix->entry);
  1046. }
  1047. /* Use alternate PCI bus number */
  1048. if (MSB(rid))
  1049. icb->firmware_options_2 |=
  1050. __constant_cpu_to_le32(BIT_19);
  1051. /* Use alternate PCI devfn */
  1052. if (LSB(rid))
  1053. icb->firmware_options_2 |=
  1054. __constant_cpu_to_le32(BIT_18);
  1055. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1056. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1057. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1058. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1059. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1060. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1061. } else {
  1062. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1063. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1064. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1065. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1066. }
  1067. /* PCI posting */
  1068. RD_REG_DWORD(&ioreg->hccr);
  1069. }
  1070. /**
  1071. * qla2x00_init_rings() - Initializes firmware.
  1072. * @ha: HA context
  1073. *
  1074. * Beginning of request ring has initialization control block already built
  1075. * by nvram config routine.
  1076. *
  1077. * Returns 0 on success.
  1078. */
  1079. static int
  1080. qla2x00_init_rings(scsi_qla_host_t *vha)
  1081. {
  1082. int rval;
  1083. unsigned long flags = 0;
  1084. int cnt, que;
  1085. struct qla_hw_data *ha = vha->hw;
  1086. struct req_que *req;
  1087. struct rsp_que *rsp;
  1088. struct scsi_qla_host *vp;
  1089. struct mid_init_cb_24xx *mid_init_cb =
  1090. (struct mid_init_cb_24xx *) ha->init_cb;
  1091. spin_lock_irqsave(&ha->hardware_lock, flags);
  1092. /* Clear outstanding commands array. */
  1093. for (que = 0; que < ha->max_queues; que++) {
  1094. req = ha->req_q_map[que];
  1095. if (!req)
  1096. continue;
  1097. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1098. req->outstanding_cmds[cnt] = NULL;
  1099. req->current_outstanding_cmd = 0;
  1100. /* Initialize firmware. */
  1101. req->ring_ptr = req->ring;
  1102. req->ring_index = 0;
  1103. req->cnt = req->length;
  1104. }
  1105. for (que = 0; que < ha->max_queues; que++) {
  1106. rsp = ha->rsp_q_map[que];
  1107. if (!rsp)
  1108. continue;
  1109. rsp->ring_ptr = rsp->ring;
  1110. rsp->ring_index = 0;
  1111. /* Initialize response queue entries */
  1112. qla2x00_init_response_q_entries(rsp);
  1113. }
  1114. /* Clear RSCN queue. */
  1115. list_for_each_entry(vp, &ha->vp_list, list) {
  1116. vp->rscn_in_ptr = 0;
  1117. vp->rscn_out_ptr = 0;
  1118. }
  1119. ha->isp_ops->config_rings(vha);
  1120. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1121. /* Update any ISP specific firmware options before initialization. */
  1122. ha->isp_ops->update_fw_options(vha);
  1123. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1124. if (ha->flags.npiv_supported) {
  1125. if (ha->operating_mode == LOOP)
  1126. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1127. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1128. }
  1129. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1130. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1131. if (rval) {
  1132. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1133. vha->host_no));
  1134. } else {
  1135. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1136. vha->host_no));
  1137. }
  1138. return (rval);
  1139. }
  1140. /**
  1141. * qla2x00_fw_ready() - Waits for firmware ready.
  1142. * @ha: HA context
  1143. *
  1144. * Returns 0 on success.
  1145. */
  1146. static int
  1147. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1148. {
  1149. int rval;
  1150. unsigned long wtime, mtime, cs84xx_time;
  1151. uint16_t min_wait; /* Minimum wait time if loop is down */
  1152. uint16_t wait_time; /* Wait time if loop is coming ready */
  1153. uint16_t state[3];
  1154. struct qla_hw_data *ha = vha->hw;
  1155. rval = QLA_SUCCESS;
  1156. /* 20 seconds for loop down. */
  1157. min_wait = 20;
  1158. /*
  1159. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1160. * our own processing.
  1161. */
  1162. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1163. wait_time = min_wait;
  1164. }
  1165. /* Min wait time if loop down */
  1166. mtime = jiffies + (min_wait * HZ);
  1167. /* wait time before firmware ready */
  1168. wtime = jiffies + (wait_time * HZ);
  1169. /* Wait for ISP to finish LIP */
  1170. if (!vha->flags.init_done)
  1171. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1172. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1173. vha->host_no));
  1174. do {
  1175. rval = qla2x00_get_firmware_state(vha, state);
  1176. if (rval == QLA_SUCCESS) {
  1177. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1178. vha->device_flags &= ~DFLG_NO_CABLE;
  1179. }
  1180. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1181. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1182. "84xx=%x.\n", vha->host_no, state[0],
  1183. state[2]));
  1184. if ((state[2] & FSTATE_LOGGED_IN) &&
  1185. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1186. DEBUG16(printk("scsi(%ld): Sending "
  1187. "verify iocb.\n", vha->host_no));
  1188. cs84xx_time = jiffies;
  1189. rval = qla84xx_init_chip(vha);
  1190. if (rval != QLA_SUCCESS)
  1191. break;
  1192. /* Add time taken to initialize. */
  1193. cs84xx_time = jiffies - cs84xx_time;
  1194. wtime += cs84xx_time;
  1195. mtime += cs84xx_time;
  1196. DEBUG16(printk("scsi(%ld): Increasing "
  1197. "wait time by %ld. New time %ld\n",
  1198. vha->host_no, cs84xx_time, wtime));
  1199. }
  1200. } else if (state[0] == FSTATE_READY) {
  1201. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1202. vha->host_no));
  1203. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1204. &ha->login_timeout, &ha->r_a_tov);
  1205. rval = QLA_SUCCESS;
  1206. break;
  1207. }
  1208. rval = QLA_FUNCTION_FAILED;
  1209. if (atomic_read(&vha->loop_down_timer) &&
  1210. state[0] != FSTATE_READY) {
  1211. /* Loop down. Timeout on min_wait for states
  1212. * other than Wait for Login.
  1213. */
  1214. if (time_after_eq(jiffies, mtime)) {
  1215. qla_printk(KERN_INFO, ha,
  1216. "Cable is unplugged...\n");
  1217. vha->device_flags |= DFLG_NO_CABLE;
  1218. break;
  1219. }
  1220. }
  1221. } else {
  1222. /* Mailbox cmd failed. Timeout on min_wait. */
  1223. if (time_after_eq(jiffies, mtime))
  1224. break;
  1225. }
  1226. if (time_after_eq(jiffies, wtime))
  1227. break;
  1228. /* Delay for a while */
  1229. msleep(500);
  1230. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1231. vha->host_no, state[0], jiffies));
  1232. } while (1);
  1233. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1234. vha->host_no, state[0], jiffies));
  1235. if (rval) {
  1236. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1237. vha->host_no));
  1238. }
  1239. return (rval);
  1240. }
  1241. /*
  1242. * qla2x00_configure_hba
  1243. * Setup adapter context.
  1244. *
  1245. * Input:
  1246. * ha = adapter state pointer.
  1247. *
  1248. * Returns:
  1249. * 0 = success
  1250. *
  1251. * Context:
  1252. * Kernel context.
  1253. */
  1254. static int
  1255. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1256. {
  1257. int rval;
  1258. uint16_t loop_id;
  1259. uint16_t topo;
  1260. uint16_t sw_cap;
  1261. uint8_t al_pa;
  1262. uint8_t area;
  1263. uint8_t domain;
  1264. char connect_type[22];
  1265. struct qla_hw_data *ha = vha->hw;
  1266. /* Get host addresses. */
  1267. rval = qla2x00_get_adapter_id(vha,
  1268. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1269. if (rval != QLA_SUCCESS) {
  1270. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1271. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1272. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1273. __func__, vha->host_no));
  1274. } else {
  1275. qla_printk(KERN_WARNING, ha,
  1276. "ERROR -- Unable to get host loop ID.\n");
  1277. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1278. }
  1279. return (rval);
  1280. }
  1281. if (topo == 4) {
  1282. qla_printk(KERN_INFO, ha,
  1283. "Cannot get topology - retrying.\n");
  1284. return (QLA_FUNCTION_FAILED);
  1285. }
  1286. vha->loop_id = loop_id;
  1287. /* initialize */
  1288. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1289. ha->operating_mode = LOOP;
  1290. ha->switch_cap = 0;
  1291. switch (topo) {
  1292. case 0:
  1293. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1294. vha->host_no));
  1295. ha->current_topology = ISP_CFG_NL;
  1296. strcpy(connect_type, "(Loop)");
  1297. break;
  1298. case 1:
  1299. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1300. vha->host_no));
  1301. ha->switch_cap = sw_cap;
  1302. ha->current_topology = ISP_CFG_FL;
  1303. strcpy(connect_type, "(FL_Port)");
  1304. break;
  1305. case 2:
  1306. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1307. vha->host_no));
  1308. ha->operating_mode = P2P;
  1309. ha->current_topology = ISP_CFG_N;
  1310. strcpy(connect_type, "(N_Port-to-N_Port)");
  1311. break;
  1312. case 3:
  1313. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1314. vha->host_no));
  1315. ha->switch_cap = sw_cap;
  1316. ha->operating_mode = P2P;
  1317. ha->current_topology = ISP_CFG_F;
  1318. strcpy(connect_type, "(F_Port)");
  1319. break;
  1320. default:
  1321. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1322. "Using NL.\n",
  1323. vha->host_no, topo));
  1324. ha->current_topology = ISP_CFG_NL;
  1325. strcpy(connect_type, "(Loop)");
  1326. break;
  1327. }
  1328. /* Save Host port and loop ID. */
  1329. /* byte order - Big Endian */
  1330. vha->d_id.b.domain = domain;
  1331. vha->d_id.b.area = area;
  1332. vha->d_id.b.al_pa = al_pa;
  1333. if (!vha->flags.init_done)
  1334. qla_printk(KERN_INFO, ha,
  1335. "Topology - %s, Host Loop address 0x%x\n",
  1336. connect_type, vha->loop_id);
  1337. if (rval) {
  1338. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1339. } else {
  1340. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1341. }
  1342. return(rval);
  1343. }
  1344. static inline void
  1345. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1346. char *def)
  1347. {
  1348. char *st, *en;
  1349. uint16_t index;
  1350. struct qla_hw_data *ha = vha->hw;
  1351. if (memcmp(model, BINZERO, len) != 0) {
  1352. strncpy(ha->model_number, model, len);
  1353. st = en = ha->model_number;
  1354. en += len - 1;
  1355. while (en > st) {
  1356. if (*en != 0x20 && *en != 0x00)
  1357. break;
  1358. *en-- = '\0';
  1359. }
  1360. index = (ha->pdev->subsystem_device & 0xff);
  1361. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1362. index < QLA_MODEL_NAMES)
  1363. strncpy(ha->model_desc,
  1364. qla2x00_model_name[index * 2 + 1],
  1365. sizeof(ha->model_desc) - 1);
  1366. } else {
  1367. index = (ha->pdev->subsystem_device & 0xff);
  1368. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1369. index < QLA_MODEL_NAMES) {
  1370. strcpy(ha->model_number,
  1371. qla2x00_model_name[index * 2]);
  1372. strncpy(ha->model_desc,
  1373. qla2x00_model_name[index * 2 + 1],
  1374. sizeof(ha->model_desc) - 1);
  1375. } else {
  1376. strcpy(ha->model_number, def);
  1377. }
  1378. }
  1379. if (IS_FWI2_CAPABLE(ha))
  1380. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1381. sizeof(ha->model_desc));
  1382. }
  1383. /* On sparc systems, obtain port and node WWN from firmware
  1384. * properties.
  1385. */
  1386. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1387. {
  1388. #ifdef CONFIG_SPARC
  1389. struct qla_hw_data *ha = vha->hw;
  1390. struct pci_dev *pdev = ha->pdev;
  1391. struct device_node *dp = pci_device_to_OF_node(pdev);
  1392. const u8 *val;
  1393. int len;
  1394. val = of_get_property(dp, "port-wwn", &len);
  1395. if (val && len >= WWN_SIZE)
  1396. memcpy(nv->port_name, val, WWN_SIZE);
  1397. val = of_get_property(dp, "node-wwn", &len);
  1398. if (val && len >= WWN_SIZE)
  1399. memcpy(nv->node_name, val, WWN_SIZE);
  1400. #endif
  1401. }
  1402. /*
  1403. * NVRAM configuration for ISP 2xxx
  1404. *
  1405. * Input:
  1406. * ha = adapter block pointer.
  1407. *
  1408. * Output:
  1409. * initialization control block in response_ring
  1410. * host adapters parameters in host adapter block
  1411. *
  1412. * Returns:
  1413. * 0 = success.
  1414. */
  1415. int
  1416. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1417. {
  1418. int rval;
  1419. uint8_t chksum = 0;
  1420. uint16_t cnt;
  1421. uint8_t *dptr1, *dptr2;
  1422. struct qla_hw_data *ha = vha->hw;
  1423. init_cb_t *icb = ha->init_cb;
  1424. nvram_t *nv = ha->nvram;
  1425. uint8_t *ptr = ha->nvram;
  1426. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1427. rval = QLA_SUCCESS;
  1428. /* Determine NVRAM starting address. */
  1429. ha->nvram_size = sizeof(nvram_t);
  1430. ha->nvram_base = 0;
  1431. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1432. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1433. ha->nvram_base = 0x80;
  1434. /* Get NVRAM data and calculate checksum. */
  1435. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1436. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1437. chksum += *ptr++;
  1438. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1439. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1440. /* Bad NVRAM data, set defaults parameters. */
  1441. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1442. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1443. /* Reset NVRAM data. */
  1444. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1445. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1446. nv->nvram_version);
  1447. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1448. "invalid -- WWPN) defaults.\n");
  1449. /*
  1450. * Set default initialization control block.
  1451. */
  1452. memset(nv, 0, ha->nvram_size);
  1453. nv->parameter_block_version = ICB_VERSION;
  1454. if (IS_QLA23XX(ha)) {
  1455. nv->firmware_options[0] = BIT_2 | BIT_1;
  1456. nv->firmware_options[1] = BIT_7 | BIT_5;
  1457. nv->add_firmware_options[0] = BIT_5;
  1458. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1459. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1460. nv->special_options[1] = BIT_7;
  1461. } else if (IS_QLA2200(ha)) {
  1462. nv->firmware_options[0] = BIT_2 | BIT_1;
  1463. nv->firmware_options[1] = BIT_7 | BIT_5;
  1464. nv->add_firmware_options[0] = BIT_5;
  1465. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1466. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1467. } else if (IS_QLA2100(ha)) {
  1468. nv->firmware_options[0] = BIT_3 | BIT_1;
  1469. nv->firmware_options[1] = BIT_5;
  1470. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1471. }
  1472. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1473. nv->execution_throttle = __constant_cpu_to_le16(16);
  1474. nv->retry_count = 8;
  1475. nv->retry_delay = 1;
  1476. nv->port_name[0] = 33;
  1477. nv->port_name[3] = 224;
  1478. nv->port_name[4] = 139;
  1479. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1480. nv->login_timeout = 4;
  1481. /*
  1482. * Set default host adapter parameters
  1483. */
  1484. nv->host_p[1] = BIT_2;
  1485. nv->reset_delay = 5;
  1486. nv->port_down_retry_count = 8;
  1487. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1488. nv->link_down_timeout = 60;
  1489. rval = 1;
  1490. }
  1491. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1492. /*
  1493. * The SN2 does not provide BIOS emulation which means you can't change
  1494. * potentially bogus BIOS settings. Force the use of default settings
  1495. * for link rate and frame size. Hope that the rest of the settings
  1496. * are valid.
  1497. */
  1498. if (ia64_platform_is("sn2")) {
  1499. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1500. if (IS_QLA23XX(ha))
  1501. nv->special_options[1] = BIT_7;
  1502. }
  1503. #endif
  1504. /* Reset Initialization control block */
  1505. memset(icb, 0, ha->init_cb_size);
  1506. /*
  1507. * Setup driver NVRAM options.
  1508. */
  1509. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1510. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1511. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1512. nv->firmware_options[1] &= ~BIT_4;
  1513. if (IS_QLA23XX(ha)) {
  1514. nv->firmware_options[0] |= BIT_2;
  1515. nv->firmware_options[0] &= ~BIT_3;
  1516. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1517. if (IS_QLA2300(ha)) {
  1518. if (ha->fb_rev == FPM_2310) {
  1519. strcpy(ha->model_number, "QLA2310");
  1520. } else {
  1521. strcpy(ha->model_number, "QLA2300");
  1522. }
  1523. } else {
  1524. qla2x00_set_model_info(vha, nv->model_number,
  1525. sizeof(nv->model_number), "QLA23xx");
  1526. }
  1527. } else if (IS_QLA2200(ha)) {
  1528. nv->firmware_options[0] |= BIT_2;
  1529. /*
  1530. * 'Point-to-point preferred, else loop' is not a safe
  1531. * connection mode setting.
  1532. */
  1533. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1534. (BIT_5 | BIT_4)) {
  1535. /* Force 'loop preferred, else point-to-point'. */
  1536. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1537. nv->add_firmware_options[0] |= BIT_5;
  1538. }
  1539. strcpy(ha->model_number, "QLA22xx");
  1540. } else /*if (IS_QLA2100(ha))*/ {
  1541. strcpy(ha->model_number, "QLA2100");
  1542. }
  1543. /*
  1544. * Copy over NVRAM RISC parameter block to initialization control block.
  1545. */
  1546. dptr1 = (uint8_t *)icb;
  1547. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1548. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1549. while (cnt--)
  1550. *dptr1++ = *dptr2++;
  1551. /* Copy 2nd half. */
  1552. dptr1 = (uint8_t *)icb->add_firmware_options;
  1553. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1554. while (cnt--)
  1555. *dptr1++ = *dptr2++;
  1556. /* Use alternate WWN? */
  1557. if (nv->host_p[1] & BIT_7) {
  1558. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1559. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1560. }
  1561. /* Prepare nodename */
  1562. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1563. /*
  1564. * Firmware will apply the following mask if the nodename was
  1565. * not provided.
  1566. */
  1567. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1568. icb->node_name[0] &= 0xF0;
  1569. }
  1570. /*
  1571. * Set host adapter parameters.
  1572. */
  1573. if (nv->host_p[0] & BIT_7)
  1574. ql2xextended_error_logging = 1;
  1575. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1576. /* Always load RISC code on non ISP2[12]00 chips. */
  1577. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1578. ha->flags.disable_risc_code_load = 0;
  1579. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1580. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1581. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1582. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1583. ha->flags.disable_serdes = 0;
  1584. ha->operating_mode =
  1585. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1586. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1587. sizeof(ha->fw_seriallink_options));
  1588. /* save HBA serial number */
  1589. ha->serial0 = icb->port_name[5];
  1590. ha->serial1 = icb->port_name[6];
  1591. ha->serial2 = icb->port_name[7];
  1592. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1593. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1594. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1595. ha->retry_count = nv->retry_count;
  1596. /* Set minimum login_timeout to 4 seconds. */
  1597. if (nv->login_timeout < ql2xlogintimeout)
  1598. nv->login_timeout = ql2xlogintimeout;
  1599. if (nv->login_timeout < 4)
  1600. nv->login_timeout = 4;
  1601. ha->login_timeout = nv->login_timeout;
  1602. icb->login_timeout = nv->login_timeout;
  1603. /* Set minimum RATOV to 100 tenths of a second. */
  1604. ha->r_a_tov = 100;
  1605. ha->loop_reset_delay = nv->reset_delay;
  1606. /* Link Down Timeout = 0:
  1607. *
  1608. * When Port Down timer expires we will start returning
  1609. * I/O's to OS with "DID_NO_CONNECT".
  1610. *
  1611. * Link Down Timeout != 0:
  1612. *
  1613. * The driver waits for the link to come up after link down
  1614. * before returning I/Os to OS with "DID_NO_CONNECT".
  1615. */
  1616. if (nv->link_down_timeout == 0) {
  1617. ha->loop_down_abort_time =
  1618. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1619. } else {
  1620. ha->link_down_timeout = nv->link_down_timeout;
  1621. ha->loop_down_abort_time =
  1622. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1623. }
  1624. /*
  1625. * Need enough time to try and get the port back.
  1626. */
  1627. ha->port_down_retry_count = nv->port_down_retry_count;
  1628. if (qlport_down_retry)
  1629. ha->port_down_retry_count = qlport_down_retry;
  1630. /* Set login_retry_count */
  1631. ha->login_retry_count = nv->retry_count;
  1632. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1633. ha->port_down_retry_count > 3)
  1634. ha->login_retry_count = ha->port_down_retry_count;
  1635. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1636. ha->login_retry_count = ha->port_down_retry_count;
  1637. if (ql2xloginretrycount)
  1638. ha->login_retry_count = ql2xloginretrycount;
  1639. icb->lun_enables = __constant_cpu_to_le16(0);
  1640. icb->command_resource_count = 0;
  1641. icb->immediate_notify_resource_count = 0;
  1642. icb->timeout = __constant_cpu_to_le16(0);
  1643. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1644. /* Enable RIO */
  1645. icb->firmware_options[0] &= ~BIT_3;
  1646. icb->add_firmware_options[0] &=
  1647. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1648. icb->add_firmware_options[0] |= BIT_2;
  1649. icb->response_accumulation_timer = 3;
  1650. icb->interrupt_delay_timer = 5;
  1651. vha->flags.process_response_queue = 1;
  1652. } else {
  1653. /* Enable ZIO. */
  1654. if (!vha->flags.init_done) {
  1655. ha->zio_mode = icb->add_firmware_options[0] &
  1656. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1657. ha->zio_timer = icb->interrupt_delay_timer ?
  1658. icb->interrupt_delay_timer: 2;
  1659. }
  1660. icb->add_firmware_options[0] &=
  1661. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1662. vha->flags.process_response_queue = 0;
  1663. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1664. ha->zio_mode = QLA_ZIO_MODE_6;
  1665. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1666. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1667. ha->zio_timer * 100));
  1668. qla_printk(KERN_INFO, ha,
  1669. "ZIO mode %d enabled; timer delay (%d us).\n",
  1670. ha->zio_mode, ha->zio_timer * 100);
  1671. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1672. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1673. vha->flags.process_response_queue = 1;
  1674. }
  1675. }
  1676. if (rval) {
  1677. DEBUG2_3(printk(KERN_WARNING
  1678. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1679. }
  1680. return (rval);
  1681. }
  1682. static void
  1683. qla2x00_rport_del(void *data)
  1684. {
  1685. fc_port_t *fcport = data;
  1686. struct fc_rport *rport;
  1687. spin_lock_irq(fcport->vha->host->host_lock);
  1688. rport = fcport->drport;
  1689. fcport->drport = NULL;
  1690. spin_unlock_irq(fcport->vha->host->host_lock);
  1691. if (rport)
  1692. fc_remote_port_delete(rport);
  1693. }
  1694. /**
  1695. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1696. * @ha: HA context
  1697. * @flags: allocation flags
  1698. *
  1699. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1700. */
  1701. static fc_port_t *
  1702. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1703. {
  1704. fc_port_t *fcport;
  1705. fcport = kzalloc(sizeof(fc_port_t), flags);
  1706. if (!fcport)
  1707. return NULL;
  1708. /* Setup fcport template structure. */
  1709. fcport->vha = vha;
  1710. fcport->vp_idx = vha->vp_idx;
  1711. fcport->port_type = FCT_UNKNOWN;
  1712. fcport->loop_id = FC_NO_LOOP_ID;
  1713. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1714. fcport->flags = FCF_RLC_SUPPORT;
  1715. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1716. return fcport;
  1717. }
  1718. /*
  1719. * qla2x00_configure_loop
  1720. * Updates Fibre Channel Device Database with what is actually on loop.
  1721. *
  1722. * Input:
  1723. * ha = adapter block pointer.
  1724. *
  1725. * Returns:
  1726. * 0 = success.
  1727. * 1 = error.
  1728. * 2 = database was full and device was not configured.
  1729. */
  1730. static int
  1731. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1732. {
  1733. int rval;
  1734. unsigned long flags, save_flags;
  1735. struct qla_hw_data *ha = vha->hw;
  1736. rval = QLA_SUCCESS;
  1737. /* Get Initiator ID */
  1738. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1739. rval = qla2x00_configure_hba(vha);
  1740. if (rval != QLA_SUCCESS) {
  1741. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1742. vha->host_no));
  1743. return (rval);
  1744. }
  1745. }
  1746. save_flags = flags = vha->dpc_flags;
  1747. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1748. vha->host_no, flags));
  1749. /*
  1750. * If we have both an RSCN and PORT UPDATE pending then handle them
  1751. * both at the same time.
  1752. */
  1753. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1754. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1755. /* Determine what we need to do */
  1756. if (ha->current_topology == ISP_CFG_FL &&
  1757. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1758. vha->flags.rscn_queue_overflow = 1;
  1759. set_bit(RSCN_UPDATE, &flags);
  1760. } else if (ha->current_topology == ISP_CFG_F &&
  1761. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1762. vha->flags.rscn_queue_overflow = 1;
  1763. set_bit(RSCN_UPDATE, &flags);
  1764. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1765. } else if (ha->current_topology == ISP_CFG_N) {
  1766. clear_bit(RSCN_UPDATE, &flags);
  1767. } else if (!vha->flags.online ||
  1768. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1769. vha->flags.rscn_queue_overflow = 1;
  1770. set_bit(RSCN_UPDATE, &flags);
  1771. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1772. }
  1773. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1774. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1775. rval = QLA_FUNCTION_FAILED;
  1776. else
  1777. rval = qla2x00_configure_local_loop(vha);
  1778. }
  1779. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1780. if (LOOP_TRANSITION(vha))
  1781. rval = QLA_FUNCTION_FAILED;
  1782. else
  1783. rval = qla2x00_configure_fabric(vha);
  1784. }
  1785. if (rval == QLA_SUCCESS) {
  1786. if (atomic_read(&vha->loop_down_timer) ||
  1787. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1788. rval = QLA_FUNCTION_FAILED;
  1789. } else {
  1790. atomic_set(&vha->loop_state, LOOP_READY);
  1791. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1792. }
  1793. }
  1794. if (rval) {
  1795. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1796. __func__, vha->host_no));
  1797. } else {
  1798. DEBUG3(printk("%s: exiting normally\n", __func__));
  1799. }
  1800. /* Restore state if a resync event occurred during processing */
  1801. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1802. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1803. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1804. if (test_bit(RSCN_UPDATE, &save_flags))
  1805. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1806. }
  1807. return (rval);
  1808. }
  1809. /*
  1810. * qla2x00_configure_local_loop
  1811. * Updates Fibre Channel Device Database with local loop devices.
  1812. *
  1813. * Input:
  1814. * ha = adapter block pointer.
  1815. *
  1816. * Returns:
  1817. * 0 = success.
  1818. */
  1819. static int
  1820. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1821. {
  1822. int rval, rval2;
  1823. int found_devs;
  1824. int found;
  1825. fc_port_t *fcport, *new_fcport;
  1826. uint16_t index;
  1827. uint16_t entries;
  1828. char *id_iter;
  1829. uint16_t loop_id;
  1830. uint8_t domain, area, al_pa;
  1831. struct qla_hw_data *ha = vha->hw;
  1832. found_devs = 0;
  1833. new_fcport = NULL;
  1834. entries = MAX_FIBRE_DEVICES;
  1835. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1836. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1837. /* Get list of logged in devices. */
  1838. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1839. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1840. &entries);
  1841. if (rval != QLA_SUCCESS)
  1842. goto cleanup_allocation;
  1843. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1844. ha->host_no, entries));
  1845. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1846. entries * sizeof(struct gid_list_info)));
  1847. /* Allocate temporary fcport for any new fcports discovered. */
  1848. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1849. if (new_fcport == NULL) {
  1850. rval = QLA_MEMORY_ALLOC_FAILED;
  1851. goto cleanup_allocation;
  1852. }
  1853. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1854. /*
  1855. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1856. */
  1857. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1858. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1859. fcport->port_type != FCT_BROADCAST &&
  1860. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1861. DEBUG(printk("scsi(%ld): Marking port lost, "
  1862. "loop_id=0x%04x\n",
  1863. vha->host_no, fcport->loop_id));
  1864. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1865. fcport->flags &= ~FCF_FARP_DONE;
  1866. }
  1867. }
  1868. /* Add devices to port list. */
  1869. id_iter = (char *)ha->gid_list;
  1870. for (index = 0; index < entries; index++) {
  1871. domain = ((struct gid_list_info *)id_iter)->domain;
  1872. area = ((struct gid_list_info *)id_iter)->area;
  1873. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1874. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1875. loop_id = (uint16_t)
  1876. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1877. else
  1878. loop_id = le16_to_cpu(
  1879. ((struct gid_list_info *)id_iter)->loop_id);
  1880. id_iter += ha->gid_list_info_size;
  1881. /* Bypass reserved domain fields. */
  1882. if ((domain & 0xf0) == 0xf0)
  1883. continue;
  1884. /* Bypass if not same domain and area of adapter. */
  1885. if (area && domain &&
  1886. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1887. continue;
  1888. /* Bypass invalid local loop ID. */
  1889. if (loop_id > LAST_LOCAL_LOOP_ID)
  1890. continue;
  1891. /* Fill in member data. */
  1892. new_fcport->d_id.b.domain = domain;
  1893. new_fcport->d_id.b.area = area;
  1894. new_fcport->d_id.b.al_pa = al_pa;
  1895. new_fcport->loop_id = loop_id;
  1896. new_fcport->vp_idx = vha->vp_idx;
  1897. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1898. if (rval2 != QLA_SUCCESS) {
  1899. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1900. "information -- get_port_database=%x, "
  1901. "loop_id=0x%04x\n",
  1902. vha->host_no, rval2, new_fcport->loop_id));
  1903. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1904. vha->host_no));
  1905. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1906. continue;
  1907. }
  1908. /* Check for matching device in port list. */
  1909. found = 0;
  1910. fcport = NULL;
  1911. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1912. if (memcmp(new_fcport->port_name, fcport->port_name,
  1913. WWN_SIZE))
  1914. continue;
  1915. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1916. FCF_PERSISTENT_BOUND);
  1917. fcport->loop_id = new_fcport->loop_id;
  1918. fcport->port_type = new_fcport->port_type;
  1919. fcport->d_id.b24 = new_fcport->d_id.b24;
  1920. memcpy(fcport->node_name, new_fcport->node_name,
  1921. WWN_SIZE);
  1922. found++;
  1923. break;
  1924. }
  1925. if (!found) {
  1926. /* New device, add to fcports list. */
  1927. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1928. if (vha->vp_idx) {
  1929. new_fcport->vha = vha;
  1930. new_fcport->vp_idx = vha->vp_idx;
  1931. }
  1932. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1933. /* Allocate a new replacement fcport. */
  1934. fcport = new_fcport;
  1935. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1936. if (new_fcport == NULL) {
  1937. rval = QLA_MEMORY_ALLOC_FAILED;
  1938. goto cleanup_allocation;
  1939. }
  1940. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1941. }
  1942. /* Base iIDMA settings on HBA port speed. */
  1943. fcport->fp_speed = ha->link_data_rate;
  1944. qla2x00_update_fcport(vha, fcport);
  1945. found_devs++;
  1946. }
  1947. cleanup_allocation:
  1948. kfree(new_fcport);
  1949. if (rval != QLA_SUCCESS) {
  1950. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1951. "rval=%x\n", vha->host_no, rval));
  1952. }
  1953. if (found_devs) {
  1954. vha->device_flags |= DFLG_LOCAL_DEVICES;
  1955. vha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1956. }
  1957. return (rval);
  1958. }
  1959. static void
  1960. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1961. {
  1962. #define LS_UNKNOWN 2
  1963. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1964. int rval;
  1965. uint16_t mb[6];
  1966. struct qla_hw_data *ha = vha->hw;
  1967. if (!IS_IIDMA_CAPABLE(ha))
  1968. return;
  1969. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1970. fcport->fp_speed > ha->link_data_rate)
  1971. return;
  1972. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1973. mb);
  1974. if (rval != QLA_SUCCESS) {
  1975. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1976. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1977. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1978. fcport->port_name[2], fcport->port_name[3],
  1979. fcport->port_name[4], fcport->port_name[5],
  1980. fcport->port_name[6], fcport->port_name[7], rval,
  1981. fcport->fp_speed, mb[0], mb[1]));
  1982. } else {
  1983. DEBUG2(qla_printk(KERN_INFO, ha,
  1984. "iIDMA adjusted to %s GB/s on "
  1985. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1986. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1987. fcport->port_name[1], fcport->port_name[2],
  1988. fcport->port_name[3], fcport->port_name[4],
  1989. fcport->port_name[5], fcport->port_name[6],
  1990. fcport->port_name[7]));
  1991. }
  1992. }
  1993. static void
  1994. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1995. {
  1996. struct fc_rport_identifiers rport_ids;
  1997. struct fc_rport *rport;
  1998. struct qla_hw_data *ha = vha->hw;
  1999. if (fcport->drport)
  2000. qla2x00_rport_del(fcport);
  2001. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2002. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2003. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2004. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2005. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2006. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2007. if (!rport) {
  2008. qla_printk(KERN_WARNING, ha,
  2009. "Unable to allocate fc remote port!\n");
  2010. return;
  2011. }
  2012. spin_lock_irq(fcport->vha->host->host_lock);
  2013. *((fc_port_t **)rport->dd_data) = fcport;
  2014. spin_unlock_irq(fcport->vha->host->host_lock);
  2015. rport->supported_classes = fcport->supported_classes;
  2016. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2017. if (fcport->port_type == FCT_INITIATOR)
  2018. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2019. if (fcport->port_type == FCT_TARGET)
  2020. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2021. fc_remote_port_rolechg(rport, rport_ids.roles);
  2022. }
  2023. /*
  2024. * qla2x00_update_fcport
  2025. * Updates device on list.
  2026. *
  2027. * Input:
  2028. * ha = adapter block pointer.
  2029. * fcport = port structure pointer.
  2030. *
  2031. * Return:
  2032. * 0 - Success
  2033. * BIT_0 - error
  2034. *
  2035. * Context:
  2036. * Kernel context.
  2037. */
  2038. void
  2039. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2040. {
  2041. struct qla_hw_data *ha = vha->hw;
  2042. fcport->vha = vha;
  2043. fcport->login_retry = 0;
  2044. fcport->port_login_retry_count = ha->port_down_retry_count *
  2045. PORT_RETRY_TIME;
  2046. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2047. PORT_RETRY_TIME);
  2048. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2049. qla2x00_iidma_fcport(vha, fcport);
  2050. atomic_set(&fcport->state, FCS_ONLINE);
  2051. qla2x00_reg_remote_port(vha, fcport);
  2052. }
  2053. /*
  2054. * qla2x00_configure_fabric
  2055. * Setup SNS devices with loop ID's.
  2056. *
  2057. * Input:
  2058. * ha = adapter block pointer.
  2059. *
  2060. * Returns:
  2061. * 0 = success.
  2062. * BIT_0 = error
  2063. */
  2064. static int
  2065. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2066. {
  2067. int rval, rval2;
  2068. fc_port_t *fcport, *fcptemp;
  2069. uint16_t next_loopid;
  2070. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2071. uint16_t loop_id;
  2072. LIST_HEAD(new_fcports);
  2073. struct qla_hw_data *ha = vha->hw;
  2074. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2075. /* If FL port exists, then SNS is present */
  2076. if (IS_FWI2_CAPABLE(ha))
  2077. loop_id = NPH_F_PORT;
  2078. else
  2079. loop_id = SNS_FL_PORT;
  2080. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2081. if (rval != QLA_SUCCESS) {
  2082. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2083. "Port\n", vha->host_no));
  2084. vha->device_flags &= ~SWITCH_FOUND;
  2085. return (QLA_SUCCESS);
  2086. }
  2087. vha->device_flags |= SWITCH_FOUND;
  2088. /* Mark devices that need re-synchronization. */
  2089. rval2 = qla2x00_device_resync(vha);
  2090. if (rval2 == QLA_RSCNS_HANDLED) {
  2091. /* No point doing the scan, just continue. */
  2092. return (QLA_SUCCESS);
  2093. }
  2094. do {
  2095. /* FDMI support. */
  2096. if (ql2xfdmienable &&
  2097. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2098. qla2x00_fdmi_register(vha);
  2099. /* Ensure we are logged into the SNS. */
  2100. if (IS_FWI2_CAPABLE(ha))
  2101. loop_id = NPH_SNS;
  2102. else
  2103. loop_id = SIMPLE_NAME_SERVER;
  2104. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2105. 0xfc, mb, BIT_1 | BIT_0);
  2106. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2107. DEBUG2(qla_printk(KERN_INFO, ha,
  2108. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2109. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2110. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2111. return (QLA_SUCCESS);
  2112. }
  2113. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2114. if (qla2x00_rft_id(vha)) {
  2115. /* EMPTY */
  2116. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2117. "TYPE failed.\n", vha->host_no));
  2118. }
  2119. if (qla2x00_rff_id(vha)) {
  2120. /* EMPTY */
  2121. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2122. "Features failed.\n", vha->host_no));
  2123. }
  2124. if (qla2x00_rnn_id(vha)) {
  2125. /* EMPTY */
  2126. DEBUG2(printk("scsi(%ld): Register Node Name "
  2127. "failed.\n", vha->host_no));
  2128. } else if (qla2x00_rsnn_nn(vha)) {
  2129. /* EMPTY */
  2130. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2131. "Node Name failed.\n", vha->host_no));
  2132. }
  2133. }
  2134. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2135. if (rval != QLA_SUCCESS)
  2136. break;
  2137. /*
  2138. * Logout all previous fabric devices marked lost, except
  2139. * tape devices.
  2140. */
  2141. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2142. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2143. break;
  2144. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2145. continue;
  2146. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2147. qla2x00_mark_device_lost(vha, fcport,
  2148. ql2xplogiabsentdevice, 0);
  2149. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2150. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2151. fcport->port_type != FCT_INITIATOR &&
  2152. fcport->port_type != FCT_BROADCAST) {
  2153. ha->isp_ops->fabric_logout(vha,
  2154. fcport->loop_id,
  2155. fcport->d_id.b.domain,
  2156. fcport->d_id.b.area,
  2157. fcport->d_id.b.al_pa);
  2158. fcport->loop_id = FC_NO_LOOP_ID;
  2159. }
  2160. }
  2161. }
  2162. /* Starting free loop ID. */
  2163. next_loopid = ha->min_external_loopid;
  2164. /*
  2165. * Scan through our port list and login entries that need to be
  2166. * logged in.
  2167. */
  2168. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2169. if (atomic_read(&vha->loop_down_timer) ||
  2170. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2171. break;
  2172. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2173. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2174. continue;
  2175. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2176. fcport->loop_id = next_loopid;
  2177. rval = qla2x00_find_new_loop_id(
  2178. base_vha, fcport);
  2179. if (rval != QLA_SUCCESS) {
  2180. /* Ran out of IDs to use */
  2181. break;
  2182. }
  2183. }
  2184. /* Login and update database */
  2185. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2186. }
  2187. /* Exit if out of loop IDs. */
  2188. if (rval != QLA_SUCCESS) {
  2189. break;
  2190. }
  2191. /*
  2192. * Login and add the new devices to our port list.
  2193. */
  2194. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2195. if (atomic_read(&vha->loop_down_timer) ||
  2196. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2197. break;
  2198. /* Find a new loop ID to use. */
  2199. fcport->loop_id = next_loopid;
  2200. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2201. if (rval != QLA_SUCCESS) {
  2202. /* Ran out of IDs to use */
  2203. break;
  2204. }
  2205. /* Login and update database */
  2206. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2207. if (vha->vp_idx) {
  2208. fcport->vha = vha;
  2209. fcport->vp_idx = vha->vp_idx;
  2210. }
  2211. list_move_tail(&fcport->list, &vha->vp_fcports);
  2212. }
  2213. } while (0);
  2214. /* Free all new device structures not processed. */
  2215. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2216. list_del(&fcport->list);
  2217. kfree(fcport);
  2218. }
  2219. if (rval) {
  2220. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2221. "rval=%d\n", vha->host_no, rval));
  2222. }
  2223. return (rval);
  2224. }
  2225. /*
  2226. * qla2x00_find_all_fabric_devs
  2227. *
  2228. * Input:
  2229. * ha = adapter block pointer.
  2230. * dev = database device entry pointer.
  2231. *
  2232. * Returns:
  2233. * 0 = success.
  2234. *
  2235. * Context:
  2236. * Kernel context.
  2237. */
  2238. static int
  2239. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2240. struct list_head *new_fcports)
  2241. {
  2242. int rval;
  2243. uint16_t loop_id;
  2244. fc_port_t *fcport, *new_fcport, *fcptemp;
  2245. int found;
  2246. sw_info_t *swl;
  2247. int swl_idx;
  2248. int first_dev, last_dev;
  2249. port_id_t wrap, nxt_d_id;
  2250. struct qla_hw_data *ha = vha->hw;
  2251. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2252. struct scsi_qla_host *tvp;
  2253. rval = QLA_SUCCESS;
  2254. /* Try GID_PT to get device list, else GAN. */
  2255. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2256. if (!swl) {
  2257. /*EMPTY*/
  2258. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2259. "on GA_NXT\n", vha->host_no));
  2260. } else {
  2261. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2262. kfree(swl);
  2263. swl = NULL;
  2264. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2265. kfree(swl);
  2266. swl = NULL;
  2267. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2268. kfree(swl);
  2269. swl = NULL;
  2270. } else if (ql2xiidmaenable &&
  2271. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2272. qla2x00_gpsc(vha, swl);
  2273. }
  2274. }
  2275. swl_idx = 0;
  2276. /* Allocate temporary fcport for any new fcports discovered. */
  2277. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2278. if (new_fcport == NULL) {
  2279. kfree(swl);
  2280. return (QLA_MEMORY_ALLOC_FAILED);
  2281. }
  2282. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2283. /* Set start port ID scan at adapter ID. */
  2284. first_dev = 1;
  2285. last_dev = 0;
  2286. /* Starting free loop ID. */
  2287. loop_id = ha->min_external_loopid;
  2288. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2289. if (qla2x00_is_reserved_id(vha, loop_id))
  2290. continue;
  2291. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2292. break;
  2293. if (swl != NULL) {
  2294. if (last_dev) {
  2295. wrap.b24 = new_fcport->d_id.b24;
  2296. } else {
  2297. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2298. memcpy(new_fcport->node_name,
  2299. swl[swl_idx].node_name, WWN_SIZE);
  2300. memcpy(new_fcport->port_name,
  2301. swl[swl_idx].port_name, WWN_SIZE);
  2302. memcpy(new_fcport->fabric_port_name,
  2303. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2304. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2305. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2306. last_dev = 1;
  2307. }
  2308. swl_idx++;
  2309. }
  2310. } else {
  2311. /* Send GA_NXT to the switch */
  2312. rval = qla2x00_ga_nxt(vha, new_fcport);
  2313. if (rval != QLA_SUCCESS) {
  2314. qla_printk(KERN_WARNING, ha,
  2315. "SNS scan failed -- assuming zero-entry "
  2316. "result...\n");
  2317. list_for_each_entry_safe(fcport, fcptemp,
  2318. new_fcports, list) {
  2319. list_del(&fcport->list);
  2320. kfree(fcport);
  2321. }
  2322. rval = QLA_SUCCESS;
  2323. break;
  2324. }
  2325. }
  2326. /* If wrap on switch device list, exit. */
  2327. if (first_dev) {
  2328. wrap.b24 = new_fcport->d_id.b24;
  2329. first_dev = 0;
  2330. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2331. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2332. vha->host_no, new_fcport->d_id.b.domain,
  2333. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2334. break;
  2335. }
  2336. /* Bypass if same physical adapter. */
  2337. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2338. continue;
  2339. /* Bypass virtual ports of the same host. */
  2340. found = 0;
  2341. if (ha->num_vhosts) {
  2342. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2343. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2344. found = 1;
  2345. break;
  2346. }
  2347. }
  2348. if (found)
  2349. continue;
  2350. }
  2351. /* Bypass if same domain and area of adapter. */
  2352. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2353. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2354. ISP_CFG_FL)
  2355. continue;
  2356. /* Bypass reserved domain fields. */
  2357. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2358. continue;
  2359. /* Locate matching device in database. */
  2360. found = 0;
  2361. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2362. if (memcmp(new_fcport->port_name, fcport->port_name,
  2363. WWN_SIZE))
  2364. continue;
  2365. found++;
  2366. /* Update port state. */
  2367. memcpy(fcport->fabric_port_name,
  2368. new_fcport->fabric_port_name, WWN_SIZE);
  2369. fcport->fp_speed = new_fcport->fp_speed;
  2370. /*
  2371. * If address the same and state FCS_ONLINE, nothing
  2372. * changed.
  2373. */
  2374. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2375. atomic_read(&fcport->state) == FCS_ONLINE) {
  2376. break;
  2377. }
  2378. /*
  2379. * If device was not a fabric device before.
  2380. */
  2381. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2382. fcport->d_id.b24 = new_fcport->d_id.b24;
  2383. fcport->loop_id = FC_NO_LOOP_ID;
  2384. fcport->flags |= (FCF_FABRIC_DEVICE |
  2385. FCF_LOGIN_NEEDED);
  2386. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2387. break;
  2388. }
  2389. /*
  2390. * Port ID changed or device was marked to be updated;
  2391. * Log it out if still logged in and mark it for
  2392. * relogin later.
  2393. */
  2394. fcport->d_id.b24 = new_fcport->d_id.b24;
  2395. fcport->flags |= FCF_LOGIN_NEEDED;
  2396. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2397. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2398. fcport->port_type != FCT_INITIATOR &&
  2399. fcport->port_type != FCT_BROADCAST) {
  2400. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2401. fcport->d_id.b.domain, fcport->d_id.b.area,
  2402. fcport->d_id.b.al_pa);
  2403. fcport->loop_id = FC_NO_LOOP_ID;
  2404. }
  2405. break;
  2406. }
  2407. if (found)
  2408. continue;
  2409. /* If device was not in our fcports list, then add it. */
  2410. list_add_tail(&new_fcport->list, new_fcports);
  2411. /* Allocate a new replacement fcport. */
  2412. nxt_d_id.b24 = new_fcport->d_id.b24;
  2413. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2414. if (new_fcport == NULL) {
  2415. kfree(swl);
  2416. return (QLA_MEMORY_ALLOC_FAILED);
  2417. }
  2418. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2419. new_fcport->d_id.b24 = nxt_d_id.b24;
  2420. }
  2421. kfree(swl);
  2422. kfree(new_fcport);
  2423. if (!list_empty(new_fcports))
  2424. vha->device_flags |= DFLG_FABRIC_DEVICES;
  2425. return (rval);
  2426. }
  2427. /*
  2428. * qla2x00_find_new_loop_id
  2429. * Scan through our port list and find a new usable loop ID.
  2430. *
  2431. * Input:
  2432. * ha: adapter state pointer.
  2433. * dev: port structure pointer.
  2434. *
  2435. * Returns:
  2436. * qla2x00 local function return status code.
  2437. *
  2438. * Context:
  2439. * Kernel context.
  2440. */
  2441. static int
  2442. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2443. {
  2444. int rval;
  2445. int found;
  2446. fc_port_t *fcport;
  2447. uint16_t first_loop_id;
  2448. struct qla_hw_data *ha = vha->hw;
  2449. struct scsi_qla_host *vp;
  2450. struct scsi_qla_host *tvp;
  2451. rval = QLA_SUCCESS;
  2452. /* Save starting loop ID. */
  2453. first_loop_id = dev->loop_id;
  2454. for (;;) {
  2455. /* Skip loop ID if already used by adapter. */
  2456. if (dev->loop_id == vha->loop_id)
  2457. dev->loop_id++;
  2458. /* Skip reserved loop IDs. */
  2459. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2460. dev->loop_id++;
  2461. /* Reset loop ID if passed the end. */
  2462. if (dev->loop_id > ha->max_loop_id) {
  2463. /* first loop ID. */
  2464. dev->loop_id = ha->min_external_loopid;
  2465. }
  2466. /* Check for loop ID being already in use. */
  2467. found = 0;
  2468. fcport = NULL;
  2469. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2470. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2471. if (fcport->loop_id == dev->loop_id &&
  2472. fcport != dev) {
  2473. /* ID possibly in use */
  2474. found++;
  2475. break;
  2476. }
  2477. }
  2478. if (found)
  2479. break;
  2480. }
  2481. /* If not in use then it is free to use. */
  2482. if (!found) {
  2483. break;
  2484. }
  2485. /* ID in use. Try next value. */
  2486. dev->loop_id++;
  2487. /* If wrap around. No free ID to use. */
  2488. if (dev->loop_id == first_loop_id) {
  2489. dev->loop_id = FC_NO_LOOP_ID;
  2490. rval = QLA_FUNCTION_FAILED;
  2491. break;
  2492. }
  2493. }
  2494. return (rval);
  2495. }
  2496. /*
  2497. * qla2x00_device_resync
  2498. * Marks devices in the database that needs resynchronization.
  2499. *
  2500. * Input:
  2501. * ha = adapter block pointer.
  2502. *
  2503. * Context:
  2504. * Kernel context.
  2505. */
  2506. static int
  2507. qla2x00_device_resync(scsi_qla_host_t *vha)
  2508. {
  2509. int rval;
  2510. uint32_t mask;
  2511. fc_port_t *fcport;
  2512. uint32_t rscn_entry;
  2513. uint8_t rscn_out_iter;
  2514. uint8_t format;
  2515. port_id_t d_id;
  2516. rval = QLA_RSCNS_HANDLED;
  2517. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2518. vha->flags.rscn_queue_overflow) {
  2519. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2520. format = MSB(MSW(rscn_entry));
  2521. d_id.b.domain = LSB(MSW(rscn_entry));
  2522. d_id.b.area = MSB(LSW(rscn_entry));
  2523. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2524. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2525. "[%02x/%02x%02x%02x].\n",
  2526. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2527. d_id.b.area, d_id.b.al_pa));
  2528. vha->rscn_out_ptr++;
  2529. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2530. vha->rscn_out_ptr = 0;
  2531. /* Skip duplicate entries. */
  2532. for (rscn_out_iter = vha->rscn_out_ptr;
  2533. !vha->flags.rscn_queue_overflow &&
  2534. rscn_out_iter != vha->rscn_in_ptr;
  2535. rscn_out_iter = (rscn_out_iter ==
  2536. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2537. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2538. break;
  2539. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2540. "entry found at [%d].\n", vha->host_no,
  2541. rscn_out_iter));
  2542. vha->rscn_out_ptr = rscn_out_iter;
  2543. }
  2544. /* Queue overflow, set switch default case. */
  2545. if (vha->flags.rscn_queue_overflow) {
  2546. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2547. "overflow.\n", vha->host_no));
  2548. format = 3;
  2549. vha->flags.rscn_queue_overflow = 0;
  2550. }
  2551. switch (format) {
  2552. case 0:
  2553. mask = 0xffffff;
  2554. break;
  2555. case 1:
  2556. mask = 0xffff00;
  2557. break;
  2558. case 2:
  2559. mask = 0xff0000;
  2560. break;
  2561. default:
  2562. mask = 0x0;
  2563. d_id.b24 = 0;
  2564. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2565. break;
  2566. }
  2567. rval = QLA_SUCCESS;
  2568. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2569. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2570. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2571. fcport->port_type == FCT_BROADCAST)
  2572. continue;
  2573. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2574. if (format != 3 ||
  2575. fcport->port_type != FCT_INITIATOR) {
  2576. qla2x00_mark_device_lost(vha, fcport,
  2577. 0, 0);
  2578. }
  2579. }
  2580. fcport->flags &= ~FCF_FARP_DONE;
  2581. }
  2582. }
  2583. return (rval);
  2584. }
  2585. /*
  2586. * qla2x00_fabric_dev_login
  2587. * Login fabric target device and update FC port database.
  2588. *
  2589. * Input:
  2590. * ha: adapter state pointer.
  2591. * fcport: port structure list pointer.
  2592. * next_loopid: contains value of a new loop ID that can be used
  2593. * by the next login attempt.
  2594. *
  2595. * Returns:
  2596. * qla2x00 local function return status code.
  2597. *
  2598. * Context:
  2599. * Kernel context.
  2600. */
  2601. static int
  2602. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2603. uint16_t *next_loopid)
  2604. {
  2605. int rval;
  2606. int retry;
  2607. uint8_t opts;
  2608. struct qla_hw_data *ha = vha->hw;
  2609. rval = QLA_SUCCESS;
  2610. retry = 0;
  2611. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2612. if (rval == QLA_SUCCESS) {
  2613. /* Send an ADISC to tape devices.*/
  2614. opts = 0;
  2615. if (fcport->flags & FCF_TAPE_PRESENT)
  2616. opts |= BIT_1;
  2617. rval = qla2x00_get_port_database(vha, fcport, opts);
  2618. if (rval != QLA_SUCCESS) {
  2619. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2620. fcport->d_id.b.domain, fcport->d_id.b.area,
  2621. fcport->d_id.b.al_pa);
  2622. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2623. } else {
  2624. qla2x00_update_fcport(vha, fcport);
  2625. }
  2626. }
  2627. return (rval);
  2628. }
  2629. /*
  2630. * qla2x00_fabric_login
  2631. * Issue fabric login command.
  2632. *
  2633. * Input:
  2634. * ha = adapter block pointer.
  2635. * device = pointer to FC device type structure.
  2636. *
  2637. * Returns:
  2638. * 0 - Login successfully
  2639. * 1 - Login failed
  2640. * 2 - Initiator device
  2641. * 3 - Fatal error
  2642. */
  2643. int
  2644. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2645. uint16_t *next_loopid)
  2646. {
  2647. int rval;
  2648. int retry;
  2649. uint16_t tmp_loopid;
  2650. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2651. struct qla_hw_data *ha = vha->hw;
  2652. retry = 0;
  2653. tmp_loopid = 0;
  2654. for (;;) {
  2655. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2656. "for port %02x%02x%02x.\n",
  2657. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2658. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2659. /* Login fcport on switch. */
  2660. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2661. fcport->d_id.b.domain, fcport->d_id.b.area,
  2662. fcport->d_id.b.al_pa, mb, BIT_0);
  2663. if (mb[0] == MBS_PORT_ID_USED) {
  2664. /*
  2665. * Device has another loop ID. The firmware team
  2666. * recommends the driver perform an implicit login with
  2667. * the specified ID again. The ID we just used is save
  2668. * here so we return with an ID that can be tried by
  2669. * the next login.
  2670. */
  2671. retry++;
  2672. tmp_loopid = fcport->loop_id;
  2673. fcport->loop_id = mb[1];
  2674. DEBUG(printk("Fabric Login: port in use - next "
  2675. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2676. fcport->loop_id, fcport->d_id.b.domain,
  2677. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2678. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2679. /*
  2680. * Login succeeded.
  2681. */
  2682. if (retry) {
  2683. /* A retry occurred before. */
  2684. *next_loopid = tmp_loopid;
  2685. } else {
  2686. /*
  2687. * No retry occurred before. Just increment the
  2688. * ID value for next login.
  2689. */
  2690. *next_loopid = (fcport->loop_id + 1);
  2691. }
  2692. if (mb[1] & BIT_0) {
  2693. fcport->port_type = FCT_INITIATOR;
  2694. } else {
  2695. fcport->port_type = FCT_TARGET;
  2696. if (mb[1] & BIT_1) {
  2697. fcport->flags |= FCF_TAPE_PRESENT;
  2698. }
  2699. }
  2700. if (mb[10] & BIT_0)
  2701. fcport->supported_classes |= FC_COS_CLASS2;
  2702. if (mb[10] & BIT_1)
  2703. fcport->supported_classes |= FC_COS_CLASS3;
  2704. rval = QLA_SUCCESS;
  2705. break;
  2706. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2707. /*
  2708. * Loop ID already used, try next loop ID.
  2709. */
  2710. fcport->loop_id++;
  2711. rval = qla2x00_find_new_loop_id(vha, fcport);
  2712. if (rval != QLA_SUCCESS) {
  2713. /* Ran out of loop IDs to use */
  2714. break;
  2715. }
  2716. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2717. /*
  2718. * Firmware possibly timed out during login. If NO
  2719. * retries are left to do then the device is declared
  2720. * dead.
  2721. */
  2722. *next_loopid = fcport->loop_id;
  2723. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2724. fcport->d_id.b.domain, fcport->d_id.b.area,
  2725. fcport->d_id.b.al_pa);
  2726. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2727. rval = 1;
  2728. break;
  2729. } else {
  2730. /*
  2731. * unrecoverable / not handled error
  2732. */
  2733. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2734. "loop_id=%x jiffies=%lx.\n",
  2735. __func__, vha->host_no, mb[0],
  2736. fcport->d_id.b.domain, fcport->d_id.b.area,
  2737. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2738. *next_loopid = fcport->loop_id;
  2739. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2740. fcport->d_id.b.domain, fcport->d_id.b.area,
  2741. fcport->d_id.b.al_pa);
  2742. fcport->loop_id = FC_NO_LOOP_ID;
  2743. fcport->login_retry = 0;
  2744. rval = 3;
  2745. break;
  2746. }
  2747. }
  2748. return (rval);
  2749. }
  2750. /*
  2751. * qla2x00_local_device_login
  2752. * Issue local device login command.
  2753. *
  2754. * Input:
  2755. * ha = adapter block pointer.
  2756. * loop_id = loop id of device to login to.
  2757. *
  2758. * Returns (Where's the #define!!!!):
  2759. * 0 - Login successfully
  2760. * 1 - Login failed
  2761. * 3 - Fatal error
  2762. */
  2763. int
  2764. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2765. {
  2766. int rval;
  2767. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2768. memset(mb, 0, sizeof(mb));
  2769. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2770. if (rval == QLA_SUCCESS) {
  2771. /* Interrogate mailbox registers for any errors */
  2772. if (mb[0] == MBS_COMMAND_ERROR)
  2773. rval = 1;
  2774. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2775. /* device not in PCB table */
  2776. rval = 3;
  2777. }
  2778. return (rval);
  2779. }
  2780. /*
  2781. * qla2x00_loop_resync
  2782. * Resync with fibre channel devices.
  2783. *
  2784. * Input:
  2785. * ha = adapter block pointer.
  2786. *
  2787. * Returns:
  2788. * 0 = success
  2789. */
  2790. int
  2791. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2792. {
  2793. int rval = QLA_SUCCESS;
  2794. uint32_t wait_time;
  2795. struct qla_hw_data *ha = vha->hw;
  2796. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  2797. struct rsp_que *rsp = req->rsp;
  2798. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2799. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2800. if (vha->flags.online) {
  2801. if (!(rval = qla2x00_fw_ready(vha))) {
  2802. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2803. wait_time = 256;
  2804. do {
  2805. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2806. /* Issue a marker after FW becomes ready. */
  2807. qla2x00_marker(vha, req, rsp, 0, 0,
  2808. MK_SYNC_ALL);
  2809. vha->marker_needed = 0;
  2810. /* Remap devices on Loop. */
  2811. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2812. qla2x00_configure_loop(vha);
  2813. wait_time--;
  2814. } while (!atomic_read(&vha->loop_down_timer) &&
  2815. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2816. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2817. &vha->dpc_flags)));
  2818. }
  2819. }
  2820. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2821. return (QLA_FUNCTION_FAILED);
  2822. if (rval)
  2823. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2824. return (rval);
  2825. }
  2826. void
  2827. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2828. {
  2829. fc_port_t *fcport;
  2830. /* Go with deferred removal of rport references. */
  2831. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2832. if (fcport && fcport->drport &&
  2833. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2834. qla2x00_rport_del(fcport);
  2835. }
  2836. /*
  2837. * qla2x00_abort_isp
  2838. * Resets ISP and aborts all outstanding commands.
  2839. *
  2840. * Input:
  2841. * ha = adapter block pointer.
  2842. *
  2843. * Returns:
  2844. * 0 = success
  2845. */
  2846. int
  2847. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2848. {
  2849. int rval;
  2850. uint8_t status = 0;
  2851. struct qla_hw_data *ha = vha->hw;
  2852. struct scsi_qla_host *vp;
  2853. struct scsi_qla_host *tvp;
  2854. struct req_que *req = ha->req_q_map[0];
  2855. if (vha->flags.online) {
  2856. vha->flags.online = 0;
  2857. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2858. ha->qla_stats.total_isp_aborts++;
  2859. qla_printk(KERN_INFO, ha,
  2860. "Performing ISP error recovery - ha= %p.\n", ha);
  2861. ha->isp_ops->reset_chip(vha);
  2862. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2863. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2864. atomic_set(&vha->loop_state, LOOP_DOWN);
  2865. qla2x00_mark_all_devices_lost(vha, 0);
  2866. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2867. qla2x00_mark_all_devices_lost(vp, 0);
  2868. } else {
  2869. if (!atomic_read(&vha->loop_down_timer))
  2870. atomic_set(&vha->loop_down_timer,
  2871. LOOP_DOWN_TIME);
  2872. }
  2873. /* Requeue all commands in outstanding command list. */
  2874. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2875. ha->isp_ops->get_flash_version(vha, req->ring);
  2876. ha->isp_ops->nvram_config(vha);
  2877. if (!qla2x00_restart_isp(vha)) {
  2878. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2879. if (!atomic_read(&vha->loop_down_timer)) {
  2880. /*
  2881. * Issue marker command only when we are going
  2882. * to start the I/O .
  2883. */
  2884. vha->marker_needed = 1;
  2885. }
  2886. vha->flags.online = 1;
  2887. ha->isp_ops->enable_intrs(ha);
  2888. ha->isp_abort_cnt = 0;
  2889. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2890. if (ha->fce) {
  2891. ha->flags.fce_enabled = 1;
  2892. memset(ha->fce, 0,
  2893. fce_calc_size(ha->fce_bufs));
  2894. rval = qla2x00_enable_fce_trace(vha,
  2895. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2896. &ha->fce_bufs);
  2897. if (rval) {
  2898. qla_printk(KERN_WARNING, ha,
  2899. "Unable to reinitialize FCE "
  2900. "(%d).\n", rval);
  2901. ha->flags.fce_enabled = 0;
  2902. }
  2903. }
  2904. if (ha->eft) {
  2905. memset(ha->eft, 0, EFT_SIZE);
  2906. rval = qla2x00_enable_eft_trace(vha,
  2907. ha->eft_dma, EFT_NUM_BUFFERS);
  2908. if (rval) {
  2909. qla_printk(KERN_WARNING, ha,
  2910. "Unable to reinitialize EFT "
  2911. "(%d).\n", rval);
  2912. }
  2913. }
  2914. } else { /* failed the ISP abort */
  2915. vha->flags.online = 1;
  2916. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2917. if (ha->isp_abort_cnt == 0) {
  2918. qla_printk(KERN_WARNING, ha,
  2919. "ISP error recovery failed - "
  2920. "board disabled\n");
  2921. /*
  2922. * The next call disables the board
  2923. * completely.
  2924. */
  2925. ha->isp_ops->reset_adapter(vha);
  2926. vha->flags.online = 0;
  2927. clear_bit(ISP_ABORT_RETRY,
  2928. &vha->dpc_flags);
  2929. status = 0;
  2930. } else { /* schedule another ISP abort */
  2931. ha->isp_abort_cnt--;
  2932. DEBUG(printk("qla%ld: ISP abort - "
  2933. "retry remaining %d\n",
  2934. vha->host_no, ha->isp_abort_cnt));
  2935. status = 1;
  2936. }
  2937. } else {
  2938. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2939. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2940. "- retrying (%d) more times\n",
  2941. vha->host_no, ha->isp_abort_cnt));
  2942. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2943. status = 1;
  2944. }
  2945. }
  2946. }
  2947. if (!status) {
  2948. DEBUG(printk(KERN_INFO
  2949. "qla2x00_abort_isp(%ld): succeeded.\n",
  2950. vha->host_no));
  2951. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2952. if (vp->vp_idx)
  2953. qla2x00_vp_abort_isp(vp);
  2954. }
  2955. } else {
  2956. qla_printk(KERN_INFO, ha,
  2957. "qla2x00_abort_isp: **** FAILED ****\n");
  2958. }
  2959. return(status);
  2960. }
  2961. /*
  2962. * qla2x00_restart_isp
  2963. * restarts the ISP after a reset
  2964. *
  2965. * Input:
  2966. * ha = adapter block pointer.
  2967. *
  2968. * Returns:
  2969. * 0 = success
  2970. */
  2971. static int
  2972. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2973. {
  2974. int status = 0;
  2975. uint32_t wait_time;
  2976. struct qla_hw_data *ha = vha->hw;
  2977. struct req_que *req = ha->req_q_map[0];
  2978. struct rsp_que *rsp = ha->rsp_q_map[0];
  2979. /* If firmware needs to be loaded */
  2980. if (qla2x00_isp_firmware(vha)) {
  2981. vha->flags.online = 0;
  2982. status = ha->isp_ops->chip_diag(vha);
  2983. if (!status)
  2984. status = qla2x00_setup_chip(vha);
  2985. }
  2986. if (!status && !(status = qla2x00_init_rings(vha))) {
  2987. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2988. /* Initialize the queues in use */
  2989. qla25xx_init_queues(ha);
  2990. status = qla2x00_fw_ready(vha);
  2991. if (!status) {
  2992. DEBUG(printk("%s(): Start configure loop, "
  2993. "status = %d\n", __func__, status));
  2994. /* Issue a marker after FW becomes ready. */
  2995. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2996. vha->flags.online = 1;
  2997. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2998. wait_time = 256;
  2999. do {
  3000. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3001. qla2x00_configure_loop(vha);
  3002. wait_time--;
  3003. } while (!atomic_read(&vha->loop_down_timer) &&
  3004. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3005. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3006. &vha->dpc_flags)));
  3007. }
  3008. /* if no cable then assume it's good */
  3009. if ((vha->device_flags & DFLG_NO_CABLE))
  3010. status = 0;
  3011. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3012. __func__,
  3013. status));
  3014. }
  3015. return (status);
  3016. }
  3017. static int
  3018. qla25xx_init_queues(struct qla_hw_data *ha)
  3019. {
  3020. struct rsp_que *rsp = NULL;
  3021. struct req_que *req = NULL;
  3022. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3023. int ret = -1;
  3024. int i;
  3025. for (i = 1; i < ha->max_queues; i++) {
  3026. rsp = ha->rsp_q_map[i];
  3027. if (rsp) {
  3028. rsp->options &= ~BIT_0;
  3029. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3030. if (ret != QLA_SUCCESS)
  3031. DEBUG2_17(printk(KERN_WARNING
  3032. "%s Rsp que:%d init failed\n", __func__,
  3033. rsp->id));
  3034. else
  3035. DEBUG2_17(printk(KERN_INFO
  3036. "%s Rsp que:%d inited\n", __func__,
  3037. rsp->id));
  3038. }
  3039. req = ha->req_q_map[i];
  3040. if (req) {
  3041. /* Clear outstanding commands array. */
  3042. req->options &= ~BIT_0;
  3043. ret = qla25xx_init_req_que(base_vha, req);
  3044. if (ret != QLA_SUCCESS)
  3045. DEBUG2_17(printk(KERN_WARNING
  3046. "%s Req que:%d init failed\n", __func__,
  3047. req->id));
  3048. else
  3049. DEBUG2_17(printk(KERN_WARNING
  3050. "%s Req que:%d inited\n", __func__,
  3051. req->id));
  3052. }
  3053. }
  3054. return ret;
  3055. }
  3056. /*
  3057. * qla2x00_reset_adapter
  3058. * Reset adapter.
  3059. *
  3060. * Input:
  3061. * ha = adapter block pointer.
  3062. */
  3063. void
  3064. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3065. {
  3066. unsigned long flags = 0;
  3067. struct qla_hw_data *ha = vha->hw;
  3068. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3069. vha->flags.online = 0;
  3070. ha->isp_ops->disable_intrs(ha);
  3071. spin_lock_irqsave(&ha->hardware_lock, flags);
  3072. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3073. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3074. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3075. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3076. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3077. }
  3078. void
  3079. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3080. {
  3081. unsigned long flags = 0;
  3082. struct qla_hw_data *ha = vha->hw;
  3083. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3084. vha->flags.online = 0;
  3085. ha->isp_ops->disable_intrs(ha);
  3086. spin_lock_irqsave(&ha->hardware_lock, flags);
  3087. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3088. RD_REG_DWORD(&reg->hccr);
  3089. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3090. RD_REG_DWORD(&reg->hccr);
  3091. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3092. if (IS_NOPOLLING_TYPE(ha))
  3093. ha->isp_ops->enable_intrs(ha);
  3094. }
  3095. /* On sparc systems, obtain port and node WWN from firmware
  3096. * properties.
  3097. */
  3098. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3099. struct nvram_24xx *nv)
  3100. {
  3101. #ifdef CONFIG_SPARC
  3102. struct qla_hw_data *ha = vha->hw;
  3103. struct pci_dev *pdev = ha->pdev;
  3104. struct device_node *dp = pci_device_to_OF_node(pdev);
  3105. const u8 *val;
  3106. int len;
  3107. val = of_get_property(dp, "port-wwn", &len);
  3108. if (val && len >= WWN_SIZE)
  3109. memcpy(nv->port_name, val, WWN_SIZE);
  3110. val = of_get_property(dp, "node-wwn", &len);
  3111. if (val && len >= WWN_SIZE)
  3112. memcpy(nv->node_name, val, WWN_SIZE);
  3113. #endif
  3114. }
  3115. int
  3116. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3117. {
  3118. int rval;
  3119. struct init_cb_24xx *icb;
  3120. struct nvram_24xx *nv;
  3121. uint32_t *dptr;
  3122. uint8_t *dptr1, *dptr2;
  3123. uint32_t chksum;
  3124. uint16_t cnt;
  3125. struct qla_hw_data *ha = vha->hw;
  3126. rval = QLA_SUCCESS;
  3127. icb = (struct init_cb_24xx *)ha->init_cb;
  3128. nv = ha->nvram;
  3129. /* Determine NVRAM starting address. */
  3130. ha->nvram_size = sizeof(struct nvram_24xx);
  3131. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3132. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3133. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3134. if (PCI_FUNC(ha->pdev->devfn)) {
  3135. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3136. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3137. }
  3138. /* Get VPD data into cache */
  3139. ha->vpd = ha->nvram + VPD_OFFSET;
  3140. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3141. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3142. /* Get NVRAM data into cache and calculate checksum. */
  3143. dptr = (uint32_t *)nv;
  3144. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3145. ha->nvram_size);
  3146. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3147. chksum += le32_to_cpu(*dptr++);
  3148. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3149. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3150. /* Bad NVRAM data, set defaults parameters. */
  3151. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3152. || nv->id[3] != ' ' ||
  3153. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3154. /* Reset NVRAM data. */
  3155. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3156. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3157. le16_to_cpu(nv->nvram_version));
  3158. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3159. "invalid -- WWPN) defaults.\n");
  3160. /*
  3161. * Set default initialization control block.
  3162. */
  3163. memset(nv, 0, ha->nvram_size);
  3164. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3165. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3166. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3167. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3168. nv->exchange_count = __constant_cpu_to_le16(0);
  3169. nv->hard_address = __constant_cpu_to_le16(124);
  3170. nv->port_name[0] = 0x21;
  3171. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3172. nv->port_name[2] = 0x00;
  3173. nv->port_name[3] = 0xe0;
  3174. nv->port_name[4] = 0x8b;
  3175. nv->port_name[5] = 0x1c;
  3176. nv->port_name[6] = 0x55;
  3177. nv->port_name[7] = 0x86;
  3178. nv->node_name[0] = 0x20;
  3179. nv->node_name[1] = 0x00;
  3180. nv->node_name[2] = 0x00;
  3181. nv->node_name[3] = 0xe0;
  3182. nv->node_name[4] = 0x8b;
  3183. nv->node_name[5] = 0x1c;
  3184. nv->node_name[6] = 0x55;
  3185. nv->node_name[7] = 0x86;
  3186. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3187. nv->login_retry_count = __constant_cpu_to_le16(8);
  3188. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3189. nv->login_timeout = __constant_cpu_to_le16(0);
  3190. nv->firmware_options_1 =
  3191. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3192. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3193. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3194. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3195. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3196. nv->efi_parameters = __constant_cpu_to_le32(0);
  3197. nv->reset_delay = 5;
  3198. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3199. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3200. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3201. rval = 1;
  3202. }
  3203. /* Reset Initialization control block */
  3204. memset(icb, 0, ha->init_cb_size);
  3205. /* Copy 1st segment. */
  3206. dptr1 = (uint8_t *)icb;
  3207. dptr2 = (uint8_t *)&nv->version;
  3208. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3209. while (cnt--)
  3210. *dptr1++ = *dptr2++;
  3211. icb->login_retry_count = nv->login_retry_count;
  3212. icb->link_down_on_nos = nv->link_down_on_nos;
  3213. /* Copy 2nd segment. */
  3214. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3215. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3216. cnt = (uint8_t *)&icb->reserved_3 -
  3217. (uint8_t *)&icb->interrupt_delay_timer;
  3218. while (cnt--)
  3219. *dptr1++ = *dptr2++;
  3220. /*
  3221. * Setup driver NVRAM options.
  3222. */
  3223. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3224. "QLA2462");
  3225. /* Use alternate WWN? */
  3226. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3227. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3228. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3229. }
  3230. /* Prepare nodename */
  3231. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3232. /*
  3233. * Firmware will apply the following mask if the nodename was
  3234. * not provided.
  3235. */
  3236. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3237. icb->node_name[0] &= 0xF0;
  3238. }
  3239. /* Set host adapter parameters. */
  3240. ha->flags.disable_risc_code_load = 0;
  3241. ha->flags.enable_lip_reset = 0;
  3242. ha->flags.enable_lip_full_login =
  3243. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3244. ha->flags.enable_target_reset =
  3245. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3246. ha->flags.enable_led_scheme = 0;
  3247. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3248. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3249. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3250. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3251. sizeof(ha->fw_seriallink_options24));
  3252. /* save HBA serial number */
  3253. ha->serial0 = icb->port_name[5];
  3254. ha->serial1 = icb->port_name[6];
  3255. ha->serial2 = icb->port_name[7];
  3256. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3257. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3258. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3259. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3260. /* Set minimum login_timeout to 4 seconds. */
  3261. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3262. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3263. if (le16_to_cpu(nv->login_timeout) < 4)
  3264. nv->login_timeout = __constant_cpu_to_le16(4);
  3265. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3266. icb->login_timeout = nv->login_timeout;
  3267. /* Set minimum RATOV to 100 tenths of a second. */
  3268. ha->r_a_tov = 100;
  3269. ha->loop_reset_delay = nv->reset_delay;
  3270. /* Link Down Timeout = 0:
  3271. *
  3272. * When Port Down timer expires we will start returning
  3273. * I/O's to OS with "DID_NO_CONNECT".
  3274. *
  3275. * Link Down Timeout != 0:
  3276. *
  3277. * The driver waits for the link to come up after link down
  3278. * before returning I/Os to OS with "DID_NO_CONNECT".
  3279. */
  3280. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3281. ha->loop_down_abort_time =
  3282. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3283. } else {
  3284. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3285. ha->loop_down_abort_time =
  3286. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3287. }
  3288. /* Need enough time to try and get the port back. */
  3289. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3290. if (qlport_down_retry)
  3291. ha->port_down_retry_count = qlport_down_retry;
  3292. /* Set login_retry_count */
  3293. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3294. if (ha->port_down_retry_count ==
  3295. le16_to_cpu(nv->port_down_retry_count) &&
  3296. ha->port_down_retry_count > 3)
  3297. ha->login_retry_count = ha->port_down_retry_count;
  3298. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3299. ha->login_retry_count = ha->port_down_retry_count;
  3300. if (ql2xloginretrycount)
  3301. ha->login_retry_count = ql2xloginretrycount;
  3302. /* Enable ZIO. */
  3303. if (!vha->flags.init_done) {
  3304. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3305. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3306. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3307. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3308. }
  3309. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3310. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3311. vha->flags.process_response_queue = 0;
  3312. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3313. ha->zio_mode = QLA_ZIO_MODE_6;
  3314. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3315. "(%d us).\n", vha->host_no, ha->zio_mode,
  3316. ha->zio_timer * 100));
  3317. qla_printk(KERN_INFO, ha,
  3318. "ZIO mode %d enabled; timer delay (%d us).\n",
  3319. ha->zio_mode, ha->zio_timer * 100);
  3320. icb->firmware_options_2 |= cpu_to_le32(
  3321. (uint32_t)ha->zio_mode);
  3322. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3323. vha->flags.process_response_queue = 1;
  3324. }
  3325. if (rval) {
  3326. DEBUG2_3(printk(KERN_WARNING
  3327. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3328. }
  3329. return (rval);
  3330. }
  3331. static int
  3332. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3333. {
  3334. int rval = QLA_SUCCESS;
  3335. int segments, fragment;
  3336. uint32_t faddr;
  3337. uint32_t *dcode, dlen;
  3338. uint32_t risc_addr;
  3339. uint32_t risc_size;
  3340. uint32_t i;
  3341. struct qla_hw_data *ha = vha->hw;
  3342. struct req_que *req = ha->req_q_map[0];
  3343. qla_printk(KERN_INFO, ha,
  3344. "FW: Loading from flash (%x)...\n", ha->flt_region_fw);
  3345. rval = QLA_SUCCESS;
  3346. segments = FA_RISC_CODE_SEGMENTS;
  3347. faddr = ha->flt_region_fw;
  3348. dcode = (uint32_t *)req->ring;
  3349. *srisc_addr = 0;
  3350. /* Validate firmware image by checking version. */
  3351. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3352. for (i = 0; i < 4; i++)
  3353. dcode[i] = be32_to_cpu(dcode[i]);
  3354. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3355. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3356. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3357. dcode[3] == 0)) {
  3358. qla_printk(KERN_WARNING, ha,
  3359. "Unable to verify integrity of flash firmware image!\n");
  3360. qla_printk(KERN_WARNING, ha,
  3361. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3362. dcode[1], dcode[2], dcode[3]);
  3363. return QLA_FUNCTION_FAILED;
  3364. }
  3365. while (segments && rval == QLA_SUCCESS) {
  3366. /* Read segment's load information. */
  3367. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3368. risc_addr = be32_to_cpu(dcode[2]);
  3369. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3370. risc_size = be32_to_cpu(dcode[3]);
  3371. fragment = 0;
  3372. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3373. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3374. if (dlen > risc_size)
  3375. dlen = risc_size;
  3376. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3377. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3378. vha->host_no, risc_addr, dlen, faddr));
  3379. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3380. for (i = 0; i < dlen; i++)
  3381. dcode[i] = swab32(dcode[i]);
  3382. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3383. dlen);
  3384. if (rval) {
  3385. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3386. "segment %d of firmware\n", vha->host_no,
  3387. fragment));
  3388. qla_printk(KERN_WARNING, ha,
  3389. "[ERROR] Failed to load segment %d of "
  3390. "firmware\n", fragment);
  3391. break;
  3392. }
  3393. faddr += dlen;
  3394. risc_addr += dlen;
  3395. risc_size -= dlen;
  3396. fragment++;
  3397. }
  3398. /* Next segment. */
  3399. segments--;
  3400. }
  3401. return rval;
  3402. }
  3403. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3404. int
  3405. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3406. {
  3407. int rval;
  3408. int i, fragment;
  3409. uint16_t *wcode, *fwcode;
  3410. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3411. struct fw_blob *blob;
  3412. struct qla_hw_data *ha = vha->hw;
  3413. struct req_que *req = ha->req_q_map[0];
  3414. /* Load firmware blob. */
  3415. blob = qla2x00_request_firmware(vha);
  3416. if (!blob) {
  3417. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3418. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3419. "from: " QLA_FW_URL ".\n");
  3420. return QLA_FUNCTION_FAILED;
  3421. }
  3422. rval = QLA_SUCCESS;
  3423. wcode = (uint16_t *)req->ring;
  3424. *srisc_addr = 0;
  3425. fwcode = (uint16_t *)blob->fw->data;
  3426. fwclen = 0;
  3427. /* Validate firmware image by checking version. */
  3428. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3429. qla_printk(KERN_WARNING, ha,
  3430. "Unable to verify integrity of firmware image (%Zd)!\n",
  3431. blob->fw->size);
  3432. goto fail_fw_integrity;
  3433. }
  3434. for (i = 0; i < 4; i++)
  3435. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3436. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3437. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3438. wcode[2] == 0 && wcode[3] == 0)) {
  3439. qla_printk(KERN_WARNING, ha,
  3440. "Unable to verify integrity of firmware image!\n");
  3441. qla_printk(KERN_WARNING, ha,
  3442. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3443. wcode[1], wcode[2], wcode[3]);
  3444. goto fail_fw_integrity;
  3445. }
  3446. seg = blob->segs;
  3447. while (*seg && rval == QLA_SUCCESS) {
  3448. risc_addr = *seg;
  3449. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3450. risc_size = be16_to_cpu(fwcode[3]);
  3451. /* Validate firmware image size. */
  3452. fwclen += risc_size * sizeof(uint16_t);
  3453. if (blob->fw->size < fwclen) {
  3454. qla_printk(KERN_WARNING, ha,
  3455. "Unable to verify integrity of firmware image "
  3456. "(%Zd)!\n", blob->fw->size);
  3457. goto fail_fw_integrity;
  3458. }
  3459. fragment = 0;
  3460. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3461. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3462. if (wlen > risc_size)
  3463. wlen = risc_size;
  3464. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3465. "addr %x, number of words 0x%x.\n", vha->host_no,
  3466. risc_addr, wlen));
  3467. for (i = 0; i < wlen; i++)
  3468. wcode[i] = swab16(fwcode[i]);
  3469. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3470. wlen);
  3471. if (rval) {
  3472. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3473. "segment %d of firmware\n", vha->host_no,
  3474. fragment));
  3475. qla_printk(KERN_WARNING, ha,
  3476. "[ERROR] Failed to load segment %d of "
  3477. "firmware\n", fragment);
  3478. break;
  3479. }
  3480. fwcode += wlen;
  3481. risc_addr += wlen;
  3482. risc_size -= wlen;
  3483. fragment++;
  3484. }
  3485. /* Next segment. */
  3486. seg++;
  3487. }
  3488. return rval;
  3489. fail_fw_integrity:
  3490. return QLA_FUNCTION_FAILED;
  3491. }
  3492. static int
  3493. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3494. {
  3495. int rval;
  3496. int segments, fragment;
  3497. uint32_t *dcode, dlen;
  3498. uint32_t risc_addr;
  3499. uint32_t risc_size;
  3500. uint32_t i;
  3501. struct fw_blob *blob;
  3502. uint32_t *fwcode, fwclen;
  3503. struct qla_hw_data *ha = vha->hw;
  3504. struct req_que *req = ha->req_q_map[0];
  3505. /* Load firmware blob. */
  3506. blob = qla2x00_request_firmware(vha);
  3507. if (!blob) {
  3508. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3509. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3510. "from: " QLA_FW_URL ".\n");
  3511. return QLA_FUNCTION_FAILED;
  3512. }
  3513. qla_printk(KERN_INFO, ha,
  3514. "FW: Loading via request-firmware...\n");
  3515. rval = QLA_SUCCESS;
  3516. segments = FA_RISC_CODE_SEGMENTS;
  3517. dcode = (uint32_t *)req->ring;
  3518. *srisc_addr = 0;
  3519. fwcode = (uint32_t *)blob->fw->data;
  3520. fwclen = 0;
  3521. /* Validate firmware image by checking version. */
  3522. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3523. qla_printk(KERN_WARNING, ha,
  3524. "Unable to verify integrity of firmware image (%Zd)!\n",
  3525. blob->fw->size);
  3526. goto fail_fw_integrity;
  3527. }
  3528. for (i = 0; i < 4; i++)
  3529. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3530. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3531. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3532. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3533. dcode[3] == 0)) {
  3534. qla_printk(KERN_WARNING, ha,
  3535. "Unable to verify integrity of firmware image!\n");
  3536. qla_printk(KERN_WARNING, ha,
  3537. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3538. dcode[1], dcode[2], dcode[3]);
  3539. goto fail_fw_integrity;
  3540. }
  3541. while (segments && rval == QLA_SUCCESS) {
  3542. risc_addr = be32_to_cpu(fwcode[2]);
  3543. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3544. risc_size = be32_to_cpu(fwcode[3]);
  3545. /* Validate firmware image size. */
  3546. fwclen += risc_size * sizeof(uint32_t);
  3547. if (blob->fw->size < fwclen) {
  3548. qla_printk(KERN_WARNING, ha,
  3549. "Unable to verify integrity of firmware image "
  3550. "(%Zd)!\n", blob->fw->size);
  3551. goto fail_fw_integrity;
  3552. }
  3553. fragment = 0;
  3554. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3555. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3556. if (dlen > risc_size)
  3557. dlen = risc_size;
  3558. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3559. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3560. risc_addr, dlen));
  3561. for (i = 0; i < dlen; i++)
  3562. dcode[i] = swab32(fwcode[i]);
  3563. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3564. dlen);
  3565. if (rval) {
  3566. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3567. "segment %d of firmware\n", vha->host_no,
  3568. fragment));
  3569. qla_printk(KERN_WARNING, ha,
  3570. "[ERROR] Failed to load segment %d of "
  3571. "firmware\n", fragment);
  3572. break;
  3573. }
  3574. fwcode += dlen;
  3575. risc_addr += dlen;
  3576. risc_size -= dlen;
  3577. fragment++;
  3578. }
  3579. /* Next segment. */
  3580. segments--;
  3581. }
  3582. return rval;
  3583. fail_fw_integrity:
  3584. return QLA_FUNCTION_FAILED;
  3585. }
  3586. int
  3587. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3588. {
  3589. int rval;
  3590. /*
  3591. * FW Load priority:
  3592. * 1) Firmware via request-firmware interface (.bin file).
  3593. * 2) Firmware residing in flash.
  3594. */
  3595. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3596. if (rval == QLA_SUCCESS)
  3597. return rval;
  3598. return qla24xx_load_risc_flash(vha, srisc_addr);
  3599. }
  3600. int
  3601. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3602. {
  3603. int rval;
  3604. /*
  3605. * FW Load priority:
  3606. * 1) Firmware residing in flash.
  3607. * 2) Firmware via request-firmware interface (.bin file).
  3608. */
  3609. rval = qla24xx_load_risc_flash(vha, srisc_addr);
  3610. if (rval == QLA_SUCCESS)
  3611. return rval;
  3612. return qla24xx_load_risc_blob(vha, srisc_addr);
  3613. }
  3614. void
  3615. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3616. {
  3617. int ret, retries;
  3618. struct qla_hw_data *ha = vha->hw;
  3619. if (!IS_FWI2_CAPABLE(ha))
  3620. return;
  3621. if (!ha->fw_major_version)
  3622. return;
  3623. ret = qla2x00_stop_firmware(vha);
  3624. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3625. retries ; retries--) {
  3626. ha->isp_ops->reset_chip(vha);
  3627. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3628. continue;
  3629. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3630. continue;
  3631. qla_printk(KERN_INFO, ha,
  3632. "Attempting retry of stop-firmware command...\n");
  3633. ret = qla2x00_stop_firmware(vha);
  3634. }
  3635. }
  3636. int
  3637. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3638. {
  3639. int rval = QLA_SUCCESS;
  3640. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3641. struct qla_hw_data *ha = vha->hw;
  3642. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3643. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  3644. struct rsp_que *rsp = req->rsp;
  3645. if (!vha->vp_idx)
  3646. return -EINVAL;
  3647. rval = qla2x00_fw_ready(base_vha);
  3648. if (rval == QLA_SUCCESS) {
  3649. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3650. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3651. }
  3652. vha->flags.management_server_logged_in = 0;
  3653. /* Login to SNS first */
  3654. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3655. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3656. DEBUG15(qla_printk(KERN_INFO, ha,
  3657. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3658. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3659. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3660. return (QLA_FUNCTION_FAILED);
  3661. }
  3662. atomic_set(&vha->loop_down_timer, 0);
  3663. atomic_set(&vha->loop_state, LOOP_UP);
  3664. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3665. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3666. rval = qla2x00_loop_resync(base_vha);
  3667. return rval;
  3668. }
  3669. /* 84XX Support **************************************************************/
  3670. static LIST_HEAD(qla_cs84xx_list);
  3671. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3672. static struct qla_chip_state_84xx *
  3673. qla84xx_get_chip(struct scsi_qla_host *vha)
  3674. {
  3675. struct qla_chip_state_84xx *cs84xx;
  3676. struct qla_hw_data *ha = vha->hw;
  3677. mutex_lock(&qla_cs84xx_mutex);
  3678. /* Find any shared 84xx chip. */
  3679. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3680. if (cs84xx->bus == ha->pdev->bus) {
  3681. kref_get(&cs84xx->kref);
  3682. goto done;
  3683. }
  3684. }
  3685. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3686. if (!cs84xx)
  3687. goto done;
  3688. kref_init(&cs84xx->kref);
  3689. spin_lock_init(&cs84xx->access_lock);
  3690. mutex_init(&cs84xx->fw_update_mutex);
  3691. cs84xx->bus = ha->pdev->bus;
  3692. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3693. done:
  3694. mutex_unlock(&qla_cs84xx_mutex);
  3695. return cs84xx;
  3696. }
  3697. static void
  3698. __qla84xx_chip_release(struct kref *kref)
  3699. {
  3700. struct qla_chip_state_84xx *cs84xx =
  3701. container_of(kref, struct qla_chip_state_84xx, kref);
  3702. mutex_lock(&qla_cs84xx_mutex);
  3703. list_del(&cs84xx->list);
  3704. mutex_unlock(&qla_cs84xx_mutex);
  3705. kfree(cs84xx);
  3706. }
  3707. void
  3708. qla84xx_put_chip(struct scsi_qla_host *vha)
  3709. {
  3710. struct qla_hw_data *ha = vha->hw;
  3711. if (ha->cs84xx)
  3712. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3713. }
  3714. static int
  3715. qla84xx_init_chip(scsi_qla_host_t *vha)
  3716. {
  3717. int rval;
  3718. uint16_t status[2];
  3719. struct qla_hw_data *ha = vha->hw;
  3720. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3721. rval = qla84xx_verify_chip(vha, status);
  3722. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3723. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3724. QLA_SUCCESS;
  3725. }
  3726. /* 81XX Support **************************************************************/
  3727. int
  3728. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3729. {
  3730. int rval;
  3731. struct init_cb_81xx *icb;
  3732. struct nvram_81xx *nv;
  3733. uint32_t *dptr;
  3734. uint8_t *dptr1, *dptr2;
  3735. uint32_t chksum;
  3736. uint16_t cnt;
  3737. struct qla_hw_data *ha = vha->hw;
  3738. rval = QLA_SUCCESS;
  3739. icb = (struct init_cb_81xx *)ha->init_cb;
  3740. nv = ha->nvram;
  3741. /* Determine NVRAM starting address. */
  3742. ha->nvram_size = sizeof(struct nvram_81xx);
  3743. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3744. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3745. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3746. if (PCI_FUNC(ha->pdev->devfn) & 1) {
  3747. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3748. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3749. }
  3750. /* Get VPD data into cache */
  3751. ha->vpd = ha->nvram + VPD_OFFSET;
  3752. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3753. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3754. /* Get NVRAM data into cache and calculate checksum. */
  3755. dptr = (uint32_t *)nv;
  3756. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3757. ha->nvram_size);
  3758. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3759. chksum += le32_to_cpu(*dptr++);
  3760. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3761. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3762. /* Bad NVRAM data, set defaults parameters. */
  3763. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3764. || nv->id[3] != ' ' ||
  3765. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3766. /* Reset NVRAM data. */
  3767. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3768. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3769. le16_to_cpu(nv->nvram_version));
  3770. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3771. "invalid -- WWPN) defaults.\n");
  3772. /*
  3773. * Set default initialization control block.
  3774. */
  3775. memset(nv, 0, ha->nvram_size);
  3776. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3777. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3778. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3779. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3780. nv->exchange_count = __constant_cpu_to_le16(0);
  3781. nv->port_name[0] = 0x21;
  3782. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3783. nv->port_name[2] = 0x00;
  3784. nv->port_name[3] = 0xe0;
  3785. nv->port_name[4] = 0x8b;
  3786. nv->port_name[5] = 0x1c;
  3787. nv->port_name[6] = 0x55;
  3788. nv->port_name[7] = 0x86;
  3789. nv->node_name[0] = 0x20;
  3790. nv->node_name[1] = 0x00;
  3791. nv->node_name[2] = 0x00;
  3792. nv->node_name[3] = 0xe0;
  3793. nv->node_name[4] = 0x8b;
  3794. nv->node_name[5] = 0x1c;
  3795. nv->node_name[6] = 0x55;
  3796. nv->node_name[7] = 0x86;
  3797. nv->login_retry_count = __constant_cpu_to_le16(8);
  3798. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3799. nv->login_timeout = __constant_cpu_to_le16(0);
  3800. nv->firmware_options_1 =
  3801. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3802. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3803. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3804. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3805. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3806. nv->efi_parameters = __constant_cpu_to_le32(0);
  3807. nv->reset_delay = 5;
  3808. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3809. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3810. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3811. nv->enode_mac[0] = 0x01;
  3812. nv->enode_mac[1] = 0x02;
  3813. nv->enode_mac[2] = 0x03;
  3814. nv->enode_mac[3] = 0x04;
  3815. nv->enode_mac[4] = 0x05;
  3816. nv->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3817. rval = 1;
  3818. }
  3819. /* Reset Initialization control block */
  3820. memset(icb, 0, sizeof(struct init_cb_81xx));
  3821. /* Copy 1st segment. */
  3822. dptr1 = (uint8_t *)icb;
  3823. dptr2 = (uint8_t *)&nv->version;
  3824. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3825. while (cnt--)
  3826. *dptr1++ = *dptr2++;
  3827. icb->login_retry_count = nv->login_retry_count;
  3828. /* Copy 2nd segment. */
  3829. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3830. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3831. cnt = (uint8_t *)&icb->reserved_5 -
  3832. (uint8_t *)&icb->interrupt_delay_timer;
  3833. while (cnt--)
  3834. *dptr1++ = *dptr2++;
  3835. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3836. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3837. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3838. icb->enode_mac[0] = 0x01;
  3839. icb->enode_mac[1] = 0x02;
  3840. icb->enode_mac[2] = 0x03;
  3841. icb->enode_mac[3] = 0x04;
  3842. icb->enode_mac[4] = 0x05;
  3843. icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3844. }
  3845. /* Use extended-initialization control block. */
  3846. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3847. /*
  3848. * Setup driver NVRAM options.
  3849. */
  3850. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3851. "QLE81XX");
  3852. /* Use alternate WWN? */
  3853. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3854. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3855. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3856. }
  3857. /* Prepare nodename */
  3858. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3859. /*
  3860. * Firmware will apply the following mask if the nodename was
  3861. * not provided.
  3862. */
  3863. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3864. icb->node_name[0] &= 0xF0;
  3865. }
  3866. /* Set host adapter parameters. */
  3867. ha->flags.disable_risc_code_load = 0;
  3868. ha->flags.enable_lip_reset = 0;
  3869. ha->flags.enable_lip_full_login =
  3870. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3871. ha->flags.enable_target_reset =
  3872. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3873. ha->flags.enable_led_scheme = 0;
  3874. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3875. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3876. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3877. /* save HBA serial number */
  3878. ha->serial0 = icb->port_name[5];
  3879. ha->serial1 = icb->port_name[6];
  3880. ha->serial2 = icb->port_name[7];
  3881. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3882. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3883. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3884. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3885. /* Set minimum login_timeout to 4 seconds. */
  3886. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3887. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3888. if (le16_to_cpu(nv->login_timeout) < 4)
  3889. nv->login_timeout = __constant_cpu_to_le16(4);
  3890. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3891. icb->login_timeout = nv->login_timeout;
  3892. /* Set minimum RATOV to 100 tenths of a second. */
  3893. ha->r_a_tov = 100;
  3894. ha->loop_reset_delay = nv->reset_delay;
  3895. /* Link Down Timeout = 0:
  3896. *
  3897. * When Port Down timer expires we will start returning
  3898. * I/O's to OS with "DID_NO_CONNECT".
  3899. *
  3900. * Link Down Timeout != 0:
  3901. *
  3902. * The driver waits for the link to come up after link down
  3903. * before returning I/Os to OS with "DID_NO_CONNECT".
  3904. */
  3905. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3906. ha->loop_down_abort_time =
  3907. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3908. } else {
  3909. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3910. ha->loop_down_abort_time =
  3911. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3912. }
  3913. /* Need enough time to try and get the port back. */
  3914. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3915. if (qlport_down_retry)
  3916. ha->port_down_retry_count = qlport_down_retry;
  3917. /* Set login_retry_count */
  3918. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3919. if (ha->port_down_retry_count ==
  3920. le16_to_cpu(nv->port_down_retry_count) &&
  3921. ha->port_down_retry_count > 3)
  3922. ha->login_retry_count = ha->port_down_retry_count;
  3923. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3924. ha->login_retry_count = ha->port_down_retry_count;
  3925. if (ql2xloginretrycount)
  3926. ha->login_retry_count = ql2xloginretrycount;
  3927. /* Enable ZIO. */
  3928. if (!vha->flags.init_done) {
  3929. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3930. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3931. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3932. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3933. }
  3934. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3935. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3936. vha->flags.process_response_queue = 0;
  3937. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3938. ha->zio_mode = QLA_ZIO_MODE_6;
  3939. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3940. "(%d us).\n", vha->host_no, ha->zio_mode,
  3941. ha->zio_timer * 100));
  3942. qla_printk(KERN_INFO, ha,
  3943. "ZIO mode %d enabled; timer delay (%d us).\n",
  3944. ha->zio_mode, ha->zio_timer * 100);
  3945. icb->firmware_options_2 |= cpu_to_le32(
  3946. (uint32_t)ha->zio_mode);
  3947. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3948. vha->flags.process_response_queue = 1;
  3949. }
  3950. if (rval) {
  3951. DEBUG2_3(printk(KERN_WARNING
  3952. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3953. }
  3954. return (rval);
  3955. }
  3956. void
  3957. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3958. {
  3959. }