pontis.c 22 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Pontis MS300
  5. *
  6. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <asm/io.h>
  24. #include <linux/delay.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/init.h>
  27. #include <linux/slab.h>
  28. #include <linux/mutex.h>
  29. #include <sound/core.h>
  30. #include <sound/info.h>
  31. #include <sound/tlv.h>
  32. #include "ice1712.h"
  33. #include "envy24ht.h"
  34. #include "pontis.h"
  35. /* I2C addresses */
  36. #define WM_DEV 0x34
  37. #define CS_DEV 0x20
  38. /* WM8776 registers */
  39. #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
  40. #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
  41. #define WM_HP_MASTER 0x02 /* headphone master (both channels), override LLR */
  42. #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
  43. #define WM_DAC_ATTEN_R 0x04
  44. #define WM_DAC_MASTER 0x05
  45. #define WM_PHASE_SWAP 0x06 /* DAC phase swap */
  46. #define WM_DAC_CTRL1 0x07
  47. #define WM_DAC_MUTE 0x08
  48. #define WM_DAC_CTRL2 0x09
  49. #define WM_DAC_INT 0x0a
  50. #define WM_ADC_INT 0x0b
  51. #define WM_MASTER_CTRL 0x0c
  52. #define WM_POWERDOWN 0x0d
  53. #define WM_ADC_ATTEN_L 0x0e
  54. #define WM_ADC_ATTEN_R 0x0f
  55. #define WM_ALC_CTRL1 0x10
  56. #define WM_ALC_CTRL2 0x11
  57. #define WM_ALC_CTRL3 0x12
  58. #define WM_NOISE_GATE 0x13
  59. #define WM_LIMITER 0x14
  60. #define WM_ADC_MUX 0x15
  61. #define WM_OUT_MUX 0x16
  62. #define WM_RESET 0x17
  63. /*
  64. * GPIO
  65. */
  66. #define PONTIS_CS_CS (1<<4) /* CS */
  67. #define PONTIS_CS_CLK (1<<5) /* CLK */
  68. #define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */
  69. #define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */
  70. /*
  71. * get the current register value of WM codec
  72. */
  73. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  74. {
  75. reg <<= 1;
  76. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  77. ice->akm[0].images[reg + 1];
  78. }
  79. /*
  80. * set the register value of WM codec and remember it
  81. */
  82. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  83. {
  84. unsigned short cval;
  85. cval = (reg << 9) | val;
  86. snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
  87. }
  88. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  89. {
  90. wm_put_nocache(ice, reg, val);
  91. reg <<= 1;
  92. ice->akm[0].images[reg] = val >> 8;
  93. ice->akm[0].images[reg + 1] = val;
  94. }
  95. /*
  96. * DAC volume attenuation mixer control (-64dB to 0dB)
  97. */
  98. #define DAC_0dB 0xff
  99. #define DAC_RES 128
  100. #define DAC_MIN (DAC_0dB - DAC_RES)
  101. static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  102. {
  103. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  104. uinfo->count = 2;
  105. uinfo->value.integer.min = 0; /* mute */
  106. uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
  107. return 0;
  108. }
  109. static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  110. {
  111. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  112. unsigned short val;
  113. int i;
  114. mutex_lock(&ice->gpio_mutex);
  115. for (i = 0; i < 2; i++) {
  116. val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
  117. val = val > DAC_MIN ? (val - DAC_MIN) : 0;
  118. ucontrol->value.integer.value[i] = val;
  119. }
  120. mutex_unlock(&ice->gpio_mutex);
  121. return 0;
  122. }
  123. static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  124. {
  125. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  126. unsigned short oval, nval;
  127. int i, idx, change = 0;
  128. mutex_lock(&ice->gpio_mutex);
  129. for (i = 0; i < 2; i++) {
  130. nval = ucontrol->value.integer.value[i];
  131. nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
  132. idx = WM_DAC_ATTEN_L + i;
  133. oval = wm_get(ice, idx) & 0xff;
  134. if (oval != nval) {
  135. wm_put(ice, idx, nval);
  136. wm_put_nocache(ice, idx, nval | 0x100);
  137. change = 1;
  138. }
  139. }
  140. mutex_unlock(&ice->gpio_mutex);
  141. return change;
  142. }
  143. /*
  144. * ADC gain mixer control (-64dB to 0dB)
  145. */
  146. #define ADC_0dB 0xcf
  147. #define ADC_RES 128
  148. #define ADC_MIN (ADC_0dB - ADC_RES)
  149. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  150. {
  151. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  152. uinfo->count = 2;
  153. uinfo->value.integer.min = 0; /* mute (-64dB) */
  154. uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
  155. return 0;
  156. }
  157. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  158. {
  159. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  160. unsigned short val;
  161. int i;
  162. mutex_lock(&ice->gpio_mutex);
  163. for (i = 0; i < 2; i++) {
  164. val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
  165. val = val > ADC_MIN ? (val - ADC_MIN) : 0;
  166. ucontrol->value.integer.value[i] = val;
  167. }
  168. mutex_unlock(&ice->gpio_mutex);
  169. return 0;
  170. }
  171. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  172. {
  173. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  174. unsigned short ovol, nvol;
  175. int i, idx, change = 0;
  176. mutex_lock(&ice->gpio_mutex);
  177. for (i = 0; i < 2; i++) {
  178. nvol = ucontrol->value.integer.value[i];
  179. nvol = nvol ? (nvol + ADC_MIN) : 0;
  180. idx = WM_ADC_ATTEN_L + i;
  181. ovol = wm_get(ice, idx) & 0xff;
  182. if (ovol != nvol) {
  183. wm_put(ice, idx, nvol);
  184. change = 1;
  185. }
  186. }
  187. mutex_unlock(&ice->gpio_mutex);
  188. return change;
  189. }
  190. /*
  191. * ADC input mux mixer control
  192. */
  193. #define wm_adc_mux_info snd_ctl_boolean_mono_info
  194. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  195. {
  196. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  197. int bit = kcontrol->private_value;
  198. mutex_lock(&ice->gpio_mutex);
  199. ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
  200. mutex_unlock(&ice->gpio_mutex);
  201. return 0;
  202. }
  203. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  204. {
  205. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  206. int bit = kcontrol->private_value;
  207. unsigned short oval, nval;
  208. int change;
  209. mutex_lock(&ice->gpio_mutex);
  210. nval = oval = wm_get(ice, WM_ADC_MUX);
  211. if (ucontrol->value.integer.value[0])
  212. nval |= (1 << bit);
  213. else
  214. nval &= ~(1 << bit);
  215. change = nval != oval;
  216. if (change) {
  217. wm_put(ice, WM_ADC_MUX, nval);
  218. }
  219. mutex_unlock(&ice->gpio_mutex);
  220. return change;
  221. }
  222. /*
  223. * Analog bypass (In -> Out)
  224. */
  225. #define wm_bypass_info snd_ctl_boolean_mono_info
  226. static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  227. {
  228. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  229. mutex_lock(&ice->gpio_mutex);
  230. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
  231. mutex_unlock(&ice->gpio_mutex);
  232. return 0;
  233. }
  234. static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  235. {
  236. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  237. unsigned short val, oval;
  238. int change = 0;
  239. mutex_lock(&ice->gpio_mutex);
  240. val = oval = wm_get(ice, WM_OUT_MUX);
  241. if (ucontrol->value.integer.value[0])
  242. val |= 0x04;
  243. else
  244. val &= ~0x04;
  245. if (val != oval) {
  246. wm_put(ice, WM_OUT_MUX, val);
  247. change = 1;
  248. }
  249. mutex_unlock(&ice->gpio_mutex);
  250. return change;
  251. }
  252. /*
  253. * Left/Right swap
  254. */
  255. #define wm_chswap_info snd_ctl_boolean_mono_info
  256. static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  257. {
  258. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  259. mutex_lock(&ice->gpio_mutex);
  260. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
  261. mutex_unlock(&ice->gpio_mutex);
  262. return 0;
  263. }
  264. static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  265. {
  266. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  267. unsigned short val, oval;
  268. int change = 0;
  269. mutex_lock(&ice->gpio_mutex);
  270. oval = wm_get(ice, WM_DAC_CTRL1);
  271. val = oval & 0x0f;
  272. if (ucontrol->value.integer.value[0])
  273. val |= 0x60;
  274. else
  275. val |= 0x90;
  276. if (val != oval) {
  277. wm_put(ice, WM_DAC_CTRL1, val);
  278. wm_put_nocache(ice, WM_DAC_CTRL1, val);
  279. change = 1;
  280. }
  281. mutex_unlock(&ice->gpio_mutex);
  282. return change;
  283. }
  284. /*
  285. * write data in the SPI mode
  286. */
  287. static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
  288. {
  289. unsigned int tmp = snd_ice1712_gpio_read(ice);
  290. if (val)
  291. tmp |= bit;
  292. else
  293. tmp &= ~bit;
  294. snd_ice1712_gpio_write(ice, tmp);
  295. }
  296. static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
  297. {
  298. int i;
  299. for (i = 0; i < 8; i++) {
  300. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  301. udelay(1);
  302. set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
  303. udelay(1);
  304. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  305. udelay(1);
  306. data <<= 1;
  307. }
  308. }
  309. static unsigned int spi_read_byte(struct snd_ice1712 *ice)
  310. {
  311. int i;
  312. unsigned int val = 0;
  313. for (i = 0; i < 8; i++) {
  314. val <<= 1;
  315. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  316. udelay(1);
  317. if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
  318. val |= 1;
  319. udelay(1);
  320. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  321. udelay(1);
  322. }
  323. return val;
  324. }
  325. static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
  326. {
  327. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  328. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  329. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  330. spi_send_byte(ice, dev & ~1); /* WRITE */
  331. spi_send_byte(ice, reg); /* MAP */
  332. spi_send_byte(ice, data); /* DATA */
  333. /* trigger */
  334. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  335. udelay(1);
  336. /* restore */
  337. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  338. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  339. }
  340. static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
  341. {
  342. unsigned int val;
  343. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  344. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  345. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  346. spi_send_byte(ice, dev & ~1); /* WRITE */
  347. spi_send_byte(ice, reg); /* MAP */
  348. /* trigger */
  349. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  350. udelay(1);
  351. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  352. spi_send_byte(ice, dev | 1); /* READ */
  353. val = spi_read_byte(ice);
  354. /* trigger */
  355. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  356. udelay(1);
  357. /* restore */
  358. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  359. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  360. return val;
  361. }
  362. /*
  363. * SPDIF input source
  364. */
  365. static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  366. {
  367. static const char * const texts[] = {
  368. "Coax", /* RXP0 */
  369. "Optical", /* RXP1 */
  370. "CD", /* RXP2 */
  371. };
  372. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  373. uinfo->count = 1;
  374. uinfo->value.enumerated.items = 3;
  375. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  376. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  377. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  378. return 0;
  379. }
  380. static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  381. {
  382. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  383. mutex_lock(&ice->gpio_mutex);
  384. ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
  385. mutex_unlock(&ice->gpio_mutex);
  386. return 0;
  387. }
  388. static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  389. {
  390. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  391. unsigned char val;
  392. int change = 0;
  393. mutex_lock(&ice->gpio_mutex);
  394. if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
  395. ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
  396. val = 0x80 | (ice->gpio.saved[0] << 3);
  397. spi_write(ice, CS_DEV, 0x04, val);
  398. change = 1;
  399. }
  400. mutex_unlock(&ice->gpio_mutex);
  401. return change;
  402. }
  403. /*
  404. * GPIO controls
  405. */
  406. static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  407. {
  408. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  409. uinfo->count = 1;
  410. uinfo->value.integer.min = 0;
  411. uinfo->value.integer.max = 0xffff; /* 16bit */
  412. return 0;
  413. }
  414. static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  415. {
  416. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  417. mutex_lock(&ice->gpio_mutex);
  418. /* 4-7 reserved */
  419. ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
  420. mutex_unlock(&ice->gpio_mutex);
  421. return 0;
  422. }
  423. static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  424. {
  425. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  426. unsigned int val;
  427. int changed;
  428. mutex_lock(&ice->gpio_mutex);
  429. /* 4-7 reserved */
  430. val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
  431. changed = val != ice->gpio.write_mask;
  432. ice->gpio.write_mask = val;
  433. mutex_unlock(&ice->gpio_mutex);
  434. return changed;
  435. }
  436. static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  437. {
  438. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  439. mutex_lock(&ice->gpio_mutex);
  440. /* 4-7 reserved */
  441. ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
  442. mutex_unlock(&ice->gpio_mutex);
  443. return 0;
  444. }
  445. static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  446. {
  447. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  448. unsigned int val;
  449. int changed;
  450. mutex_lock(&ice->gpio_mutex);
  451. /* 4-7 reserved */
  452. val = ucontrol->value.integer.value[0] & 0xff0f;
  453. changed = (val != ice->gpio.direction);
  454. ice->gpio.direction = val;
  455. mutex_unlock(&ice->gpio_mutex);
  456. return changed;
  457. }
  458. static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  459. {
  460. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  461. mutex_lock(&ice->gpio_mutex);
  462. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  463. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  464. ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
  465. mutex_unlock(&ice->gpio_mutex);
  466. return 0;
  467. }
  468. static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  469. {
  470. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  471. unsigned int val, nval;
  472. int changed = 0;
  473. mutex_lock(&ice->gpio_mutex);
  474. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  475. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  476. val = snd_ice1712_gpio_read(ice) & 0xffff;
  477. nval = ucontrol->value.integer.value[0] & 0xffff;
  478. if (val != nval) {
  479. snd_ice1712_gpio_write(ice, nval);
  480. changed = 1;
  481. }
  482. mutex_unlock(&ice->gpio_mutex);
  483. return changed;
  484. }
  485. static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1);
  486. /*
  487. * mixers
  488. */
  489. static struct snd_kcontrol_new pontis_controls[] __devinitdata = {
  490. {
  491. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  492. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  493. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  494. .name = "PCM Playback Volume",
  495. .info = wm_dac_vol_info,
  496. .get = wm_dac_vol_get,
  497. .put = wm_dac_vol_put,
  498. .tlv = { .p = db_scale_volume },
  499. },
  500. {
  501. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  502. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  503. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  504. .name = "Capture Volume",
  505. .info = wm_adc_vol_info,
  506. .get = wm_adc_vol_get,
  507. .put = wm_adc_vol_put,
  508. .tlv = { .p = db_scale_volume },
  509. },
  510. {
  511. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  512. .name = "CD Capture Switch",
  513. .info = wm_adc_mux_info,
  514. .get = wm_adc_mux_get,
  515. .put = wm_adc_mux_put,
  516. .private_value = 0,
  517. },
  518. {
  519. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  520. .name = "Line Capture Switch",
  521. .info = wm_adc_mux_info,
  522. .get = wm_adc_mux_get,
  523. .put = wm_adc_mux_put,
  524. .private_value = 1,
  525. },
  526. {
  527. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  528. .name = "Analog Bypass Switch",
  529. .info = wm_bypass_info,
  530. .get = wm_bypass_get,
  531. .put = wm_bypass_put,
  532. },
  533. {
  534. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  535. .name = "Swap Output Channels",
  536. .info = wm_chswap_info,
  537. .get = wm_chswap_get,
  538. .put = wm_chswap_put,
  539. },
  540. {
  541. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  542. .name = "IEC958 Input Source",
  543. .info = cs_source_info,
  544. .get = cs_source_get,
  545. .put = cs_source_put,
  546. },
  547. /* FIXME: which interface? */
  548. {
  549. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  550. .name = "GPIO Mask",
  551. .info = pontis_gpio_mask_info,
  552. .get = pontis_gpio_mask_get,
  553. .put = pontis_gpio_mask_put,
  554. },
  555. {
  556. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  557. .name = "GPIO Direction",
  558. .info = pontis_gpio_mask_info,
  559. .get = pontis_gpio_dir_get,
  560. .put = pontis_gpio_dir_put,
  561. },
  562. {
  563. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  564. .name = "GPIO Data",
  565. .info = pontis_gpio_mask_info,
  566. .get = pontis_gpio_data_get,
  567. .put = pontis_gpio_data_put,
  568. },
  569. };
  570. /*
  571. * WM codec registers
  572. */
  573. static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  574. {
  575. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  576. char line[64];
  577. unsigned int reg, val;
  578. mutex_lock(&ice->gpio_mutex);
  579. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  580. if (sscanf(line, "%x %x", &reg, &val) != 2)
  581. continue;
  582. if (reg <= 0x17 && val <= 0xffff)
  583. wm_put(ice, reg, val);
  584. }
  585. mutex_unlock(&ice->gpio_mutex);
  586. }
  587. static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  588. {
  589. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  590. int reg, val;
  591. mutex_lock(&ice->gpio_mutex);
  592. for (reg = 0; reg <= 0x17; reg++) {
  593. val = wm_get(ice, reg);
  594. snd_iprintf(buffer, "%02x = %04x\n", reg, val);
  595. }
  596. mutex_unlock(&ice->gpio_mutex);
  597. }
  598. static void wm_proc_init(struct snd_ice1712 *ice)
  599. {
  600. struct snd_info_entry *entry;
  601. if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
  602. snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
  603. entry->mode |= S_IWUSR;
  604. entry->c.text.write = wm_proc_regs_write;
  605. }
  606. }
  607. static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  608. {
  609. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  610. int reg, val;
  611. mutex_lock(&ice->gpio_mutex);
  612. for (reg = 0; reg <= 0x26; reg++) {
  613. val = spi_read(ice, CS_DEV, reg);
  614. snd_iprintf(buffer, "%02x = %02x\n", reg, val);
  615. }
  616. val = spi_read(ice, CS_DEV, 0x7f);
  617. snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
  618. mutex_unlock(&ice->gpio_mutex);
  619. }
  620. static void cs_proc_init(struct snd_ice1712 *ice)
  621. {
  622. struct snd_info_entry *entry;
  623. if (! snd_card_proc_new(ice->card, "cs_codec", &entry))
  624. snd_info_set_text_ops(entry, ice, cs_proc_regs_read);
  625. }
  626. static int __devinit pontis_add_controls(struct snd_ice1712 *ice)
  627. {
  628. unsigned int i;
  629. int err;
  630. for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
  631. err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
  632. if (err < 0)
  633. return err;
  634. }
  635. wm_proc_init(ice);
  636. cs_proc_init(ice);
  637. return 0;
  638. }
  639. /*
  640. * initialize the chip
  641. */
  642. static int __devinit pontis_init(struct snd_ice1712 *ice)
  643. {
  644. static const unsigned short wm_inits[] = {
  645. /* These come first to reduce init pop noise */
  646. WM_ADC_MUX, 0x00c0, /* ADC mute */
  647. WM_DAC_MUTE, 0x0001, /* DAC softmute */
  648. WM_DAC_CTRL1, 0x0000, /* DAC mute */
  649. WM_POWERDOWN, 0x0008, /* All power-up except HP */
  650. WM_RESET, 0x0000, /* reset */
  651. };
  652. static const unsigned short wm_inits2[] = {
  653. WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
  654. WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  655. WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  656. WM_DAC_CTRL1, 0x0090, /* DAC L/R */
  657. WM_OUT_MUX, 0x0001, /* OUT DAC */
  658. WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
  659. WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
  660. WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
  661. WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
  662. WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
  663. WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
  664. // WM_DAC_MASTER, 0x0100, /* DAC master muted */
  665. WM_PHASE_SWAP, 0x0000, /* phase normal */
  666. WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
  667. WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
  668. WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
  669. #if 0
  670. WM_ALC_CTRL1, 0x007b, /* */
  671. WM_ALC_CTRL2, 0x0000, /* */
  672. WM_ALC_CTRL3, 0x0000, /* */
  673. WM_NOISE_GATE, 0x0000, /* */
  674. #endif
  675. WM_DAC_MUTE, 0x0000, /* DAC unmute */
  676. WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
  677. };
  678. static const unsigned char cs_inits[] = {
  679. 0x04, 0x80, /* RUN, RXP0 */
  680. 0x05, 0x05, /* slave, 24bit */
  681. 0x01, 0x00,
  682. 0x02, 0x00,
  683. 0x03, 0x00,
  684. };
  685. unsigned int i;
  686. ice->vt1720 = 1;
  687. ice->num_total_dacs = 2;
  688. ice->num_total_adcs = 2;
  689. /* to remeber the register values */
  690. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  691. if (! ice->akm)
  692. return -ENOMEM;
  693. ice->akm_codecs = 1;
  694. /* HACK - use this as the SPDIF source.
  695. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  696. */
  697. ice->gpio.saved[0] = 0;
  698. /* initialize WM8776 codec */
  699. for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
  700. wm_put(ice, wm_inits[i], wm_inits[i+1]);
  701. schedule_timeout_uninterruptible(1);
  702. for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
  703. wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
  704. /* initialize CS8416 codec */
  705. /* assert PRST#; MT05 bit 7 */
  706. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  707. mdelay(5);
  708. /* deassert PRST# */
  709. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  710. for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
  711. spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
  712. return 0;
  713. }
  714. /*
  715. * Pontis boards don't provide the EEPROM data at all.
  716. * hence the driver needs to sets up it properly.
  717. */
  718. static unsigned char pontis_eeprom[] __devinitdata = {
  719. [ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */
  720. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  721. [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
  722. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  723. [ICE_EEP2_GPIO_DIR] = 0x07,
  724. [ICE_EEP2_GPIO_DIR1] = 0x00,
  725. [ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */
  726. [ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */
  727. [ICE_EEP2_GPIO_MASK1] = 0xff,
  728. [ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */
  729. [ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */
  730. [ICE_EEP2_GPIO_STATE1] = 0x00,
  731. [ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */
  732. };
  733. /* entry point */
  734. struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = {
  735. {
  736. .subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
  737. .name = "Pontis MS300",
  738. .model = "ms300",
  739. .chip_init = pontis_init,
  740. .build_controls = pontis_add_controls,
  741. .eeprom_size = sizeof(pontis_eeprom),
  742. .eeprom_data = pontis_eeprom,
  743. },
  744. { } /* terminator */
  745. };