aureon.c 62 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241
  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. *
  48. */
  49. #include <asm/io.h>
  50. #include <linux/delay.h>
  51. #include <linux/interrupt.h>
  52. #include <linux/init.h>
  53. #include <linux/slab.h>
  54. #include <linux/mutex.h>
  55. #include <sound/core.h>
  56. #include "ice1712.h"
  57. #include "envy24ht.h"
  58. #include "aureon.h"
  59. #include <sound/tlv.h>
  60. /* AC97 register cache for Aureon */
  61. struct aureon_spec {
  62. unsigned short stac9744[64];
  63. unsigned int cs8415_mux;
  64. unsigned short master[2];
  65. unsigned short vol[8];
  66. unsigned char pca9554_out;
  67. };
  68. /* WM8770 registers */
  69. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  70. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  71. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  72. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  73. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  74. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  75. #define WM_MUTE 0x14 /* mute controls */
  76. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  77. #define WM_INT_CTRL 0x16 /* interface control */
  78. #define WM_MASTER 0x17 /* master clock and mode */
  79. #define WM_POWERDOWN 0x18 /* power-down controls */
  80. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  81. #define WM_ADC_MUX 0x1b /* input MUX */
  82. #define WM_OUT_MUX1 0x1c /* output MUX */
  83. #define WM_OUT_MUX2 0x1e /* output MUX */
  84. #define WM_RESET 0x1f /* software reset */
  85. /* CS8415A registers */
  86. #define CS8415_CTRL1 0x01
  87. #define CS8415_CTRL2 0x02
  88. #define CS8415_QSUB 0x14
  89. #define CS8415_RATIO 0x1E
  90. #define CS8415_C_BUFFER 0x20
  91. #define CS8415_ID 0x7F
  92. /* PCA9554 registers */
  93. #define PCA9554_DEV 0x40 /* I2C device address */
  94. #define PCA9554_IN 0x00 /* input port */
  95. #define PCA9554_OUT 0x01 /* output port */
  96. #define PCA9554_INVERT 0x02 /* input invert */
  97. #define PCA9554_DIR 0x03 /* port directions */
  98. /*
  99. * Aureon Universe additional controls using PCA9554
  100. */
  101. /*
  102. * Send data to pca9554
  103. */
  104. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  105. unsigned char data)
  106. {
  107. unsigned int tmp;
  108. int i, j;
  109. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  110. unsigned char val = 0;
  111. tmp = snd_ice1712_gpio_read(ice);
  112. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  113. AUREON_WM_RW|AUREON_WM_CS|
  114. AUREON_CS8415_CS));
  115. tmp |= AUREON_WM_RW;
  116. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  117. tmp &= ~AUREON_SPI_MOSI;
  118. tmp &= ~AUREON_SPI_CLK;
  119. snd_ice1712_gpio_write(ice, tmp);
  120. udelay(50);
  121. /*
  122. * send i2c stop condition and start condition
  123. * to obtain sane state
  124. */
  125. tmp |= AUREON_SPI_CLK;
  126. snd_ice1712_gpio_write(ice, tmp);
  127. udelay(50);
  128. tmp |= AUREON_SPI_MOSI;
  129. snd_ice1712_gpio_write(ice, tmp);
  130. udelay(100);
  131. tmp &= ~AUREON_SPI_MOSI;
  132. snd_ice1712_gpio_write(ice, tmp);
  133. udelay(50);
  134. tmp &= ~AUREON_SPI_CLK;
  135. snd_ice1712_gpio_write(ice, tmp);
  136. udelay(100);
  137. /*
  138. * send device address, command and value,
  139. * skipping ack cycles inbetween
  140. */
  141. for (j = 0; j < 3; j++) {
  142. switch(j) {
  143. case 0: val = dev; break;
  144. case 1: val = reg; break;
  145. case 2: val = data; break;
  146. }
  147. for (i = 7; i >= 0; i--) {
  148. tmp &= ~AUREON_SPI_CLK;
  149. snd_ice1712_gpio_write(ice, tmp);
  150. udelay(40);
  151. if (val & (1 << i))
  152. tmp |= AUREON_SPI_MOSI;
  153. else
  154. tmp &= ~AUREON_SPI_MOSI;
  155. snd_ice1712_gpio_write(ice, tmp);
  156. udelay(40);
  157. tmp |= AUREON_SPI_CLK;
  158. snd_ice1712_gpio_write(ice, tmp);
  159. udelay(40);
  160. }
  161. tmp &= ~AUREON_SPI_CLK;
  162. snd_ice1712_gpio_write(ice, tmp);
  163. udelay(40);
  164. tmp |= AUREON_SPI_CLK;
  165. snd_ice1712_gpio_write(ice, tmp);
  166. udelay(40);
  167. tmp &= ~AUREON_SPI_CLK;
  168. snd_ice1712_gpio_write(ice, tmp);
  169. udelay(40);
  170. }
  171. tmp &= ~AUREON_SPI_CLK;
  172. snd_ice1712_gpio_write(ice, tmp);
  173. udelay(40);
  174. tmp &= ~AUREON_SPI_MOSI;
  175. snd_ice1712_gpio_write(ice, tmp);
  176. udelay(40);
  177. tmp |= AUREON_SPI_CLK;
  178. snd_ice1712_gpio_write(ice, tmp);
  179. udelay(50);
  180. tmp |= AUREON_SPI_MOSI;
  181. snd_ice1712_gpio_write(ice, tmp);
  182. udelay(100);
  183. }
  184. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  185. struct snd_ctl_elem_info *uinfo)
  186. {
  187. char *texts[3] = {"Internal Aux", "Wavetable", "Rear Line-In"};
  188. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  189. uinfo->count = 1;
  190. uinfo->value.enumerated.items = 3;
  191. if(uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  192. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  193. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  194. return 0;
  195. }
  196. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  197. struct snd_ctl_elem_value *ucontrol)
  198. {
  199. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  200. struct aureon_spec *spec = ice->spec;
  201. ucontrol->value.enumerated.item[0] = spec->pca9554_out;
  202. return 0;
  203. }
  204. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  205. struct snd_ctl_elem_value *ucontrol)
  206. {
  207. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  208. struct aureon_spec *spec = ice->spec;
  209. unsigned char oval, nval;
  210. int change;
  211. nval = ucontrol->value.enumerated.item[0];
  212. if (nval >= 3)
  213. return -EINVAL;
  214. snd_ice1712_save_gpio_status(ice);
  215. oval = spec->pca9554_out;
  216. if ((change = (oval != nval))) {
  217. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  218. spec->pca9554_out = nval;
  219. }
  220. snd_ice1712_restore_gpio_status(ice);
  221. return change;
  222. }
  223. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  224. unsigned short val)
  225. {
  226. struct aureon_spec *spec = ice->spec;
  227. unsigned int tmp;
  228. /* Send address to XILINX chip */
  229. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  230. snd_ice1712_gpio_write(ice, tmp);
  231. udelay(10);
  232. tmp |= AUREON_AC97_ADDR;
  233. snd_ice1712_gpio_write(ice, tmp);
  234. udelay(10);
  235. tmp &= ~AUREON_AC97_ADDR;
  236. snd_ice1712_gpio_write(ice, tmp);
  237. udelay(10);
  238. /* Send low-order byte to XILINX chip */
  239. tmp &= ~AUREON_AC97_DATA_MASK;
  240. tmp |= val & AUREON_AC97_DATA_MASK;
  241. snd_ice1712_gpio_write(ice, tmp);
  242. udelay(10);
  243. tmp |= AUREON_AC97_DATA_LOW;
  244. snd_ice1712_gpio_write(ice, tmp);
  245. udelay(10);
  246. tmp &= ~AUREON_AC97_DATA_LOW;
  247. snd_ice1712_gpio_write(ice, tmp);
  248. udelay(10);
  249. /* Send high-order byte to XILINX chip */
  250. tmp &= ~AUREON_AC97_DATA_MASK;
  251. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  252. snd_ice1712_gpio_write(ice, tmp);
  253. udelay(10);
  254. tmp |= AUREON_AC97_DATA_HIGH;
  255. snd_ice1712_gpio_write(ice, tmp);
  256. udelay(10);
  257. tmp &= ~AUREON_AC97_DATA_HIGH;
  258. snd_ice1712_gpio_write(ice, tmp);
  259. udelay(10);
  260. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  261. tmp |= AUREON_AC97_COMMIT;
  262. snd_ice1712_gpio_write(ice, tmp);
  263. udelay(10);
  264. tmp &= ~AUREON_AC97_COMMIT;
  265. snd_ice1712_gpio_write(ice, tmp);
  266. udelay(10);
  267. /* Store the data in out private buffer */
  268. spec->stac9744[(reg & 0x7F) >> 1] = val;
  269. }
  270. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  271. {
  272. struct aureon_spec *spec = ice->spec;
  273. return spec->stac9744[(reg & 0x7F) >> 1];
  274. }
  275. /*
  276. * Initialize STAC9744 chip
  277. */
  278. static int aureon_ac97_init (struct snd_ice1712 *ice)
  279. {
  280. struct aureon_spec *spec = ice->spec;
  281. int i;
  282. static const unsigned short ac97_defaults[] = {
  283. 0x00, 0x9640,
  284. 0x02, 0x8000,
  285. 0x04, 0x8000,
  286. 0x06, 0x8000,
  287. 0x0C, 0x8008,
  288. 0x0E, 0x8008,
  289. 0x10, 0x8808,
  290. 0x12, 0x8808,
  291. 0x14, 0x8808,
  292. 0x16, 0x8808,
  293. 0x18, 0x8808,
  294. 0x1C, 0x8000,
  295. 0x26, 0x000F,
  296. 0x28, 0x0201,
  297. 0x2C, 0xBB80,
  298. 0x32, 0xBB80,
  299. 0x7C, 0x8384,
  300. 0x7E, 0x7644,
  301. (unsigned short)-1
  302. };
  303. unsigned int tmp;
  304. /* Cold reset */
  305. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  306. snd_ice1712_gpio_write(ice, tmp);
  307. udelay(3);
  308. tmp &= ~AUREON_AC97_RESET;
  309. snd_ice1712_gpio_write(ice, tmp);
  310. udelay(3);
  311. tmp |= AUREON_AC97_RESET;
  312. snd_ice1712_gpio_write(ice, tmp);
  313. udelay(3);
  314. memset(&spec->stac9744, 0, sizeof(spec->stac9744));
  315. for (i=0; ac97_defaults[i] != (unsigned short)-1; i+=2)
  316. spec->stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  317. aureon_ac97_write(ice, AC97_MASTER, 0x0000); // Unmute AC'97 master volume permanently - muting is done by WM8770
  318. return 0;
  319. }
  320. #define AUREON_AC97_STEREO 0x80
  321. /*
  322. * AC'97 volume controls
  323. */
  324. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  325. {
  326. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  327. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  328. uinfo->value.integer.min = 0;
  329. uinfo->value.integer.max = 31;
  330. return 0;
  331. }
  332. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  333. {
  334. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  335. unsigned short vol;
  336. mutex_lock(&ice->gpio_mutex);
  337. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  338. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  339. if (kcontrol->private_value & AUREON_AC97_STEREO)
  340. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  341. mutex_unlock(&ice->gpio_mutex);
  342. return 0;
  343. }
  344. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  345. {
  346. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  347. unsigned short ovol, nvol;
  348. int change;
  349. snd_ice1712_save_gpio_status(ice);
  350. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  351. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  352. if (kcontrol->private_value & AUREON_AC97_STEREO)
  353. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  354. nvol |= ovol & ~0x1F1F;
  355. if ((change = (ovol != nvol)))
  356. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  357. snd_ice1712_restore_gpio_status(ice);
  358. return change;
  359. }
  360. /*
  361. * AC'97 mute controls
  362. */
  363. #define aureon_ac97_mute_info snd_ctl_boolean_mono_info
  364. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  365. {
  366. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  367. mutex_lock(&ice->gpio_mutex);
  368. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  369. mutex_unlock(&ice->gpio_mutex);
  370. return 0;
  371. }
  372. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  373. {
  374. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  375. unsigned short ovol, nvol;
  376. int change;
  377. snd_ice1712_save_gpio_status(ice);
  378. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  379. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~ 0x8000);
  380. if ((change = (ovol != nvol)))
  381. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  382. snd_ice1712_restore_gpio_status(ice);
  383. return change;
  384. }
  385. /*
  386. * AC'97 mute controls
  387. */
  388. #define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
  389. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  390. {
  391. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  392. mutex_lock(&ice->gpio_mutex);
  393. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  394. mutex_unlock(&ice->gpio_mutex);
  395. return 0;
  396. }
  397. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  398. {
  399. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  400. unsigned short ovol, nvol;
  401. int change;
  402. snd_ice1712_save_gpio_status(ice);
  403. ovol = aureon_ac97_read(ice, AC97_MIC);
  404. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  405. if ((change = (ovol != nvol)))
  406. aureon_ac97_write(ice, AC97_MIC, nvol);
  407. snd_ice1712_restore_gpio_status(ice);
  408. return change;
  409. }
  410. /*
  411. * write data in the SPI mode
  412. */
  413. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  414. {
  415. unsigned int tmp;
  416. int i;
  417. unsigned int mosi, clk;
  418. tmp = snd_ice1712_gpio_read(ice);
  419. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  420. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  421. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  422. mosi = PRODIGY_SPI_MOSI;
  423. clk = PRODIGY_SPI_CLK;
  424. }
  425. else {
  426. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  427. AUREON_WM_CS|AUREON_CS8415_CS));
  428. mosi = AUREON_SPI_MOSI;
  429. clk = AUREON_SPI_CLK;
  430. tmp |= AUREON_WM_RW;
  431. }
  432. tmp &= ~cs;
  433. snd_ice1712_gpio_write(ice, tmp);
  434. udelay(1);
  435. for (i = bits - 1; i >= 0; i--) {
  436. tmp &= ~clk;
  437. snd_ice1712_gpio_write(ice, tmp);
  438. udelay(1);
  439. if (data & (1 << i))
  440. tmp |= mosi;
  441. else
  442. tmp &= ~mosi;
  443. snd_ice1712_gpio_write(ice, tmp);
  444. udelay(1);
  445. tmp |= clk;
  446. snd_ice1712_gpio_write(ice, tmp);
  447. udelay(1);
  448. }
  449. tmp &= ~clk;
  450. tmp |= cs;
  451. snd_ice1712_gpio_write(ice, tmp);
  452. udelay(1);
  453. tmp |= clk;
  454. snd_ice1712_gpio_write(ice, tmp);
  455. udelay(1);
  456. }
  457. /*
  458. * Read data in SPI mode
  459. */
  460. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits, unsigned char *buffer, int size) {
  461. int i, j;
  462. unsigned int tmp;
  463. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  464. snd_ice1712_gpio_write(ice, tmp);
  465. tmp &= ~cs;
  466. snd_ice1712_gpio_write(ice, tmp);
  467. udelay(1);
  468. for (i=bits-1; i>=0; i--) {
  469. if (data & (1 << i))
  470. tmp |= AUREON_SPI_MOSI;
  471. else
  472. tmp &= ~AUREON_SPI_MOSI;
  473. snd_ice1712_gpio_write(ice, tmp);
  474. udelay(1);
  475. tmp |= AUREON_SPI_CLK;
  476. snd_ice1712_gpio_write(ice, tmp);
  477. udelay(1);
  478. tmp &= ~AUREON_SPI_CLK;
  479. snd_ice1712_gpio_write(ice, tmp);
  480. udelay(1);
  481. }
  482. for (j=0; j<size; j++) {
  483. unsigned char outdata = 0;
  484. for (i=7; i>=0; i--) {
  485. tmp = snd_ice1712_gpio_read(ice);
  486. outdata <<= 1;
  487. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  488. udelay(1);
  489. tmp |= AUREON_SPI_CLK;
  490. snd_ice1712_gpio_write(ice, tmp);
  491. udelay(1);
  492. tmp &= ~AUREON_SPI_CLK;
  493. snd_ice1712_gpio_write(ice, tmp);
  494. udelay(1);
  495. }
  496. buffer[j] = outdata;
  497. }
  498. tmp |= cs;
  499. snd_ice1712_gpio_write(ice, tmp);
  500. }
  501. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg) {
  502. unsigned char val;
  503. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  504. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  505. return val;
  506. }
  507. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg, unsigned char *buffer, int size) {
  508. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  509. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  510. }
  511. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg, unsigned char val) {
  512. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  513. }
  514. /*
  515. * get the current register value of WM codec
  516. */
  517. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  518. {
  519. reg <<= 1;
  520. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  521. ice->akm[0].images[reg + 1];
  522. }
  523. /*
  524. * set the register value of WM codec
  525. */
  526. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  527. {
  528. aureon_spi_write(ice,
  529. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  530. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  531. PRODIGY_WM_CS : AUREON_WM_CS),
  532. (reg << 9) | (val & 0x1ff), 16);
  533. }
  534. /*
  535. * set the register value of WM codec and remember it
  536. */
  537. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  538. {
  539. wm_put_nocache(ice, reg, val);
  540. reg <<= 1;
  541. ice->akm[0].images[reg] = val >> 8;
  542. ice->akm[0].images[reg + 1] = val;
  543. }
  544. /*
  545. */
  546. #define aureon_mono_bool_info snd_ctl_boolean_mono_info
  547. /*
  548. * AC'97 master playback mute controls (Mute on WM8770 chip)
  549. */
  550. #define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
  551. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  552. {
  553. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  554. mutex_lock(&ice->gpio_mutex);
  555. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  556. mutex_unlock(&ice->gpio_mutex);
  557. return 0;
  558. }
  559. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  560. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  561. unsigned short ovol, nvol;
  562. int change;
  563. snd_ice1712_save_gpio_status(ice);
  564. ovol = wm_get(ice, WM_OUT_MUX1);
  565. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  566. if ((change = (ovol != nvol)))
  567. wm_put(ice, WM_OUT_MUX1, nvol);
  568. snd_ice1712_restore_gpio_status(ice);
  569. return change;
  570. }
  571. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
  572. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  573. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  574. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  575. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  576. /*
  577. * Logarithmic volume values for WM8770
  578. * Computed as 20 * Log10(255 / x)
  579. */
  580. static const unsigned char wm_vol[256] = {
  581. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  582. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  583. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  584. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  585. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  586. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  587. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  588. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  589. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  590. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  591. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  592. 0, 0
  593. };
  594. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  595. #define WM_VOL_MUTE 0x8000
  596. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  597. {
  598. unsigned char nvol;
  599. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  600. nvol = 0;
  601. else
  602. nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX];
  603. wm_put(ice, index, nvol);
  604. wm_put_nocache(ice, index, 0x180 | nvol);
  605. }
  606. /*
  607. * DAC mute control
  608. */
  609. #define wm_pcm_mute_info snd_ctl_boolean_mono_info
  610. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  611. {
  612. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  613. mutex_lock(&ice->gpio_mutex);
  614. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  615. mutex_unlock(&ice->gpio_mutex);
  616. return 0;
  617. }
  618. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  619. {
  620. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  621. unsigned short nval, oval;
  622. int change;
  623. snd_ice1712_save_gpio_status(ice);
  624. oval = wm_get(ice, WM_MUTE);
  625. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  626. if ((change = (nval != oval)))
  627. wm_put(ice, WM_MUTE, nval);
  628. snd_ice1712_restore_gpio_status(ice);
  629. return change;
  630. }
  631. /*
  632. * Master volume attenuation mixer control
  633. */
  634. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  635. {
  636. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  637. uinfo->count = 2;
  638. uinfo->value.integer.min = 0;
  639. uinfo->value.integer.max = WM_VOL_MAX;
  640. return 0;
  641. }
  642. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  643. {
  644. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  645. struct aureon_spec *spec = ice->spec;
  646. int i;
  647. for (i=0; i<2; i++)
  648. ucontrol->value.integer.value[i] =
  649. spec->master[i] & ~WM_VOL_MUTE;
  650. return 0;
  651. }
  652. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  653. {
  654. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  655. struct aureon_spec *spec = ice->spec;
  656. int ch, change = 0;
  657. snd_ice1712_save_gpio_status(ice);
  658. for (ch = 0; ch < 2; ch++) {
  659. unsigned int vol = ucontrol->value.integer.value[ch];
  660. if (vol > WM_VOL_MAX)
  661. continue;
  662. vol |= spec->master[ch] & WM_VOL_MUTE;
  663. if (vol != spec->master[ch]) {
  664. int dac;
  665. spec->master[ch] = vol;
  666. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  667. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  668. spec->vol[dac + ch],
  669. spec->master[ch]);
  670. change = 1;
  671. }
  672. }
  673. snd_ice1712_restore_gpio_status(ice);
  674. return change;
  675. }
  676. /*
  677. * DAC volume attenuation mixer control
  678. */
  679. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  680. {
  681. int voices = kcontrol->private_value >> 8;
  682. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  683. uinfo->count = voices;
  684. uinfo->value.integer.min = 0; /* mute (-101dB) */
  685. uinfo->value.integer.max = 0x7F; /* 0dB */
  686. return 0;
  687. }
  688. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  689. {
  690. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  691. struct aureon_spec *spec = ice->spec;
  692. int i, ofs, voices;
  693. voices = kcontrol->private_value >> 8;
  694. ofs = kcontrol->private_value & 0xff;
  695. for (i = 0; i < voices; i++)
  696. ucontrol->value.integer.value[i] =
  697. spec->vol[ofs+i] & ~WM_VOL_MUTE;
  698. return 0;
  699. }
  700. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  701. {
  702. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  703. struct aureon_spec *spec = ice->spec;
  704. int i, idx, ofs, voices;
  705. int change = 0;
  706. voices = kcontrol->private_value >> 8;
  707. ofs = kcontrol->private_value & 0xff;
  708. snd_ice1712_save_gpio_status(ice);
  709. for (i = 0; i < voices; i++) {
  710. unsigned int vol = ucontrol->value.integer.value[i];
  711. if (vol > 0x7f)
  712. continue;
  713. vol |= spec->vol[ofs+i];
  714. if (vol != spec->vol[ofs+i]) {
  715. spec->vol[ofs+i] = vol;
  716. idx = WM_DAC_ATTEN + ofs + i;
  717. wm_set_vol(ice, idx, spec->vol[ofs + i],
  718. spec->master[i]);
  719. change = 1;
  720. }
  721. }
  722. snd_ice1712_restore_gpio_status(ice);
  723. return change;
  724. }
  725. /*
  726. * WM8770 mute control
  727. */
  728. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  729. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  730. uinfo->count = kcontrol->private_value >> 8;
  731. uinfo->value.integer.min = 0;
  732. uinfo->value.integer.max = 1;
  733. return 0;
  734. }
  735. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  736. {
  737. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  738. struct aureon_spec *spec = ice->spec;
  739. int voices, ofs, i;
  740. voices = kcontrol->private_value >> 8;
  741. ofs = kcontrol->private_value & 0xFF;
  742. for (i = 0; i < voices; i++)
  743. ucontrol->value.integer.value[i] =
  744. (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  745. return 0;
  746. }
  747. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  748. {
  749. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  750. struct aureon_spec *spec = ice->spec;
  751. int change = 0, voices, ofs, i;
  752. voices = kcontrol->private_value >> 8;
  753. ofs = kcontrol->private_value & 0xFF;
  754. snd_ice1712_save_gpio_status(ice);
  755. for (i = 0; i < voices; i++) {
  756. int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  757. if (ucontrol->value.integer.value[i] != val) {
  758. spec->vol[ofs + i] &= ~WM_VOL_MUTE;
  759. spec->vol[ofs + i] |=
  760. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  761. wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
  762. spec->master[i]);
  763. change = 1;
  764. }
  765. }
  766. snd_ice1712_restore_gpio_status(ice);
  767. return change;
  768. }
  769. /*
  770. * WM8770 master mute control
  771. */
  772. #define wm_master_mute_info snd_ctl_boolean_stereo_info
  773. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  774. {
  775. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  776. struct aureon_spec *spec = ice->spec;
  777. ucontrol->value.integer.value[0] =
  778. (spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
  779. ucontrol->value.integer.value[1] =
  780. (spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
  781. return 0;
  782. }
  783. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  784. {
  785. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  786. struct aureon_spec *spec = ice->spec;
  787. int change = 0, i;
  788. snd_ice1712_save_gpio_status(ice);
  789. for (i = 0; i < 2; i++) {
  790. int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
  791. if (ucontrol->value.integer.value[i] != val) {
  792. int dac;
  793. spec->master[i] &= ~WM_VOL_MUTE;
  794. spec->master[i] |=
  795. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  796. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  797. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  798. spec->vol[dac + i],
  799. spec->master[i]);
  800. change = 1;
  801. }
  802. }
  803. snd_ice1712_restore_gpio_status(ice);
  804. return change;
  805. }
  806. /* digital master volume */
  807. #define PCM_0dB 0xff
  808. #define PCM_RES 128 /* -64dB */
  809. #define PCM_MIN (PCM_0dB - PCM_RES)
  810. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  811. {
  812. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  813. uinfo->count = 1;
  814. uinfo->value.integer.min = 0; /* mute (-64dB) */
  815. uinfo->value.integer.max = PCM_RES; /* 0dB */
  816. return 0;
  817. }
  818. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  819. {
  820. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  821. unsigned short val;
  822. mutex_lock(&ice->gpio_mutex);
  823. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  824. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  825. ucontrol->value.integer.value[0] = val;
  826. mutex_unlock(&ice->gpio_mutex);
  827. return 0;
  828. }
  829. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  830. {
  831. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  832. unsigned short ovol, nvol;
  833. int change = 0;
  834. nvol = ucontrol->value.integer.value[0];
  835. if (nvol > PCM_RES)
  836. return -EINVAL;
  837. snd_ice1712_save_gpio_status(ice);
  838. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  839. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  840. if (ovol != nvol) {
  841. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  842. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  843. change = 1;
  844. }
  845. snd_ice1712_restore_gpio_status(ice);
  846. return change;
  847. }
  848. /*
  849. * ADC mute control
  850. */
  851. #define wm_adc_mute_info snd_ctl_boolean_stereo_info
  852. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  853. {
  854. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  855. unsigned short val;
  856. int i;
  857. mutex_lock(&ice->gpio_mutex);
  858. for (i = 0; i < 2; i++) {
  859. val = wm_get(ice, WM_ADC_GAIN + i);
  860. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  861. }
  862. mutex_unlock(&ice->gpio_mutex);
  863. return 0;
  864. }
  865. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  866. {
  867. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  868. unsigned short new, old;
  869. int i, change = 0;
  870. snd_ice1712_save_gpio_status(ice);
  871. for (i = 0; i < 2; i++) {
  872. old = wm_get(ice, WM_ADC_GAIN + i);
  873. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  874. if (new != old) {
  875. wm_put(ice, WM_ADC_GAIN + i, new);
  876. change = 1;
  877. }
  878. }
  879. snd_ice1712_restore_gpio_status(ice);
  880. return change;
  881. }
  882. /*
  883. * ADC gain mixer control
  884. */
  885. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  886. {
  887. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  888. uinfo->count = 2;
  889. uinfo->value.integer.min = 0; /* -12dB */
  890. uinfo->value.integer.max = 0x1f; /* 19dB */
  891. return 0;
  892. }
  893. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  894. {
  895. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  896. int i, idx;
  897. unsigned short vol;
  898. mutex_lock(&ice->gpio_mutex);
  899. for (i = 0; i < 2; i++) {
  900. idx = WM_ADC_GAIN + i;
  901. vol = wm_get(ice, idx) & 0x1f;
  902. ucontrol->value.integer.value[i] = vol;
  903. }
  904. mutex_unlock(&ice->gpio_mutex);
  905. return 0;
  906. }
  907. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  908. {
  909. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  910. int i, idx;
  911. unsigned short ovol, nvol;
  912. int change = 0;
  913. snd_ice1712_save_gpio_status(ice);
  914. for (i = 0; i < 2; i++) {
  915. idx = WM_ADC_GAIN + i;
  916. nvol = ucontrol->value.integer.value[i] & 0x1f;
  917. ovol = wm_get(ice, idx);
  918. if ((ovol & 0x1f) != nvol) {
  919. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  920. change = 1;
  921. }
  922. }
  923. snd_ice1712_restore_gpio_status(ice);
  924. return change;
  925. }
  926. /*
  927. * ADC input mux mixer control
  928. */
  929. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  930. {
  931. static const char * const texts[] = {
  932. "CD", //AIN1
  933. "Aux", //AIN2
  934. "Line", //AIN3
  935. "Mic", //AIN4
  936. "AC97" //AIN5
  937. };
  938. static const char * const universe_texts[] = {
  939. "Aux1", //AIN1
  940. "CD", //AIN2
  941. "Phono", //AIN3
  942. "Line", //AIN4
  943. "Aux2", //AIN5
  944. "Mic", //AIN6
  945. "Aux3", //AIN7
  946. "AC97" //AIN8
  947. };
  948. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  949. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  950. uinfo->count = 2;
  951. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  952. uinfo->value.enumerated.items = 8;
  953. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  954. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  955. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  956. }
  957. else {
  958. uinfo->value.enumerated.items = 5;
  959. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  960. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  961. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  962. }
  963. return 0;
  964. }
  965. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  966. {
  967. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  968. unsigned short val;
  969. mutex_lock(&ice->gpio_mutex);
  970. val = wm_get(ice, WM_ADC_MUX);
  971. ucontrol->value.enumerated.item[0] = val & 7;
  972. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  973. mutex_unlock(&ice->gpio_mutex);
  974. return 0;
  975. }
  976. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  977. {
  978. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  979. unsigned short oval, nval;
  980. int change;
  981. snd_ice1712_save_gpio_status(ice);
  982. oval = wm_get(ice, WM_ADC_MUX);
  983. nval = oval & ~0x77;
  984. nval |= ucontrol->value.enumerated.item[0] & 7;
  985. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  986. change = (oval != nval);
  987. if (change)
  988. wm_put(ice, WM_ADC_MUX, nval);
  989. snd_ice1712_restore_gpio_status(ice);
  990. return change;
  991. }
  992. /*
  993. * CS8415 Input mux
  994. */
  995. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  996. {
  997. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  998. static const char * const aureon_texts[] = {
  999. "CD", //RXP0
  1000. "Optical" //RXP1
  1001. };
  1002. static const char * const prodigy_texts[] = {
  1003. "CD",
  1004. "Coax"
  1005. };
  1006. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1007. uinfo->count = 1;
  1008. uinfo->value.enumerated.items = 2;
  1009. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1010. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1011. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  1012. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  1013. else
  1014. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  1015. return 0;
  1016. }
  1017. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1018. {
  1019. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1020. struct aureon_spec *spec = ice->spec;
  1021. //snd_ice1712_save_gpio_status(ice);
  1022. //val = aureon_cs8415_get(ice, CS8415_CTRL2);
  1023. ucontrol->value.enumerated.item[0] = spec->cs8415_mux;
  1024. //snd_ice1712_restore_gpio_status(ice);
  1025. return 0;
  1026. }
  1027. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1028. {
  1029. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1030. struct aureon_spec *spec = ice->spec;
  1031. unsigned short oval, nval;
  1032. int change;
  1033. snd_ice1712_save_gpio_status(ice);
  1034. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1035. nval = oval & ~0x07;
  1036. nval |= ucontrol->value.enumerated.item[0] & 7;
  1037. change = (oval != nval);
  1038. if (change)
  1039. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1040. snd_ice1712_restore_gpio_status(ice);
  1041. spec->cs8415_mux = ucontrol->value.enumerated.item[0];
  1042. return change;
  1043. }
  1044. static int aureon_cs8415_rate_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1045. {
  1046. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1047. uinfo->count = 1;
  1048. uinfo->value.integer.min = 0;
  1049. uinfo->value.integer.max = 192000;
  1050. return 0;
  1051. }
  1052. static int aureon_cs8415_rate_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1053. {
  1054. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1055. unsigned char ratio;
  1056. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1057. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1058. return 0;
  1059. }
  1060. /*
  1061. * CS8415A Mute
  1062. */
  1063. #define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
  1064. static int aureon_cs8415_mute_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1065. {
  1066. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1067. snd_ice1712_save_gpio_status(ice);
  1068. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1069. snd_ice1712_restore_gpio_status(ice);
  1070. return 0;
  1071. }
  1072. static int aureon_cs8415_mute_put (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1073. {
  1074. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1075. unsigned char oval, nval;
  1076. int change;
  1077. snd_ice1712_save_gpio_status(ice);
  1078. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1079. if (ucontrol->value.integer.value[0])
  1080. nval = oval & ~0x20;
  1081. else
  1082. nval = oval | 0x20;
  1083. if ((change = (oval != nval)))
  1084. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1085. snd_ice1712_restore_gpio_status(ice);
  1086. return change;
  1087. }
  1088. /*
  1089. * CS8415A Q-Sub info
  1090. */
  1091. static int aureon_cs8415_qsub_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1092. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1093. uinfo->count = 10;
  1094. return 0;
  1095. }
  1096. static int aureon_cs8415_qsub_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1097. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1098. snd_ice1712_save_gpio_status(ice);
  1099. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1100. snd_ice1712_restore_gpio_status(ice);
  1101. return 0;
  1102. }
  1103. static int aureon_cs8415_spdif_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1104. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1105. uinfo->count = 1;
  1106. return 0;
  1107. }
  1108. static int aureon_cs8415_mask_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1109. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1110. return 0;
  1111. }
  1112. static int aureon_cs8415_spdif_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1113. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1114. snd_ice1712_save_gpio_status(ice);
  1115. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1116. snd_ice1712_restore_gpio_status(ice);
  1117. return 0;
  1118. }
  1119. /*
  1120. * Headphone Amplifier
  1121. */
  1122. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1123. {
  1124. unsigned int tmp, tmp2;
  1125. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1126. if (enable)
  1127. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1128. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1129. tmp |= AUREON_HP_SEL;
  1130. else
  1131. tmp |= PRODIGY_HP_SEL;
  1132. else
  1133. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1134. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1135. tmp &= ~ AUREON_HP_SEL;
  1136. else
  1137. tmp &= ~ PRODIGY_HP_SEL;
  1138. if (tmp != tmp2) {
  1139. snd_ice1712_gpio_write(ice, tmp);
  1140. return 1;
  1141. }
  1142. return 0;
  1143. }
  1144. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1145. {
  1146. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1147. return ( tmp & AUREON_HP_SEL )!= 0;
  1148. }
  1149. #define aureon_hpamp_info snd_ctl_boolean_mono_info
  1150. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1151. {
  1152. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1153. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1154. return 0;
  1155. }
  1156. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1157. {
  1158. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1159. return aureon_set_headphone_amp(ice,ucontrol->value.integer.value[0]);
  1160. }
  1161. /*
  1162. * Deemphasis
  1163. */
  1164. #define aureon_deemp_info snd_ctl_boolean_mono_info
  1165. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1166. {
  1167. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1168. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1169. return 0;
  1170. }
  1171. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1172. {
  1173. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1174. int temp, temp2;
  1175. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1176. if (ucontrol->value.integer.value[0])
  1177. temp |= 0xf;
  1178. else
  1179. temp &= ~0xf;
  1180. if (temp != temp2) {
  1181. wm_put(ice, WM_DAC_CTRL2, temp);
  1182. return 1;
  1183. }
  1184. return 0;
  1185. }
  1186. /*
  1187. * ADC Oversampling
  1188. */
  1189. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1190. {
  1191. static const char * const texts[2] = { "128x", "64x" };
  1192. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1193. uinfo->count = 1;
  1194. uinfo->value.enumerated.items = 2;
  1195. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1196. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1197. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1198. return 0;
  1199. }
  1200. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1201. {
  1202. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1203. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1204. return 0;
  1205. }
  1206. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1207. {
  1208. int temp, temp2;
  1209. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1210. temp2 = temp = wm_get(ice, WM_MASTER);
  1211. if (ucontrol->value.enumerated.item[0])
  1212. temp |= 0x8;
  1213. else
  1214. temp &= ~0x8;
  1215. if (temp != temp2) {
  1216. wm_put(ice, WM_MASTER, temp);
  1217. return 1;
  1218. }
  1219. return 0;
  1220. }
  1221. /*
  1222. * mixers
  1223. */
  1224. static struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1225. {
  1226. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1227. .name = "Master Playback Switch",
  1228. .info = wm_master_mute_info,
  1229. .get = wm_master_mute_get,
  1230. .put = wm_master_mute_put
  1231. },
  1232. {
  1233. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1234. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1235. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1236. .name = "Master Playback Volume",
  1237. .info = wm_master_vol_info,
  1238. .get = wm_master_vol_get,
  1239. .put = wm_master_vol_put,
  1240. .tlv = { .p = db_scale_wm_dac }
  1241. },
  1242. {
  1243. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1244. .name = "Front Playback Switch",
  1245. .info = wm_mute_info,
  1246. .get = wm_mute_get,
  1247. .put = wm_mute_put,
  1248. .private_value = (2 << 8) | 0
  1249. },
  1250. {
  1251. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1252. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1253. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1254. .name = "Front Playback Volume",
  1255. .info = wm_vol_info,
  1256. .get = wm_vol_get,
  1257. .put = wm_vol_put,
  1258. .private_value = (2 << 8) | 0,
  1259. .tlv = { .p = db_scale_wm_dac }
  1260. },
  1261. {
  1262. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1263. .name = "Rear Playback Switch",
  1264. .info = wm_mute_info,
  1265. .get = wm_mute_get,
  1266. .put = wm_mute_put,
  1267. .private_value = (2 << 8) | 2
  1268. },
  1269. {
  1270. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1271. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1272. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1273. .name = "Rear Playback Volume",
  1274. .info = wm_vol_info,
  1275. .get = wm_vol_get,
  1276. .put = wm_vol_put,
  1277. .private_value = (2 << 8) | 2,
  1278. .tlv = { .p = db_scale_wm_dac }
  1279. },
  1280. {
  1281. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1282. .name = "Center Playback Switch",
  1283. .info = wm_mute_info,
  1284. .get = wm_mute_get,
  1285. .put = wm_mute_put,
  1286. .private_value = (1 << 8) | 4
  1287. },
  1288. {
  1289. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1290. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1291. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1292. .name = "Center Playback Volume",
  1293. .info = wm_vol_info,
  1294. .get = wm_vol_get,
  1295. .put = wm_vol_put,
  1296. .private_value = (1 << 8) | 4,
  1297. .tlv = { .p = db_scale_wm_dac }
  1298. },
  1299. {
  1300. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1301. .name = "LFE Playback Switch",
  1302. .info = wm_mute_info,
  1303. .get = wm_mute_get,
  1304. .put = wm_mute_put,
  1305. .private_value = (1 << 8) | 5
  1306. },
  1307. {
  1308. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1309. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1310. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1311. .name = "LFE Playback Volume",
  1312. .info = wm_vol_info,
  1313. .get = wm_vol_get,
  1314. .put = wm_vol_put,
  1315. .private_value = (1 << 8) | 5,
  1316. .tlv = { .p = db_scale_wm_dac }
  1317. },
  1318. {
  1319. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1320. .name = "Side Playback Switch",
  1321. .info = wm_mute_info,
  1322. .get = wm_mute_get,
  1323. .put = wm_mute_put,
  1324. .private_value = (2 << 8) | 6
  1325. },
  1326. {
  1327. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1328. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1329. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1330. .name = "Side Playback Volume",
  1331. .info = wm_vol_info,
  1332. .get = wm_vol_get,
  1333. .put = wm_vol_put,
  1334. .private_value = (2 << 8) | 6,
  1335. .tlv = { .p = db_scale_wm_dac }
  1336. }
  1337. };
  1338. static struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1339. {
  1340. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1341. .name = "PCM Playback Switch",
  1342. .info = wm_pcm_mute_info,
  1343. .get = wm_pcm_mute_get,
  1344. .put = wm_pcm_mute_put
  1345. },
  1346. {
  1347. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1348. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1349. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1350. .name = "PCM Playback Volume",
  1351. .info = wm_pcm_vol_info,
  1352. .get = wm_pcm_vol_get,
  1353. .put = wm_pcm_vol_put,
  1354. .tlv = { .p = db_scale_wm_pcm }
  1355. },
  1356. {
  1357. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1358. .name = "Capture Switch",
  1359. .info = wm_adc_mute_info,
  1360. .get = wm_adc_mute_get,
  1361. .put = wm_adc_mute_put,
  1362. },
  1363. {
  1364. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1365. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1366. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1367. .name = "Capture Volume",
  1368. .info = wm_adc_vol_info,
  1369. .get = wm_adc_vol_get,
  1370. .put = wm_adc_vol_put,
  1371. .tlv = { .p = db_scale_wm_adc }
  1372. },
  1373. {
  1374. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1375. .name = "Capture Source",
  1376. .info = wm_adc_mux_info,
  1377. .get = wm_adc_mux_get,
  1378. .put = wm_adc_mux_put,
  1379. .private_value = 5
  1380. },
  1381. {
  1382. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1383. .name = "External Amplifier",
  1384. .info = aureon_hpamp_info,
  1385. .get = aureon_hpamp_get,
  1386. .put = aureon_hpamp_put
  1387. },
  1388. {
  1389. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1390. .name = "DAC Deemphasis Switch",
  1391. .info = aureon_deemp_info,
  1392. .get = aureon_deemp_get,
  1393. .put = aureon_deemp_put
  1394. },
  1395. {
  1396. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1397. .name = "ADC Oversampling",
  1398. .info = aureon_oversampling_info,
  1399. .get = aureon_oversampling_get,
  1400. .put = aureon_oversampling_put
  1401. }
  1402. };
  1403. static struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1404. {
  1405. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1406. .name = "AC97 Playback Switch",
  1407. .info = aureon_ac97_mmute_info,
  1408. .get = aureon_ac97_mmute_get,
  1409. .put = aureon_ac97_mmute_put,
  1410. .private_value = AC97_MASTER
  1411. },
  1412. {
  1413. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1414. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1415. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1416. .name = "AC97 Playback Volume",
  1417. .info = aureon_ac97_vol_info,
  1418. .get = aureon_ac97_vol_get,
  1419. .put = aureon_ac97_vol_put,
  1420. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1421. .tlv = { .p = db_scale_ac97_master }
  1422. },
  1423. {
  1424. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1425. .name = "CD Playback Switch",
  1426. .info = aureon_ac97_mute_info,
  1427. .get = aureon_ac97_mute_get,
  1428. .put = aureon_ac97_mute_put,
  1429. .private_value = AC97_CD
  1430. },
  1431. {
  1432. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1433. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1434. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1435. .name = "CD Playback Volume",
  1436. .info = aureon_ac97_vol_info,
  1437. .get = aureon_ac97_vol_get,
  1438. .put = aureon_ac97_vol_put,
  1439. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1440. .tlv = { .p = db_scale_ac97_gain }
  1441. },
  1442. {
  1443. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1444. .name = "Aux Playback Switch",
  1445. .info = aureon_ac97_mute_info,
  1446. .get = aureon_ac97_mute_get,
  1447. .put = aureon_ac97_mute_put,
  1448. .private_value = AC97_AUX,
  1449. },
  1450. {
  1451. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1452. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1453. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1454. .name = "Aux Playback Volume",
  1455. .info = aureon_ac97_vol_info,
  1456. .get = aureon_ac97_vol_get,
  1457. .put = aureon_ac97_vol_put,
  1458. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1459. .tlv = { .p = db_scale_ac97_gain }
  1460. },
  1461. {
  1462. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1463. .name = "Line Playback Switch",
  1464. .info = aureon_ac97_mute_info,
  1465. .get = aureon_ac97_mute_get,
  1466. .put = aureon_ac97_mute_put,
  1467. .private_value = AC97_LINE
  1468. },
  1469. {
  1470. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1471. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1472. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1473. .name = "Line Playback Volume",
  1474. .info = aureon_ac97_vol_info,
  1475. .get = aureon_ac97_vol_get,
  1476. .put = aureon_ac97_vol_put,
  1477. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1478. .tlv = { .p = db_scale_ac97_gain }
  1479. },
  1480. {
  1481. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1482. .name = "Mic Playback Switch",
  1483. .info = aureon_ac97_mute_info,
  1484. .get = aureon_ac97_mute_get,
  1485. .put = aureon_ac97_mute_put,
  1486. .private_value = AC97_MIC
  1487. },
  1488. {
  1489. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1490. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1491. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1492. .name = "Mic Playback Volume",
  1493. .info = aureon_ac97_vol_info,
  1494. .get = aureon_ac97_vol_get,
  1495. .put = aureon_ac97_vol_put,
  1496. .private_value = AC97_MIC,
  1497. .tlv = { .p = db_scale_ac97_gain }
  1498. },
  1499. {
  1500. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1501. .name = "Mic Boost (+20dB)",
  1502. .info = aureon_ac97_micboost_info,
  1503. .get = aureon_ac97_micboost_get,
  1504. .put = aureon_ac97_micboost_put
  1505. }
  1506. };
  1507. static struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1508. {
  1509. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1510. .name = "AC97 Playback Switch",
  1511. .info = aureon_ac97_mmute_info,
  1512. .get = aureon_ac97_mmute_get,
  1513. .put = aureon_ac97_mmute_put,
  1514. .private_value = AC97_MASTER
  1515. },
  1516. {
  1517. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1518. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1519. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1520. .name = "AC97 Playback Volume",
  1521. .info = aureon_ac97_vol_info,
  1522. .get = aureon_ac97_vol_get,
  1523. .put = aureon_ac97_vol_put,
  1524. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1525. .tlv = { .p = db_scale_ac97_master }
  1526. },
  1527. {
  1528. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1529. .name = "CD Playback Switch",
  1530. .info = aureon_ac97_mute_info,
  1531. .get = aureon_ac97_mute_get,
  1532. .put = aureon_ac97_mute_put,
  1533. .private_value = AC97_AUX
  1534. },
  1535. {
  1536. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1537. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1538. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1539. .name = "CD Playback Volume",
  1540. .info = aureon_ac97_vol_info,
  1541. .get = aureon_ac97_vol_get,
  1542. .put = aureon_ac97_vol_put,
  1543. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1544. .tlv = { .p = db_scale_ac97_gain }
  1545. },
  1546. {
  1547. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1548. .name = "Phono Playback Switch",
  1549. .info = aureon_ac97_mute_info,
  1550. .get = aureon_ac97_mute_get,
  1551. .put = aureon_ac97_mute_put,
  1552. .private_value = AC97_CD
  1553. },
  1554. {
  1555. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1556. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1557. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1558. .name = "Phono Playback Volume",
  1559. .info = aureon_ac97_vol_info,
  1560. .get = aureon_ac97_vol_get,
  1561. .put = aureon_ac97_vol_put,
  1562. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1563. .tlv = { .p = db_scale_ac97_gain }
  1564. },
  1565. {
  1566. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1567. .name = "Line Playback Switch",
  1568. .info = aureon_ac97_mute_info,
  1569. .get = aureon_ac97_mute_get,
  1570. .put = aureon_ac97_mute_put,
  1571. .private_value = AC97_LINE
  1572. },
  1573. {
  1574. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1575. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1576. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1577. .name = "Line Playback Volume",
  1578. .info = aureon_ac97_vol_info,
  1579. .get = aureon_ac97_vol_get,
  1580. .put = aureon_ac97_vol_put,
  1581. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1582. .tlv = { .p = db_scale_ac97_gain }
  1583. },
  1584. {
  1585. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1586. .name = "Mic Playback Switch",
  1587. .info = aureon_ac97_mute_info,
  1588. .get = aureon_ac97_mute_get,
  1589. .put = aureon_ac97_mute_put,
  1590. .private_value = AC97_MIC
  1591. },
  1592. {
  1593. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1594. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1595. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1596. .name = "Mic Playback Volume",
  1597. .info = aureon_ac97_vol_info,
  1598. .get = aureon_ac97_vol_get,
  1599. .put = aureon_ac97_vol_put,
  1600. .private_value = AC97_MIC,
  1601. .tlv = { .p = db_scale_ac97_gain }
  1602. },
  1603. {
  1604. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1605. .name = "Mic Boost (+20dB)",
  1606. .info = aureon_ac97_micboost_info,
  1607. .get = aureon_ac97_micboost_get,
  1608. .put = aureon_ac97_micboost_put
  1609. },
  1610. {
  1611. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1612. .name = "Aux Playback Switch",
  1613. .info = aureon_ac97_mute_info,
  1614. .get = aureon_ac97_mute_get,
  1615. .put = aureon_ac97_mute_put,
  1616. .private_value = AC97_VIDEO,
  1617. },
  1618. {
  1619. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1620. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1621. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1622. .name = "Aux Playback Volume",
  1623. .info = aureon_ac97_vol_info,
  1624. .get = aureon_ac97_vol_get,
  1625. .put = aureon_ac97_vol_put,
  1626. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1627. .tlv = { .p = db_scale_ac97_gain }
  1628. },
  1629. {
  1630. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1631. .name = "Aux Source",
  1632. .info = aureon_universe_inmux_info,
  1633. .get = aureon_universe_inmux_get,
  1634. .put = aureon_universe_inmux_put
  1635. }
  1636. };
  1637. static struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1638. {
  1639. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1640. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH),
  1641. .info = aureon_cs8415_mute_info,
  1642. .get = aureon_cs8415_mute_get,
  1643. .put = aureon_cs8415_mute_put
  1644. },
  1645. {
  1646. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1647. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Source",
  1648. .info = aureon_cs8415_mux_info,
  1649. .get = aureon_cs8415_mux_get,
  1650. .put = aureon_cs8415_mux_put,
  1651. },
  1652. {
  1653. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1654. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ",CAPTURE,DEFAULT),
  1655. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1656. .info = aureon_cs8415_qsub_info,
  1657. .get = aureon_cs8415_qsub_get,
  1658. },
  1659. {
  1660. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1661. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  1662. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1663. .info = aureon_cs8415_spdif_info,
  1664. .get = aureon_cs8415_mask_get
  1665. },
  1666. {
  1667. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1668. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  1669. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1670. .info = aureon_cs8415_spdif_info,
  1671. .get = aureon_cs8415_spdif_get
  1672. },
  1673. {
  1674. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1675. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Rate",
  1676. .access =SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1677. .info = aureon_cs8415_rate_info,
  1678. .get = aureon_cs8415_rate_get
  1679. }
  1680. };
  1681. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1682. {
  1683. unsigned int i, counts;
  1684. int err;
  1685. counts = ARRAY_SIZE(aureon_dac_controls);
  1686. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1687. counts -= 2; /* no side */
  1688. for (i = 0; i < counts; i++) {
  1689. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1690. if (err < 0)
  1691. return err;
  1692. }
  1693. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1694. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1695. if (err < 0)
  1696. return err;
  1697. }
  1698. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1699. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1700. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1701. if (err < 0)
  1702. return err;
  1703. }
  1704. }
  1705. else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1706. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1707. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1708. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1709. if (err < 0)
  1710. return err;
  1711. }
  1712. }
  1713. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1714. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1715. unsigned char id;
  1716. snd_ice1712_save_gpio_status(ice);
  1717. id = aureon_cs8415_get(ice, CS8415_ID);
  1718. if (id != 0x41)
  1719. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1720. else if ((id & 0x0F) != 0x01)
  1721. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1722. else {
  1723. for (i = 0; i< ARRAY_SIZE(cs8415_controls); i++) {
  1724. struct snd_kcontrol *kctl;
  1725. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1726. if (err < 0)
  1727. return err;
  1728. if (i > 1)
  1729. kctl->id.device = ice->pcm->device;
  1730. }
  1731. }
  1732. snd_ice1712_restore_gpio_status(ice);
  1733. }
  1734. return 0;
  1735. }
  1736. /*
  1737. * initialize the chip
  1738. */
  1739. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1740. {
  1741. static const unsigned short wm_inits_aureon[] = {
  1742. /* These come first to reduce init pop noise */
  1743. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1744. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1745. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1746. 0x18, 0x000, /* All power-up */
  1747. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1748. 0x17, 0x022, /* 256fs, slave mode */
  1749. 0x00, 0, /* DAC1 analog mute */
  1750. 0x01, 0, /* DAC2 analog mute */
  1751. 0x02, 0, /* DAC3 analog mute */
  1752. 0x03, 0, /* DAC4 analog mute */
  1753. 0x04, 0, /* DAC5 analog mute */
  1754. 0x05, 0, /* DAC6 analog mute */
  1755. 0x06, 0, /* DAC7 analog mute */
  1756. 0x07, 0, /* DAC8 analog mute */
  1757. 0x08, 0x100, /* master analog mute */
  1758. 0x09, 0xff, /* DAC1 digital full */
  1759. 0x0a, 0xff, /* DAC2 digital full */
  1760. 0x0b, 0xff, /* DAC3 digital full */
  1761. 0x0c, 0xff, /* DAC4 digital full */
  1762. 0x0d, 0xff, /* DAC5 digital full */
  1763. 0x0e, 0xff, /* DAC6 digital full */
  1764. 0x0f, 0xff, /* DAC7 digital full */
  1765. 0x10, 0xff, /* DAC8 digital full */
  1766. 0x11, 0x1ff, /* master digital full */
  1767. 0x12, 0x000, /* phase normal */
  1768. 0x13, 0x090, /* unmute DAC L/R */
  1769. 0x14, 0x000, /* all unmute */
  1770. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1771. 0x19, 0x000, /* -12dB ADC/L */
  1772. 0x1a, 0x000, /* -12dB ADC/R */
  1773. (unsigned short)-1
  1774. };
  1775. static const unsigned short wm_inits_prodigy[] = {
  1776. /* These come first to reduce init pop noise */
  1777. 0x1b, 0x000, /* ADC Mux */
  1778. 0x1c, 0x009, /* Out Mux1 */
  1779. 0x1d, 0x009, /* Out Mux2 */
  1780. 0x18, 0x000, /* All power-up */
  1781. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1782. 0x17, 0x006, /* 128fs, slave mode */
  1783. 0x00, 0, /* DAC1 analog mute */
  1784. 0x01, 0, /* DAC2 analog mute */
  1785. 0x02, 0, /* DAC3 analog mute */
  1786. 0x03, 0, /* DAC4 analog mute */
  1787. 0x04, 0, /* DAC5 analog mute */
  1788. 0x05, 0, /* DAC6 analog mute */
  1789. 0x06, 0, /* DAC7 analog mute */
  1790. 0x07, 0, /* DAC8 analog mute */
  1791. 0x08, 0x100, /* master analog mute */
  1792. 0x09, 0x7f, /* DAC1 digital full */
  1793. 0x0a, 0x7f, /* DAC2 digital full */
  1794. 0x0b, 0x7f, /* DAC3 digital full */
  1795. 0x0c, 0x7f, /* DAC4 digital full */
  1796. 0x0d, 0x7f, /* DAC5 digital full */
  1797. 0x0e, 0x7f, /* DAC6 digital full */
  1798. 0x0f, 0x7f, /* DAC7 digital full */
  1799. 0x10, 0x7f, /* DAC8 digital full */
  1800. 0x11, 0x1FF, /* master digital full */
  1801. 0x12, 0x000, /* phase normal */
  1802. 0x13, 0x090, /* unmute DAC L/R */
  1803. 0x14, 0x000, /* all unmute */
  1804. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1805. 0x19, 0x000, /* -12dB ADC/L */
  1806. 0x1a, 0x000, /* -12dB ADC/R */
  1807. (unsigned short)-1
  1808. };
  1809. static const unsigned short cs_inits[] = {
  1810. 0x0441, /* RUN */
  1811. 0x0180, /* no mute, OMCK output on RMCK pin */
  1812. 0x0201, /* S/PDIF source on RXP1 */
  1813. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1814. (unsigned short)-1
  1815. };
  1816. struct aureon_spec *spec;
  1817. unsigned int tmp;
  1818. const unsigned short *p;
  1819. int err, i;
  1820. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1821. if (!spec)
  1822. return -ENOMEM;
  1823. ice->spec = spec;
  1824. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1825. ice->num_total_dacs = 6;
  1826. ice->num_total_adcs = 2;
  1827. } else {
  1828. /* aureon 7.1 and prodigy 7.1 */
  1829. ice->num_total_dacs = 8;
  1830. ice->num_total_adcs = 2;
  1831. }
  1832. /* to remeber the register values of CS8415 */
  1833. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1834. if (! ice->akm)
  1835. return -ENOMEM;
  1836. ice->akm_codecs = 1;
  1837. if ((err = aureon_ac97_init(ice)) != 0)
  1838. return err;
  1839. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1840. /* reset the wm codec as the SPI mode */
  1841. snd_ice1712_save_gpio_status(ice);
  1842. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1843. tmp = snd_ice1712_gpio_read(ice);
  1844. tmp &= ~AUREON_WM_RESET;
  1845. snd_ice1712_gpio_write(ice, tmp);
  1846. udelay(1);
  1847. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1848. snd_ice1712_gpio_write(ice, tmp);
  1849. udelay(1);
  1850. tmp |= AUREON_WM_RESET;
  1851. snd_ice1712_gpio_write(ice, tmp);
  1852. udelay(1);
  1853. /* initialize WM8770 codec */
  1854. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1855. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1856. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1857. p = wm_inits_prodigy;
  1858. else
  1859. p = wm_inits_aureon;
  1860. for (; *p != (unsigned short)-1; p += 2)
  1861. wm_put(ice, p[0], p[1]);
  1862. /* initialize CS8415A codec */
  1863. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1864. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1865. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1866. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1867. spec->cs8415_mux = 1;
  1868. aureon_set_headphone_amp(ice, 1);
  1869. }
  1870. snd_ice1712_restore_gpio_status(ice);
  1871. /* initialize PCA9554 pin directions & set default input*/
  1872. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1873. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1874. spec->master[0] = WM_VOL_MUTE;
  1875. spec->master[1] = WM_VOL_MUTE;
  1876. for (i = 0; i < ice->num_total_dacs; i++) {
  1877. spec->vol[i] = WM_VOL_MUTE;
  1878. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1879. }
  1880. return 0;
  1881. }
  1882. /*
  1883. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1884. * hence the driver needs to sets up it properly.
  1885. */
  1886. static unsigned char aureon51_eeprom[] __devinitdata = {
  1887. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1888. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1889. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1890. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1891. [ICE_EEP2_GPIO_DIR] = 0xff,
  1892. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1893. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1894. [ICE_EEP2_GPIO_MASK] = 0x00,
  1895. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1896. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1897. [ICE_EEP2_GPIO_STATE] = 0x00,
  1898. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1899. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1900. };
  1901. static unsigned char aureon71_eeprom[] __devinitdata = {
  1902. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1903. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1904. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1905. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1906. [ICE_EEP2_GPIO_DIR] = 0xff,
  1907. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1908. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1909. [ICE_EEP2_GPIO_MASK] = 0x00,
  1910. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1911. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1912. [ICE_EEP2_GPIO_STATE] = 0x00,
  1913. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1914. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1915. };
  1916. #define prodigy71_eeprom aureon71_eeprom
  1917. static unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1918. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1919. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1920. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1921. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1922. [ICE_EEP2_GPIO_DIR] = 0xff,
  1923. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1924. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1925. [ICE_EEP2_GPIO_MASK] = 0x00,
  1926. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1927. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1928. [ICE_EEP2_GPIO_STATE] = 0x00,
  1929. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1930. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1931. };
  1932. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1933. /* entry point */
  1934. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1935. {
  1936. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1937. .name = "Terratec Aureon 5.1-Sky",
  1938. .model = "aureon51",
  1939. .chip_init = aureon_init,
  1940. .build_controls = aureon_add_controls,
  1941. .eeprom_size = sizeof(aureon51_eeprom),
  1942. .eeprom_data = aureon51_eeprom,
  1943. .driver = "Aureon51",
  1944. },
  1945. {
  1946. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1947. .name = "Terratec Aureon 7.1-Space",
  1948. .model = "aureon71",
  1949. .chip_init = aureon_init,
  1950. .build_controls = aureon_add_controls,
  1951. .eeprom_size = sizeof(aureon71_eeprom),
  1952. .eeprom_data = aureon71_eeprom,
  1953. .driver = "Aureon71",
  1954. },
  1955. {
  1956. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1957. .name = "Terratec Aureon 7.1-Universe",
  1958. .model = "universe",
  1959. .chip_init = aureon_init,
  1960. .build_controls = aureon_add_controls,
  1961. .eeprom_size = sizeof(aureon71_eeprom),
  1962. .eeprom_data = aureon71_eeprom,
  1963. .driver = "Aureon71Univ", /* keep in 15 letters */
  1964. },
  1965. {
  1966. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  1967. .name = "Audiotrak Prodigy 7.1",
  1968. .model = "prodigy71",
  1969. .chip_init = aureon_init,
  1970. .build_controls = aureon_add_controls,
  1971. .eeprom_size = sizeof(prodigy71_eeprom),
  1972. .eeprom_data = prodigy71_eeprom,
  1973. .driver = "Prodigy71", /* should be identical with Aureon71 */
  1974. },
  1975. {
  1976. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  1977. .name = "Audiotrak Prodigy 7.1 LT",
  1978. .model = "prodigy71lt",
  1979. .chip_init = aureon_init,
  1980. .build_controls = aureon_add_controls,
  1981. .eeprom_size = sizeof(prodigy71lt_eeprom),
  1982. .eeprom_data = prodigy71lt_eeprom,
  1983. .driver = "Prodigy71LT",
  1984. },
  1985. {
  1986. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  1987. .name = "Audiotrak Prodigy 7.1 XT",
  1988. .model = "prodigy71xt",
  1989. .chip_init = aureon_init,
  1990. .build_controls = aureon_add_controls,
  1991. .eeprom_size = sizeof(prodigy71xt_eeprom),
  1992. .eeprom_data = prodigy71xt_eeprom,
  1993. .driver = "Prodigy71LT",
  1994. },
  1995. { } /* terminator */
  1996. };