io_32.h 7.4 KB

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  1. #ifndef _ASM_IO_H
  2. #define _ASM_IO_H
  3. #include <linux/string.h>
  4. #include <linux/compiler.h>
  5. /*
  6. * This file contains the definitions for the x86 IO instructions
  7. * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  8. * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  9. * versions of the single-IO instructions (inb_p/inw_p/..).
  10. *
  11. * This file is not meant to be obfuscating: it's just complicated
  12. * to (a) handle it all in a way that makes gcc able to optimize it
  13. * as well as possible and (b) trying to avoid writing the same thing
  14. * over and over again with slight variations and possibly making a
  15. * mistake somewhere.
  16. */
  17. /*
  18. * Thanks to James van Artsdalen for a better timing-fix than
  19. * the two short jumps: using outb's to a nonexistent port seems
  20. * to guarantee better timings even on fast machines.
  21. *
  22. * On the other hand, I'd like to be sure of a non-existent port:
  23. * I feel a bit unsafe about using 0x80 (should be safe, though)
  24. *
  25. * Linus
  26. */
  27. /*
  28. * Bit simplified and optimized by Jan Hubicka
  29. * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  30. *
  31. * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  32. * isa_read[wl] and isa_write[wl] fixed
  33. * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  34. */
  35. #define IO_SPACE_LIMIT 0xffff
  36. #define XQUAD_PORTIO_BASE 0xfe400000
  37. #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
  38. #ifdef __KERNEL__
  39. #include <asm-generic/iomap.h>
  40. #include <linux/vmalloc.h>
  41. /*
  42. * Convert a virtual cached pointer to an uncached pointer
  43. */
  44. #define xlate_dev_kmem_ptr(p) p
  45. /**
  46. * virt_to_phys - map virtual addresses to physical
  47. * @address: address to remap
  48. *
  49. * The returned physical address is the physical (CPU) mapping for
  50. * the memory address given. It is only valid to use this function on
  51. * addresses directly mapped or allocated via kmalloc.
  52. *
  53. * This function does not give bus mappings for DMA transfers. In
  54. * almost all conceivable cases a device driver should not be using
  55. * this function
  56. */
  57. static inline unsigned long virt_to_phys(volatile void *address)
  58. {
  59. return __pa(address);
  60. }
  61. /**
  62. * phys_to_virt - map physical address to virtual
  63. * @address: address to remap
  64. *
  65. * The returned virtual address is a current CPU mapping for
  66. * the memory address given. It is only valid to use this function on
  67. * addresses that have a kernel mapping
  68. *
  69. * This function does not handle bus mappings for DMA transfers. In
  70. * almost all conceivable cases a device driver should not be using
  71. * this function
  72. */
  73. static inline void *phys_to_virt(unsigned long address)
  74. {
  75. return __va(address);
  76. }
  77. /*
  78. * Change "struct page" to physical address.
  79. */
  80. #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  81. /**
  82. * ioremap - map bus memory into CPU space
  83. * @offset: bus address of the memory
  84. * @size: size of the resource to map
  85. *
  86. * ioremap performs a platform specific sequence of operations to
  87. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  88. * writew/writel functions and the other mmio helpers. The returned
  89. * address is not guaranteed to be usable directly as a virtual
  90. * address.
  91. *
  92. * If the area you are trying to map is a PCI BAR you should have a
  93. * look at pci_iomap().
  94. */
  95. extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
  96. extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
  97. /*
  98. * The default ioremap() behavior is non-cached:
  99. */
  100. static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
  101. {
  102. return ioremap_nocache(offset, size);
  103. }
  104. extern void iounmap(volatile void __iomem *addr);
  105. /*
  106. * ISA I/O bus memory addresses are 1:1 with the physical address.
  107. */
  108. #define isa_virt_to_bus virt_to_phys
  109. #define isa_page_to_bus page_to_phys
  110. #define isa_bus_to_virt phys_to_virt
  111. /*
  112. * However PCI ones are not necessarily 1:1 and therefore these interfaces
  113. * are forbidden in portable PCI drivers.
  114. *
  115. * Allow them on x86 for legacy drivers, though.
  116. */
  117. #define virt_to_bus virt_to_phys
  118. #define bus_to_virt phys_to_virt
  119. static inline void
  120. memset_io(volatile void __iomem *addr, unsigned char val, int count)
  121. {
  122. memset((void __force *)addr, val, count);
  123. }
  124. static inline void
  125. memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
  126. {
  127. __memcpy(dst, (const void __force *)src, count);
  128. }
  129. static inline void
  130. memcpy_toio(volatile void __iomem *dst, const void *src, int count)
  131. {
  132. __memcpy((void __force *)dst, src, count);
  133. }
  134. /*
  135. * ISA space is 'always mapped' on a typical x86 system, no need to
  136. * explicitly ioremap() it. The fact that the ISA IO space is mapped
  137. * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
  138. * are physical addresses. The following constant pointer can be
  139. * used as the IO-area pointer (it can be iounmapped as well, so the
  140. * analogy with PCI is quite large):
  141. */
  142. #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
  143. /*
  144. * Cache management
  145. *
  146. * This needed for two cases
  147. * 1. Out of order aware processors
  148. * 2. Accidentally out of order processors (PPro errata #51)
  149. */
  150. #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
  151. static inline void flush_write_buffers(void)
  152. {
  153. asm volatile("lock; addl $0,0(%%esp)": : :"memory");
  154. }
  155. #else
  156. #define flush_write_buffers() do { } while (0)
  157. #endif
  158. #endif /* __KERNEL__ */
  159. extern void native_io_delay(void);
  160. extern int io_delay_type;
  161. extern void io_delay_init(void);
  162. #if defined(CONFIG_PARAVIRT)
  163. #include <asm/paravirt.h>
  164. #else
  165. static inline void slow_down_io(void)
  166. {
  167. native_io_delay();
  168. #ifdef REALLY_SLOW_IO
  169. native_io_delay();
  170. native_io_delay();
  171. native_io_delay();
  172. #endif
  173. }
  174. #endif
  175. #define __BUILDIO(bwl, bw, type) \
  176. static inline void out##bwl(unsigned type value, int port) \
  177. { \
  178. out##bwl##_local(value, port); \
  179. } \
  180. \
  181. static inline unsigned type in##bwl(int port) \
  182. { \
  183. return in##bwl##_local(port); \
  184. }
  185. #define BUILDIO(bwl, bw, type) \
  186. static inline void out##bwl##_local(unsigned type value, int port) \
  187. { \
  188. asm volatile("out" #bwl " %" #bw "0, %w1" \
  189. : : "a"(value), "Nd"(port)); \
  190. } \
  191. \
  192. static inline unsigned type in##bwl##_local(int port) \
  193. { \
  194. unsigned type value; \
  195. asm volatile("in" #bwl " %w1, %" #bw "0" \
  196. : "=a"(value) : "Nd"(port)); \
  197. return value; \
  198. } \
  199. \
  200. static inline void out##bwl##_local_p(unsigned type value, int port) \
  201. { \
  202. out##bwl##_local(value, port); \
  203. slow_down_io(); \
  204. } \
  205. \
  206. static inline unsigned type in##bwl##_local_p(int port) \
  207. { \
  208. unsigned type value = in##bwl##_local(port); \
  209. slow_down_io(); \
  210. return value; \
  211. } \
  212. \
  213. __BUILDIO(bwl, bw, type) \
  214. \
  215. static inline void out##bwl##_p(unsigned type value, int port) \
  216. { \
  217. out##bwl(value, port); \
  218. slow_down_io(); \
  219. } \
  220. \
  221. static inline unsigned type in##bwl##_p(int port) \
  222. { \
  223. unsigned type value = in##bwl(port); \
  224. slow_down_io(); \
  225. return value; \
  226. } \
  227. \
  228. static inline void outs##bwl(int port, const void *addr, unsigned long count) \
  229. { \
  230. asm volatile("rep; outs" #bwl \
  231. : "+S"(addr), "+c"(count) : "d"(port)); \
  232. } \
  233. \
  234. static inline void ins##bwl(int port, void *addr, unsigned long count) \
  235. { \
  236. asm volatile("rep; ins" #bwl \
  237. : "+D"(addr), "+c"(count) : "d"(port)); \
  238. }
  239. BUILDIO(b, b, char)
  240. BUILDIO(w, w, short)
  241. BUILDIO(l, , int)
  242. #endif