mpc834x_mds.dts 9.0 KB

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  1. /*
  2. * MPC8349E MDS Device Tree Source
  3. *
  4. * Copyright 2005, 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "MPC8349EMDS";
  14. compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. pci0 = &pci0;
  23. pci1 = &pci1;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8349@0 {
  29. device_type = "cpu";
  30. reg = <0x0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <32768>;
  34. i-cache-size = <32768>;
  35. timebase-frequency = <0>; // from bootloader
  36. bus-frequency = <0>; // from bootloader
  37. clock-frequency = <0>; // from bootloader
  38. };
  39. };
  40. memory {
  41. device_type = "memory";
  42. reg = <0x00000000 0x10000000>; // 256MB at 0
  43. };
  44. bcsr@e2400000 {
  45. device_type = "board-control";
  46. reg = <0xe2400000 0x8000>;
  47. };
  48. soc8349@e0000000 {
  49. #address-cells = <1>;
  50. #size-cells = <1>;
  51. device_type = "soc";
  52. ranges = <0x0 0xe0000000 0x00100000>;
  53. reg = <0xe0000000 0x00000200>;
  54. bus-frequency = <0>;
  55. wdt@200 {
  56. device_type = "watchdog";
  57. compatible = "mpc83xx_wdt";
  58. reg = <0x200 0x100>;
  59. };
  60. i2c@3000 {
  61. #address-cells = <1>;
  62. #size-cells = <0>;
  63. cell-index = <0>;
  64. compatible = "fsl-i2c";
  65. reg = <0x3000 0x100>;
  66. interrupts = <14 0x8>;
  67. interrupt-parent = <&ipic>;
  68. dfsrr;
  69. rtc@68 {
  70. compatible = "dallas,ds1374";
  71. reg = <0x68>;
  72. };
  73. };
  74. i2c@3100 {
  75. #address-cells = <1>;
  76. #size-cells = <0>;
  77. cell-index = <1>;
  78. compatible = "fsl-i2c";
  79. reg = <0x3100 0x100>;
  80. interrupts = <15 0x8>;
  81. interrupt-parent = <&ipic>;
  82. dfsrr;
  83. };
  84. spi@7000 {
  85. cell-index = <0>;
  86. compatible = "fsl,spi";
  87. reg = <0x7000 0x1000>;
  88. interrupts = <16 0x8>;
  89. interrupt-parent = <&ipic>;
  90. mode = "cpu";
  91. };
  92. dma@82a8 {
  93. #address-cells = <1>;
  94. #size-cells = <1>;
  95. compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
  96. reg = <0x82a8 4>;
  97. ranges = <0 0x8100 0x1a8>;
  98. interrupt-parent = <&ipic>;
  99. interrupts = <71 8>;
  100. cell-index = <0>;
  101. dma-channel@0 {
  102. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  103. reg = <0 0x80>;
  104. interrupt-parent = <&ipic>;
  105. interrupts = <71 8>;
  106. };
  107. dma-channel@80 {
  108. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  109. reg = <0x80 0x80>;
  110. interrupt-parent = <&ipic>;
  111. interrupts = <71 8>;
  112. };
  113. dma-channel@100 {
  114. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  115. reg = <0x100 0x80>;
  116. interrupt-parent = <&ipic>;
  117. interrupts = <71 8>;
  118. };
  119. dma-channel@180 {
  120. compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
  121. reg = <0x180 0x28>;
  122. interrupt-parent = <&ipic>;
  123. interrupts = <71 8>;
  124. };
  125. };
  126. /* phy type (ULPI or SERIAL) are only types supported for MPH */
  127. /* port = 0 or 1 */
  128. usb@22000 {
  129. compatible = "fsl-usb2-mph";
  130. reg = <0x22000 0x1000>;
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. interrupt-parent = <&ipic>;
  134. interrupts = <39 0x8>;
  135. phy_type = "ulpi";
  136. port1;
  137. };
  138. /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  139. usb@23000 {
  140. compatible = "fsl-usb2-dr";
  141. reg = <0x23000 0x1000>;
  142. #address-cells = <1>;
  143. #size-cells = <0>;
  144. interrupt-parent = <&ipic>;
  145. interrupts = <38 0x8>;
  146. dr_mode = "otg";
  147. phy_type = "ulpi";
  148. };
  149. mdio@24520 {
  150. #address-cells = <1>;
  151. #size-cells = <0>;
  152. compatible = "fsl,gianfar-mdio";
  153. reg = <0x24520 0x20>;
  154. phy0: ethernet-phy@0 {
  155. interrupt-parent = <&ipic>;
  156. interrupts = <17 0x8>;
  157. reg = <0x0>;
  158. device_type = "ethernet-phy";
  159. };
  160. phy1: ethernet-phy@1 {
  161. interrupt-parent = <&ipic>;
  162. interrupts = <18 0x8>;
  163. reg = <0x1>;
  164. device_type = "ethernet-phy";
  165. };
  166. };
  167. enet0: ethernet@24000 {
  168. cell-index = <0>;
  169. device_type = "network";
  170. model = "TSEC";
  171. compatible = "gianfar";
  172. reg = <0x24000 0x1000>;
  173. local-mac-address = [ 00 00 00 00 00 00 ];
  174. interrupts = <32 0x8 33 0x8 34 0x8>;
  175. interrupt-parent = <&ipic>;
  176. phy-handle = <&phy0>;
  177. linux,network-index = <0>;
  178. };
  179. enet1: ethernet@25000 {
  180. cell-index = <1>;
  181. device_type = "network";
  182. model = "TSEC";
  183. compatible = "gianfar";
  184. reg = <0x25000 0x1000>;
  185. local-mac-address = [ 00 00 00 00 00 00 ];
  186. interrupts = <35 0x8 36 0x8 37 0x8>;
  187. interrupt-parent = <&ipic>;
  188. phy-handle = <&phy1>;
  189. linux,network-index = <1>;
  190. };
  191. serial0: serial@4500 {
  192. cell-index = <0>;
  193. device_type = "serial";
  194. compatible = "ns16550";
  195. reg = <0x4500 0x100>;
  196. clock-frequency = <0>;
  197. interrupts = <9 0x8>;
  198. interrupt-parent = <&ipic>;
  199. };
  200. serial1: serial@4600 {
  201. cell-index = <1>;
  202. device_type = "serial";
  203. compatible = "ns16550";
  204. reg = <0x4600 0x100>;
  205. clock-frequency = <0>;
  206. interrupts = <10 0x8>;
  207. interrupt-parent = <&ipic>;
  208. };
  209. crypto@30000 {
  210. compatible = "fsl,sec2.0";
  211. reg = <0x30000 0x10000>;
  212. interrupts = <11 0x8>;
  213. interrupt-parent = <&ipic>;
  214. fsl,num-channels = <4>;
  215. fsl,channel-fifo-len = <24>;
  216. fsl,exec-units-mask = <0x7e>;
  217. fsl,descriptor-types-mask = <0x01010ebf>;
  218. };
  219. /* IPIC
  220. * interrupts cell = <intr #, sense>
  221. * sense values match linux IORESOURCE_IRQ_* defines:
  222. * sense == 8: Level, low assertion
  223. * sense == 2: Edge, high-to-low change
  224. */
  225. ipic: pic@700 {
  226. interrupt-controller;
  227. #address-cells = <0>;
  228. #interrupt-cells = <2>;
  229. reg = <0x700 0x100>;
  230. device_type = "ipic";
  231. };
  232. };
  233. pci0: pci@e0008500 {
  234. cell-index = <1>;
  235. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  236. interrupt-map = <
  237. /* IDSEL 0x11 */
  238. 0x8800 0x0 0x0 0x1 &ipic 20 0x8
  239. 0x8800 0x0 0x0 0x2 &ipic 21 0x8
  240. 0x8800 0x0 0x0 0x3 &ipic 22 0x8
  241. 0x8800 0x0 0x0 0x4 &ipic 23 0x8
  242. /* IDSEL 0x12 */
  243. 0x9000 0x0 0x0 0x1 &ipic 22 0x8
  244. 0x9000 0x0 0x0 0x2 &ipic 23 0x8
  245. 0x9000 0x0 0x0 0x3 &ipic 20 0x8
  246. 0x9000 0x0 0x0 0x4 &ipic 21 0x8
  247. /* IDSEL 0x13 */
  248. 0x9800 0x0 0x0 0x1 &ipic 23 0x8
  249. 0x9800 0x0 0x0 0x2 &ipic 20 0x8
  250. 0x9800 0x0 0x0 0x3 &ipic 21 0x8
  251. 0x9800 0x0 0x0 0x4 &ipic 22 0x8
  252. /* IDSEL 0x15 */
  253. 0xa800 0x0 0x0 0x1 &ipic 20 0x8
  254. 0xa800 0x0 0x0 0x2 &ipic 21 0x8
  255. 0xa800 0x0 0x0 0x3 &ipic 22 0x8
  256. 0xa800 0x0 0x0 0x4 &ipic 23 0x8
  257. /* IDSEL 0x16 */
  258. 0xb000 0x0 0x0 0x1 &ipic 23 0x8
  259. 0xb000 0x0 0x0 0x2 &ipic 20 0x8
  260. 0xb000 0x0 0x0 0x3 &ipic 21 0x8
  261. 0xb000 0x0 0x0 0x4 &ipic 22 0x8
  262. /* IDSEL 0x17 */
  263. 0xb800 0x0 0x0 0x1 &ipic 22 0x8
  264. 0xb800 0x0 0x0 0x2 &ipic 23 0x8
  265. 0xb800 0x0 0x0 0x3 &ipic 20 0x8
  266. 0xb800 0x0 0x0 0x4 &ipic 21 0x8
  267. /* IDSEL 0x18 */
  268. 0xc000 0x0 0x0 0x1 &ipic 21 0x8
  269. 0xc000 0x0 0x0 0x2 &ipic 22 0x8
  270. 0xc000 0x0 0x0 0x3 &ipic 23 0x8
  271. 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
  272. interrupt-parent = <&ipic>;
  273. interrupts = <66 0x8>;
  274. bus-range = <0 0>;
  275. ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
  276. 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
  277. 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
  278. clock-frequency = <66666666>;
  279. #interrupt-cells = <1>;
  280. #size-cells = <2>;
  281. #address-cells = <3>;
  282. reg = <0xe0008500 0x100>;
  283. compatible = "fsl,mpc8349-pci";
  284. device_type = "pci";
  285. };
  286. pci1: pci@e0008600 {
  287. cell-index = <2>;
  288. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  289. interrupt-map = <
  290. /* IDSEL 0x11 */
  291. 0x8800 0x0 0x0 0x1 &ipic 20 0x8
  292. 0x8800 0x0 0x0 0x2 &ipic 21 0x8
  293. 0x8800 0x0 0x0 0x3 &ipic 22 0x8
  294. 0x8800 0x0 0x0 0x4 &ipic 23 0x8
  295. /* IDSEL 0x12 */
  296. 0x9000 0x0 0x0 0x1 &ipic 22 0x8
  297. 0x9000 0x0 0x0 0x2 &ipic 23 0x8
  298. 0x9000 0x0 0x0 0x3 &ipic 20 0x8
  299. 0x9000 0x0 0x0 0x4 &ipic 21 0x8
  300. /* IDSEL 0x13 */
  301. 0x9800 0x0 0x0 0x1 &ipic 23 0x8
  302. 0x9800 0x0 0x0 0x2 &ipic 20 0x8
  303. 0x9800 0x0 0x0 0x3 &ipic 21 0x8
  304. 0x9800 0x0 0x0 0x4 &ipic 22 0x8
  305. /* IDSEL 0x15 */
  306. 0xa800 0x0 0x0 0x1 &ipic 20 0x8
  307. 0xa800 0x0 0x0 0x2 &ipic 21 0x8
  308. 0xa800 0x0 0x0 0x3 &ipic 22 0x8
  309. 0xa800 0x0 0x0 0x4 &ipic 23 0x8
  310. /* IDSEL 0x16 */
  311. 0xb000 0x0 0x0 0x1 &ipic 23 0x8
  312. 0xb000 0x0 0x0 0x2 &ipic 20 0x8
  313. 0xb000 0x0 0x0 0x3 &ipic 21 0x8
  314. 0xb000 0x0 0x0 0x4 &ipic 22 0x8
  315. /* IDSEL 0x17 */
  316. 0xb800 0x0 0x0 0x1 &ipic 22 0x8
  317. 0xb800 0x0 0x0 0x2 &ipic 23 0x8
  318. 0xb800 0x0 0x0 0x3 &ipic 20 0x8
  319. 0xb800 0x0 0x0 0x4 &ipic 21 0x8
  320. /* IDSEL 0x18 */
  321. 0xc000 0x0 0x0 0x1 &ipic 21 0x8
  322. 0xc000 0x0 0x0 0x2 &ipic 22 0x8
  323. 0xc000 0x0 0x0 0x3 &ipic 23 0x8
  324. 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
  325. interrupt-parent = <&ipic>;
  326. interrupts = <67 0x8>;
  327. bus-range = <0 0>;
  328. ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
  329. 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
  330. 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
  331. clock-frequency = <66666666>;
  332. #interrupt-cells = <1>;
  333. #size-cells = <2>;
  334. #address-cells = <3>;
  335. reg = <0xe0008600 0x100>;
  336. compatible = "fsl,mpc8349-pci";
  337. device_type = "pci";
  338. };
  339. };