mpc8313erdb.dts 7.1 KB

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  1. /*
  2. * MPC8313E RDB Device Tree Source
  3. *
  4. * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "MPC8313ERDB";
  14. compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. pci0 = &pci0;
  23. };
  24. cpus {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. PowerPC,8313@0 {
  28. device_type = "cpu";
  29. reg = <0x0>;
  30. d-cache-line-size = <32>;
  31. i-cache-line-size = <32>;
  32. d-cache-size = <16384>;
  33. i-cache-size = <16384>;
  34. timebase-frequency = <0>; // from bootloader
  35. bus-frequency = <0>; // from bootloader
  36. clock-frequency = <0>; // from bootloader
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0x00000000 0x08000000>; // 128MB at 0
  42. };
  43. localbus@e0005000 {
  44. #address-cells = <2>;
  45. #size-cells = <1>;
  46. compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
  47. reg = <0xe0005000 0x1000>;
  48. interrupts = <77 0x8>;
  49. interrupt-parent = <&ipic>;
  50. // CS0 and CS1 are swapped when
  51. // booting from nand, but the
  52. // addresses are the same.
  53. ranges = <0x0 0x0 0xfe000000 0x00800000
  54. 0x1 0x0 0xe2800000 0x00008000
  55. 0x2 0x0 0xf0000000 0x00020000
  56. 0x3 0x0 0xfa000000 0x00008000>;
  57. flash@0,0 {
  58. #address-cells = <1>;
  59. #size-cells = <1>;
  60. compatible = "cfi-flash";
  61. reg = <0x0 0x0 0x800000>;
  62. bank-width = <2>;
  63. device-width = <1>;
  64. };
  65. nand@1,0 {
  66. #address-cells = <1>;
  67. #size-cells = <1>;
  68. compatible = "fsl,mpc8313-fcm-nand",
  69. "fsl,elbc-fcm-nand";
  70. reg = <0x1 0x0 0x2000>;
  71. u-boot@0 {
  72. reg = <0x0 0x100000>;
  73. read-only;
  74. };
  75. kernel@100000 {
  76. reg = <0x100000 0x300000>;
  77. };
  78. fs@400000 {
  79. reg = <0x400000 0x1c00000>;
  80. };
  81. };
  82. };
  83. soc8313@e0000000 {
  84. #address-cells = <1>;
  85. #size-cells = <1>;
  86. device_type = "soc";
  87. compatible = "simple-bus";
  88. ranges = <0x0 0xe0000000 0x00100000>;
  89. reg = <0xe0000000 0x00000200>;
  90. bus-frequency = <0>;
  91. wdt@200 {
  92. device_type = "watchdog";
  93. compatible = "mpc83xx_wdt";
  94. reg = <0x200 0x100>;
  95. };
  96. i2c@3000 {
  97. #address-cells = <1>;
  98. #size-cells = <0>;
  99. cell-index = <0>;
  100. compatible = "fsl-i2c";
  101. reg = <0x3000 0x100>;
  102. interrupts = <14 0x8>;
  103. interrupt-parent = <&ipic>;
  104. dfsrr;
  105. rtc@68 {
  106. compatible = "dallas,ds1339";
  107. reg = <0x68>;
  108. };
  109. };
  110. i2c@3100 {
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. cell-index = <1>;
  114. compatible = "fsl-i2c";
  115. reg = <0x3100 0x100>;
  116. interrupts = <15 0x8>;
  117. interrupt-parent = <&ipic>;
  118. dfsrr;
  119. };
  120. spi@7000 {
  121. cell-index = <0>;
  122. compatible = "fsl,spi";
  123. reg = <0x7000 0x1000>;
  124. interrupts = <16 0x8>;
  125. interrupt-parent = <&ipic>;
  126. mode = "cpu";
  127. };
  128. dma@82a8 {
  129. #address-cells = <1>;
  130. #size-cells = <1>;
  131. compatible = "fsl,mpc8313-dma", "fsl,elo-dma";
  132. reg = <0x82a8 4>;
  133. ranges = <0 0x8100 0x1a8>;
  134. interrupt-parent = <&ipic>;
  135. interrupts = <71 8>;
  136. cell-index = <0>;
  137. dma-channel@0 {
  138. compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
  139. reg = <0 0x80>;
  140. interrupt-parent = <&ipic>;
  141. interrupts = <71 8>;
  142. };
  143. dma-channel@80 {
  144. compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
  145. reg = <0x80 0x80>;
  146. interrupt-parent = <&ipic>;
  147. interrupts = <71 8>;
  148. };
  149. dma-channel@100 {
  150. compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
  151. reg = <0x100 0x80>;
  152. interrupt-parent = <&ipic>;
  153. interrupts = <71 8>;
  154. };
  155. dma-channel@180 {
  156. compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
  157. reg = <0x180 0x28>;
  158. interrupt-parent = <&ipic>;
  159. interrupts = <71 8>;
  160. };
  161. };
  162. /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  163. usb@23000 {
  164. compatible = "fsl-usb2-dr";
  165. reg = <0x23000 0x1000>;
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. interrupt-parent = <&ipic>;
  169. interrupts = <38 0x8>;
  170. phy_type = "utmi_wide";
  171. };
  172. mdio@24520 {
  173. #address-cells = <1>;
  174. #size-cells = <0>;
  175. compatible = "fsl,gianfar-mdio";
  176. reg = <0x24520 0x20>;
  177. phy1: ethernet-phy@1 {
  178. interrupt-parent = <&ipic>;
  179. interrupts = <19 0x8>;
  180. reg = <0x1>;
  181. device_type = "ethernet-phy";
  182. };
  183. phy4: ethernet-phy@4 {
  184. interrupt-parent = <&ipic>;
  185. interrupts = <20 0x8>;
  186. reg = <0x4>;
  187. device_type = "ethernet-phy";
  188. };
  189. };
  190. enet0: ethernet@24000 {
  191. cell-index = <0>;
  192. device_type = "network";
  193. model = "eTSEC";
  194. compatible = "gianfar";
  195. reg = <0x24000 0x1000>;
  196. local-mac-address = [ 00 00 00 00 00 00 ];
  197. interrupts = <37 0x8 36 0x8 35 0x8>;
  198. interrupt-parent = <&ipic>;
  199. phy-handle = < &phy1 >;
  200. };
  201. enet1: ethernet@25000 {
  202. cell-index = <1>;
  203. device_type = "network";
  204. model = "eTSEC";
  205. compatible = "gianfar";
  206. reg = <0x25000 0x1000>;
  207. local-mac-address = [ 00 00 00 00 00 00 ];
  208. interrupts = <34 0x8 33 0x8 32 0x8>;
  209. interrupt-parent = <&ipic>;
  210. phy-handle = < &phy4 >;
  211. };
  212. serial0: serial@4500 {
  213. cell-index = <0>;
  214. device_type = "serial";
  215. compatible = "ns16550";
  216. reg = <0x4500 0x100>;
  217. clock-frequency = <0>;
  218. interrupts = <9 0x8>;
  219. interrupt-parent = <&ipic>;
  220. };
  221. serial1: serial@4600 {
  222. cell-index = <1>;
  223. device_type = "serial";
  224. compatible = "ns16550";
  225. reg = <0x4600 0x100>;
  226. clock-frequency = <0>;
  227. interrupts = <10 0x8>;
  228. interrupt-parent = <&ipic>;
  229. };
  230. crypto@30000 {
  231. compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
  232. reg = <0x30000 0x10000>;
  233. interrupts = <11 0x8>;
  234. interrupt-parent = <&ipic>;
  235. fsl,num-channels = <1>;
  236. fsl,channel-fifo-len = <24>;
  237. fsl,exec-units-mask = <0x4c>;
  238. fsl,descriptor-types-mask = <0x0122003f>;
  239. };
  240. /* IPIC
  241. * interrupts cell = <intr #, sense>
  242. * sense values match linux IORESOURCE_IRQ_* defines:
  243. * sense == 8: Level, low assertion
  244. * sense == 2: Edge, high-to-low change
  245. */
  246. ipic: pic@700 {
  247. interrupt-controller;
  248. #address-cells = <0>;
  249. #interrupt-cells = <2>;
  250. reg = <0x700 0x100>;
  251. device_type = "ipic";
  252. };
  253. };
  254. pci0: pci@e0008500 {
  255. cell-index = <1>;
  256. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  257. interrupt-map = <
  258. /* IDSEL 0x0E -mini PCI */
  259. 0x7000 0x0 0x0 0x1 &ipic 18 0x8
  260. 0x7000 0x0 0x0 0x2 &ipic 18 0x8
  261. 0x7000 0x0 0x0 0x3 &ipic 18 0x8
  262. 0x7000 0x0 0x0 0x4 &ipic 18 0x8
  263. /* IDSEL 0x0F - PCI slot */
  264. 0x7800 0x0 0x0 0x1 &ipic 17 0x8
  265. 0x7800 0x0 0x0 0x2 &ipic 18 0x8
  266. 0x7800 0x0 0x0 0x3 &ipic 17 0x8
  267. 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
  268. interrupt-parent = <&ipic>;
  269. interrupts = <66 0x8>;
  270. bus-range = <0x0 0x0>;
  271. ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
  272. 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
  273. 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
  274. clock-frequency = <66666666>;
  275. #interrupt-cells = <1>;
  276. #size-cells = <2>;
  277. #address-cells = <3>;
  278. reg = <0xe0008500 0x100>;
  279. compatible = "fsl,mpc8349-pci";
  280. device_type = "pci";
  281. };
  282. };