devices.c 12 KB

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  1. /*
  2. * linux/arch/arm/plat-omap/devices.c
  3. *
  4. * Common platform device setup/initialization for OMAP1 and OMAP2
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <asm/hardware.h>
  16. #include <asm/io.h>
  17. #include <asm/mach-types.h>
  18. #include <asm/mach/map.h>
  19. #include <asm/arch/tc.h>
  20. #include <asm/arch/board.h>
  21. #include <asm/arch/mux.h>
  22. #include <asm/arch/gpio.h>
  23. #include <asm/arch/menelaus.h>
  24. #include <asm/arch/mcbsp.h>
  25. #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
  26. #include "../plat-omap/dsp/dsp_common.h"
  27. static struct dsp_platform_data dsp_pdata = {
  28. .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
  29. };
  30. static struct resource omap_dsp_resources[] = {
  31. {
  32. .name = "dsp_mmu",
  33. .start = -1,
  34. .flags = IORESOURCE_IRQ,
  35. },
  36. };
  37. static struct platform_device omap_dsp_device = {
  38. .name = "dsp",
  39. .id = -1,
  40. .num_resources = ARRAY_SIZE(omap_dsp_resources),
  41. .resource = omap_dsp_resources,
  42. .dev = {
  43. .platform_data = &dsp_pdata,
  44. },
  45. };
  46. static inline void omap_init_dsp(void)
  47. {
  48. struct resource *res;
  49. int irq;
  50. if (cpu_is_omap15xx())
  51. irq = INT_1510_DSP_MMU;
  52. else if (cpu_is_omap16xx())
  53. irq = INT_1610_DSP_MMU;
  54. else if (cpu_is_omap24xx())
  55. irq = INT_24XX_DSP_MMU;
  56. res = platform_get_resource_byname(&omap_dsp_device,
  57. IORESOURCE_IRQ, "dsp_mmu");
  58. res->start = irq;
  59. platform_device_register(&omap_dsp_device);
  60. }
  61. int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
  62. {
  63. static DEFINE_MUTEX(dsp_pdata_lock);
  64. mutex_init(&kdev->lock);
  65. mutex_lock(&dsp_pdata_lock);
  66. list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
  67. mutex_unlock(&dsp_pdata_lock);
  68. return 0;
  69. }
  70. EXPORT_SYMBOL(dsp_kfunc_device_register);
  71. #else
  72. static inline void omap_init_dsp(void) { }
  73. #endif /* CONFIG_OMAP_DSP */
  74. /*-------------------------------------------------------------------------*/
  75. #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
  76. static void omap_init_kp(void)
  77. {
  78. if (machine_is_omap_h2() || machine_is_omap_h3()) {
  79. omap_cfg_reg(F18_1610_KBC0);
  80. omap_cfg_reg(D20_1610_KBC1);
  81. omap_cfg_reg(D19_1610_KBC2);
  82. omap_cfg_reg(E18_1610_KBC3);
  83. omap_cfg_reg(C21_1610_KBC4);
  84. omap_cfg_reg(G18_1610_KBR0);
  85. omap_cfg_reg(F19_1610_KBR1);
  86. omap_cfg_reg(H14_1610_KBR2);
  87. omap_cfg_reg(E20_1610_KBR3);
  88. omap_cfg_reg(E19_1610_KBR4);
  89. omap_cfg_reg(N19_1610_KBR5);
  90. } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
  91. omap_cfg_reg(E2_730_KBR0);
  92. omap_cfg_reg(J7_730_KBR1);
  93. omap_cfg_reg(E1_730_KBR2);
  94. omap_cfg_reg(F3_730_KBR3);
  95. omap_cfg_reg(D2_730_KBR4);
  96. omap_cfg_reg(C2_730_KBC0);
  97. omap_cfg_reg(D3_730_KBC1);
  98. omap_cfg_reg(E4_730_KBC2);
  99. omap_cfg_reg(F4_730_KBC3);
  100. omap_cfg_reg(E3_730_KBC4);
  101. } else if (machine_is_omap_h4()) {
  102. omap_cfg_reg(T19_24XX_KBR0);
  103. omap_cfg_reg(R19_24XX_KBR1);
  104. omap_cfg_reg(V18_24XX_KBR2);
  105. omap_cfg_reg(M21_24XX_KBR3);
  106. omap_cfg_reg(E5__24XX_KBR4);
  107. if (omap_has_menelaus()) {
  108. omap_cfg_reg(B3__24XX_KBR5);
  109. omap_cfg_reg(AA4_24XX_KBC2);
  110. omap_cfg_reg(B13_24XX_KBC6);
  111. } else {
  112. omap_cfg_reg(M18_24XX_KBR5);
  113. omap_cfg_reg(H19_24XX_KBC2);
  114. omap_cfg_reg(N19_24XX_KBC6);
  115. }
  116. omap_cfg_reg(R20_24XX_KBC0);
  117. omap_cfg_reg(M14_24XX_KBC1);
  118. omap_cfg_reg(V17_24XX_KBC3);
  119. omap_cfg_reg(P21_24XX_KBC4);
  120. omap_cfg_reg(L14_24XX_KBC5);
  121. }
  122. }
  123. #else
  124. static inline void omap_init_kp(void) {}
  125. #endif
  126. /*-------------------------------------------------------------------------*/
  127. #if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)
  128. static struct platform_device **omap_mcbsp_devices;
  129. void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
  130. int size)
  131. {
  132. int i;
  133. if (size > OMAP_MAX_MCBSP_COUNT) {
  134. printk(KERN_WARNING "Registered too many McBSPs platform_data."
  135. " Using maximum (%d) available.\n",
  136. OMAP_MAX_MCBSP_COUNT);
  137. size = OMAP_MAX_MCBSP_COUNT;
  138. }
  139. omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
  140. GFP_KERNEL);
  141. if (!omap_mcbsp_devices) {
  142. printk(KERN_ERR "Could not register McBSP devices\n");
  143. return;
  144. }
  145. for (i = 0; i < size; i++) {
  146. struct platform_device *new_mcbsp;
  147. int ret;
  148. new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
  149. if (!new_mcbsp)
  150. continue;
  151. new_mcbsp->dev.platform_data = &config[i];
  152. ret = platform_device_add(new_mcbsp);
  153. if (ret) {
  154. platform_device_put(new_mcbsp);
  155. continue;
  156. }
  157. omap_mcbsp_devices[i] = new_mcbsp;
  158. }
  159. }
  160. #else
  161. void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
  162. int size)
  163. { }
  164. #endif
  165. /*-------------------------------------------------------------------------*/
  166. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  167. #ifdef CONFIG_ARCH_OMAP24XX
  168. #define OMAP_MMC1_BASE 0x4809c000
  169. #define OMAP_MMC1_INT INT_24XX_MMC_IRQ
  170. #else
  171. #define OMAP_MMC1_BASE 0xfffb7800
  172. #define OMAP_MMC1_INT INT_MMC
  173. #endif
  174. #define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
  175. static struct omap_mmc_conf mmc1_conf;
  176. static u64 mmc1_dmamask = 0xffffffff;
  177. static struct resource mmc1_resources[] = {
  178. {
  179. .start = OMAP_MMC1_BASE,
  180. .end = OMAP_MMC1_BASE + 0x7f,
  181. .flags = IORESOURCE_MEM,
  182. },
  183. {
  184. .start = OMAP_MMC1_INT,
  185. .flags = IORESOURCE_IRQ,
  186. },
  187. };
  188. static struct platform_device mmc_omap_device1 = {
  189. .name = "mmci-omap",
  190. .id = 1,
  191. .dev = {
  192. .dma_mask = &mmc1_dmamask,
  193. .platform_data = &mmc1_conf,
  194. },
  195. .num_resources = ARRAY_SIZE(mmc1_resources),
  196. .resource = mmc1_resources,
  197. };
  198. #ifdef CONFIG_ARCH_OMAP16XX
  199. static struct omap_mmc_conf mmc2_conf;
  200. static u64 mmc2_dmamask = 0xffffffff;
  201. static struct resource mmc2_resources[] = {
  202. {
  203. .start = OMAP_MMC2_BASE,
  204. .end = OMAP_MMC2_BASE + 0x7f,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. {
  208. .start = INT_1610_MMC2,
  209. .flags = IORESOURCE_IRQ,
  210. },
  211. };
  212. static struct platform_device mmc_omap_device2 = {
  213. .name = "mmci-omap",
  214. .id = 2,
  215. .dev = {
  216. .dma_mask = &mmc2_dmamask,
  217. .platform_data = &mmc2_conf,
  218. },
  219. .num_resources = ARRAY_SIZE(mmc2_resources),
  220. .resource = mmc2_resources,
  221. };
  222. #endif
  223. static void __init omap_init_mmc(void)
  224. {
  225. const struct omap_mmc_config *mmc_conf;
  226. const struct omap_mmc_conf *mmc;
  227. /* NOTE: assumes MMC was never (wrongly) enabled */
  228. mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
  229. if (!mmc_conf)
  230. return;
  231. /* block 1 is always available and has just one pinout option */
  232. mmc = &mmc_conf->mmc[0];
  233. if (mmc->enabled) {
  234. if (cpu_is_omap24xx()) {
  235. omap_cfg_reg(H18_24XX_MMC_CMD);
  236. omap_cfg_reg(H15_24XX_MMC_CLKI);
  237. omap_cfg_reg(G19_24XX_MMC_CLKO);
  238. omap_cfg_reg(F20_24XX_MMC_DAT0);
  239. omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
  240. omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
  241. } else {
  242. omap_cfg_reg(MMC_CMD);
  243. omap_cfg_reg(MMC_CLK);
  244. omap_cfg_reg(MMC_DAT0);
  245. if (cpu_is_omap1710()) {
  246. omap_cfg_reg(M15_1710_MMC_CLKI);
  247. omap_cfg_reg(P19_1710_MMC_CMDDIR);
  248. omap_cfg_reg(P20_1710_MMC_DATDIR0);
  249. }
  250. }
  251. if (mmc->wire4) {
  252. if (cpu_is_omap24xx()) {
  253. omap_cfg_reg(H14_24XX_MMC_DAT1);
  254. omap_cfg_reg(E19_24XX_MMC_DAT2);
  255. omap_cfg_reg(D19_24XX_MMC_DAT3);
  256. omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
  257. omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
  258. omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
  259. } else {
  260. omap_cfg_reg(MMC_DAT1);
  261. /* NOTE: DAT2 can be on W10 (here) or M15 */
  262. if (!mmc->nomux)
  263. omap_cfg_reg(MMC_DAT2);
  264. omap_cfg_reg(MMC_DAT3);
  265. }
  266. }
  267. mmc1_conf = *mmc;
  268. (void) platform_device_register(&mmc_omap_device1);
  269. }
  270. #ifdef CONFIG_ARCH_OMAP16XX
  271. /* block 2 is on newer chips, and has many pinout options */
  272. mmc = &mmc_conf->mmc[1];
  273. if (mmc->enabled) {
  274. if (!mmc->nomux) {
  275. omap_cfg_reg(Y8_1610_MMC2_CMD);
  276. omap_cfg_reg(Y10_1610_MMC2_CLK);
  277. omap_cfg_reg(R18_1610_MMC2_CLKIN);
  278. omap_cfg_reg(W8_1610_MMC2_DAT0);
  279. if (mmc->wire4) {
  280. omap_cfg_reg(V8_1610_MMC2_DAT1);
  281. omap_cfg_reg(W15_1610_MMC2_DAT2);
  282. omap_cfg_reg(R10_1610_MMC2_DAT3);
  283. }
  284. /* These are needed for the level shifter */
  285. omap_cfg_reg(V9_1610_MMC2_CMDDIR);
  286. omap_cfg_reg(V5_1610_MMC2_DATDIR0);
  287. omap_cfg_reg(W19_1610_MMC2_DATDIR1);
  288. }
  289. /* Feedback clock must be set on OMAP-1710 MMC2 */
  290. if (cpu_is_omap1710())
  291. omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
  292. MOD_CONF_CTRL_1);
  293. mmc2_conf = *mmc;
  294. (void) platform_device_register(&mmc_omap_device2);
  295. }
  296. #endif
  297. return;
  298. }
  299. #else
  300. static inline void omap_init_mmc(void) {}
  301. #endif
  302. /*-------------------------------------------------------------------------*/
  303. /* Numbering for the SPI-capable controllers when used for SPI:
  304. * spi = 1
  305. * uwire = 2
  306. * mmc1..2 = 3..4
  307. * mcbsp1..3 = 5..7
  308. */
  309. #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
  310. #define OMAP_UWIRE_BASE 0xfffb3000
  311. static struct resource uwire_resources[] = {
  312. {
  313. .start = OMAP_UWIRE_BASE,
  314. .end = OMAP_UWIRE_BASE + 0x20,
  315. .flags = IORESOURCE_MEM,
  316. },
  317. };
  318. static struct platform_device omap_uwire_device = {
  319. .name = "omap_uwire",
  320. .id = -1,
  321. .num_resources = ARRAY_SIZE(uwire_resources),
  322. .resource = uwire_resources,
  323. };
  324. static void omap_init_uwire(void)
  325. {
  326. /* FIXME define and use a boot tag; not all boards will be hooking
  327. * up devices to the microwire controller, and multi-board configs
  328. * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
  329. */
  330. /* board-specific code must configure chipselects (only a few
  331. * are normally used) and SCLK/SDI/SDO (each has two choices).
  332. */
  333. (void) platform_device_register(&omap_uwire_device);
  334. }
  335. #else
  336. static inline void omap_init_uwire(void) {}
  337. #endif
  338. /*-------------------------------------------------------------------------*/
  339. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  340. #ifdef CONFIG_ARCH_OMAP24XX
  341. #define OMAP_WDT_BASE 0x48022000
  342. #else
  343. #define OMAP_WDT_BASE 0xfffeb000
  344. #endif
  345. static struct resource wdt_resources[] = {
  346. {
  347. .start = OMAP_WDT_BASE,
  348. .end = OMAP_WDT_BASE + 0x4f,
  349. .flags = IORESOURCE_MEM,
  350. },
  351. };
  352. static struct platform_device omap_wdt_device = {
  353. .name = "omap_wdt",
  354. .id = -1,
  355. .num_resources = ARRAY_SIZE(wdt_resources),
  356. .resource = wdt_resources,
  357. };
  358. static void omap_init_wdt(void)
  359. {
  360. (void) platform_device_register(&omap_wdt_device);
  361. }
  362. #else
  363. static inline void omap_init_wdt(void) {}
  364. #endif
  365. /*-------------------------------------------------------------------------*/
  366. #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
  367. #ifdef CONFIG_ARCH_OMAP24XX
  368. #define OMAP_RNG_BASE 0x480A0000
  369. #else
  370. #define OMAP_RNG_BASE 0xfffe5000
  371. #endif
  372. static struct resource rng_resources[] = {
  373. {
  374. .start = OMAP_RNG_BASE,
  375. .end = OMAP_RNG_BASE + 0x4f,
  376. .flags = IORESOURCE_MEM,
  377. },
  378. };
  379. static struct platform_device omap_rng_device = {
  380. .name = "omap_rng",
  381. .id = -1,
  382. .num_resources = ARRAY_SIZE(rng_resources),
  383. .resource = rng_resources,
  384. };
  385. static void omap_init_rng(void)
  386. {
  387. (void) platform_device_register(&omap_rng_device);
  388. }
  389. #else
  390. static inline void omap_init_rng(void) {}
  391. #endif
  392. /*
  393. * This gets called after board-specific INIT_MACHINE, and initializes most
  394. * on-chip peripherals accessible on this board (except for few like USB):
  395. *
  396. * (a) Does any "standard config" pin muxing needed. Board-specific
  397. * code will have muxed GPIO pins and done "nonstandard" setup;
  398. * that code could live in the boot loader.
  399. * (b) Populating board-specific platform_data with the data drivers
  400. * rely on to handle wiring variations.
  401. * (c) Creating platform devices as meaningful on this board and
  402. * with this kernel configuration.
  403. *
  404. * Claiming GPIOs, and setting their direction and initial values, is the
  405. * responsibility of the device drivers. So is responding to probe().
  406. *
  407. * Board-specific knowlege like creating devices or pin setup is to be
  408. * kept out of drivers as much as possible. In particular, pin setup
  409. * may be handled by the boot loader, and drivers should expect it will
  410. * normally have been done by the time they're probed.
  411. */
  412. static int __init omap_init_devices(void)
  413. {
  414. /*
  415. * Need to enable relevant once for 2430 SDP
  416. */
  417. #ifndef CONFIG_MACH_OMAP_2430SDP
  418. /* please keep these calls, and their implementations above,
  419. * in alphabetical order so they're easier to sort through.
  420. */
  421. omap_init_dsp();
  422. omap_init_kp();
  423. omap_init_mmc();
  424. omap_init_uwire();
  425. omap_init_wdt();
  426. omap_init_rng();
  427. #endif
  428. return 0;
  429. }
  430. arch_initcall(omap_init_devices);