devices.c 16 KB

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  1. #include <linux/module.h>
  2. #include <linux/kernel.h>
  3. #include <linux/init.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/dma-mapping.h>
  6. #include <asm/arch/gpio.h>
  7. #include <asm/arch/udc.h>
  8. #include <asm/arch/pxafb.h>
  9. #include <asm/arch/mmc.h>
  10. #include <asm/arch/irda.h>
  11. #include <asm/arch/i2c.h>
  12. #include <asm/arch/mfp-pxa27x.h>
  13. #include <asm/arch/ohci.h>
  14. #include <asm/arch/pxa27x_keypad.h>
  15. #include <asm/arch/camera.h>
  16. #include <asm/arch/audio.h>
  17. #include "devices.h"
  18. #include "generic.h"
  19. void __init pxa_register_device(struct platform_device *dev, void *data)
  20. {
  21. int ret;
  22. dev->dev.platform_data = data;
  23. ret = platform_device_register(dev);
  24. if (ret)
  25. dev_err(&dev->dev, "unable to register device: %d\n", ret);
  26. }
  27. static struct resource pxamci_resources[] = {
  28. [0] = {
  29. .start = 0x41100000,
  30. .end = 0x41100fff,
  31. .flags = IORESOURCE_MEM,
  32. },
  33. [1] = {
  34. .start = IRQ_MMC,
  35. .end = IRQ_MMC,
  36. .flags = IORESOURCE_IRQ,
  37. },
  38. [2] = {
  39. .start = 21,
  40. .end = 21,
  41. .flags = IORESOURCE_DMA,
  42. },
  43. [3] = {
  44. .start = 22,
  45. .end = 22,
  46. .flags = IORESOURCE_DMA,
  47. },
  48. };
  49. static u64 pxamci_dmamask = 0xffffffffUL;
  50. struct platform_device pxa_device_mci = {
  51. .name = "pxa2xx-mci",
  52. .id = 0,
  53. .dev = {
  54. .dma_mask = &pxamci_dmamask,
  55. .coherent_dma_mask = 0xffffffff,
  56. },
  57. .num_resources = ARRAY_SIZE(pxamci_resources),
  58. .resource = pxamci_resources,
  59. };
  60. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  61. {
  62. pxa_register_device(&pxa_device_mci, info);
  63. }
  64. static struct pxa2xx_udc_mach_info pxa_udc_info;
  65. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  66. {
  67. memcpy(&pxa_udc_info, info, sizeof *info);
  68. }
  69. static struct resource pxa2xx_udc_resources[] = {
  70. [0] = {
  71. .start = 0x40600000,
  72. .end = 0x4060ffff,
  73. .flags = IORESOURCE_MEM,
  74. },
  75. [1] = {
  76. .start = IRQ_USB,
  77. .end = IRQ_USB,
  78. .flags = IORESOURCE_IRQ,
  79. },
  80. };
  81. static u64 udc_dma_mask = ~(u32)0;
  82. struct platform_device pxa25x_device_udc = {
  83. .name = "pxa25x-udc",
  84. .id = -1,
  85. .resource = pxa2xx_udc_resources,
  86. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  87. .dev = {
  88. .platform_data = &pxa_udc_info,
  89. .dma_mask = &udc_dma_mask,
  90. }
  91. };
  92. struct platform_device pxa27x_device_udc = {
  93. .name = "pxa27x-udc",
  94. .id = -1,
  95. .resource = pxa2xx_udc_resources,
  96. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  97. .dev = {
  98. .platform_data = &pxa_udc_info,
  99. .dma_mask = &udc_dma_mask,
  100. }
  101. };
  102. static struct resource pxafb_resources[] = {
  103. [0] = {
  104. .start = 0x44000000,
  105. .end = 0x4400ffff,
  106. .flags = IORESOURCE_MEM,
  107. },
  108. [1] = {
  109. .start = IRQ_LCD,
  110. .end = IRQ_LCD,
  111. .flags = IORESOURCE_IRQ,
  112. },
  113. };
  114. static u64 fb_dma_mask = ~(u64)0;
  115. struct platform_device pxa_device_fb = {
  116. .name = "pxa2xx-fb",
  117. .id = -1,
  118. .dev = {
  119. .dma_mask = &fb_dma_mask,
  120. .coherent_dma_mask = 0xffffffff,
  121. },
  122. .num_resources = ARRAY_SIZE(pxafb_resources),
  123. .resource = pxafb_resources,
  124. };
  125. void __init set_pxa_fb_info(struct pxafb_mach_info *info)
  126. {
  127. pxa_register_device(&pxa_device_fb, info);
  128. }
  129. void __init set_pxa_fb_parent(struct device *parent_dev)
  130. {
  131. pxa_device_fb.dev.parent = parent_dev;
  132. }
  133. static struct resource pxa_resource_ffuart[] = {
  134. {
  135. .start = __PREG(FFUART),
  136. .end = __PREG(FFUART) + 35,
  137. .flags = IORESOURCE_MEM,
  138. }, {
  139. .start = IRQ_FFUART,
  140. .end = IRQ_FFUART,
  141. .flags = IORESOURCE_IRQ,
  142. }
  143. };
  144. struct platform_device pxa_device_ffuart= {
  145. .name = "pxa2xx-uart",
  146. .id = 0,
  147. .resource = pxa_resource_ffuart,
  148. .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
  149. };
  150. static struct resource pxa_resource_btuart[] = {
  151. {
  152. .start = __PREG(BTUART),
  153. .end = __PREG(BTUART) + 35,
  154. .flags = IORESOURCE_MEM,
  155. }, {
  156. .start = IRQ_BTUART,
  157. .end = IRQ_BTUART,
  158. .flags = IORESOURCE_IRQ,
  159. }
  160. };
  161. struct platform_device pxa_device_btuart = {
  162. .name = "pxa2xx-uart",
  163. .id = 1,
  164. .resource = pxa_resource_btuart,
  165. .num_resources = ARRAY_SIZE(pxa_resource_btuart),
  166. };
  167. static struct resource pxa_resource_stuart[] = {
  168. {
  169. .start = __PREG(STUART),
  170. .end = __PREG(STUART) + 35,
  171. .flags = IORESOURCE_MEM,
  172. }, {
  173. .start = IRQ_STUART,
  174. .end = IRQ_STUART,
  175. .flags = IORESOURCE_IRQ,
  176. }
  177. };
  178. struct platform_device pxa_device_stuart = {
  179. .name = "pxa2xx-uart",
  180. .id = 2,
  181. .resource = pxa_resource_stuart,
  182. .num_resources = ARRAY_SIZE(pxa_resource_stuart),
  183. };
  184. static struct resource pxa_resource_hwuart[] = {
  185. {
  186. .start = __PREG(HWUART),
  187. .end = __PREG(HWUART) + 47,
  188. .flags = IORESOURCE_MEM,
  189. }, {
  190. .start = IRQ_HWUART,
  191. .end = IRQ_HWUART,
  192. .flags = IORESOURCE_IRQ,
  193. }
  194. };
  195. struct platform_device pxa_device_hwuart = {
  196. .name = "pxa2xx-uart",
  197. .id = 3,
  198. .resource = pxa_resource_hwuart,
  199. .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
  200. };
  201. static struct resource pxai2c_resources[] = {
  202. {
  203. .start = 0x40301680,
  204. .end = 0x403016a3,
  205. .flags = IORESOURCE_MEM,
  206. }, {
  207. .start = IRQ_I2C,
  208. .end = IRQ_I2C,
  209. .flags = IORESOURCE_IRQ,
  210. },
  211. };
  212. struct platform_device pxa_device_i2c = {
  213. .name = "pxa2xx-i2c",
  214. .id = 0,
  215. .resource = pxai2c_resources,
  216. .num_resources = ARRAY_SIZE(pxai2c_resources),
  217. };
  218. static unsigned long pxa27x_i2c_mfp_cfg[] = {
  219. GPIO117_I2C_SCL,
  220. GPIO118_I2C_SDA,
  221. };
  222. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  223. {
  224. if (cpu_is_pxa27x())
  225. pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
  226. pxa_register_device(&pxa_device_i2c, info);
  227. }
  228. static struct resource pxai2s_resources[] = {
  229. {
  230. .start = 0x40400000,
  231. .end = 0x40400083,
  232. .flags = IORESOURCE_MEM,
  233. }, {
  234. .start = IRQ_I2S,
  235. .end = IRQ_I2S,
  236. .flags = IORESOURCE_IRQ,
  237. },
  238. };
  239. struct platform_device pxa_device_i2s = {
  240. .name = "pxa2xx-i2s",
  241. .id = -1,
  242. .resource = pxai2s_resources,
  243. .num_resources = ARRAY_SIZE(pxai2s_resources),
  244. };
  245. static u64 pxaficp_dmamask = ~(u32)0;
  246. struct platform_device pxa_device_ficp = {
  247. .name = "pxa2xx-ir",
  248. .id = -1,
  249. .dev = {
  250. .dma_mask = &pxaficp_dmamask,
  251. .coherent_dma_mask = 0xffffffff,
  252. },
  253. };
  254. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  255. {
  256. pxa_register_device(&pxa_device_ficp, info);
  257. }
  258. struct platform_device pxa_device_rtc = {
  259. .name = "sa1100-rtc",
  260. .id = -1,
  261. };
  262. static struct resource pxa_ac97_resources[] = {
  263. [0] = {
  264. .start = 0x40500000,
  265. .end = 0x40500000 + 0xfff,
  266. .flags = IORESOURCE_MEM,
  267. },
  268. [1] = {
  269. .start = IRQ_AC97,
  270. .end = IRQ_AC97,
  271. .flags = IORESOURCE_IRQ,
  272. },
  273. };
  274. static u64 pxa_ac97_dmamask = 0xffffffffUL;
  275. struct platform_device pxa_device_ac97 = {
  276. .name = "pxa2xx-ac97",
  277. .id = -1,
  278. .dev = {
  279. .dma_mask = &pxa_ac97_dmamask,
  280. .coherent_dma_mask = 0xffffffff,
  281. },
  282. .num_resources = ARRAY_SIZE(pxa_ac97_resources),
  283. .resource = pxa_ac97_resources,
  284. };
  285. void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
  286. {
  287. pxa_register_device(&pxa_device_ac97, ops);
  288. }
  289. #ifdef CONFIG_PXA25x
  290. static struct resource pxa25x_resource_pwm0[] = {
  291. [0] = {
  292. .start = 0x40b00000,
  293. .end = 0x40b0000f,
  294. .flags = IORESOURCE_MEM,
  295. },
  296. };
  297. struct platform_device pxa25x_device_pwm0 = {
  298. .name = "pxa25x-pwm",
  299. .id = 0,
  300. .resource = pxa25x_resource_pwm0,
  301. .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
  302. };
  303. static struct resource pxa25x_resource_pwm1[] = {
  304. [0] = {
  305. .start = 0x40c00000,
  306. .end = 0x40c0000f,
  307. .flags = IORESOURCE_MEM,
  308. },
  309. };
  310. struct platform_device pxa25x_device_pwm1 = {
  311. .name = "pxa25x-pwm",
  312. .id = 1,
  313. .resource = pxa25x_resource_pwm1,
  314. .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
  315. };
  316. static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
  317. static struct resource pxa25x_resource_ssp[] = {
  318. [0] = {
  319. .start = 0x41000000,
  320. .end = 0x4100001f,
  321. .flags = IORESOURCE_MEM,
  322. },
  323. [1] = {
  324. .start = IRQ_SSP,
  325. .end = IRQ_SSP,
  326. .flags = IORESOURCE_IRQ,
  327. },
  328. [2] = {
  329. /* DRCMR for RX */
  330. .start = 13,
  331. .end = 13,
  332. .flags = IORESOURCE_DMA,
  333. },
  334. [3] = {
  335. /* DRCMR for TX */
  336. .start = 14,
  337. .end = 14,
  338. .flags = IORESOURCE_DMA,
  339. },
  340. };
  341. struct platform_device pxa25x_device_ssp = {
  342. .name = "pxa25x-ssp",
  343. .id = 0,
  344. .dev = {
  345. .dma_mask = &pxa25x_ssp_dma_mask,
  346. .coherent_dma_mask = DMA_BIT_MASK(32),
  347. },
  348. .resource = pxa25x_resource_ssp,
  349. .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
  350. };
  351. static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
  352. static struct resource pxa25x_resource_nssp[] = {
  353. [0] = {
  354. .start = 0x41400000,
  355. .end = 0x4140002f,
  356. .flags = IORESOURCE_MEM,
  357. },
  358. [1] = {
  359. .start = IRQ_NSSP,
  360. .end = IRQ_NSSP,
  361. .flags = IORESOURCE_IRQ,
  362. },
  363. [2] = {
  364. /* DRCMR for RX */
  365. .start = 15,
  366. .end = 15,
  367. .flags = IORESOURCE_DMA,
  368. },
  369. [3] = {
  370. /* DRCMR for TX */
  371. .start = 16,
  372. .end = 16,
  373. .flags = IORESOURCE_DMA,
  374. },
  375. };
  376. struct platform_device pxa25x_device_nssp = {
  377. .name = "pxa25x-nssp",
  378. .id = 1,
  379. .dev = {
  380. .dma_mask = &pxa25x_nssp_dma_mask,
  381. .coherent_dma_mask = DMA_BIT_MASK(32),
  382. },
  383. .resource = pxa25x_resource_nssp,
  384. .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
  385. };
  386. static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
  387. static struct resource pxa25x_resource_assp[] = {
  388. [0] = {
  389. .start = 0x41500000,
  390. .end = 0x4150002f,
  391. .flags = IORESOURCE_MEM,
  392. },
  393. [1] = {
  394. .start = IRQ_ASSP,
  395. .end = IRQ_ASSP,
  396. .flags = IORESOURCE_IRQ,
  397. },
  398. [2] = {
  399. /* DRCMR for RX */
  400. .start = 23,
  401. .end = 23,
  402. .flags = IORESOURCE_DMA,
  403. },
  404. [3] = {
  405. /* DRCMR for TX */
  406. .start = 24,
  407. .end = 24,
  408. .flags = IORESOURCE_DMA,
  409. },
  410. };
  411. struct platform_device pxa25x_device_assp = {
  412. /* ASSP is basically equivalent to NSSP */
  413. .name = "pxa25x-nssp",
  414. .id = 2,
  415. .dev = {
  416. .dma_mask = &pxa25x_assp_dma_mask,
  417. .coherent_dma_mask = DMA_BIT_MASK(32),
  418. },
  419. .resource = pxa25x_resource_assp,
  420. .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
  421. };
  422. #endif /* CONFIG_PXA25x */
  423. #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  424. static struct resource pxa27x_resource_keypad[] = {
  425. [0] = {
  426. .start = 0x41500000,
  427. .end = 0x4150004c,
  428. .flags = IORESOURCE_MEM,
  429. },
  430. [1] = {
  431. .start = IRQ_KEYPAD,
  432. .end = IRQ_KEYPAD,
  433. .flags = IORESOURCE_IRQ,
  434. },
  435. };
  436. struct platform_device pxa27x_device_keypad = {
  437. .name = "pxa27x-keypad",
  438. .id = -1,
  439. .resource = pxa27x_resource_keypad,
  440. .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
  441. };
  442. void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
  443. {
  444. pxa_register_device(&pxa27x_device_keypad, info);
  445. }
  446. static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
  447. static struct resource pxa27x_resource_ohci[] = {
  448. [0] = {
  449. .start = 0x4C000000,
  450. .end = 0x4C00ff6f,
  451. .flags = IORESOURCE_MEM,
  452. },
  453. [1] = {
  454. .start = IRQ_USBH1,
  455. .end = IRQ_USBH1,
  456. .flags = IORESOURCE_IRQ,
  457. },
  458. };
  459. struct platform_device pxa27x_device_ohci = {
  460. .name = "pxa27x-ohci",
  461. .id = -1,
  462. .dev = {
  463. .dma_mask = &pxa27x_ohci_dma_mask,
  464. .coherent_dma_mask = DMA_BIT_MASK(32),
  465. },
  466. .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
  467. .resource = pxa27x_resource_ohci,
  468. };
  469. void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
  470. {
  471. pxa_register_device(&pxa27x_device_ohci, info);
  472. }
  473. static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
  474. static struct resource pxa27x_resource_ssp1[] = {
  475. [0] = {
  476. .start = 0x41000000,
  477. .end = 0x4100003f,
  478. .flags = IORESOURCE_MEM,
  479. },
  480. [1] = {
  481. .start = IRQ_SSP,
  482. .end = IRQ_SSP,
  483. .flags = IORESOURCE_IRQ,
  484. },
  485. [2] = {
  486. /* DRCMR for RX */
  487. .start = 13,
  488. .end = 13,
  489. .flags = IORESOURCE_DMA,
  490. },
  491. [3] = {
  492. /* DRCMR for TX */
  493. .start = 14,
  494. .end = 14,
  495. .flags = IORESOURCE_DMA,
  496. },
  497. };
  498. struct platform_device pxa27x_device_ssp1 = {
  499. .name = "pxa27x-ssp",
  500. .id = 0,
  501. .dev = {
  502. .dma_mask = &pxa27x_ssp1_dma_mask,
  503. .coherent_dma_mask = DMA_BIT_MASK(32),
  504. },
  505. .resource = pxa27x_resource_ssp1,
  506. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
  507. };
  508. static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
  509. static struct resource pxa27x_resource_ssp2[] = {
  510. [0] = {
  511. .start = 0x41700000,
  512. .end = 0x4170003f,
  513. .flags = IORESOURCE_MEM,
  514. },
  515. [1] = {
  516. .start = IRQ_SSP2,
  517. .end = IRQ_SSP2,
  518. .flags = IORESOURCE_IRQ,
  519. },
  520. [2] = {
  521. /* DRCMR for RX */
  522. .start = 15,
  523. .end = 15,
  524. .flags = IORESOURCE_DMA,
  525. },
  526. [3] = {
  527. /* DRCMR for TX */
  528. .start = 16,
  529. .end = 16,
  530. .flags = IORESOURCE_DMA,
  531. },
  532. };
  533. struct platform_device pxa27x_device_ssp2 = {
  534. .name = "pxa27x-ssp",
  535. .id = 1,
  536. .dev = {
  537. .dma_mask = &pxa27x_ssp2_dma_mask,
  538. .coherent_dma_mask = DMA_BIT_MASK(32),
  539. },
  540. .resource = pxa27x_resource_ssp2,
  541. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
  542. };
  543. static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
  544. static struct resource pxa27x_resource_ssp3[] = {
  545. [0] = {
  546. .start = 0x41900000,
  547. .end = 0x4190003f,
  548. .flags = IORESOURCE_MEM,
  549. },
  550. [1] = {
  551. .start = IRQ_SSP3,
  552. .end = IRQ_SSP3,
  553. .flags = IORESOURCE_IRQ,
  554. },
  555. [2] = {
  556. /* DRCMR for RX */
  557. .start = 66,
  558. .end = 66,
  559. .flags = IORESOURCE_DMA,
  560. },
  561. [3] = {
  562. /* DRCMR for TX */
  563. .start = 67,
  564. .end = 67,
  565. .flags = IORESOURCE_DMA,
  566. },
  567. };
  568. struct platform_device pxa27x_device_ssp3 = {
  569. .name = "pxa27x-ssp",
  570. .id = 2,
  571. .dev = {
  572. .dma_mask = &pxa27x_ssp3_dma_mask,
  573. .coherent_dma_mask = DMA_BIT_MASK(32),
  574. },
  575. .resource = pxa27x_resource_ssp3,
  576. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
  577. };
  578. static struct resource pxa27x_resource_pwm0[] = {
  579. [0] = {
  580. .start = 0x40b00000,
  581. .end = 0x40b0001f,
  582. .flags = IORESOURCE_MEM,
  583. },
  584. };
  585. struct platform_device pxa27x_device_pwm0 = {
  586. .name = "pxa27x-pwm",
  587. .id = 0,
  588. .resource = pxa27x_resource_pwm0,
  589. .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
  590. };
  591. static struct resource pxa27x_resource_pwm1[] = {
  592. [0] = {
  593. .start = 0x40c00000,
  594. .end = 0x40c0001f,
  595. .flags = IORESOURCE_MEM,
  596. },
  597. };
  598. struct platform_device pxa27x_device_pwm1 = {
  599. .name = "pxa27x-pwm",
  600. .id = 1,
  601. .resource = pxa27x_resource_pwm1,
  602. .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
  603. };
  604. static struct resource pxa27x_resource_camera[] = {
  605. [0] = {
  606. .start = 0x50000000,
  607. .end = 0x50000fff,
  608. .flags = IORESOURCE_MEM,
  609. },
  610. [1] = {
  611. .start = IRQ_CAMERA,
  612. .end = IRQ_CAMERA,
  613. .flags = IORESOURCE_IRQ,
  614. },
  615. };
  616. static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
  617. static struct platform_device pxa27x_device_camera = {
  618. .name = "pxa27x-camera",
  619. .id = 0, /* This is used to put cameras on this interface */
  620. .dev = {
  621. .dma_mask = &pxa27x_dma_mask_camera,
  622. .coherent_dma_mask = 0xffffffff,
  623. },
  624. .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
  625. .resource = pxa27x_resource_camera,
  626. };
  627. void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
  628. {
  629. pxa_register_device(&pxa27x_device_camera, info);
  630. }
  631. #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
  632. #ifdef CONFIG_PXA3xx
  633. static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
  634. static struct resource pxa3xx_resource_ssp4[] = {
  635. [0] = {
  636. .start = 0x41a00000,
  637. .end = 0x41a0003f,
  638. .flags = IORESOURCE_MEM,
  639. },
  640. [1] = {
  641. .start = IRQ_SSP4,
  642. .end = IRQ_SSP4,
  643. .flags = IORESOURCE_IRQ,
  644. },
  645. [2] = {
  646. /* DRCMR for RX */
  647. .start = 2,
  648. .end = 2,
  649. .flags = IORESOURCE_DMA,
  650. },
  651. [3] = {
  652. /* DRCMR for TX */
  653. .start = 3,
  654. .end = 3,
  655. .flags = IORESOURCE_DMA,
  656. },
  657. };
  658. struct platform_device pxa3xx_device_ssp4 = {
  659. /* PXA3xx SSP is basically equivalent to PXA27x */
  660. .name = "pxa27x-ssp",
  661. .id = 3,
  662. .dev = {
  663. .dma_mask = &pxa3xx_ssp4_dma_mask,
  664. .coherent_dma_mask = DMA_BIT_MASK(32),
  665. },
  666. .resource = pxa3xx_resource_ssp4,
  667. .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
  668. };
  669. static struct resource pxa3xx_resources_mci2[] = {
  670. [0] = {
  671. .start = 0x42000000,
  672. .end = 0x42000fff,
  673. .flags = IORESOURCE_MEM,
  674. },
  675. [1] = {
  676. .start = IRQ_MMC2,
  677. .end = IRQ_MMC2,
  678. .flags = IORESOURCE_IRQ,
  679. },
  680. [2] = {
  681. .start = 93,
  682. .end = 93,
  683. .flags = IORESOURCE_DMA,
  684. },
  685. [3] = {
  686. .start = 94,
  687. .end = 94,
  688. .flags = IORESOURCE_DMA,
  689. },
  690. };
  691. struct platform_device pxa3xx_device_mci2 = {
  692. .name = "pxa2xx-mci",
  693. .id = 1,
  694. .dev = {
  695. .dma_mask = &pxamci_dmamask,
  696. .coherent_dma_mask = 0xffffffff,
  697. },
  698. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
  699. .resource = pxa3xx_resources_mci2,
  700. };
  701. void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
  702. {
  703. pxa_register_device(&pxa3xx_device_mci2, info);
  704. }
  705. static struct resource pxa3xx_resources_mci3[] = {
  706. [0] = {
  707. .start = 0x42500000,
  708. .end = 0x42500fff,
  709. .flags = IORESOURCE_MEM,
  710. },
  711. [1] = {
  712. .start = IRQ_MMC3,
  713. .end = IRQ_MMC3,
  714. .flags = IORESOURCE_IRQ,
  715. },
  716. [2] = {
  717. .start = 100,
  718. .end = 100,
  719. .flags = IORESOURCE_DMA,
  720. },
  721. [3] = {
  722. .start = 101,
  723. .end = 101,
  724. .flags = IORESOURCE_DMA,
  725. },
  726. };
  727. struct platform_device pxa3xx_device_mci3 = {
  728. .name = "pxa2xx-mci",
  729. .id = 2,
  730. .dev = {
  731. .dma_mask = &pxamci_dmamask,
  732. .coherent_dma_mask = 0xffffffff,
  733. },
  734. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
  735. .resource = pxa3xx_resources_mci3,
  736. };
  737. void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
  738. {
  739. pxa_register_device(&pxa3xx_device_mci3, info);
  740. }
  741. #endif /* CONFIG_PXA3xx */