arizona-core.c 21 KB

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  1. /*
  2. * Arizona core driver
  3. *
  4. * Copyright 2012 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/mfd/core.h>
  17. #include <linux/module.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <linux/mfd/arizona/core.h>
  23. #include <linux/mfd/arizona/registers.h>
  24. #include "arizona.h"
  25. static const char *wm5102_core_supplies[] = {
  26. "AVDD",
  27. "DBVDD1",
  28. };
  29. int arizona_clk32k_enable(struct arizona *arizona)
  30. {
  31. int ret = 0;
  32. mutex_lock(&arizona->clk_lock);
  33. arizona->clk32k_ref++;
  34. if (arizona->clk32k_ref == 1) {
  35. switch (arizona->pdata.clk32k_src) {
  36. case ARIZONA_32KZ_MCLK1:
  37. ret = pm_runtime_get_sync(arizona->dev);
  38. if (ret != 0)
  39. goto out;
  40. break;
  41. }
  42. ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  43. ARIZONA_CLK_32K_ENA,
  44. ARIZONA_CLK_32K_ENA);
  45. }
  46. out:
  47. if (ret != 0)
  48. arizona->clk32k_ref--;
  49. mutex_unlock(&arizona->clk_lock);
  50. return ret;
  51. }
  52. EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
  53. int arizona_clk32k_disable(struct arizona *arizona)
  54. {
  55. int ret = 0;
  56. mutex_lock(&arizona->clk_lock);
  57. BUG_ON(arizona->clk32k_ref <= 0);
  58. arizona->clk32k_ref--;
  59. if (arizona->clk32k_ref == 0) {
  60. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  61. ARIZONA_CLK_32K_ENA, 0);
  62. switch (arizona->pdata.clk32k_src) {
  63. case ARIZONA_32KZ_MCLK1:
  64. pm_runtime_put_sync(arizona->dev);
  65. break;
  66. }
  67. }
  68. mutex_unlock(&arizona->clk_lock);
  69. return ret;
  70. }
  71. EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
  72. static irqreturn_t arizona_clkgen_err(int irq, void *data)
  73. {
  74. struct arizona *arizona = data;
  75. dev_err(arizona->dev, "CLKGEN error\n");
  76. return IRQ_HANDLED;
  77. }
  78. static irqreturn_t arizona_underclocked(int irq, void *data)
  79. {
  80. struct arizona *arizona = data;
  81. unsigned int val;
  82. int ret;
  83. ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
  84. &val);
  85. if (ret != 0) {
  86. dev_err(arizona->dev, "Failed to read underclock status: %d\n",
  87. ret);
  88. return IRQ_NONE;
  89. }
  90. if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
  91. dev_err(arizona->dev, "AIF3 underclocked\n");
  92. if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
  93. dev_err(arizona->dev, "AIF2 underclocked\n");
  94. if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
  95. dev_err(arizona->dev, "AIF1 underclocked\n");
  96. if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
  97. dev_err(arizona->dev, "ISRC2 underclocked\n");
  98. if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
  99. dev_err(arizona->dev, "ISRC1 underclocked\n");
  100. if (val & ARIZONA_FX_UNDERCLOCKED_STS)
  101. dev_err(arizona->dev, "FX underclocked\n");
  102. if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
  103. dev_err(arizona->dev, "ASRC underclocked\n");
  104. if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
  105. dev_err(arizona->dev, "DAC underclocked\n");
  106. if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
  107. dev_err(arizona->dev, "ADC underclocked\n");
  108. if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
  109. dev_err(arizona->dev, "Mixer dropped sample\n");
  110. return IRQ_HANDLED;
  111. }
  112. static irqreturn_t arizona_overclocked(int irq, void *data)
  113. {
  114. struct arizona *arizona = data;
  115. unsigned int val[2];
  116. int ret;
  117. ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
  118. &val[0], 2);
  119. if (ret != 0) {
  120. dev_err(arizona->dev, "Failed to read overclock status: %d\n",
  121. ret);
  122. return IRQ_NONE;
  123. }
  124. if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
  125. dev_err(arizona->dev, "PWM overclocked\n");
  126. if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
  127. dev_err(arizona->dev, "FX core overclocked\n");
  128. if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
  129. dev_err(arizona->dev, "DAC SYS overclocked\n");
  130. if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
  131. dev_err(arizona->dev, "DAC WARP overclocked\n");
  132. if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
  133. dev_err(arizona->dev, "ADC overclocked\n");
  134. if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
  135. dev_err(arizona->dev, "Mixer overclocked\n");
  136. if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
  137. dev_err(arizona->dev, "AIF3 overclocked\n");
  138. if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
  139. dev_err(arizona->dev, "AIF2 overclocked\n");
  140. if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
  141. dev_err(arizona->dev, "AIF1 overclocked\n");
  142. if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
  143. dev_err(arizona->dev, "Pad control overclocked\n");
  144. if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
  145. dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
  146. if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
  147. dev_err(arizona->dev, "Slimbus async overclocked\n");
  148. if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
  149. dev_err(arizona->dev, "Slimbus sync overclocked\n");
  150. if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
  151. dev_err(arizona->dev, "ASRC async system overclocked\n");
  152. if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
  153. dev_err(arizona->dev, "ASRC async WARP overclocked\n");
  154. if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
  155. dev_err(arizona->dev, "ASRC sync system overclocked\n");
  156. if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
  157. dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
  158. if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
  159. dev_err(arizona->dev, "DSP1 overclocked\n");
  160. if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
  161. dev_err(arizona->dev, "ISRC2 overclocked\n");
  162. if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
  163. dev_err(arizona->dev, "ISRC1 overclocked\n");
  164. return IRQ_HANDLED;
  165. }
  166. static int arizona_poll_reg(struct arizona *arizona,
  167. int timeout, unsigned int reg,
  168. unsigned int mask, unsigned int target)
  169. {
  170. unsigned int val = 0;
  171. int ret, i;
  172. for (i = 0; i < timeout; i++) {
  173. ret = regmap_read(arizona->regmap, reg, &val);
  174. if (ret != 0) {
  175. dev_err(arizona->dev, "Failed to read reg %u: %d\n",
  176. reg, ret);
  177. continue;
  178. }
  179. if ((val & mask) == target)
  180. return 0;
  181. msleep(1);
  182. }
  183. dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
  184. return -ETIMEDOUT;
  185. }
  186. static int arizona_wait_for_boot(struct arizona *arizona)
  187. {
  188. int ret;
  189. /*
  190. * We can't use an interrupt as we need to runtime resume to do so,
  191. * we won't race with the interrupt handler as it'll be blocked on
  192. * runtime resume.
  193. */
  194. ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
  195. ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
  196. if (!ret)
  197. regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
  198. ARIZONA_BOOT_DONE_STS);
  199. pm_runtime_mark_last_busy(arizona->dev);
  200. return ret;
  201. }
  202. static int arizona_apply_hardware_patch(struct arizona* arizona)
  203. {
  204. unsigned int fll, sysclk;
  205. int ret, err;
  206. regcache_cache_bypass(arizona->regmap, true);
  207. /* Cache existing FLL and SYSCLK settings */
  208. ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
  209. if (ret != 0) {
  210. dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
  211. ret);
  212. return ret;
  213. }
  214. ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
  215. if (ret != 0) {
  216. dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
  217. ret);
  218. return ret;
  219. }
  220. /* Start up SYSCLK using the FLL in free running mode */
  221. ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
  222. ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
  223. if (ret != 0) {
  224. dev_err(arizona->dev,
  225. "Failed to start FLL in freerunning mode: %d\n",
  226. ret);
  227. return ret;
  228. }
  229. ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
  230. ARIZONA_FLL1_CLOCK_OK_STS,
  231. ARIZONA_FLL1_CLOCK_OK_STS);
  232. if (ret != 0) {
  233. ret = -ETIMEDOUT;
  234. goto err_fll;
  235. }
  236. ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
  237. if (ret != 0) {
  238. dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
  239. goto err_fll;
  240. }
  241. /* Start the write sequencer and wait for it to finish */
  242. ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
  243. ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
  244. if (ret != 0) {
  245. dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
  246. ret);
  247. goto err_sysclk;
  248. }
  249. ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
  250. ARIZONA_WSEQ_BUSY, 0);
  251. if (ret != 0) {
  252. regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
  253. ARIZONA_WSEQ_ABORT);
  254. ret = -ETIMEDOUT;
  255. }
  256. err_sysclk:
  257. err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
  258. if (err != 0) {
  259. dev_err(arizona->dev,
  260. "Failed to re-apply old SYSCLK settings: %d\n",
  261. err);
  262. }
  263. err_fll:
  264. err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
  265. if (err != 0) {
  266. dev_err(arizona->dev,
  267. "Failed to re-apply old FLL settings: %d\n",
  268. err);
  269. }
  270. regcache_cache_bypass(arizona->regmap, false);
  271. if (ret != 0)
  272. return ret;
  273. else
  274. return err;
  275. }
  276. #ifdef CONFIG_PM_RUNTIME
  277. static int arizona_runtime_resume(struct device *dev)
  278. {
  279. struct arizona *arizona = dev_get_drvdata(dev);
  280. int ret;
  281. dev_dbg(arizona->dev, "Leaving AoD mode\n");
  282. ret = regulator_enable(arizona->dcvdd);
  283. if (ret != 0) {
  284. dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
  285. return ret;
  286. }
  287. regcache_cache_only(arizona->regmap, false);
  288. switch (arizona->type) {
  289. case WM5102:
  290. ret = wm5102_patch(arizona);
  291. if (ret != 0) {
  292. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  293. ret);
  294. goto err;
  295. }
  296. ret = arizona_apply_hardware_patch(arizona);
  297. if (ret != 0) {
  298. dev_err(arizona->dev,
  299. "Failed to apply hardware patch: %d\n",
  300. ret);
  301. goto err;
  302. }
  303. break;
  304. default:
  305. ret = arizona_wait_for_boot(arizona);
  306. if (ret != 0) {
  307. goto err;
  308. }
  309. break;
  310. }
  311. switch (arizona->type) {
  312. case WM5102:
  313. ret = wm5102_patch(arizona);
  314. if (ret != 0) {
  315. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  316. ret);
  317. goto err;
  318. }
  319. default:
  320. break;
  321. }
  322. ret = regcache_sync(arizona->regmap);
  323. if (ret != 0) {
  324. dev_err(arizona->dev, "Failed to restore register cache\n");
  325. goto err;
  326. }
  327. return 0;
  328. err:
  329. regcache_cache_only(arizona->regmap, true);
  330. regulator_disable(arizona->dcvdd);
  331. return ret;
  332. }
  333. static int arizona_runtime_suspend(struct device *dev)
  334. {
  335. struct arizona *arizona = dev_get_drvdata(dev);
  336. dev_dbg(arizona->dev, "Entering AoD mode\n");
  337. regulator_disable(arizona->dcvdd);
  338. regcache_cache_only(arizona->regmap, true);
  339. regcache_mark_dirty(arizona->regmap);
  340. return 0;
  341. }
  342. #endif
  343. #ifdef CONFIG_PM_SLEEP
  344. static int arizona_resume_noirq(struct device *dev)
  345. {
  346. struct arizona *arizona = dev_get_drvdata(dev);
  347. dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
  348. disable_irq(arizona->irq);
  349. return 0;
  350. }
  351. static int arizona_resume(struct device *dev)
  352. {
  353. struct arizona *arizona = dev_get_drvdata(dev);
  354. dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
  355. enable_irq(arizona->irq);
  356. return 0;
  357. }
  358. #endif
  359. const struct dev_pm_ops arizona_pm_ops = {
  360. SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
  361. arizona_runtime_resume,
  362. NULL)
  363. SET_SYSTEM_SLEEP_PM_OPS(NULL, arizona_resume)
  364. #ifdef CONFIG_PM_SLEEP
  365. .resume_noirq = arizona_resume_noirq,
  366. #endif
  367. };
  368. EXPORT_SYMBOL_GPL(arizona_pm_ops);
  369. static struct mfd_cell early_devs[] = {
  370. { .name = "arizona-ldo1" },
  371. };
  372. static struct mfd_cell wm5102_devs[] = {
  373. { .name = "arizona-micsupp" },
  374. { .name = "arizona-extcon" },
  375. { .name = "arizona-gpio" },
  376. { .name = "arizona-haptics" },
  377. { .name = "arizona-pwm" },
  378. { .name = "wm5102-codec" },
  379. };
  380. static struct mfd_cell wm5110_devs[] = {
  381. { .name = "arizona-micsupp" },
  382. { .name = "arizona-extcon" },
  383. { .name = "arizona-gpio" },
  384. { .name = "arizona-haptics" },
  385. { .name = "arizona-pwm" },
  386. { .name = "wm5110-codec" },
  387. };
  388. int arizona_dev_init(struct arizona *arizona)
  389. {
  390. struct device *dev = arizona->dev;
  391. const char *type_name;
  392. unsigned int reg, val;
  393. int (*apply_patch)(struct arizona *) = NULL;
  394. int ret, i;
  395. dev_set_drvdata(arizona->dev, arizona);
  396. mutex_init(&arizona->clk_lock);
  397. if (dev_get_platdata(arizona->dev))
  398. memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
  399. sizeof(arizona->pdata));
  400. regcache_cache_only(arizona->regmap, true);
  401. switch (arizona->type) {
  402. case WM5102:
  403. case WM5110:
  404. for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
  405. arizona->core_supplies[i].supply
  406. = wm5102_core_supplies[i];
  407. arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
  408. break;
  409. default:
  410. dev_err(arizona->dev, "Unknown device type %d\n",
  411. arizona->type);
  412. return -EINVAL;
  413. }
  414. ret = mfd_add_devices(arizona->dev, -1, early_devs,
  415. ARRAY_SIZE(early_devs), NULL, 0, NULL);
  416. if (ret != 0) {
  417. dev_err(dev, "Failed to add early children: %d\n", ret);
  418. return ret;
  419. }
  420. ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
  421. arizona->core_supplies);
  422. if (ret != 0) {
  423. dev_err(dev, "Failed to request core supplies: %d\n",
  424. ret);
  425. goto err_early;
  426. }
  427. arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
  428. if (IS_ERR(arizona->dcvdd)) {
  429. ret = PTR_ERR(arizona->dcvdd);
  430. dev_err(dev, "Failed to request DCVDD: %d\n", ret);
  431. goto err_early;
  432. }
  433. if (arizona->pdata.reset) {
  434. /* Start out with /RESET low to put the chip into reset */
  435. ret = gpio_request_one(arizona->pdata.reset,
  436. GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  437. "arizona /RESET");
  438. if (ret != 0) {
  439. dev_err(dev, "Failed to request /RESET: %d\n", ret);
  440. goto err_early;
  441. }
  442. }
  443. ret = regulator_bulk_enable(arizona->num_core_supplies,
  444. arizona->core_supplies);
  445. if (ret != 0) {
  446. dev_err(dev, "Failed to enable core supplies: %d\n",
  447. ret);
  448. goto err_early;
  449. }
  450. ret = regulator_enable(arizona->dcvdd);
  451. if (ret != 0) {
  452. dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
  453. goto err_enable;
  454. }
  455. if (arizona->pdata.reset) {
  456. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  457. msleep(1);
  458. }
  459. regcache_cache_only(arizona->regmap, false);
  460. /* Verify that this is a chip we know about */
  461. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  462. if (ret != 0) {
  463. dev_err(dev, "Failed to read ID register: %d\n", ret);
  464. goto err_reset;
  465. }
  466. switch (reg) {
  467. case 0x5102:
  468. case 0x5110:
  469. break;
  470. default:
  471. dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
  472. goto err_reset;
  473. }
  474. /* If we have a /RESET GPIO we'll already be reset */
  475. if (!arizona->pdata.reset) {
  476. regcache_mark_dirty(arizona->regmap);
  477. ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
  478. if (ret != 0) {
  479. dev_err(dev, "Failed to reset device: %d\n", ret);
  480. goto err_reset;
  481. }
  482. msleep(1);
  483. ret = regcache_sync(arizona->regmap);
  484. if (ret != 0) {
  485. dev_err(dev, "Failed to sync device: %d\n", ret);
  486. goto err_reset;
  487. }
  488. }
  489. /* Ensure device startup is complete */
  490. switch (arizona->type) {
  491. case WM5102:
  492. ret = regmap_read(arizona->regmap, 0x19, &val);
  493. if (ret != 0)
  494. dev_err(dev,
  495. "Failed to check write sequencer state: %d\n",
  496. ret);
  497. else if (val & 0x01)
  498. break;
  499. /* Fall through */
  500. default:
  501. ret = arizona_wait_for_boot(arizona);
  502. if (ret != 0) {
  503. dev_err(arizona->dev,
  504. "Device failed initial boot: %d\n", ret);
  505. goto err_reset;
  506. }
  507. break;
  508. }
  509. /* Read the device ID information & do device specific stuff */
  510. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  511. if (ret != 0) {
  512. dev_err(dev, "Failed to read ID register: %d\n", ret);
  513. goto err_reset;
  514. }
  515. ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
  516. &arizona->rev);
  517. if (ret != 0) {
  518. dev_err(dev, "Failed to read revision register: %d\n", ret);
  519. goto err_reset;
  520. }
  521. arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
  522. switch (reg) {
  523. #ifdef CONFIG_MFD_WM5102
  524. case 0x5102:
  525. type_name = "WM5102";
  526. if (arizona->type != WM5102) {
  527. dev_err(arizona->dev, "WM5102 registered as %d\n",
  528. arizona->type);
  529. arizona->type = WM5102;
  530. }
  531. apply_patch = wm5102_patch;
  532. arizona->rev &= 0x7;
  533. break;
  534. #endif
  535. #ifdef CONFIG_MFD_WM5110
  536. case 0x5110:
  537. type_name = "WM5110";
  538. if (arizona->type != WM5110) {
  539. dev_err(arizona->dev, "WM5110 registered as %d\n",
  540. arizona->type);
  541. arizona->type = WM5110;
  542. }
  543. apply_patch = wm5110_patch;
  544. break;
  545. #endif
  546. default:
  547. dev_err(arizona->dev, "Unknown device ID %x\n", reg);
  548. goto err_reset;
  549. }
  550. dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
  551. if (apply_patch) {
  552. ret = apply_patch(arizona);
  553. if (ret != 0) {
  554. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  555. ret);
  556. goto err_reset;
  557. }
  558. switch (arizona->type) {
  559. case WM5102:
  560. ret = arizona_apply_hardware_patch(arizona);
  561. if (ret != 0) {
  562. dev_err(arizona->dev,
  563. "Failed to apply hardware patch: %d\n",
  564. ret);
  565. goto err_reset;
  566. }
  567. break;
  568. default:
  569. break;
  570. }
  571. }
  572. for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
  573. if (!arizona->pdata.gpio_defaults[i])
  574. continue;
  575. regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
  576. arizona->pdata.gpio_defaults[i]);
  577. }
  578. pm_runtime_set_autosuspend_delay(arizona->dev, 100);
  579. pm_runtime_use_autosuspend(arizona->dev);
  580. pm_runtime_enable(arizona->dev);
  581. /* Chip default */
  582. if (!arizona->pdata.clk32k_src)
  583. arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
  584. switch (arizona->pdata.clk32k_src) {
  585. case ARIZONA_32KZ_MCLK1:
  586. case ARIZONA_32KZ_MCLK2:
  587. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  588. ARIZONA_CLK_32K_SRC_MASK,
  589. arizona->pdata.clk32k_src - 1);
  590. arizona_clk32k_enable(arizona);
  591. break;
  592. case ARIZONA_32KZ_NONE:
  593. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  594. ARIZONA_CLK_32K_SRC_MASK, 2);
  595. break;
  596. default:
  597. dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
  598. arizona->pdata.clk32k_src);
  599. ret = -EINVAL;
  600. goto err_reset;
  601. }
  602. for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
  603. if (!arizona->pdata.micbias[i].mV &&
  604. !arizona->pdata.micbias[i].bypass)
  605. continue;
  606. /* Apply default for bypass mode */
  607. if (!arizona->pdata.micbias[i].mV)
  608. arizona->pdata.micbias[i].mV = 2800;
  609. val = (arizona->pdata.micbias[i].mV - 1500) / 100;
  610. val <<= ARIZONA_MICB1_LVL_SHIFT;
  611. if (arizona->pdata.micbias[i].ext_cap)
  612. val |= ARIZONA_MICB1_EXT_CAP;
  613. if (arizona->pdata.micbias[i].discharge)
  614. val |= ARIZONA_MICB1_DISCH;
  615. if (arizona->pdata.micbias[i].fast_start)
  616. val |= ARIZONA_MICB1_RATE;
  617. if (arizona->pdata.micbias[i].bypass)
  618. val |= ARIZONA_MICB1_BYPASS;
  619. regmap_update_bits(arizona->regmap,
  620. ARIZONA_MIC_BIAS_CTRL_1 + i,
  621. ARIZONA_MICB1_LVL_MASK |
  622. ARIZONA_MICB1_DISCH |
  623. ARIZONA_MICB1_BYPASS |
  624. ARIZONA_MICB1_RATE, val);
  625. }
  626. for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
  627. /* Default for both is 0 so noop with defaults */
  628. val = arizona->pdata.dmic_ref[i]
  629. << ARIZONA_IN1_DMIC_SUP_SHIFT;
  630. val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
  631. regmap_update_bits(arizona->regmap,
  632. ARIZONA_IN1L_CONTROL + (i * 8),
  633. ARIZONA_IN1_DMIC_SUP_MASK |
  634. ARIZONA_IN1_MODE_MASK, val);
  635. }
  636. for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
  637. /* Default is 0 so noop with defaults */
  638. if (arizona->pdata.out_mono[i])
  639. val = ARIZONA_OUT1_MONO;
  640. else
  641. val = 0;
  642. regmap_update_bits(arizona->regmap,
  643. ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
  644. ARIZONA_OUT1_MONO, val);
  645. }
  646. for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
  647. if (arizona->pdata.spk_mute[i])
  648. regmap_update_bits(arizona->regmap,
  649. ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
  650. ARIZONA_SPK1_MUTE_ENDIAN_MASK |
  651. ARIZONA_SPK1_MUTE_SEQ1_MASK,
  652. arizona->pdata.spk_mute[i]);
  653. if (arizona->pdata.spk_fmt[i])
  654. regmap_update_bits(arizona->regmap,
  655. ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
  656. ARIZONA_SPK1_FMT_MASK,
  657. arizona->pdata.spk_fmt[i]);
  658. }
  659. /* Set up for interrupts */
  660. ret = arizona_irq_init(arizona);
  661. if (ret != 0)
  662. goto err_reset;
  663. arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
  664. arizona_clkgen_err, arizona);
  665. arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
  666. arizona_overclocked, arizona);
  667. arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
  668. arizona_underclocked, arizona);
  669. switch (arizona->type) {
  670. case WM5102:
  671. ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
  672. ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
  673. break;
  674. case WM5110:
  675. ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
  676. ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
  677. break;
  678. }
  679. if (ret != 0) {
  680. dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
  681. goto err_irq;
  682. }
  683. #ifdef CONFIG_PM_RUNTIME
  684. regulator_disable(arizona->dcvdd);
  685. #endif
  686. return 0;
  687. err_irq:
  688. arizona_irq_exit(arizona);
  689. err_reset:
  690. if (arizona->pdata.reset) {
  691. gpio_set_value_cansleep(arizona->pdata.reset, 0);
  692. gpio_free(arizona->pdata.reset);
  693. }
  694. regulator_disable(arizona->dcvdd);
  695. err_enable:
  696. regulator_bulk_disable(arizona->num_core_supplies,
  697. arizona->core_supplies);
  698. err_early:
  699. mfd_remove_devices(dev);
  700. return ret;
  701. }
  702. EXPORT_SYMBOL_GPL(arizona_dev_init);
  703. int arizona_dev_exit(struct arizona *arizona)
  704. {
  705. mfd_remove_devices(arizona->dev);
  706. arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
  707. arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
  708. arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
  709. pm_runtime_disable(arizona->dev);
  710. arizona_irq_exit(arizona);
  711. if (arizona->pdata.reset)
  712. gpio_set_value_cansleep(arizona->pdata.reset, 0);
  713. regulator_disable(arizona->dcvdd);
  714. regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
  715. arizona->core_supplies);
  716. return 0;
  717. }
  718. EXPORT_SYMBOL_GPL(arizona_dev_exit);