en_netdev.c 57 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <linux/mlx4/driver.h>
  41. #include <linux/mlx4/device.h>
  42. #include <linux/mlx4/cmd.h>
  43. #include <linux/mlx4/cq.h>
  44. #include "mlx4_en.h"
  45. #include "en_port.h"
  46. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  47. {
  48. struct mlx4_en_priv *priv = netdev_priv(dev);
  49. int i;
  50. unsigned int offset = 0;
  51. if (up && up != MLX4_EN_NUM_UP)
  52. return -EINVAL;
  53. netdev_set_num_tc(dev, up);
  54. /* Partition Tx queues evenly amongst UP's */
  55. for (i = 0; i < up; i++) {
  56. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  57. offset += priv->num_tx_rings_p_up;
  58. }
  59. return 0;
  60. }
  61. #ifdef CONFIG_RFS_ACCEL
  62. struct mlx4_en_filter {
  63. struct list_head next;
  64. struct work_struct work;
  65. __be32 src_ip;
  66. __be32 dst_ip;
  67. __be16 src_port;
  68. __be16 dst_port;
  69. int rxq_index;
  70. struct mlx4_en_priv *priv;
  71. u32 flow_id; /* RFS infrastructure id */
  72. int id; /* mlx4_en driver id */
  73. u64 reg_id; /* Flow steering API id */
  74. u8 activated; /* Used to prevent expiry before filter
  75. * is attached
  76. */
  77. struct hlist_node filter_chain;
  78. };
  79. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  80. static void mlx4_en_filter_work(struct work_struct *work)
  81. {
  82. struct mlx4_en_filter *filter = container_of(work,
  83. struct mlx4_en_filter,
  84. work);
  85. struct mlx4_en_priv *priv = filter->priv;
  86. struct mlx4_spec_list spec_tcp = {
  87. .id = MLX4_NET_TRANS_RULE_ID_TCP,
  88. {
  89. .tcp_udp = {
  90. .dst_port = filter->dst_port,
  91. .dst_port_msk = (__force __be16)-1,
  92. .src_port = filter->src_port,
  93. .src_port_msk = (__force __be16)-1,
  94. },
  95. },
  96. };
  97. struct mlx4_spec_list spec_ip = {
  98. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  99. {
  100. .ipv4 = {
  101. .dst_ip = filter->dst_ip,
  102. .dst_ip_msk = (__force __be32)-1,
  103. .src_ip = filter->src_ip,
  104. .src_ip_msk = (__force __be32)-1,
  105. },
  106. },
  107. };
  108. struct mlx4_spec_list spec_eth = {
  109. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  110. };
  111. struct mlx4_net_trans_rule rule = {
  112. .list = LIST_HEAD_INIT(rule.list),
  113. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  114. .exclusive = 1,
  115. .allow_loopback = 1,
  116. .promisc_mode = MLX4_FS_PROMISC_NONE,
  117. .port = priv->port,
  118. .priority = MLX4_DOMAIN_RFS,
  119. };
  120. int rc;
  121. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  122. list_add_tail(&spec_eth.list, &rule.list);
  123. list_add_tail(&spec_ip.list, &rule.list);
  124. list_add_tail(&spec_tcp.list, &rule.list);
  125. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  126. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  127. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  128. filter->activated = 0;
  129. if (filter->reg_id) {
  130. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  131. if (rc && rc != -ENOENT)
  132. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  133. }
  134. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  135. if (rc)
  136. en_err(priv, "Error attaching flow. err = %d\n", rc);
  137. mlx4_en_filter_rfs_expire(priv);
  138. filter->activated = 1;
  139. }
  140. static inline struct hlist_head *
  141. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  142. __be16 src_port, __be16 dst_port)
  143. {
  144. unsigned long l;
  145. int bucket_idx;
  146. l = (__force unsigned long)src_port |
  147. ((__force unsigned long)dst_port << 2);
  148. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  149. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  150. return &priv->filter_hash[bucket_idx];
  151. }
  152. static struct mlx4_en_filter *
  153. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  154. __be32 dst_ip, __be16 src_port, __be16 dst_port,
  155. u32 flow_id)
  156. {
  157. struct mlx4_en_filter *filter = NULL;
  158. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  159. if (!filter)
  160. return NULL;
  161. filter->priv = priv;
  162. filter->rxq_index = rxq_index;
  163. INIT_WORK(&filter->work, mlx4_en_filter_work);
  164. filter->src_ip = src_ip;
  165. filter->dst_ip = dst_ip;
  166. filter->src_port = src_port;
  167. filter->dst_port = dst_port;
  168. filter->flow_id = flow_id;
  169. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  170. list_add_tail(&filter->next, &priv->filters);
  171. hlist_add_head(&filter->filter_chain,
  172. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  173. dst_port));
  174. return filter;
  175. }
  176. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  177. {
  178. struct mlx4_en_priv *priv = filter->priv;
  179. int rc;
  180. list_del(&filter->next);
  181. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  182. if (rc && rc != -ENOENT)
  183. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  184. kfree(filter);
  185. }
  186. static inline struct mlx4_en_filter *
  187. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  188. __be16 src_port, __be16 dst_port)
  189. {
  190. struct hlist_node *elem;
  191. struct mlx4_en_filter *filter;
  192. struct mlx4_en_filter *ret = NULL;
  193. hlist_for_each_entry(filter, elem,
  194. filter_hash_bucket(priv, src_ip, dst_ip,
  195. src_port, dst_port),
  196. filter_chain) {
  197. if (filter->src_ip == src_ip &&
  198. filter->dst_ip == dst_ip &&
  199. filter->src_port == src_port &&
  200. filter->dst_port == dst_port) {
  201. ret = filter;
  202. break;
  203. }
  204. }
  205. return ret;
  206. }
  207. static int
  208. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  209. u16 rxq_index, u32 flow_id)
  210. {
  211. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  212. struct mlx4_en_filter *filter;
  213. const struct iphdr *ip;
  214. const __be16 *ports;
  215. __be32 src_ip;
  216. __be32 dst_ip;
  217. __be16 src_port;
  218. __be16 dst_port;
  219. int nhoff = skb_network_offset(skb);
  220. int ret = 0;
  221. if (skb->protocol != htons(ETH_P_IP))
  222. return -EPROTONOSUPPORT;
  223. ip = (const struct iphdr *)(skb->data + nhoff);
  224. if (ip_is_fragment(ip))
  225. return -EPROTONOSUPPORT;
  226. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  227. src_ip = ip->saddr;
  228. dst_ip = ip->daddr;
  229. src_port = ports[0];
  230. dst_port = ports[1];
  231. if (ip->protocol != IPPROTO_TCP)
  232. return -EPROTONOSUPPORT;
  233. spin_lock_bh(&priv->filters_lock);
  234. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
  235. if (filter) {
  236. if (filter->rxq_index == rxq_index)
  237. goto out;
  238. filter->rxq_index = rxq_index;
  239. } else {
  240. filter = mlx4_en_filter_alloc(priv, rxq_index,
  241. src_ip, dst_ip,
  242. src_port, dst_port, flow_id);
  243. if (!filter) {
  244. ret = -ENOMEM;
  245. goto err;
  246. }
  247. }
  248. queue_work(priv->mdev->workqueue, &filter->work);
  249. out:
  250. ret = filter->id;
  251. err:
  252. spin_unlock_bh(&priv->filters_lock);
  253. return ret;
  254. }
  255. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
  256. struct mlx4_en_rx_ring *rx_ring)
  257. {
  258. struct mlx4_en_filter *filter, *tmp;
  259. LIST_HEAD(del_list);
  260. spin_lock_bh(&priv->filters_lock);
  261. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  262. list_move(&filter->next, &del_list);
  263. hlist_del(&filter->filter_chain);
  264. }
  265. spin_unlock_bh(&priv->filters_lock);
  266. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  267. cancel_work_sync(&filter->work);
  268. mlx4_en_filter_free(filter);
  269. }
  270. }
  271. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  272. {
  273. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  274. LIST_HEAD(del_list);
  275. int i = 0;
  276. spin_lock_bh(&priv->filters_lock);
  277. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  278. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  279. break;
  280. if (filter->activated &&
  281. !work_pending(&filter->work) &&
  282. rps_may_expire_flow(priv->dev,
  283. filter->rxq_index, filter->flow_id,
  284. filter->id)) {
  285. list_move(&filter->next, &del_list);
  286. hlist_del(&filter->filter_chain);
  287. } else
  288. last_filter = filter;
  289. i++;
  290. }
  291. if (last_filter && (&last_filter->next != priv->filters.next))
  292. list_move(&priv->filters, &last_filter->next);
  293. spin_unlock_bh(&priv->filters_lock);
  294. list_for_each_entry_safe(filter, tmp, &del_list, next)
  295. mlx4_en_filter_free(filter);
  296. }
  297. #endif
  298. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  299. {
  300. struct mlx4_en_priv *priv = netdev_priv(dev);
  301. struct mlx4_en_dev *mdev = priv->mdev;
  302. int err;
  303. int idx;
  304. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  305. set_bit(vid, priv->active_vlans);
  306. /* Add VID to port VLAN filter */
  307. mutex_lock(&mdev->state_lock);
  308. if (mdev->device_up && priv->port_up) {
  309. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  310. if (err)
  311. en_err(priv, "Failed configuring VLAN filter\n");
  312. }
  313. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  314. en_err(priv, "failed adding vlan %d\n", vid);
  315. mutex_unlock(&mdev->state_lock);
  316. return 0;
  317. }
  318. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  319. {
  320. struct mlx4_en_priv *priv = netdev_priv(dev);
  321. struct mlx4_en_dev *mdev = priv->mdev;
  322. int err;
  323. int idx;
  324. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  325. clear_bit(vid, priv->active_vlans);
  326. /* Remove VID from port VLAN filter */
  327. mutex_lock(&mdev->state_lock);
  328. if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
  329. mlx4_unregister_vlan(mdev->dev, priv->port, idx);
  330. else
  331. en_err(priv, "could not find vid %d in cache\n", vid);
  332. if (mdev->device_up && priv->port_up) {
  333. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  334. if (err)
  335. en_err(priv, "Failed configuring VLAN filter\n");
  336. }
  337. mutex_unlock(&mdev->state_lock);
  338. return 0;
  339. }
  340. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  341. {
  342. unsigned int i;
  343. for (i = ETH_ALEN - 1; i; --i) {
  344. dst_mac[i] = src_mac & 0xff;
  345. src_mac >>= 8;
  346. }
  347. memset(&dst_mac[ETH_ALEN], 0, 2);
  348. }
  349. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  350. unsigned char *mac, int *qpn, u64 *reg_id)
  351. {
  352. struct mlx4_en_dev *mdev = priv->mdev;
  353. struct mlx4_dev *dev = mdev->dev;
  354. int err;
  355. switch (dev->caps.steering_mode) {
  356. case MLX4_STEERING_MODE_B0: {
  357. struct mlx4_qp qp;
  358. u8 gid[16] = {0};
  359. qp.qpn = *qpn;
  360. memcpy(&gid[10], mac, ETH_ALEN);
  361. gid[5] = priv->port;
  362. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  363. break;
  364. }
  365. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  366. struct mlx4_spec_list spec_eth = { {NULL} };
  367. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  368. struct mlx4_net_trans_rule rule = {
  369. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  370. .exclusive = 0,
  371. .allow_loopback = 1,
  372. .promisc_mode = MLX4_FS_PROMISC_NONE,
  373. .priority = MLX4_DOMAIN_NIC,
  374. };
  375. rule.port = priv->port;
  376. rule.qpn = *qpn;
  377. INIT_LIST_HEAD(&rule.list);
  378. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  379. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  380. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  381. list_add_tail(&spec_eth.list, &rule.list);
  382. err = mlx4_flow_attach(dev, &rule, reg_id);
  383. break;
  384. }
  385. default:
  386. return -EINVAL;
  387. }
  388. if (err)
  389. en_warn(priv, "Failed Attaching Unicast\n");
  390. return err;
  391. }
  392. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  393. unsigned char *mac, int qpn, u64 reg_id)
  394. {
  395. struct mlx4_en_dev *mdev = priv->mdev;
  396. struct mlx4_dev *dev = mdev->dev;
  397. switch (dev->caps.steering_mode) {
  398. case MLX4_STEERING_MODE_B0: {
  399. struct mlx4_qp qp;
  400. u8 gid[16] = {0};
  401. qp.qpn = qpn;
  402. memcpy(&gid[10], mac, ETH_ALEN);
  403. gid[5] = priv->port;
  404. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  405. break;
  406. }
  407. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  408. mlx4_flow_detach(dev, reg_id);
  409. break;
  410. }
  411. default:
  412. en_err(priv, "Invalid steering mode.\n");
  413. }
  414. }
  415. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  416. {
  417. struct mlx4_en_dev *mdev = priv->mdev;
  418. struct mlx4_dev *dev = mdev->dev;
  419. struct mlx4_mac_entry *entry;
  420. int index = 0;
  421. int err = 0;
  422. u64 reg_id;
  423. int *qpn = &priv->base_qpn;
  424. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  425. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  426. priv->dev->dev_addr);
  427. index = mlx4_register_mac(dev, priv->port, mac);
  428. if (index < 0) {
  429. err = index;
  430. en_err(priv, "Failed adding MAC: %pM\n",
  431. priv->dev->dev_addr);
  432. return err;
  433. }
  434. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  435. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  436. *qpn = base_qpn + index;
  437. return 0;
  438. }
  439. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  440. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  441. if (err) {
  442. en_err(priv, "Failed to reserve qp for mac registration\n");
  443. goto qp_err;
  444. }
  445. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  446. if (err)
  447. goto steer_err;
  448. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  449. if (!entry) {
  450. err = -ENOMEM;
  451. goto alloc_err;
  452. }
  453. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  454. entry->reg_id = reg_id;
  455. hlist_add_head_rcu(&entry->hlist,
  456. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  457. return 0;
  458. alloc_err:
  459. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  460. steer_err:
  461. mlx4_qp_release_range(dev, *qpn, 1);
  462. qp_err:
  463. mlx4_unregister_mac(dev, priv->port, mac);
  464. return err;
  465. }
  466. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  467. {
  468. struct mlx4_en_dev *mdev = priv->mdev;
  469. struct mlx4_dev *dev = mdev->dev;
  470. int qpn = priv->base_qpn;
  471. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  472. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  473. priv->dev->dev_addr);
  474. mlx4_unregister_mac(dev, priv->port, mac);
  475. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  476. struct mlx4_mac_entry *entry;
  477. struct hlist_node *n, *tmp;
  478. struct hlist_head *bucket;
  479. unsigned int mac_hash;
  480. mac_hash = priv->dev->dev_addr[MLX4_EN_MAC_HASH_IDX];
  481. bucket = &priv->mac_hash[mac_hash];
  482. hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) {
  483. if (ether_addr_equal_64bits(entry->mac,
  484. priv->dev->dev_addr)) {
  485. en_dbg(DRV, priv, "Releasing qp: port %d, MAC %pM, qpn %d\n",
  486. priv->port, priv->dev->dev_addr, qpn);
  487. mlx4_en_uc_steer_release(priv, entry->mac,
  488. qpn, entry->reg_id);
  489. mlx4_qp_release_range(dev, qpn, 1);
  490. hlist_del_rcu(&entry->hlist);
  491. kfree_rcu(entry, rcu);
  492. break;
  493. }
  494. }
  495. }
  496. }
  497. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  498. unsigned char *new_mac, unsigned char *prev_mac)
  499. {
  500. struct mlx4_en_dev *mdev = priv->mdev;
  501. struct mlx4_dev *dev = mdev->dev;
  502. int err = 0;
  503. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  504. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  505. struct hlist_head *bucket;
  506. unsigned int mac_hash;
  507. struct mlx4_mac_entry *entry;
  508. struct hlist_node *n, *tmp;
  509. u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
  510. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  511. hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) {
  512. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  513. mlx4_en_uc_steer_release(priv, entry->mac,
  514. qpn, entry->reg_id);
  515. mlx4_unregister_mac(dev, priv->port,
  516. prev_mac_u64);
  517. hlist_del_rcu(&entry->hlist);
  518. synchronize_rcu();
  519. memcpy(entry->mac, new_mac, ETH_ALEN);
  520. entry->reg_id = 0;
  521. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  522. hlist_add_head_rcu(&entry->hlist,
  523. &priv->mac_hash[mac_hash]);
  524. mlx4_register_mac(dev, priv->port, new_mac_u64);
  525. err = mlx4_en_uc_steer_add(priv, new_mac,
  526. &qpn,
  527. &entry->reg_id);
  528. return err;
  529. }
  530. }
  531. return -EINVAL;
  532. }
  533. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  534. }
  535. u64 mlx4_en_mac_to_u64(u8 *addr)
  536. {
  537. u64 mac = 0;
  538. int i;
  539. for (i = 0; i < ETH_ALEN; i++) {
  540. mac <<= 8;
  541. mac |= addr[i];
  542. }
  543. return mac;
  544. }
  545. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  546. {
  547. struct mlx4_en_priv *priv = netdev_priv(dev);
  548. struct mlx4_en_dev *mdev = priv->mdev;
  549. struct sockaddr *saddr = addr;
  550. if (!is_valid_ether_addr(saddr->sa_data))
  551. return -EADDRNOTAVAIL;
  552. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  553. queue_work(mdev->workqueue, &priv->mac_task);
  554. return 0;
  555. }
  556. static void mlx4_en_do_set_mac(struct work_struct *work)
  557. {
  558. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  559. mac_task);
  560. struct mlx4_en_dev *mdev = priv->mdev;
  561. int err = 0;
  562. mutex_lock(&mdev->state_lock);
  563. if (priv->port_up) {
  564. /* Remove old MAC and insert the new one */
  565. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  566. priv->dev->dev_addr, priv->prev_mac);
  567. if (err)
  568. en_err(priv, "Failed changing HW MAC address\n");
  569. memcpy(priv->prev_mac, priv->dev->dev_addr,
  570. sizeof(priv->prev_mac));
  571. } else
  572. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  573. mutex_unlock(&mdev->state_lock);
  574. }
  575. static void mlx4_en_clear_list(struct net_device *dev)
  576. {
  577. struct mlx4_en_priv *priv = netdev_priv(dev);
  578. struct mlx4_en_mc_list *tmp, *mc_to_del;
  579. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  580. list_del(&mc_to_del->list);
  581. kfree(mc_to_del);
  582. }
  583. }
  584. static void mlx4_en_cache_mclist(struct net_device *dev)
  585. {
  586. struct mlx4_en_priv *priv = netdev_priv(dev);
  587. struct netdev_hw_addr *ha;
  588. struct mlx4_en_mc_list *tmp;
  589. mlx4_en_clear_list(dev);
  590. netdev_for_each_mc_addr(ha, dev) {
  591. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  592. if (!tmp) {
  593. mlx4_en_clear_list(dev);
  594. return;
  595. }
  596. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  597. list_add_tail(&tmp->list, &priv->mc_list);
  598. }
  599. }
  600. static void update_mclist_flags(struct mlx4_en_priv *priv,
  601. struct list_head *dst,
  602. struct list_head *src)
  603. {
  604. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  605. bool found;
  606. /* Find all the entries that should be removed from dst,
  607. * These are the entries that are not found in src
  608. */
  609. list_for_each_entry(dst_tmp, dst, list) {
  610. found = false;
  611. list_for_each_entry(src_tmp, src, list) {
  612. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  613. found = true;
  614. break;
  615. }
  616. }
  617. if (!found)
  618. dst_tmp->action = MCLIST_REM;
  619. }
  620. /* Add entries that exist in src but not in dst
  621. * mark them as need to add
  622. */
  623. list_for_each_entry(src_tmp, src, list) {
  624. found = false;
  625. list_for_each_entry(dst_tmp, dst, list) {
  626. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  627. dst_tmp->action = MCLIST_NONE;
  628. found = true;
  629. break;
  630. }
  631. }
  632. if (!found) {
  633. new_mc = kmemdup(src_tmp,
  634. sizeof(struct mlx4_en_mc_list),
  635. GFP_KERNEL);
  636. if (!new_mc)
  637. return;
  638. new_mc->action = MCLIST_ADD;
  639. list_add_tail(&new_mc->list, dst);
  640. }
  641. }
  642. }
  643. static void mlx4_en_set_rx_mode(struct net_device *dev)
  644. {
  645. struct mlx4_en_priv *priv = netdev_priv(dev);
  646. if (!priv->port_up)
  647. return;
  648. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  649. }
  650. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  651. struct mlx4_en_dev *mdev)
  652. {
  653. int err = 0;
  654. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  655. if (netif_msg_rx_status(priv))
  656. en_warn(priv, "Entering promiscuous mode\n");
  657. priv->flags |= MLX4_EN_FLAG_PROMISC;
  658. /* Enable promiscouos mode */
  659. switch (mdev->dev->caps.steering_mode) {
  660. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  661. err = mlx4_flow_steer_promisc_add(mdev->dev,
  662. priv->port,
  663. priv->base_qpn,
  664. MLX4_FS_PROMISC_UPLINK);
  665. if (err)
  666. en_err(priv, "Failed enabling promiscuous mode\n");
  667. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  668. break;
  669. case MLX4_STEERING_MODE_B0:
  670. err = mlx4_unicast_promisc_add(mdev->dev,
  671. priv->base_qpn,
  672. priv->port);
  673. if (err)
  674. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  675. /* Add the default qp number as multicast
  676. * promisc
  677. */
  678. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  679. err = mlx4_multicast_promisc_add(mdev->dev,
  680. priv->base_qpn,
  681. priv->port);
  682. if (err)
  683. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  684. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  685. }
  686. break;
  687. case MLX4_STEERING_MODE_A0:
  688. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  689. priv->port,
  690. priv->base_qpn,
  691. 1);
  692. if (err)
  693. en_err(priv, "Failed enabling promiscuous mode\n");
  694. break;
  695. }
  696. /* Disable port multicast filter (unconditionally) */
  697. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  698. 0, MLX4_MCAST_DISABLE);
  699. if (err)
  700. en_err(priv, "Failed disabling multicast filter\n");
  701. /* Disable port VLAN filter */
  702. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  703. if (err)
  704. en_err(priv, "Failed disabling VLAN filter\n");
  705. }
  706. }
  707. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  708. struct mlx4_en_dev *mdev)
  709. {
  710. int err = 0;
  711. if (netif_msg_rx_status(priv))
  712. en_warn(priv, "Leaving promiscuous mode\n");
  713. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  714. /* Disable promiscouos mode */
  715. switch (mdev->dev->caps.steering_mode) {
  716. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  717. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  718. priv->port,
  719. MLX4_FS_PROMISC_UPLINK);
  720. if (err)
  721. en_err(priv, "Failed disabling promiscuous mode\n");
  722. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  723. break;
  724. case MLX4_STEERING_MODE_B0:
  725. err = mlx4_unicast_promisc_remove(mdev->dev,
  726. priv->base_qpn,
  727. priv->port);
  728. if (err)
  729. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  730. /* Disable Multicast promisc */
  731. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  732. err = mlx4_multicast_promisc_remove(mdev->dev,
  733. priv->base_qpn,
  734. priv->port);
  735. if (err)
  736. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  737. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  738. }
  739. break;
  740. case MLX4_STEERING_MODE_A0:
  741. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  742. priv->port,
  743. priv->base_qpn, 0);
  744. if (err)
  745. en_err(priv, "Failed disabling promiscuous mode\n");
  746. break;
  747. }
  748. /* Enable port VLAN filter */
  749. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  750. if (err)
  751. en_err(priv, "Failed enabling VLAN filter\n");
  752. }
  753. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  754. struct net_device *dev,
  755. struct mlx4_en_dev *mdev)
  756. {
  757. struct mlx4_en_mc_list *mclist, *tmp;
  758. u64 mcast_addr = 0;
  759. u8 mc_list[16] = {0};
  760. int err = 0;
  761. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  762. if (dev->flags & IFF_ALLMULTI) {
  763. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  764. 0, MLX4_MCAST_DISABLE);
  765. if (err)
  766. en_err(priv, "Failed disabling multicast filter\n");
  767. /* Add the default qp number as multicast promisc */
  768. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  769. switch (mdev->dev->caps.steering_mode) {
  770. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  771. err = mlx4_flow_steer_promisc_add(mdev->dev,
  772. priv->port,
  773. priv->base_qpn,
  774. MLX4_FS_PROMISC_ALL_MULTI);
  775. break;
  776. case MLX4_STEERING_MODE_B0:
  777. err = mlx4_multicast_promisc_add(mdev->dev,
  778. priv->base_qpn,
  779. priv->port);
  780. break;
  781. case MLX4_STEERING_MODE_A0:
  782. break;
  783. }
  784. if (err)
  785. en_err(priv, "Failed entering multicast promisc mode\n");
  786. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  787. }
  788. } else {
  789. /* Disable Multicast promisc */
  790. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  791. switch (mdev->dev->caps.steering_mode) {
  792. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  793. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  794. priv->port,
  795. MLX4_FS_PROMISC_ALL_MULTI);
  796. break;
  797. case MLX4_STEERING_MODE_B0:
  798. err = mlx4_multicast_promisc_remove(mdev->dev,
  799. priv->base_qpn,
  800. priv->port);
  801. break;
  802. case MLX4_STEERING_MODE_A0:
  803. break;
  804. }
  805. if (err)
  806. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  807. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  808. }
  809. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  810. 0, MLX4_MCAST_DISABLE);
  811. if (err)
  812. en_err(priv, "Failed disabling multicast filter\n");
  813. /* Flush mcast filter and init it with broadcast address */
  814. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  815. 1, MLX4_MCAST_CONFIG);
  816. /* Update multicast list - we cache all addresses so they won't
  817. * change while HW is updated holding the command semaphor */
  818. netif_addr_lock_bh(dev);
  819. mlx4_en_cache_mclist(dev);
  820. netif_addr_unlock_bh(dev);
  821. list_for_each_entry(mclist, &priv->mc_list, list) {
  822. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  823. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  824. mcast_addr, 0, MLX4_MCAST_CONFIG);
  825. }
  826. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  827. 0, MLX4_MCAST_ENABLE);
  828. if (err)
  829. en_err(priv, "Failed enabling multicast filter\n");
  830. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  831. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  832. if (mclist->action == MCLIST_REM) {
  833. /* detach this address and delete from list */
  834. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  835. mc_list[5] = priv->port;
  836. err = mlx4_multicast_detach(mdev->dev,
  837. &priv->rss_map.indir_qp,
  838. mc_list,
  839. MLX4_PROT_ETH,
  840. mclist->reg_id);
  841. if (err)
  842. en_err(priv, "Fail to detach multicast address\n");
  843. /* remove from list */
  844. list_del(&mclist->list);
  845. kfree(mclist);
  846. } else if (mclist->action == MCLIST_ADD) {
  847. /* attach the address */
  848. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  849. /* needed for B0 steering support */
  850. mc_list[5] = priv->port;
  851. err = mlx4_multicast_attach(mdev->dev,
  852. &priv->rss_map.indir_qp,
  853. mc_list,
  854. priv->port, 0,
  855. MLX4_PROT_ETH,
  856. &mclist->reg_id);
  857. if (err)
  858. en_err(priv, "Fail to attach multicast address\n");
  859. }
  860. }
  861. }
  862. }
  863. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  864. struct net_device *dev,
  865. struct mlx4_en_dev *mdev)
  866. {
  867. struct netdev_hw_addr *ha;
  868. struct mlx4_mac_entry *entry;
  869. struct hlist_node *n, *tmp;
  870. bool found;
  871. u64 mac;
  872. int err = 0;
  873. struct hlist_head *bucket;
  874. unsigned int i;
  875. int removed = 0;
  876. u32 prev_flags;
  877. /* Note that we do not need to protect our mac_hash traversal with rcu,
  878. * since all modification code is protected by mdev->state_lock
  879. */
  880. /* find what to remove */
  881. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  882. bucket = &priv->mac_hash[i];
  883. hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) {
  884. found = false;
  885. netdev_for_each_uc_addr(ha, dev) {
  886. if (ether_addr_equal_64bits(entry->mac,
  887. ha->addr)) {
  888. found = true;
  889. break;
  890. }
  891. }
  892. /* MAC address of the port is not in uc list */
  893. if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
  894. found = true;
  895. if (!found) {
  896. mac = mlx4_en_mac_to_u64(entry->mac);
  897. mlx4_en_uc_steer_release(priv, entry->mac,
  898. priv->base_qpn,
  899. entry->reg_id);
  900. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  901. hlist_del_rcu(&entry->hlist);
  902. kfree_rcu(entry, rcu);
  903. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  904. entry->mac, priv->port);
  905. ++removed;
  906. }
  907. }
  908. }
  909. /* if we didn't remove anything, there is no use in trying to add
  910. * again once we are in a forced promisc mode state
  911. */
  912. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  913. return;
  914. prev_flags = priv->flags;
  915. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  916. /* find what to add */
  917. netdev_for_each_uc_addr(ha, dev) {
  918. found = false;
  919. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  920. hlist_for_each_entry(entry, n, bucket, hlist) {
  921. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  922. found = true;
  923. break;
  924. }
  925. }
  926. if (!found) {
  927. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  928. if (!entry) {
  929. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  930. ha->addr, priv->port);
  931. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  932. break;
  933. }
  934. mac = mlx4_en_mac_to_u64(ha->addr);
  935. memcpy(entry->mac, ha->addr, ETH_ALEN);
  936. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  937. if (err < 0) {
  938. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  939. ha->addr, priv->port, err);
  940. kfree(entry);
  941. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  942. break;
  943. }
  944. err = mlx4_en_uc_steer_add(priv, ha->addr,
  945. &priv->base_qpn,
  946. &entry->reg_id);
  947. if (err) {
  948. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  949. ha->addr, priv->port, err);
  950. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  951. kfree(entry);
  952. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  953. break;
  954. } else {
  955. unsigned int mac_hash;
  956. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  957. ha->addr, priv->port);
  958. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  959. bucket = &priv->mac_hash[mac_hash];
  960. hlist_add_head_rcu(&entry->hlist, bucket);
  961. }
  962. }
  963. }
  964. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  965. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  966. priv->port);
  967. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  968. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  969. priv->port);
  970. }
  971. }
  972. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  973. {
  974. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  975. rx_mode_task);
  976. struct mlx4_en_dev *mdev = priv->mdev;
  977. struct net_device *dev = priv->dev;
  978. mutex_lock(&mdev->state_lock);
  979. if (!mdev->device_up) {
  980. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  981. goto out;
  982. }
  983. if (!priv->port_up) {
  984. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  985. goto out;
  986. }
  987. if (!netif_carrier_ok(dev)) {
  988. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  989. if (priv->port_state.link_state) {
  990. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  991. netif_carrier_on(dev);
  992. en_dbg(LINK, priv, "Link Up\n");
  993. }
  994. }
  995. }
  996. if (dev->priv_flags & IFF_UNICAST_FLT)
  997. mlx4_en_do_uc_filter(priv, dev, mdev);
  998. /* Promsicuous mode: disable all filters */
  999. if ((dev->flags & IFF_PROMISC) ||
  1000. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1001. mlx4_en_set_promisc_mode(priv, mdev);
  1002. goto out;
  1003. }
  1004. /* Not in promiscuous mode */
  1005. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1006. mlx4_en_clear_promisc_mode(priv, mdev);
  1007. mlx4_en_do_multicast(priv, dev, mdev);
  1008. out:
  1009. mutex_unlock(&mdev->state_lock);
  1010. }
  1011. #ifdef CONFIG_NET_POLL_CONTROLLER
  1012. static void mlx4_en_netpoll(struct net_device *dev)
  1013. {
  1014. struct mlx4_en_priv *priv = netdev_priv(dev);
  1015. struct mlx4_en_cq *cq;
  1016. unsigned long flags;
  1017. int i;
  1018. for (i = 0; i < priv->rx_ring_num; i++) {
  1019. cq = &priv->rx_cq[i];
  1020. spin_lock_irqsave(&cq->lock, flags);
  1021. napi_synchronize(&cq->napi);
  1022. mlx4_en_process_rx_cq(dev, cq, 0);
  1023. spin_unlock_irqrestore(&cq->lock, flags);
  1024. }
  1025. }
  1026. #endif
  1027. static void mlx4_en_tx_timeout(struct net_device *dev)
  1028. {
  1029. struct mlx4_en_priv *priv = netdev_priv(dev);
  1030. struct mlx4_en_dev *mdev = priv->mdev;
  1031. if (netif_msg_timer(priv))
  1032. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1033. priv->port_stats.tx_timeout++;
  1034. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1035. queue_work(mdev->workqueue, &priv->watchdog_task);
  1036. }
  1037. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1038. {
  1039. struct mlx4_en_priv *priv = netdev_priv(dev);
  1040. spin_lock_bh(&priv->stats_lock);
  1041. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1042. spin_unlock_bh(&priv->stats_lock);
  1043. return &priv->ret_stats;
  1044. }
  1045. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1046. {
  1047. struct mlx4_en_cq *cq;
  1048. int i;
  1049. /* If we haven't received a specific coalescing setting
  1050. * (module param), we set the moderation parameters as follows:
  1051. * - moder_cnt is set to the number of mtu sized packets to
  1052. * satisfy our coalescing target.
  1053. * - moder_time is set to a fixed value.
  1054. */
  1055. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1056. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1057. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1058. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1059. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1060. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1061. /* Setup cq moderation params */
  1062. for (i = 0; i < priv->rx_ring_num; i++) {
  1063. cq = &priv->rx_cq[i];
  1064. cq->moder_cnt = priv->rx_frames;
  1065. cq->moder_time = priv->rx_usecs;
  1066. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1067. priv->last_moder_packets[i] = 0;
  1068. priv->last_moder_bytes[i] = 0;
  1069. }
  1070. for (i = 0; i < priv->tx_ring_num; i++) {
  1071. cq = &priv->tx_cq[i];
  1072. cq->moder_cnt = priv->tx_frames;
  1073. cq->moder_time = priv->tx_usecs;
  1074. }
  1075. /* Reset auto-moderation params */
  1076. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1077. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1078. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1079. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1080. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1081. priv->adaptive_rx_coal = 1;
  1082. priv->last_moder_jiffies = 0;
  1083. priv->last_moder_tx_packets = 0;
  1084. }
  1085. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1086. {
  1087. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1088. struct mlx4_en_cq *cq;
  1089. unsigned long packets;
  1090. unsigned long rate;
  1091. unsigned long avg_pkt_size;
  1092. unsigned long rx_packets;
  1093. unsigned long rx_bytes;
  1094. unsigned long rx_pkt_diff;
  1095. int moder_time;
  1096. int ring, err;
  1097. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1098. return;
  1099. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1100. spin_lock_bh(&priv->stats_lock);
  1101. rx_packets = priv->rx_ring[ring].packets;
  1102. rx_bytes = priv->rx_ring[ring].bytes;
  1103. spin_unlock_bh(&priv->stats_lock);
  1104. rx_pkt_diff = ((unsigned long) (rx_packets -
  1105. priv->last_moder_packets[ring]));
  1106. packets = rx_pkt_diff;
  1107. rate = packets * HZ / period;
  1108. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1109. priv->last_moder_bytes[ring])) / packets : 0;
  1110. /* Apply auto-moderation only when packet rate
  1111. * exceeds a rate that it matters */
  1112. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1113. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1114. if (rate < priv->pkt_rate_low)
  1115. moder_time = priv->rx_usecs_low;
  1116. else if (rate > priv->pkt_rate_high)
  1117. moder_time = priv->rx_usecs_high;
  1118. else
  1119. moder_time = (rate - priv->pkt_rate_low) *
  1120. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1121. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1122. priv->rx_usecs_low;
  1123. } else {
  1124. moder_time = priv->rx_usecs_low;
  1125. }
  1126. if (moder_time != priv->last_moder_time[ring]) {
  1127. priv->last_moder_time[ring] = moder_time;
  1128. cq = &priv->rx_cq[ring];
  1129. cq->moder_time = moder_time;
  1130. err = mlx4_en_set_cq_moder(priv, cq);
  1131. if (err)
  1132. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1133. ring);
  1134. }
  1135. priv->last_moder_packets[ring] = rx_packets;
  1136. priv->last_moder_bytes[ring] = rx_bytes;
  1137. }
  1138. priv->last_moder_jiffies = jiffies;
  1139. }
  1140. static void mlx4_en_do_get_stats(struct work_struct *work)
  1141. {
  1142. struct delayed_work *delay = to_delayed_work(work);
  1143. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1144. stats_task);
  1145. struct mlx4_en_dev *mdev = priv->mdev;
  1146. int err;
  1147. mutex_lock(&mdev->state_lock);
  1148. if (mdev->device_up) {
  1149. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1150. if (err)
  1151. en_dbg(HW, priv, "Could not update stats\n");
  1152. if (priv->port_up)
  1153. mlx4_en_auto_moderation(priv);
  1154. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1155. }
  1156. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1157. queue_work(mdev->workqueue, &priv->mac_task);
  1158. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1159. }
  1160. mutex_unlock(&mdev->state_lock);
  1161. }
  1162. static void mlx4_en_linkstate(struct work_struct *work)
  1163. {
  1164. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1165. linkstate_task);
  1166. struct mlx4_en_dev *mdev = priv->mdev;
  1167. int linkstate = priv->link_state;
  1168. mutex_lock(&mdev->state_lock);
  1169. /* If observable port state changed set carrier state and
  1170. * report to system log */
  1171. if (priv->last_link_state != linkstate) {
  1172. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1173. en_info(priv, "Link Down\n");
  1174. netif_carrier_off(priv->dev);
  1175. } else {
  1176. en_info(priv, "Link Up\n");
  1177. netif_carrier_on(priv->dev);
  1178. }
  1179. }
  1180. priv->last_link_state = linkstate;
  1181. mutex_unlock(&mdev->state_lock);
  1182. }
  1183. int mlx4_en_start_port(struct net_device *dev)
  1184. {
  1185. struct mlx4_en_priv *priv = netdev_priv(dev);
  1186. struct mlx4_en_dev *mdev = priv->mdev;
  1187. struct mlx4_en_cq *cq;
  1188. struct mlx4_en_tx_ring *tx_ring;
  1189. int rx_index = 0;
  1190. int tx_index = 0;
  1191. int err = 0;
  1192. int i;
  1193. int j;
  1194. u8 mc_list[16] = {0};
  1195. if (priv->port_up) {
  1196. en_dbg(DRV, priv, "start port called while port already up\n");
  1197. return 0;
  1198. }
  1199. INIT_LIST_HEAD(&priv->mc_list);
  1200. INIT_LIST_HEAD(&priv->curr_list);
  1201. INIT_LIST_HEAD(&priv->ethtool_list);
  1202. memset(&priv->ethtool_rules[0], 0,
  1203. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1204. /* Calculate Rx buf size */
  1205. dev->mtu = min(dev->mtu, priv->max_mtu);
  1206. mlx4_en_calc_rx_buf(dev);
  1207. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1208. /* Configure rx cq's and rings */
  1209. err = mlx4_en_activate_rx_rings(priv);
  1210. if (err) {
  1211. en_err(priv, "Failed to activate RX rings\n");
  1212. return err;
  1213. }
  1214. for (i = 0; i < priv->rx_ring_num; i++) {
  1215. cq = &priv->rx_cq[i];
  1216. err = mlx4_en_activate_cq(priv, cq, i);
  1217. if (err) {
  1218. en_err(priv, "Failed activating Rx CQ\n");
  1219. goto cq_err;
  1220. }
  1221. for (j = 0; j < cq->size; j++)
  1222. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1223. err = mlx4_en_set_cq_moder(priv, cq);
  1224. if (err) {
  1225. en_err(priv, "Failed setting cq moderation parameters");
  1226. mlx4_en_deactivate_cq(priv, cq);
  1227. goto cq_err;
  1228. }
  1229. mlx4_en_arm_cq(priv, cq);
  1230. priv->rx_ring[i].cqn = cq->mcq.cqn;
  1231. ++rx_index;
  1232. }
  1233. /* Set qp number */
  1234. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1235. err = mlx4_en_get_qp(priv);
  1236. if (err) {
  1237. en_err(priv, "Failed getting eth qp\n");
  1238. goto cq_err;
  1239. }
  1240. mdev->mac_removed[priv->port] = 0;
  1241. err = mlx4_en_config_rss_steer(priv);
  1242. if (err) {
  1243. en_err(priv, "Failed configuring rss steering\n");
  1244. goto mac_err;
  1245. }
  1246. err = mlx4_en_create_drop_qp(priv);
  1247. if (err)
  1248. goto rss_err;
  1249. /* Configure tx cq's and rings */
  1250. for (i = 0; i < priv->tx_ring_num; i++) {
  1251. /* Configure cq */
  1252. cq = &priv->tx_cq[i];
  1253. err = mlx4_en_activate_cq(priv, cq, i);
  1254. if (err) {
  1255. en_err(priv, "Failed allocating Tx CQ\n");
  1256. goto tx_err;
  1257. }
  1258. err = mlx4_en_set_cq_moder(priv, cq);
  1259. if (err) {
  1260. en_err(priv, "Failed setting cq moderation parameters");
  1261. mlx4_en_deactivate_cq(priv, cq);
  1262. goto tx_err;
  1263. }
  1264. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1265. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1266. /* Configure ring */
  1267. tx_ring = &priv->tx_ring[i];
  1268. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1269. i / priv->num_tx_rings_p_up);
  1270. if (err) {
  1271. en_err(priv, "Failed allocating Tx ring\n");
  1272. mlx4_en_deactivate_cq(priv, cq);
  1273. goto tx_err;
  1274. }
  1275. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1276. /* Arm CQ for TX completions */
  1277. mlx4_en_arm_cq(priv, cq);
  1278. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1279. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1280. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1281. ++tx_index;
  1282. }
  1283. /* Configure port */
  1284. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1285. priv->rx_skb_size + ETH_FCS_LEN,
  1286. priv->prof->tx_pause,
  1287. priv->prof->tx_ppp,
  1288. priv->prof->rx_pause,
  1289. priv->prof->rx_ppp);
  1290. if (err) {
  1291. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1292. priv->port, err);
  1293. goto tx_err;
  1294. }
  1295. /* Set default qp number */
  1296. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1297. if (err) {
  1298. en_err(priv, "Failed setting default qp numbers\n");
  1299. goto tx_err;
  1300. }
  1301. /* Init port */
  1302. en_dbg(HW, priv, "Initializing port\n");
  1303. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1304. if (err) {
  1305. en_err(priv, "Failed Initializing port\n");
  1306. goto tx_err;
  1307. }
  1308. /* Attach rx QP to bradcast address */
  1309. memset(&mc_list[10], 0xff, ETH_ALEN);
  1310. mc_list[5] = priv->port; /* needed for B0 steering support */
  1311. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1312. priv->port, 0, MLX4_PROT_ETH,
  1313. &priv->broadcast_id))
  1314. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1315. /* Must redo promiscuous mode setup. */
  1316. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1317. /* Schedule multicast task to populate multicast list */
  1318. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1319. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1320. priv->port_up = true;
  1321. netif_tx_start_all_queues(dev);
  1322. netif_device_attach(dev);
  1323. return 0;
  1324. tx_err:
  1325. while (tx_index--) {
  1326. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
  1327. mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
  1328. }
  1329. mlx4_en_destroy_drop_qp(priv);
  1330. rss_err:
  1331. mlx4_en_release_rss_steer(priv);
  1332. mac_err:
  1333. mlx4_en_put_qp(priv);
  1334. cq_err:
  1335. while (rx_index--)
  1336. mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
  1337. for (i = 0; i < priv->rx_ring_num; i++)
  1338. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1339. return err; /* need to close devices */
  1340. }
  1341. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1342. {
  1343. struct mlx4_en_priv *priv = netdev_priv(dev);
  1344. struct mlx4_en_dev *mdev = priv->mdev;
  1345. struct mlx4_en_mc_list *mclist, *tmp;
  1346. struct ethtool_flow_id *flow, *tmp_flow;
  1347. int i;
  1348. u8 mc_list[16] = {0};
  1349. if (!priv->port_up) {
  1350. en_dbg(DRV, priv, "stop port called while port already down\n");
  1351. return;
  1352. }
  1353. /* Synchronize with tx routine */
  1354. netif_tx_lock_bh(dev);
  1355. if (detach)
  1356. netif_device_detach(dev);
  1357. netif_tx_stop_all_queues(dev);
  1358. netif_tx_unlock_bh(dev);
  1359. netif_tx_disable(dev);
  1360. /* Set port as not active */
  1361. priv->port_up = false;
  1362. /* Promsicuous mode */
  1363. if (mdev->dev->caps.steering_mode ==
  1364. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1365. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1366. MLX4_EN_FLAG_MC_PROMISC);
  1367. mlx4_flow_steer_promisc_remove(mdev->dev,
  1368. priv->port,
  1369. MLX4_FS_PROMISC_UPLINK);
  1370. mlx4_flow_steer_promisc_remove(mdev->dev,
  1371. priv->port,
  1372. MLX4_FS_PROMISC_ALL_MULTI);
  1373. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1374. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1375. /* Disable promiscouos mode */
  1376. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1377. priv->port);
  1378. /* Disable Multicast promisc */
  1379. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1380. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1381. priv->port);
  1382. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1383. }
  1384. }
  1385. /* Detach All multicasts */
  1386. memset(&mc_list[10], 0xff, ETH_ALEN);
  1387. mc_list[5] = priv->port; /* needed for B0 steering support */
  1388. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1389. MLX4_PROT_ETH, priv->broadcast_id);
  1390. list_for_each_entry(mclist, &priv->curr_list, list) {
  1391. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1392. mc_list[5] = priv->port;
  1393. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1394. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1395. }
  1396. mlx4_en_clear_list(dev);
  1397. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1398. list_del(&mclist->list);
  1399. kfree(mclist);
  1400. }
  1401. /* Flush multicast filter */
  1402. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1403. mlx4_en_destroy_drop_qp(priv);
  1404. /* Free TX Rings */
  1405. for (i = 0; i < priv->tx_ring_num; i++) {
  1406. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
  1407. mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
  1408. }
  1409. msleep(10);
  1410. for (i = 0; i < priv->tx_ring_num; i++)
  1411. mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
  1412. /* Free RSS qps */
  1413. mlx4_en_release_rss_steer(priv);
  1414. /* Unregister Mac address for the port */
  1415. mlx4_en_put_qp(priv);
  1416. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
  1417. mdev->mac_removed[priv->port] = 1;
  1418. /* Remove flow steering rules for the port*/
  1419. if (mdev->dev->caps.steering_mode ==
  1420. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1421. ASSERT_RTNL();
  1422. list_for_each_entry_safe(flow, tmp_flow,
  1423. &priv->ethtool_list, list) {
  1424. mlx4_flow_detach(mdev->dev, flow->id);
  1425. list_del(&flow->list);
  1426. }
  1427. }
  1428. /* Free RX Rings */
  1429. for (i = 0; i < priv->rx_ring_num; i++) {
  1430. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1431. while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
  1432. msleep(1);
  1433. mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
  1434. }
  1435. /* close port*/
  1436. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1437. }
  1438. static void mlx4_en_restart(struct work_struct *work)
  1439. {
  1440. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1441. watchdog_task);
  1442. struct mlx4_en_dev *mdev = priv->mdev;
  1443. struct net_device *dev = priv->dev;
  1444. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1445. mutex_lock(&mdev->state_lock);
  1446. if (priv->port_up) {
  1447. mlx4_en_stop_port(dev, 1);
  1448. if (mlx4_en_start_port(dev))
  1449. en_err(priv, "Failed restarting port %d\n", priv->port);
  1450. }
  1451. mutex_unlock(&mdev->state_lock);
  1452. }
  1453. static void mlx4_en_clear_stats(struct net_device *dev)
  1454. {
  1455. struct mlx4_en_priv *priv = netdev_priv(dev);
  1456. struct mlx4_en_dev *mdev = priv->mdev;
  1457. int i;
  1458. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1459. en_dbg(HW, priv, "Failed dumping statistics\n");
  1460. memset(&priv->stats, 0, sizeof(priv->stats));
  1461. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1462. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1463. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1464. for (i = 0; i < priv->tx_ring_num; i++) {
  1465. priv->tx_ring[i].bytes = 0;
  1466. priv->tx_ring[i].packets = 0;
  1467. priv->tx_ring[i].tx_csum = 0;
  1468. }
  1469. for (i = 0; i < priv->rx_ring_num; i++) {
  1470. priv->rx_ring[i].bytes = 0;
  1471. priv->rx_ring[i].packets = 0;
  1472. priv->rx_ring[i].csum_ok = 0;
  1473. priv->rx_ring[i].csum_none = 0;
  1474. }
  1475. }
  1476. static int mlx4_en_open(struct net_device *dev)
  1477. {
  1478. struct mlx4_en_priv *priv = netdev_priv(dev);
  1479. struct mlx4_en_dev *mdev = priv->mdev;
  1480. int err = 0;
  1481. mutex_lock(&mdev->state_lock);
  1482. if (!mdev->device_up) {
  1483. en_err(priv, "Cannot open - device down/disabled\n");
  1484. err = -EBUSY;
  1485. goto out;
  1486. }
  1487. /* Reset HW statistics and SW counters */
  1488. mlx4_en_clear_stats(dev);
  1489. err = mlx4_en_start_port(dev);
  1490. if (err)
  1491. en_err(priv, "Failed starting port:%d\n", priv->port);
  1492. out:
  1493. mutex_unlock(&mdev->state_lock);
  1494. return err;
  1495. }
  1496. static int mlx4_en_close(struct net_device *dev)
  1497. {
  1498. struct mlx4_en_priv *priv = netdev_priv(dev);
  1499. struct mlx4_en_dev *mdev = priv->mdev;
  1500. en_dbg(IFDOWN, priv, "Close port called\n");
  1501. mutex_lock(&mdev->state_lock);
  1502. mlx4_en_stop_port(dev, 0);
  1503. netif_carrier_off(dev);
  1504. mutex_unlock(&mdev->state_lock);
  1505. return 0;
  1506. }
  1507. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1508. {
  1509. int i;
  1510. #ifdef CONFIG_RFS_ACCEL
  1511. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1512. priv->dev->rx_cpu_rmap = NULL;
  1513. #endif
  1514. for (i = 0; i < priv->tx_ring_num; i++) {
  1515. if (priv->tx_ring[i].tx_info)
  1516. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1517. if (priv->tx_cq[i].buf)
  1518. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1519. }
  1520. for (i = 0; i < priv->rx_ring_num; i++) {
  1521. if (priv->rx_ring[i].rx_info)
  1522. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1523. priv->prof->rx_ring_size, priv->stride);
  1524. if (priv->rx_cq[i].buf)
  1525. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1526. }
  1527. if (priv->base_tx_qpn) {
  1528. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1529. priv->base_tx_qpn = 0;
  1530. }
  1531. }
  1532. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1533. {
  1534. struct mlx4_en_port_profile *prof = priv->prof;
  1535. int i;
  1536. int err;
  1537. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1538. if (err) {
  1539. en_err(priv, "failed reserving range for TX rings\n");
  1540. return err;
  1541. }
  1542. /* Create tx Rings */
  1543. for (i = 0; i < priv->tx_ring_num; i++) {
  1544. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1545. prof->tx_ring_size, i, TX))
  1546. goto err;
  1547. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
  1548. prof->tx_ring_size, TXBB_SIZE))
  1549. goto err;
  1550. }
  1551. /* Create rx Rings */
  1552. for (i = 0; i < priv->rx_ring_num; i++) {
  1553. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1554. prof->rx_ring_size, i, RX))
  1555. goto err;
  1556. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1557. prof->rx_ring_size, priv->stride))
  1558. goto err;
  1559. }
  1560. #ifdef CONFIG_RFS_ACCEL
  1561. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1562. if (!priv->dev->rx_cpu_rmap)
  1563. goto err;
  1564. #endif
  1565. return 0;
  1566. err:
  1567. en_err(priv, "Failed to allocate NIC resources\n");
  1568. return -ENOMEM;
  1569. }
  1570. void mlx4_en_destroy_netdev(struct net_device *dev)
  1571. {
  1572. struct mlx4_en_priv *priv = netdev_priv(dev);
  1573. struct mlx4_en_dev *mdev = priv->mdev;
  1574. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1575. /* Unregister device - this will close the port if it was up */
  1576. if (priv->registered)
  1577. unregister_netdev(dev);
  1578. if (priv->allocated)
  1579. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1580. cancel_delayed_work(&priv->stats_task);
  1581. /* flush any pending task for this netdev */
  1582. flush_workqueue(mdev->workqueue);
  1583. /* Detach the netdev so tasks would not attempt to access it */
  1584. mutex_lock(&mdev->state_lock);
  1585. mdev->pndev[priv->port] = NULL;
  1586. mutex_unlock(&mdev->state_lock);
  1587. mlx4_en_free_resources(priv);
  1588. kfree(priv->tx_ring);
  1589. kfree(priv->tx_cq);
  1590. free_netdev(dev);
  1591. }
  1592. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1593. {
  1594. struct mlx4_en_priv *priv = netdev_priv(dev);
  1595. struct mlx4_en_dev *mdev = priv->mdev;
  1596. int err = 0;
  1597. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1598. dev->mtu, new_mtu);
  1599. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1600. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1601. return -EPERM;
  1602. }
  1603. dev->mtu = new_mtu;
  1604. if (netif_running(dev)) {
  1605. mutex_lock(&mdev->state_lock);
  1606. if (!mdev->device_up) {
  1607. /* NIC is probably restarting - let watchdog task reset
  1608. * the port */
  1609. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1610. } else {
  1611. mlx4_en_stop_port(dev, 1);
  1612. err = mlx4_en_start_port(dev);
  1613. if (err) {
  1614. en_err(priv, "Failed restarting port:%d\n",
  1615. priv->port);
  1616. queue_work(mdev->workqueue, &priv->watchdog_task);
  1617. }
  1618. }
  1619. mutex_unlock(&mdev->state_lock);
  1620. }
  1621. return 0;
  1622. }
  1623. static int mlx4_en_set_features(struct net_device *netdev,
  1624. netdev_features_t features)
  1625. {
  1626. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1627. if (features & NETIF_F_LOOPBACK)
  1628. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1629. else
  1630. priv->ctrl_flags &=
  1631. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1632. mlx4_en_update_loopback_state(netdev, features);
  1633. return 0;
  1634. }
  1635. static int mlx4_en_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
  1636. struct net_device *dev,
  1637. const unsigned char *addr, u16 flags)
  1638. {
  1639. struct mlx4_en_priv *priv = netdev_priv(dev);
  1640. struct mlx4_dev *mdev = priv->mdev->dev;
  1641. int err;
  1642. if (!mlx4_is_mfunc(mdev))
  1643. return -EOPNOTSUPP;
  1644. /* Hardware does not support aging addresses, allow only
  1645. * permanent addresses if ndm_state is given
  1646. */
  1647. if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
  1648. en_info(priv, "Add FDB only supports static addresses\n");
  1649. return -EINVAL;
  1650. }
  1651. if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
  1652. err = dev_uc_add_excl(dev, addr);
  1653. else if (is_multicast_ether_addr(addr))
  1654. err = dev_mc_add_excl(dev, addr);
  1655. else
  1656. err = -EINVAL;
  1657. /* Only return duplicate errors if NLM_F_EXCL is set */
  1658. if (err == -EEXIST && !(flags & NLM_F_EXCL))
  1659. err = 0;
  1660. return err;
  1661. }
  1662. static int mlx4_en_fdb_del(struct ndmsg *ndm,
  1663. struct nlattr *tb[],
  1664. struct net_device *dev,
  1665. const unsigned char *addr)
  1666. {
  1667. struct mlx4_en_priv *priv = netdev_priv(dev);
  1668. struct mlx4_dev *mdev = priv->mdev->dev;
  1669. int err;
  1670. if (!mlx4_is_mfunc(mdev))
  1671. return -EOPNOTSUPP;
  1672. if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
  1673. en_info(priv, "Del FDB only supports static addresses\n");
  1674. return -EINVAL;
  1675. }
  1676. if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
  1677. err = dev_uc_del(dev, addr);
  1678. else if (is_multicast_ether_addr(addr))
  1679. err = dev_mc_del(dev, addr);
  1680. else
  1681. err = -EINVAL;
  1682. return err;
  1683. }
  1684. static int mlx4_en_fdb_dump(struct sk_buff *skb,
  1685. struct netlink_callback *cb,
  1686. struct net_device *dev, int idx)
  1687. {
  1688. struct mlx4_en_priv *priv = netdev_priv(dev);
  1689. struct mlx4_dev *mdev = priv->mdev->dev;
  1690. if (mlx4_is_mfunc(mdev))
  1691. idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
  1692. return idx;
  1693. }
  1694. static const struct net_device_ops mlx4_netdev_ops = {
  1695. .ndo_open = mlx4_en_open,
  1696. .ndo_stop = mlx4_en_close,
  1697. .ndo_start_xmit = mlx4_en_xmit,
  1698. .ndo_select_queue = mlx4_en_select_queue,
  1699. .ndo_get_stats = mlx4_en_get_stats,
  1700. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1701. .ndo_set_mac_address = mlx4_en_set_mac,
  1702. .ndo_validate_addr = eth_validate_addr,
  1703. .ndo_change_mtu = mlx4_en_change_mtu,
  1704. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1705. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1706. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1707. #ifdef CONFIG_NET_POLL_CONTROLLER
  1708. .ndo_poll_controller = mlx4_en_netpoll,
  1709. #endif
  1710. .ndo_set_features = mlx4_en_set_features,
  1711. .ndo_setup_tc = mlx4_en_setup_tc,
  1712. #ifdef CONFIG_RFS_ACCEL
  1713. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1714. #endif
  1715. .ndo_fdb_add = mlx4_en_fdb_add,
  1716. .ndo_fdb_del = mlx4_en_fdb_del,
  1717. .ndo_fdb_dump = mlx4_en_fdb_dump,
  1718. };
  1719. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1720. struct mlx4_en_port_profile *prof)
  1721. {
  1722. struct net_device *dev;
  1723. struct mlx4_en_priv *priv;
  1724. int i;
  1725. int err;
  1726. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1727. MAX_TX_RINGS, MAX_RX_RINGS);
  1728. if (dev == NULL)
  1729. return -ENOMEM;
  1730. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1731. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  1732. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  1733. dev->dev_id = port - 1;
  1734. /*
  1735. * Initialize driver private data
  1736. */
  1737. priv = netdev_priv(dev);
  1738. memset(priv, 0, sizeof(struct mlx4_en_priv));
  1739. priv->dev = dev;
  1740. priv->mdev = mdev;
  1741. priv->ddev = &mdev->pdev->dev;
  1742. priv->prof = prof;
  1743. priv->port = port;
  1744. priv->port_up = false;
  1745. priv->flags = prof->flags;
  1746. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  1747. MLX4_WQE_CTRL_SOLICITED);
  1748. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1749. priv->tx_ring_num = prof->tx_ring_num;
  1750. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
  1751. GFP_KERNEL);
  1752. if (!priv->tx_ring) {
  1753. err = -ENOMEM;
  1754. goto out;
  1755. }
  1756. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS,
  1757. GFP_KERNEL);
  1758. if (!priv->tx_cq) {
  1759. err = -ENOMEM;
  1760. goto out;
  1761. }
  1762. priv->rx_ring_num = prof->rx_ring_num;
  1763. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1764. priv->mac_index = -1;
  1765. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1766. spin_lock_init(&priv->stats_lock);
  1767. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1768. INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac);
  1769. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1770. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1771. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1772. #ifdef CONFIG_MLX4_EN_DCB
  1773. if (!mlx4_is_slave(priv->mdev->dev))
  1774. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1775. #endif
  1776. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  1777. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  1778. /* Query for default mac and max mtu */
  1779. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1780. /* Set default MAC */
  1781. dev->addr_len = ETH_ALEN;
  1782. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  1783. if (!is_valid_ether_addr(dev->dev_addr)) {
  1784. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  1785. priv->port, dev->dev_addr);
  1786. err = -EINVAL;
  1787. goto out;
  1788. }
  1789. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  1790. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1791. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1792. err = mlx4_en_alloc_resources(priv);
  1793. if (err)
  1794. goto out;
  1795. #ifdef CONFIG_RFS_ACCEL
  1796. INIT_LIST_HEAD(&priv->filters);
  1797. spin_lock_init(&priv->filters_lock);
  1798. #endif
  1799. /* Allocate page for receive rings */
  1800. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1801. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1802. if (err) {
  1803. en_err(priv, "Failed to allocate page for rx qps\n");
  1804. goto out;
  1805. }
  1806. priv->allocated = 1;
  1807. /*
  1808. * Initialize netdev entry points
  1809. */
  1810. dev->netdev_ops = &mlx4_netdev_ops;
  1811. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  1812. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  1813. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  1814. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  1815. /*
  1816. * Set driver features
  1817. */
  1818. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  1819. if (mdev->LSO_support)
  1820. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  1821. dev->vlan_features = dev->hw_features;
  1822. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  1823. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  1824. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
  1825. NETIF_F_HW_VLAN_FILTER;
  1826. dev->hw_features |= NETIF_F_LOOPBACK;
  1827. if (mdev->dev->caps.steering_mode ==
  1828. MLX4_STEERING_MODE_DEVICE_MANAGED)
  1829. dev->hw_features |= NETIF_F_NTUPLE;
  1830. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1831. dev->priv_flags |= IFF_UNICAST_FLT;
  1832. mdev->pndev[port] = dev;
  1833. netif_carrier_off(dev);
  1834. err = register_netdev(dev);
  1835. if (err) {
  1836. en_err(priv, "Netdev registration failed for port %d\n", port);
  1837. goto out;
  1838. }
  1839. priv->registered = 1;
  1840. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1841. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1842. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  1843. /* Configure port */
  1844. mlx4_en_calc_rx_buf(dev);
  1845. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1846. priv->rx_skb_size + ETH_FCS_LEN,
  1847. prof->tx_pause, prof->tx_ppp,
  1848. prof->rx_pause, prof->rx_ppp);
  1849. if (err) {
  1850. en_err(priv, "Failed setting port general configurations "
  1851. "for port %d, with error %d\n", priv->port, err);
  1852. goto out;
  1853. }
  1854. /* Init port */
  1855. en_warn(priv, "Initializing port\n");
  1856. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1857. if (err) {
  1858. en_err(priv, "Failed Initializing port\n");
  1859. goto out;
  1860. }
  1861. mlx4_en_set_default_moderation(priv);
  1862. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1863. return 0;
  1864. out:
  1865. mlx4_en_destroy_netdev(dev);
  1866. return err;
  1867. }