pm8001_sas.h 15 KB

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  1. /*
  2. * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver
  3. *
  4. * Copyright (c) 2008-2009 USI Co., Ltd.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. */
  40. #ifndef _PM8001_SAS_H_
  41. #define _PM8001_SAS_H_
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/spinlock.h>
  45. #include <linux/delay.h>
  46. #include <linux/types.h>
  47. #include <linux/ctype.h>
  48. #include <linux/dma-mapping.h>
  49. #include <linux/pci.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/smp_lock.h>
  52. #include <scsi/libsas.h>
  53. #include <scsi/scsi_tcq.h>
  54. #include <scsi/sas_ata.h>
  55. #include <asm/atomic.h>
  56. #include "pm8001_defs.h"
  57. #define DRV_NAME "pm8001"
  58. #define DRV_VERSION "0.1.36"
  59. #define PM8001_FAIL_LOGGING 0x01 /* libsas EH function logging */
  60. #define PM8001_INIT_LOGGING 0x02 /* driver init logging */
  61. #define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */
  62. #define PM8001_IO_LOGGING 0x08 /* I/O path logging */
  63. #define PM8001_EH_LOGGING 0x10 /* Error message logging */
  64. #define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */
  65. #define PM8001_MSG_LOGGING 0x40 /* misc message logging */
  66. #define pm8001_printk(format, arg...) printk(KERN_INFO "%s %d:" format,\
  67. __func__, __LINE__, ## arg)
  68. #define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD) \
  69. do { \
  70. if (unlikely(HBA->logging_level & LEVEL)) \
  71. do { \
  72. CMD; \
  73. } while (0); \
  74. } while (0);
  75. #define PM8001_EH_DBG(HBA, CMD) \
  76. PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
  77. #define PM8001_INIT_DBG(HBA, CMD) \
  78. PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
  79. #define PM8001_DISC_DBG(HBA, CMD) \
  80. PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
  81. #define PM8001_IO_DBG(HBA, CMD) \
  82. PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
  83. #define PM8001_FAIL_DBG(HBA, CMD) \
  84. PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
  85. #define PM8001_IOCTL_DBG(HBA, CMD) \
  86. PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
  87. #define PM8001_MSG_DBG(HBA, CMD) \
  88. PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
  89. #define PM8001_USE_TASKLET
  90. #define PM8001_USE_MSIX
  91. #define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV))
  92. #define PM8001_NAME_LENGTH 32/* generic length of strings */
  93. extern struct list_head hba_list;
  94. extern const struct pm8001_dispatch pm8001_8001_dispatch;
  95. struct pm8001_hba_info;
  96. struct pm8001_ccb_info;
  97. struct pm8001_device;
  98. struct pm8001_tmf_task;
  99. struct pm8001_dispatch {
  100. char *name;
  101. int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
  102. int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha, u32 signature);
  103. void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
  104. int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
  105. void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
  106. irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha);
  107. u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha);
  108. int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha);
  109. void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha);
  110. void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha);
  111. void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
  112. int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
  113. struct pm8001_ccb_info *ccb);
  114. int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
  115. struct pm8001_ccb_info *ccb);
  116. int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
  117. struct pm8001_ccb_info *ccb);
  118. int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
  119. int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
  120. int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
  121. struct pm8001_device *pm8001_dev, u32 flag);
  122. int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
  123. int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
  124. u32 phy_id, u32 phy_op);
  125. int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
  126. struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
  127. u32 cmd_tag);
  128. int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
  129. struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
  130. int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
  131. int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
  132. int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
  133. void *payload);
  134. int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
  135. struct pm8001_device *pm8001_dev, u32 state);
  136. int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
  137. u32 state);
  138. int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
  139. u32 state);
  140. int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
  141. };
  142. struct pm8001_chip_info {
  143. u32 n_phy;
  144. const struct pm8001_dispatch *dispatch;
  145. };
  146. #define PM8001_CHIP_DISP (pm8001_ha->chip->dispatch)
  147. struct pm8001_port {
  148. struct asd_sas_port sas_port;
  149. u8 port_attached;
  150. u8 wide_port_phymap;
  151. u8 port_state;
  152. struct list_head list;
  153. };
  154. struct pm8001_phy {
  155. struct pm8001_hba_info *pm8001_ha;
  156. struct pm8001_port *port;
  157. struct asd_sas_phy sas_phy;
  158. struct sas_identify identify;
  159. struct scsi_device *sdev;
  160. u64 dev_sas_addr;
  161. u32 phy_type;
  162. struct completion *enable_completion;
  163. u32 frame_rcvd_size;
  164. u8 frame_rcvd[32];
  165. u8 phy_attached;
  166. u8 phy_state;
  167. enum sas_linkrate minimum_linkrate;
  168. enum sas_linkrate maximum_linkrate;
  169. };
  170. struct pm8001_device {
  171. enum sas_dev_type dev_type;
  172. struct domain_device *sas_device;
  173. u32 attached_phy;
  174. u32 id;
  175. struct completion *dcompletion;
  176. struct completion *setds_completion;
  177. u32 device_id;
  178. u32 running_req;
  179. };
  180. struct pm8001_prd_imt {
  181. __le32 len;
  182. __le32 e;
  183. };
  184. struct pm8001_prd {
  185. __le64 addr; /* 64-bit buffer address */
  186. struct pm8001_prd_imt im_len; /* 64-bit length */
  187. } __attribute__ ((packed));
  188. /*
  189. * CCB(Command Control Block)
  190. */
  191. struct pm8001_ccb_info {
  192. struct list_head entry;
  193. struct sas_task *task;
  194. u32 n_elem;
  195. u32 ccb_tag;
  196. dma_addr_t ccb_dma_handle;
  197. struct pm8001_device *device;
  198. struct pm8001_prd buf_prd[PM8001_MAX_DMA_SG];
  199. struct fw_control_ex *fw_control_context;
  200. };
  201. struct mpi_mem {
  202. void *virt_ptr;
  203. dma_addr_t phys_addr;
  204. u32 phys_addr_hi;
  205. u32 phys_addr_lo;
  206. u32 total_len;
  207. u32 num_elements;
  208. u32 element_size;
  209. u32 alignment;
  210. };
  211. struct mpi_mem_req {
  212. /* The number of element in the mpiMemory array */
  213. u32 count;
  214. /* The array of structures that define memroy regions*/
  215. struct mpi_mem region[USI_MAX_MEMCNT];
  216. };
  217. struct main_cfg_table {
  218. u32 signature;
  219. u32 interface_rev;
  220. u32 firmware_rev;
  221. u32 max_out_io;
  222. u32 max_sgl;
  223. u32 ctrl_cap_flag;
  224. u32 gst_offset;
  225. u32 inbound_queue_offset;
  226. u32 outbound_queue_offset;
  227. u32 inbound_q_nppd_hppd;
  228. u32 outbound_hw_event_pid0_3;
  229. u32 outbound_hw_event_pid4_7;
  230. u32 outbound_ncq_event_pid0_3;
  231. u32 outbound_ncq_event_pid4_7;
  232. u32 outbound_tgt_ITNexus_event_pid0_3;
  233. u32 outbound_tgt_ITNexus_event_pid4_7;
  234. u32 outbound_tgt_ssp_event_pid0_3;
  235. u32 outbound_tgt_ssp_event_pid4_7;
  236. u32 outbound_tgt_smp_event_pid0_3;
  237. u32 outbound_tgt_smp_event_pid4_7;
  238. u32 upper_event_log_addr;
  239. u32 lower_event_log_addr;
  240. u32 event_log_size;
  241. u32 event_log_option;
  242. u32 upper_iop_event_log_addr;
  243. u32 lower_iop_event_log_addr;
  244. u32 iop_event_log_size;
  245. u32 iop_event_log_option;
  246. u32 fatal_err_interrupt;
  247. u32 fatal_err_dump_offset0;
  248. u32 fatal_err_dump_length0;
  249. u32 fatal_err_dump_offset1;
  250. u32 fatal_err_dump_length1;
  251. u32 hda_mode_flag;
  252. u32 anolog_setup_table_offset;
  253. };
  254. struct general_status_table {
  255. u32 gst_len_mpistate;
  256. u32 iq_freeze_state0;
  257. u32 iq_freeze_state1;
  258. u32 msgu_tcnt;
  259. u32 iop_tcnt;
  260. u32 reserved;
  261. u32 phy_state[8];
  262. u32 reserved1;
  263. u32 reserved2;
  264. u32 reserved3;
  265. u32 recover_err_info[8];
  266. };
  267. struct inbound_queue_table {
  268. u32 element_pri_size_cnt;
  269. u32 upper_base_addr;
  270. u32 lower_base_addr;
  271. u32 ci_upper_base_addr;
  272. u32 ci_lower_base_addr;
  273. u32 pi_pci_bar;
  274. u32 pi_offset;
  275. u32 total_length;
  276. void *base_virt;
  277. void *ci_virt;
  278. u32 reserved;
  279. __le32 consumer_index;
  280. u32 producer_idx;
  281. };
  282. struct outbound_queue_table {
  283. u32 element_size_cnt;
  284. u32 upper_base_addr;
  285. u32 lower_base_addr;
  286. void *base_virt;
  287. u32 pi_upper_base_addr;
  288. u32 pi_lower_base_addr;
  289. u32 ci_pci_bar;
  290. u32 ci_offset;
  291. u32 total_length;
  292. void *pi_virt;
  293. u32 interrup_vec_cnt_delay;
  294. u32 dinterrup_to_pci_offset;
  295. __le32 producer_index;
  296. u32 consumer_idx;
  297. };
  298. struct pm8001_hba_memspace {
  299. void __iomem *memvirtaddr;
  300. u64 membase;
  301. u32 memsize;
  302. };
  303. struct pm8001_hba_info {
  304. char name[PM8001_NAME_LENGTH];
  305. struct list_head list;
  306. unsigned long flags;
  307. spinlock_t lock;/* host-wide lock */
  308. struct pci_dev *pdev;/* our device */
  309. struct device *dev;
  310. struct pm8001_hba_memspace io_mem[6];
  311. struct mpi_mem_req memoryMap;
  312. void __iomem *msg_unit_tbl_addr;/*Message Unit Table Addr*/
  313. void __iomem *main_cfg_tbl_addr;/*Main Config Table Addr*/
  314. void __iomem *general_stat_tbl_addr;/*General Status Table Addr*/
  315. void __iomem *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
  316. void __iomem *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
  317. struct main_cfg_table main_cfg_tbl;
  318. struct general_status_table gs_tbl;
  319. struct inbound_queue_table inbnd_q_tbl[PM8001_MAX_INB_NUM];
  320. struct outbound_queue_table outbnd_q_tbl[PM8001_MAX_OUTB_NUM];
  321. u8 sas_addr[SAS_ADDR_SIZE];
  322. struct sas_ha_struct *sas;/* SCSI/SAS glue */
  323. struct Scsi_Host *shost;
  324. u32 chip_id;
  325. const struct pm8001_chip_info *chip;
  326. struct completion *nvmd_completion;
  327. int tags_num;
  328. unsigned long *tags;
  329. struct pm8001_phy phy[PM8001_MAX_PHYS];
  330. struct pm8001_port port[PM8001_MAX_PHYS];
  331. u32 id;
  332. u32 irq;
  333. struct pm8001_device *devices;
  334. struct pm8001_ccb_info *ccb_info;
  335. #ifdef PM8001_USE_MSIX
  336. struct msix_entry msix_entries[16];/*for msi-x interrupt*/
  337. int number_of_intr;/*will be used in remove()*/
  338. #endif
  339. #ifdef PM8001_USE_TASKLET
  340. struct tasklet_struct tasklet;
  341. #endif
  342. struct list_head wq_list;
  343. u32 logging_level;
  344. u32 fw_status;
  345. const struct firmware *fw_image;
  346. };
  347. struct pm8001_wq {
  348. struct delayed_work work_q;
  349. struct pm8001_hba_info *pm8001_ha;
  350. void *data;
  351. int handler;
  352. struct list_head entry;
  353. };
  354. struct pm8001_fw_image_header {
  355. u8 vender_id[8];
  356. u8 product_id;
  357. u8 hardware_rev;
  358. u8 dest_partition;
  359. u8 reserved;
  360. u8 fw_rev[4];
  361. __be32 image_length;
  362. __be32 image_crc;
  363. __be32 startup_entry;
  364. } __attribute__((packed, aligned(4)));
  365. /* define task management IU */
  366. struct pm8001_tmf_task {
  367. u8 tmf;
  368. u32 tag_of_task_to_be_managed;
  369. };
  370. /**
  371. * FW Flash Update status values
  372. */
  373. #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT 0x00
  374. #define FLASH_UPDATE_IN_PROGRESS 0x01
  375. #define FLASH_UPDATE_HDR_ERR 0x02
  376. #define FLASH_UPDATE_OFFSET_ERR 0x03
  377. #define FLASH_UPDATE_CRC_ERR 0x04
  378. #define FLASH_UPDATE_LENGTH_ERR 0x05
  379. #define FLASH_UPDATE_HW_ERR 0x06
  380. #define FLASH_UPDATE_DNLD_NOT_SUPPORTED 0x10
  381. #define FLASH_UPDATE_DISABLED 0x11
  382. /**
  383. * brief param structure for firmware flash update.
  384. */
  385. struct fw_flash_updata_info {
  386. u32 cur_image_offset;
  387. u32 cur_image_len;
  388. u32 total_image_len;
  389. struct pm8001_prd sgl;
  390. };
  391. struct fw_control_info {
  392. u32 retcode;/*ret code (status)*/
  393. u32 phase;/*ret code phase*/
  394. u32 phaseCmplt;/*percent complete for the current
  395. update phase */
  396. u32 version;/*Hex encoded firmware version number*/
  397. u32 offset;/*Used for downloading firmware */
  398. u32 len; /*len of buffer*/
  399. u32 size;/* Used in OS VPD and Trace get size
  400. operations.*/
  401. u32 reserved;/* padding required for 64 bit
  402. alignment */
  403. u8 buffer[1];/* Start of buffer */
  404. };
  405. struct fw_control_ex {
  406. struct fw_control_info *fw_control;
  407. void *buffer;/* keep buffer pointer to be
  408. freed when the responce comes*/
  409. void *virtAddr;/* keep virtual address of the data */
  410. void *usrAddr;/* keep virtual address of the
  411. user data */
  412. dma_addr_t phys_addr;
  413. u32 len; /* len of buffer */
  414. void *payload; /* pointer to IOCTL Payload */
  415. u8 inProgress;/*if 1 - the IOCTL request is in
  416. progress */
  417. void *param1;
  418. void *param2;
  419. void *param3;
  420. };
  421. /******************** function prototype *********************/
  422. int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
  423. void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
  424. u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
  425. void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx);
  426. void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
  427. struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
  428. int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
  429. void *funcdata);
  430. int pm8001_slave_alloc(struct scsi_device *scsi_dev);
  431. int pm8001_slave_configure(struct scsi_device *sdev);
  432. void pm8001_scan_start(struct Scsi_Host *shost);
  433. int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
  434. int pm8001_queue_command(struct sas_task *task, const int num,
  435. gfp_t gfp_flags);
  436. int pm8001_abort_task(struct sas_task *task);
  437. int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
  438. int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
  439. int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
  440. int pm8001_dev_found(struct domain_device *dev);
  441. void pm8001_dev_gone(struct domain_device *dev);
  442. int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
  443. int pm8001_I_T_nexus_reset(struct domain_device *dev);
  444. int pm8001_query_task(struct sas_task *task);
  445. int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
  446. dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
  447. u32 mem_size, u32 align);
  448. /* ctl shared API */
  449. extern struct device_attribute *pm8001_host_attrs[];
  450. #endif