amd-iommu.h 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171
  1. /*
  2. * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
  3. * Author: Joerg Roedel <joerg.roedel@amd.com>
  4. * Leo Duran <leo.duran@amd.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #ifndef _ASM_X86_AMD_IOMMU_H
  20. #define _ASM_X86_AMD_IOMMU_H
  21. #include <linux/types.h>
  22. #ifdef CONFIG_AMD_IOMMU
  23. struct task_struct;
  24. struct pci_dev;
  25. extern int amd_iommu_detect(void);
  26. /**
  27. * amd_iommu_enable_device_erratum() - Enable erratum workaround for device
  28. * in the IOMMUv2 driver
  29. * @pdev: The PCI device the workaround is necessary for
  30. * @erratum: The erratum workaround to enable
  31. *
  32. * The function needs to be called before amd_iommu_init_device().
  33. * Possible values for the erratum number are for now:
  34. * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
  35. * is enabled
  36. * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
  37. * requests to one
  38. */
  39. #define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
  40. #define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
  41. extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
  42. /**
  43. * amd_iommu_init_device() - Init device for use with IOMMUv2 driver
  44. * @pdev: The PCI device to initialize
  45. * @pasids: Number of PASIDs to support for this device
  46. *
  47. * This function does all setup for the device pdev so that it can be
  48. * used with IOMMUv2.
  49. * Returns 0 on success or negative value on error.
  50. */
  51. extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
  52. /**
  53. * amd_iommu_free_device() - Free all IOMMUv2 related device resources
  54. * and disable IOMMUv2 usage for this device
  55. * @pdev: The PCI device to disable IOMMUv2 usage for'
  56. */
  57. extern void amd_iommu_free_device(struct pci_dev *pdev);
  58. /**
  59. * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
  60. * @pdev: The PCI device to bind the task to
  61. * @pasid: The PASID on the device the task should be bound to
  62. * @task: the task to bind
  63. *
  64. * The function returns 0 on success or a negative value on error.
  65. */
  66. extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
  67. struct task_struct *task);
  68. /**
  69. * amd_iommu_unbind_pasid() - Unbind a PASID from its task on
  70. * a device
  71. * @pdev: The device of the PASID
  72. * @pasid: The PASID to unbind
  73. *
  74. * When this function returns the device is no longer using the PASID
  75. * and the PASID is no longer bound to its task.
  76. */
  77. extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
  78. /**
  79. * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
  80. * PRI requests
  81. * @pdev: The PCI device the call-back should be registered for
  82. * @cb: The call-back function
  83. *
  84. * The IOMMUv2 driver invokes this call-back when it is unable to
  85. * successfully handle a PRI request. The device driver can then decide
  86. * which PRI response the device should see. Possible return values for
  87. * the call-back are:
  88. *
  89. * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
  90. * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
  91. * - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
  92. * the device is required to disable
  93. * PRI when it receives this response
  94. *
  95. * The function returns 0 on success or negative value on error.
  96. */
  97. #define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
  98. #define AMD_IOMMU_INV_PRI_RSP_INVALID 1
  99. #define AMD_IOMMU_INV_PRI_RSP_FAIL 2
  100. typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
  101. int pasid,
  102. unsigned long address,
  103. u16);
  104. extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
  105. amd_iommu_invalid_ppr_cb cb);
  106. /**
  107. * amd_iommu_device_info() - Get information about IOMMUv2 support of a
  108. * PCI device
  109. * @pdev: PCI device to query information from
  110. * @info: A pointer to an amd_iommu_device_info structure which will contain
  111. * the information about the PCI device
  112. *
  113. * Returns 0 on success, negative value on error
  114. */
  115. #define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */
  116. #define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */
  117. #define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */
  118. #define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution
  119. on memory pages */
  120. #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request
  121. super-user privileges */
  122. struct amd_iommu_device_info {
  123. int max_pasids;
  124. u32 flags;
  125. };
  126. extern int amd_iommu_device_info(struct pci_dev *pdev,
  127. struct amd_iommu_device_info *info);
  128. /**
  129. * amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
  130. * a pasid context. This call-back is
  131. * invoked when the IOMMUv2 driver needs to
  132. * invalidate a PASID context, for example
  133. * because the task that is bound to that
  134. * context is about to exit.
  135. *
  136. * @pdev: The PCI device the call-back should be registered for
  137. * @cb: The call-back function
  138. */
  139. typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);
  140. extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
  141. amd_iommu_invalidate_ctx cb);
  142. #else
  143. static inline int amd_iommu_detect(void) { return -ENODEV; }
  144. #endif
  145. #endif /* _ASM_X86_AMD_IOMMU_H */