devices.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751
  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/gpio.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/io.h>
  16. #include <linux/clk.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <mach/hardware.h>
  21. #include <mach/irqs.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/pmu.h>
  25. #include <plat/tc.h>
  26. #include <plat/board.h>
  27. #include <plat/mcbsp.h>
  28. #include <plat/mmc.h>
  29. #include <plat/iommu.h>
  30. #include <plat/dma.h>
  31. #include <plat/omap_hwmod.h>
  32. #include <plat/omap_device.h>
  33. #include <plat/omap4-keypad.h>
  34. #include "mux.h"
  35. #include "control.h"
  36. #include "devices.h"
  37. #define L3_MODULES_MAX_LEN 12
  38. #define L3_MODULES 3
  39. static int __init omap3_l3_init(void)
  40. {
  41. int l;
  42. struct omap_hwmod *oh;
  43. struct platform_device *pdev;
  44. char oh_name[L3_MODULES_MAX_LEN];
  45. /*
  46. * To avoid code running on other OMAPs in
  47. * multi-omap builds
  48. */
  49. if (!(cpu_is_omap34xx()))
  50. return -ENODEV;
  51. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  52. oh = omap_hwmod_lookup(oh_name);
  53. if (!oh)
  54. pr_err("could not look up %s\n", oh_name);
  55. pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  56. NULL, 0, 0);
  57. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  58. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  59. }
  60. postcore_initcall(omap3_l3_init);
  61. static int __init omap4_l3_init(void)
  62. {
  63. int l, i;
  64. struct omap_hwmod *oh[3];
  65. struct platform_device *pdev;
  66. char oh_name[L3_MODULES_MAX_LEN];
  67. /* If dtb is there, the devices will be created dynamically */
  68. if (of_have_populated_dt())
  69. return -ENODEV;
  70. /*
  71. * To avoid code running on other OMAPs in
  72. * multi-omap builds
  73. */
  74. if (!(cpu_is_omap44xx()))
  75. return -ENODEV;
  76. for (i = 0; i < L3_MODULES; i++) {
  77. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  78. oh[i] = omap_hwmod_lookup(oh_name);
  79. if (!(oh[i]))
  80. pr_err("could not look up %s\n", oh_name);
  81. }
  82. pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  83. 0, NULL, 0, 0);
  84. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  85. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  86. }
  87. postcore_initcall(omap4_l3_init);
  88. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  89. static struct resource omap2cam_resources[] = {
  90. {
  91. .start = OMAP24XX_CAMERA_BASE,
  92. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  93. .flags = IORESOURCE_MEM,
  94. },
  95. {
  96. .start = INT_24XX_CAM_IRQ,
  97. .flags = IORESOURCE_IRQ,
  98. }
  99. };
  100. static struct platform_device omap2cam_device = {
  101. .name = "omap24xxcam",
  102. .id = -1,
  103. .num_resources = ARRAY_SIZE(omap2cam_resources),
  104. .resource = omap2cam_resources,
  105. };
  106. #endif
  107. static struct resource omap3isp_resources[] = {
  108. {
  109. .start = OMAP3430_ISP_BASE,
  110. .end = OMAP3430_ISP_END,
  111. .flags = IORESOURCE_MEM,
  112. },
  113. {
  114. .start = OMAP3430_ISP_CCP2_BASE,
  115. .end = OMAP3430_ISP_CCP2_END,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .start = OMAP3430_ISP_CCDC_BASE,
  120. .end = OMAP3430_ISP_CCDC_END,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = OMAP3430_ISP_HIST_BASE,
  125. .end = OMAP3430_ISP_HIST_END,
  126. .flags = IORESOURCE_MEM,
  127. },
  128. {
  129. .start = OMAP3430_ISP_H3A_BASE,
  130. .end = OMAP3430_ISP_H3A_END,
  131. .flags = IORESOURCE_MEM,
  132. },
  133. {
  134. .start = OMAP3430_ISP_PREV_BASE,
  135. .end = OMAP3430_ISP_PREV_END,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. {
  139. .start = OMAP3430_ISP_RESZ_BASE,
  140. .end = OMAP3430_ISP_RESZ_END,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. {
  144. .start = OMAP3430_ISP_SBL_BASE,
  145. .end = OMAP3430_ISP_SBL_END,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. {
  149. .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
  150. .end = OMAP3430_ISP_CSI2A_REGS1_END,
  151. .flags = IORESOURCE_MEM,
  152. },
  153. {
  154. .start = OMAP3430_ISP_CSIPHY2_BASE,
  155. .end = OMAP3430_ISP_CSIPHY2_END,
  156. .flags = IORESOURCE_MEM,
  157. },
  158. {
  159. .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
  160. .end = OMAP3630_ISP_CSI2A_REGS2_END,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. {
  164. .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
  165. .end = OMAP3630_ISP_CSI2C_REGS1_END,
  166. .flags = IORESOURCE_MEM,
  167. },
  168. {
  169. .start = OMAP3630_ISP_CSIPHY1_BASE,
  170. .end = OMAP3630_ISP_CSIPHY1_END,
  171. .flags = IORESOURCE_MEM,
  172. },
  173. {
  174. .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
  175. .end = OMAP3630_ISP_CSI2C_REGS2_END,
  176. .flags = IORESOURCE_MEM,
  177. },
  178. {
  179. .start = INT_34XX_CAM_IRQ,
  180. .flags = IORESOURCE_IRQ,
  181. }
  182. };
  183. static struct platform_device omap3isp_device = {
  184. .name = "omap3isp",
  185. .id = -1,
  186. .num_resources = ARRAY_SIZE(omap3isp_resources),
  187. .resource = omap3isp_resources,
  188. };
  189. static struct omap_iommu_arch_data omap3_isp_iommu = {
  190. .name = "isp",
  191. };
  192. int omap3_init_camera(struct isp_platform_data *pdata)
  193. {
  194. omap3isp_device.dev.platform_data = pdata;
  195. omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
  196. return platform_device_register(&omap3isp_device);
  197. }
  198. static inline void omap_init_camera(void)
  199. {
  200. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  201. if (cpu_is_omap24xx())
  202. platform_device_register(&omap2cam_device);
  203. #endif
  204. }
  205. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  206. *sdp4430_keypad_data, struct omap_board_data *bdata)
  207. {
  208. struct platform_device *pdev;
  209. struct omap_hwmod *oh;
  210. struct omap4_keypad_platform_data *keypad_data;
  211. unsigned int id = -1;
  212. char *oh_name = "kbd";
  213. char *name = "omap4-keypad";
  214. oh = omap_hwmod_lookup(oh_name);
  215. if (!oh) {
  216. pr_err("Could not look up %s\n", oh_name);
  217. return -ENODEV;
  218. }
  219. keypad_data = sdp4430_keypad_data;
  220. pdev = omap_device_build(name, id, oh, keypad_data,
  221. sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
  222. if (IS_ERR(pdev)) {
  223. WARN(1, "Can't build omap_device for %s:%s.\n",
  224. name, oh->name);
  225. return PTR_ERR(pdev);
  226. }
  227. oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
  228. return 0;
  229. }
  230. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  231. static inline void omap_init_mbox(void)
  232. {
  233. struct omap_hwmod *oh;
  234. struct platform_device *pdev;
  235. oh = omap_hwmod_lookup("mailbox");
  236. if (!oh) {
  237. pr_err("%s: unable to find hwmod\n", __func__);
  238. return;
  239. }
  240. pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
  241. WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
  242. __func__, PTR_ERR(pdev));
  243. }
  244. #else
  245. static inline void omap_init_mbox(void) { }
  246. #endif /* CONFIG_OMAP_MBOX_FWK */
  247. static inline void omap_init_sti(void) {}
  248. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  249. static struct platform_device omap_pcm = {
  250. .name = "omap-pcm-audio",
  251. .id = -1,
  252. };
  253. /*
  254. * OMAP2420 has 2 McBSP ports
  255. * OMAP2430 has 5 McBSP ports
  256. * OMAP3 has 5 McBSP ports
  257. * OMAP4 has 4 McBSP ports
  258. */
  259. OMAP_MCBSP_PLATFORM_DEVICE(1);
  260. OMAP_MCBSP_PLATFORM_DEVICE(2);
  261. OMAP_MCBSP_PLATFORM_DEVICE(3);
  262. OMAP_MCBSP_PLATFORM_DEVICE(4);
  263. OMAP_MCBSP_PLATFORM_DEVICE(5);
  264. static void omap_init_audio(void)
  265. {
  266. platform_device_register(&omap_mcbsp1);
  267. platform_device_register(&omap_mcbsp2);
  268. if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
  269. platform_device_register(&omap_mcbsp3);
  270. platform_device_register(&omap_mcbsp4);
  271. }
  272. if (cpu_is_omap243x() || cpu_is_omap34xx())
  273. platform_device_register(&omap_mcbsp5);
  274. platform_device_register(&omap_pcm);
  275. }
  276. #else
  277. static inline void omap_init_audio(void) {}
  278. #endif
  279. #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
  280. defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
  281. static void omap_init_mcpdm(void)
  282. {
  283. struct omap_hwmod *oh;
  284. struct platform_device *pdev;
  285. oh = omap_hwmod_lookup("mcpdm");
  286. if (!oh) {
  287. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  288. return;
  289. }
  290. pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
  291. WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
  292. }
  293. #else
  294. static inline void omap_init_mcpdm(void) {}
  295. #endif
  296. #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
  297. defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
  298. static void omap_init_dmic(void)
  299. {
  300. struct omap_hwmod *oh;
  301. struct platform_device *pdev;
  302. oh = omap_hwmod_lookup("dmic");
  303. if (!oh) {
  304. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  305. return;
  306. }
  307. pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
  308. WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
  309. }
  310. #else
  311. static inline void omap_init_dmic(void) {}
  312. #endif
  313. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  314. #include <plat/mcspi.h>
  315. static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  316. {
  317. struct platform_device *pdev;
  318. char *name = "omap2_mcspi";
  319. struct omap2_mcspi_platform_config *pdata;
  320. static int spi_num;
  321. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  322. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  323. if (!pdata) {
  324. pr_err("Memory allocation for McSPI device failed\n");
  325. return -ENOMEM;
  326. }
  327. pdata->num_cs = mcspi_attrib->num_chipselect;
  328. switch (oh->class->rev) {
  329. case OMAP2_MCSPI_REV:
  330. case OMAP3_MCSPI_REV:
  331. pdata->regs_offset = 0;
  332. break;
  333. case OMAP4_MCSPI_REV:
  334. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  335. break;
  336. default:
  337. pr_err("Invalid McSPI Revision value\n");
  338. return -EINVAL;
  339. }
  340. spi_num++;
  341. pdev = omap_device_build(name, spi_num, oh, pdata,
  342. sizeof(*pdata), NULL, 0, 0);
  343. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
  344. name, oh->name);
  345. kfree(pdata);
  346. return 0;
  347. }
  348. static void omap_init_mcspi(void)
  349. {
  350. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  351. }
  352. #else
  353. static inline void omap_init_mcspi(void) {}
  354. #endif
  355. static struct resource omap2_pmu_resource = {
  356. .start = 3,
  357. .end = 3,
  358. .flags = IORESOURCE_IRQ,
  359. };
  360. static struct resource omap3_pmu_resource = {
  361. .start = INT_34XX_BENCH_MPU_EMUL,
  362. .end = INT_34XX_BENCH_MPU_EMUL,
  363. .flags = IORESOURCE_IRQ,
  364. };
  365. static struct platform_device omap_pmu_device = {
  366. .name = "arm-pmu",
  367. .id = ARM_PMU_DEVICE_CPU,
  368. .num_resources = 1,
  369. };
  370. static void omap_init_pmu(void)
  371. {
  372. if (cpu_is_omap24xx())
  373. omap_pmu_device.resource = &omap2_pmu_resource;
  374. else if (cpu_is_omap34xx())
  375. omap_pmu_device.resource = &omap3_pmu_resource;
  376. else
  377. return;
  378. platform_device_register(&omap_pmu_device);
  379. }
  380. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  381. #ifdef CONFIG_ARCH_OMAP2
  382. static struct resource omap2_sham_resources[] = {
  383. {
  384. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  385. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  386. .flags = IORESOURCE_MEM,
  387. },
  388. {
  389. .start = INT_24XX_SHA1MD5,
  390. .flags = IORESOURCE_IRQ,
  391. }
  392. };
  393. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  394. #else
  395. #define omap2_sham_resources NULL
  396. #define omap2_sham_resources_sz 0
  397. #endif
  398. #ifdef CONFIG_ARCH_OMAP3
  399. static struct resource omap3_sham_resources[] = {
  400. {
  401. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  402. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  403. .flags = IORESOURCE_MEM,
  404. },
  405. {
  406. .start = INT_34XX_SHA1MD52_IRQ,
  407. .flags = IORESOURCE_IRQ,
  408. },
  409. {
  410. .start = OMAP34XX_DMA_SHA1MD5_RX,
  411. .flags = IORESOURCE_DMA,
  412. }
  413. };
  414. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  415. #else
  416. #define omap3_sham_resources NULL
  417. #define omap3_sham_resources_sz 0
  418. #endif
  419. static struct platform_device sham_device = {
  420. .name = "omap-sham",
  421. .id = -1,
  422. };
  423. static void omap_init_sham(void)
  424. {
  425. if (cpu_is_omap24xx()) {
  426. sham_device.resource = omap2_sham_resources;
  427. sham_device.num_resources = omap2_sham_resources_sz;
  428. } else if (cpu_is_omap34xx()) {
  429. sham_device.resource = omap3_sham_resources;
  430. sham_device.num_resources = omap3_sham_resources_sz;
  431. } else {
  432. pr_err("%s: platform not supported\n", __func__);
  433. return;
  434. }
  435. platform_device_register(&sham_device);
  436. }
  437. #else
  438. static inline void omap_init_sham(void) { }
  439. #endif
  440. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  441. #ifdef CONFIG_ARCH_OMAP2
  442. static struct resource omap2_aes_resources[] = {
  443. {
  444. .start = OMAP24XX_SEC_AES_BASE,
  445. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  446. .flags = IORESOURCE_MEM,
  447. },
  448. {
  449. .start = OMAP24XX_DMA_AES_TX,
  450. .flags = IORESOURCE_DMA,
  451. },
  452. {
  453. .start = OMAP24XX_DMA_AES_RX,
  454. .flags = IORESOURCE_DMA,
  455. }
  456. };
  457. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  458. #else
  459. #define omap2_aes_resources NULL
  460. #define omap2_aes_resources_sz 0
  461. #endif
  462. #ifdef CONFIG_ARCH_OMAP3
  463. static struct resource omap3_aes_resources[] = {
  464. {
  465. .start = OMAP34XX_SEC_AES_BASE,
  466. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  467. .flags = IORESOURCE_MEM,
  468. },
  469. {
  470. .start = OMAP34XX_DMA_AES2_TX,
  471. .flags = IORESOURCE_DMA,
  472. },
  473. {
  474. .start = OMAP34XX_DMA_AES2_RX,
  475. .flags = IORESOURCE_DMA,
  476. }
  477. };
  478. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  479. #else
  480. #define omap3_aes_resources NULL
  481. #define omap3_aes_resources_sz 0
  482. #endif
  483. static struct platform_device aes_device = {
  484. .name = "omap-aes",
  485. .id = -1,
  486. };
  487. static void omap_init_aes(void)
  488. {
  489. if (cpu_is_omap24xx()) {
  490. aes_device.resource = omap2_aes_resources;
  491. aes_device.num_resources = omap2_aes_resources_sz;
  492. } else if (cpu_is_omap34xx()) {
  493. aes_device.resource = omap3_aes_resources;
  494. aes_device.num_resources = omap3_aes_resources_sz;
  495. } else {
  496. pr_err("%s: platform not supported\n", __func__);
  497. return;
  498. }
  499. platform_device_register(&aes_device);
  500. }
  501. #else
  502. static inline void omap_init_aes(void) { }
  503. #endif
  504. /*-------------------------------------------------------------------------*/
  505. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  506. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  507. *mmc_controller)
  508. {
  509. if ((mmc_controller->slots[0].switch_pin > 0) && \
  510. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  511. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  512. OMAP_PIN_INPUT_PULLUP);
  513. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  514. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  515. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  516. OMAP_PIN_INPUT_PULLUP);
  517. omap_mux_init_signal("sdmmc_cmd", 0);
  518. omap_mux_init_signal("sdmmc_clki", 0);
  519. omap_mux_init_signal("sdmmc_clko", 0);
  520. omap_mux_init_signal("sdmmc_dat0", 0);
  521. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  522. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  523. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  524. omap_mux_init_signal("sdmmc_dat1", 0);
  525. omap_mux_init_signal("sdmmc_dat2", 0);
  526. omap_mux_init_signal("sdmmc_dat3", 0);
  527. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  528. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  529. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  530. }
  531. /*
  532. * Use internal loop-back in MMC/SDIO Module Input Clock
  533. * selection
  534. */
  535. if (mmc_controller->slots[0].internal_clock) {
  536. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  537. v |= (1 << 24);
  538. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  539. }
  540. }
  541. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  542. {
  543. char *name = "mmci-omap";
  544. if (!mmc_data[0]) {
  545. pr_err("%s fails: Incomplete platform data\n", __func__);
  546. return;
  547. }
  548. omap242x_mmc_mux(mmc_data[0]);
  549. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  550. INT_24XX_MMC_IRQ, mmc_data[0]);
  551. }
  552. #endif
  553. /*-------------------------------------------------------------------------*/
  554. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  555. #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
  556. #define OMAP_HDQ_BASE 0x480B2000
  557. #endif
  558. static struct resource omap_hdq_resources[] = {
  559. {
  560. .start = OMAP_HDQ_BASE,
  561. .end = OMAP_HDQ_BASE + 0x1C,
  562. .flags = IORESOURCE_MEM,
  563. },
  564. {
  565. .start = INT_24XX_HDQ_IRQ,
  566. .flags = IORESOURCE_IRQ,
  567. },
  568. };
  569. static struct platform_device omap_hdq_dev = {
  570. .name = "omap_hdq",
  571. .id = 0,
  572. .dev = {
  573. .platform_data = NULL,
  574. },
  575. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  576. .resource = omap_hdq_resources,
  577. };
  578. static inline void omap_hdq_init(void)
  579. {
  580. (void) platform_device_register(&omap_hdq_dev);
  581. }
  582. #else
  583. static inline void omap_hdq_init(void) {}
  584. #endif
  585. /*---------------------------------------------------------------------------*/
  586. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  587. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  588. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  589. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  590. };
  591. #else
  592. static struct resource omap_vout_resource[2] = {
  593. };
  594. #endif
  595. static struct platform_device omap_vout_device = {
  596. .name = "omap_vout",
  597. .num_resources = ARRAY_SIZE(omap_vout_resource),
  598. .resource = &omap_vout_resource[0],
  599. .id = -1,
  600. };
  601. static void omap_init_vout(void)
  602. {
  603. if (platform_device_register(&omap_vout_device) < 0)
  604. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  605. }
  606. #else
  607. static inline void omap_init_vout(void) {}
  608. #endif
  609. /*-------------------------------------------------------------------------*/
  610. static int __init omap2_init_devices(void)
  611. {
  612. /*
  613. * please keep these calls, and their implementations above,
  614. * in alphabetical order so they're easier to sort through.
  615. */
  616. omap_init_audio();
  617. omap_init_mcpdm();
  618. omap_init_dmic();
  619. omap_init_camera();
  620. omap_init_mbox();
  621. omap_init_mcspi();
  622. omap_init_pmu();
  623. omap_hdq_init();
  624. omap_init_sti();
  625. omap_init_sham();
  626. omap_init_aes();
  627. omap_init_vout();
  628. return 0;
  629. }
  630. arch_initcall(omap2_init_devices);
  631. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  632. static int __init omap_init_wdt(void)
  633. {
  634. int id = -1;
  635. struct platform_device *pdev;
  636. struct omap_hwmod *oh;
  637. char *oh_name = "wd_timer2";
  638. char *dev_name = "omap_wdt";
  639. if (!cpu_class_is_omap2())
  640. return 0;
  641. oh = omap_hwmod_lookup(oh_name);
  642. if (!oh) {
  643. pr_err("Could not look up wd_timer%d hwmod\n", id);
  644. return -EINVAL;
  645. }
  646. pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
  647. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
  648. dev_name, oh->name);
  649. return 0;
  650. }
  651. subsys_initcall(omap_init_wdt);
  652. #endif