nct6775.c 66 KB

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  1. /*
  2. * nct6775 - Driver for the hardware monitoring functionality of
  3. * Nuvoton NCT677x Super-I/O chips
  4. *
  5. * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
  6. *
  7. * Derived from w83627ehf driver
  8. * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
  9. * Copyright (C) 2006 Yuan Mu (Winbond),
  10. * Rudolf Marek <r.marek@assembler.cz>
  11. * David Hubbard <david.c.hubbard@gmail.com>
  12. * Daniel J Blueman <daniel.blueman@gmail.com>
  13. * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
  14. *
  15. * Shamelessly ripped from the w83627hf driver
  16. * Copyright (C) 2003 Mark Studebaker
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation; either version 2 of the License, or
  21. * (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31. *
  32. *
  33. * Supports the following chips:
  34. *
  35. * Chip #vin #fan #pwm #temp chip IDs man ID
  36. * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
  37. * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
  38. * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
  39. *
  40. * #temp lists the number of monitored temperature sources (first value) plus
  41. * the number of directly connectable temperature sensors (second value).
  42. */
  43. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44. #include <linux/module.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/jiffies.h>
  48. #include <linux/platform_device.h>
  49. #include <linux/hwmon.h>
  50. #include <linux/hwmon-sysfs.h>
  51. #include <linux/hwmon-vid.h>
  52. #include <linux/err.h>
  53. #include <linux/mutex.h>
  54. #include <linux/acpi.h>
  55. #include <linux/io.h>
  56. #include "lm75.h"
  57. #define USE_ALTERNATE
  58. enum kinds { nct6775, nct6776, nct6779 };
  59. /* used to set data->name = nct6775_device_names[data->sio_kind] */
  60. static const char * const nct6775_device_names[] = {
  61. "nct6775",
  62. "nct6776",
  63. "nct6779",
  64. };
  65. static unsigned short force_id;
  66. module_param(force_id, ushort, 0);
  67. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  68. #define DRVNAME "nct6775"
  69. /*
  70. * Super-I/O constants and functions
  71. */
  72. #define NCT6775_LD_ACPI 0x0a
  73. #define NCT6775_LD_HWM 0x0b
  74. #define NCT6775_LD_VID 0x0d
  75. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  76. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  77. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  78. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  79. #define SIO_NCT6775_ID 0xb470
  80. #define SIO_NCT6776_ID 0xc330
  81. #define SIO_NCT6779_ID 0xc560
  82. #define SIO_ID_MASK 0xFFF0
  83. static inline void
  84. superio_outb(int ioreg, int reg, int val)
  85. {
  86. outb(reg, ioreg);
  87. outb(val, ioreg + 1);
  88. }
  89. static inline int
  90. superio_inb(int ioreg, int reg)
  91. {
  92. outb(reg, ioreg);
  93. return inb(ioreg + 1);
  94. }
  95. static inline void
  96. superio_select(int ioreg, int ld)
  97. {
  98. outb(SIO_REG_LDSEL, ioreg);
  99. outb(ld, ioreg + 1);
  100. }
  101. static inline int
  102. superio_enter(int ioreg)
  103. {
  104. /*
  105. * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
  106. */
  107. if (!request_muxed_region(ioreg, 2, DRVNAME))
  108. return -EBUSY;
  109. outb(0x87, ioreg);
  110. outb(0x87, ioreg);
  111. return 0;
  112. }
  113. static inline void
  114. superio_exit(int ioreg)
  115. {
  116. outb(0xaa, ioreg);
  117. outb(0x02, ioreg);
  118. outb(0x02, ioreg + 1);
  119. release_region(ioreg, 2);
  120. }
  121. /*
  122. * ISA constants
  123. */
  124. #define IOREGION_ALIGNMENT (~7)
  125. #define IOREGION_OFFSET 5
  126. #define IOREGION_LENGTH 2
  127. #define ADDR_REG_OFFSET 0
  128. #define DATA_REG_OFFSET 1
  129. #define NCT6775_REG_BANK 0x4E
  130. #define NCT6775_REG_CONFIG 0x40
  131. /*
  132. * Not currently used:
  133. * REG_MAN_ID has the value 0x5ca3 for all supported chips.
  134. * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
  135. * REG_MAN_ID is at port 0x4f
  136. * REG_CHIP_ID is at port 0x58
  137. */
  138. #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
  139. #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
  140. #define NUM_REG_ALARM 4 /* Max number of alarm registers */
  141. /* Common and NCT6775 specific data */
  142. /* Voltage min/max registers for nr=7..14 are in bank 5 */
  143. static const u16 NCT6775_REG_IN_MAX[] = {
  144. 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
  145. 0x55c, 0x55e, 0x560, 0x562 };
  146. static const u16 NCT6775_REG_IN_MIN[] = {
  147. 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
  148. 0x55d, 0x55f, 0x561, 0x563 };
  149. static const u16 NCT6775_REG_IN[] = {
  150. 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
  151. };
  152. #define NCT6775_REG_VBAT 0x5D
  153. #define NCT6775_REG_DIODE 0x5E
  154. #define NCT6775_REG_FANDIV1 0x506
  155. #define NCT6775_REG_FANDIV2 0x507
  156. static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
  157. /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
  158. static const s8 NCT6775_ALARM_BITS[] = {
  159. 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
  160. 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
  161. -1, /* unused */
  162. 6, 7, 11, 10, 23, /* fan1..fan5 */
  163. -1, -1, -1, /* unused */
  164. 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
  165. 12, -1 }; /* intrusion0, intrusion1 */
  166. #define FAN_ALARM_BASE 16
  167. #define TEMP_ALARM_BASE 24
  168. #define INTRUSION_ALARM_BASE 30
  169. static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
  170. static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
  171. static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
  172. static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
  173. static const u16 NCT6775_REG_TEMP[] = {
  174. 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
  175. static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
  176. 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
  177. static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
  178. 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
  179. static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
  180. 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
  181. static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
  182. 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
  183. static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
  184. static const char *const nct6775_temp_label[] = {
  185. "",
  186. "SYSTIN",
  187. "CPUTIN",
  188. "AUXTIN",
  189. "AMD SB-TSI",
  190. "PECI Agent 0",
  191. "PECI Agent 1",
  192. "PECI Agent 2",
  193. "PECI Agent 3",
  194. "PECI Agent 4",
  195. "PECI Agent 5",
  196. "PECI Agent 6",
  197. "PECI Agent 7",
  198. "PCH_CHIP_CPU_MAX_TEMP",
  199. "PCH_CHIP_TEMP",
  200. "PCH_CPU_TEMP",
  201. "PCH_MCH_TEMP",
  202. "PCH_DIM0_TEMP",
  203. "PCH_DIM1_TEMP",
  204. "PCH_DIM2_TEMP",
  205. "PCH_DIM3_TEMP"
  206. };
  207. static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
  208. = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
  209. static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
  210. = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
  211. 0xa07 };
  212. /* NCT6776 specific data */
  213. static const s8 NCT6776_ALARM_BITS[] = {
  214. 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
  215. 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
  216. -1, /* unused */
  217. 6, 7, 11, 10, 23, /* fan1..fan5 */
  218. -1, -1, -1, /* unused */
  219. 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
  220. 12, 9 }; /* intrusion0, intrusion1 */
  221. static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
  222. static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
  223. 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
  224. static const char *const nct6776_temp_label[] = {
  225. "",
  226. "SYSTIN",
  227. "CPUTIN",
  228. "AUXTIN",
  229. "SMBUSMASTER 0",
  230. "SMBUSMASTER 1",
  231. "SMBUSMASTER 2",
  232. "SMBUSMASTER 3",
  233. "SMBUSMASTER 4",
  234. "SMBUSMASTER 5",
  235. "SMBUSMASTER 6",
  236. "SMBUSMASTER 7",
  237. "PECI Agent 0",
  238. "PECI Agent 1",
  239. "PCH_CHIP_CPU_MAX_TEMP",
  240. "PCH_CHIP_TEMP",
  241. "PCH_CPU_TEMP",
  242. "PCH_MCH_TEMP",
  243. "PCH_DIM0_TEMP",
  244. "PCH_DIM1_TEMP",
  245. "PCH_DIM2_TEMP",
  246. "PCH_DIM3_TEMP",
  247. "BYTE_TEMP"
  248. };
  249. static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
  250. = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
  251. static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
  252. = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
  253. /* NCT6779 specific data */
  254. static const u16 NCT6779_REG_IN[] = {
  255. 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
  256. 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
  257. static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
  258. 0x459, 0x45A, 0x45B, 0x568 };
  259. static const s8 NCT6779_ALARM_BITS[] = {
  260. 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
  261. 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
  262. -1, /* unused */
  263. 6, 7, 11, 10, 23, /* fan1..fan5 */
  264. -1, -1, -1, /* unused */
  265. 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
  266. 12, 9 }; /* intrusion0, intrusion1 */
  267. static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
  268. static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
  269. static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
  270. 0x18, 0x152 };
  271. static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
  272. 0x3a, 0x153 };
  273. static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
  274. 0x39, 0x155 };
  275. static const u16 NCT6779_REG_TEMP_OFFSET[] = {
  276. 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
  277. static const char *const nct6779_temp_label[] = {
  278. "",
  279. "SYSTIN",
  280. "CPUTIN",
  281. "AUXTIN0",
  282. "AUXTIN1",
  283. "AUXTIN2",
  284. "AUXTIN3",
  285. "",
  286. "SMBUSMASTER 0",
  287. "SMBUSMASTER 1",
  288. "SMBUSMASTER 2",
  289. "SMBUSMASTER 3",
  290. "SMBUSMASTER 4",
  291. "SMBUSMASTER 5",
  292. "SMBUSMASTER 6",
  293. "SMBUSMASTER 7",
  294. "PECI Agent 0",
  295. "PECI Agent 1",
  296. "PCH_CHIP_CPU_MAX_TEMP",
  297. "PCH_CHIP_TEMP",
  298. "PCH_CPU_TEMP",
  299. "PCH_MCH_TEMP",
  300. "PCH_DIM0_TEMP",
  301. "PCH_DIM1_TEMP",
  302. "PCH_DIM2_TEMP",
  303. "PCH_DIM3_TEMP",
  304. "BYTE_TEMP"
  305. };
  306. static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
  307. = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
  308. 0, 0, 0, 0, 0, 0, 0, 0,
  309. 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
  310. 0x408, 0 };
  311. static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
  312. = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
  313. /*
  314. * Conversions
  315. */
  316. static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
  317. {
  318. if (reg == 0 || reg == 255)
  319. return 0;
  320. return 1350000U / (reg << divreg);
  321. }
  322. static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
  323. {
  324. if ((reg & 0xff1f) == 0xff1f)
  325. return 0;
  326. reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
  327. if (reg == 0)
  328. return 0;
  329. return 1350000U / reg;
  330. }
  331. static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
  332. {
  333. if (reg == 0 || reg == 0xffff)
  334. return 0;
  335. /*
  336. * Even though the registers are 16 bit wide, the fan divisor
  337. * still applies.
  338. */
  339. return 1350000U / (reg << divreg);
  340. }
  341. static inline unsigned int
  342. div_from_reg(u8 reg)
  343. {
  344. return 1 << reg;
  345. }
  346. /*
  347. * Some of the voltage inputs have internal scaling, the tables below
  348. * contain 8 (the ADC LSB in mV) * scaling factor * 100
  349. */
  350. static const u16 scale_in[15] = {
  351. 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
  352. 800, 800
  353. };
  354. static inline long in_from_reg(u8 reg, u8 nr)
  355. {
  356. return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
  357. }
  358. static inline u8 in_to_reg(u32 val, u8 nr)
  359. {
  360. return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
  361. }
  362. /*
  363. * Data structures and manipulation thereof
  364. */
  365. struct nct6775_data {
  366. int addr; /* IO base of hw monitor block */
  367. enum kinds kind;
  368. const char *name;
  369. struct device *hwmon_dev;
  370. struct mutex lock;
  371. u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
  372. * 3=temp_crit
  373. */
  374. u8 temp_src[NUM_TEMP];
  375. u16 reg_temp_config[NUM_TEMP];
  376. const char * const *temp_label;
  377. int temp_label_num;
  378. u16 REG_CONFIG;
  379. u16 REG_VBAT;
  380. u16 REG_DIODE;
  381. const s8 *ALARM_BITS;
  382. const u16 *REG_VIN;
  383. const u16 *REG_IN_MINMAX[2];
  384. const u16 *REG_FAN;
  385. const u16 *REG_FAN_MIN;
  386. const u16 *REG_TEMP_SOURCE; /* temp register sources */
  387. const u16 *REG_TEMP_OFFSET;
  388. const u16 *REG_ALARM;
  389. unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
  390. unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
  391. struct mutex update_lock;
  392. bool valid; /* true if following fields are valid */
  393. unsigned long last_updated; /* In jiffies */
  394. /* Register values */
  395. u8 bank; /* current register bank */
  396. u8 in_num; /* number of in inputs we have */
  397. u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
  398. unsigned int rpm[5];
  399. u16 fan_min[5];
  400. u8 fan_div[5];
  401. u8 has_fan; /* some fan inputs can be disabled */
  402. u8 has_fan_min; /* some fans don't have min register */
  403. bool has_fan_div;
  404. u8 temp_fixed_num; /* 3 or 6 */
  405. u8 temp_type[NUM_TEMP_FIXED];
  406. s8 temp_offset[NUM_TEMP_FIXED];
  407. s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
  408. * 3=temp_crit */
  409. u64 alarms;
  410. u8 vid;
  411. u8 vrm;
  412. u16 have_temp;
  413. u16 have_temp_fixed;
  414. u16 have_in;
  415. };
  416. struct nct6775_sio_data {
  417. int sioreg;
  418. enum kinds kind;
  419. };
  420. static bool is_word_sized(struct nct6775_data *data, u16 reg)
  421. {
  422. switch (data->kind) {
  423. case nct6775:
  424. return (((reg & 0xff00) == 0x100 ||
  425. (reg & 0xff00) == 0x200) &&
  426. ((reg & 0x00ff) == 0x50 ||
  427. (reg & 0x00ff) == 0x53 ||
  428. (reg & 0x00ff) == 0x55)) ||
  429. (reg & 0xfff0) == 0x630 ||
  430. reg == 0x640 || reg == 0x642 ||
  431. reg == 0x662 ||
  432. ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
  433. reg == 0x73 || reg == 0x75 || reg == 0x77;
  434. case nct6776:
  435. return (((reg & 0xff00) == 0x100 ||
  436. (reg & 0xff00) == 0x200) &&
  437. ((reg & 0x00ff) == 0x50 ||
  438. (reg & 0x00ff) == 0x53 ||
  439. (reg & 0x00ff) == 0x55)) ||
  440. (reg & 0xfff0) == 0x630 ||
  441. reg == 0x402 ||
  442. reg == 0x640 || reg == 0x642 ||
  443. ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
  444. reg == 0x73 || reg == 0x75 || reg == 0x77;
  445. case nct6779:
  446. return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
  447. ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
  448. reg == 0x402 ||
  449. reg == 0x63a || reg == 0x63c || reg == 0x63e ||
  450. reg == 0x640 || reg == 0x642 ||
  451. reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
  452. reg == 0x7b;
  453. }
  454. return false;
  455. }
  456. /*
  457. * On older chips, only registers 0x50-0x5f are banked.
  458. * On more recent chips, all registers are banked.
  459. * Assume that is the case and set the bank number for each access.
  460. * Cache the bank number so it only needs to be set if it changes.
  461. */
  462. static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
  463. {
  464. u8 bank = reg >> 8;
  465. if (data->bank != bank) {
  466. outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
  467. outb_p(bank, data->addr + DATA_REG_OFFSET);
  468. data->bank = bank;
  469. }
  470. }
  471. static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
  472. {
  473. int res, word_sized = is_word_sized(data, reg);
  474. mutex_lock(&data->lock);
  475. nct6775_set_bank(data, reg);
  476. outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
  477. res = inb_p(data->addr + DATA_REG_OFFSET);
  478. if (word_sized) {
  479. outb_p((reg & 0xff) + 1,
  480. data->addr + ADDR_REG_OFFSET);
  481. res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
  482. }
  483. mutex_unlock(&data->lock);
  484. return res;
  485. }
  486. static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
  487. {
  488. int word_sized = is_word_sized(data, reg);
  489. mutex_lock(&data->lock);
  490. nct6775_set_bank(data, reg);
  491. outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
  492. if (word_sized) {
  493. outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
  494. outb_p((reg & 0xff) + 1,
  495. data->addr + ADDR_REG_OFFSET);
  496. }
  497. outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
  498. mutex_unlock(&data->lock);
  499. return 0;
  500. }
  501. /* We left-align 8-bit temperature values to make the code simpler */
  502. static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
  503. {
  504. u16 res;
  505. res = nct6775_read_value(data, reg);
  506. if (!is_word_sized(data, reg))
  507. res <<= 8;
  508. return res;
  509. }
  510. static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
  511. {
  512. if (!is_word_sized(data, reg))
  513. value >>= 8;
  514. return nct6775_write_value(data, reg, value);
  515. }
  516. /* This function assumes that the caller holds data->update_lock */
  517. static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
  518. {
  519. u8 reg;
  520. switch (nr) {
  521. case 0:
  522. reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
  523. | (data->fan_div[0] & 0x7);
  524. nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
  525. break;
  526. case 1:
  527. reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
  528. | ((data->fan_div[1] << 4) & 0x70);
  529. nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
  530. break;
  531. case 2:
  532. reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
  533. | (data->fan_div[2] & 0x7);
  534. nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
  535. break;
  536. case 3:
  537. reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
  538. | ((data->fan_div[3] << 4) & 0x70);
  539. nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
  540. break;
  541. }
  542. }
  543. static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
  544. {
  545. if (data->kind == nct6775)
  546. nct6775_write_fan_div(data, nr);
  547. }
  548. static void nct6775_update_fan_div(struct nct6775_data *data)
  549. {
  550. u8 i;
  551. i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
  552. data->fan_div[0] = i & 0x7;
  553. data->fan_div[1] = (i & 0x70) >> 4;
  554. i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
  555. data->fan_div[2] = i & 0x7;
  556. if (data->has_fan & (1<<3))
  557. data->fan_div[3] = (i & 0x70) >> 4;
  558. }
  559. static void nct6775_update_fan_div_common(struct nct6775_data *data)
  560. {
  561. if (data->kind == nct6775)
  562. nct6775_update_fan_div(data);
  563. }
  564. static void nct6775_init_fan_div(struct nct6775_data *data)
  565. {
  566. int i;
  567. nct6775_update_fan_div_common(data);
  568. /*
  569. * For all fans, start with highest divider value if the divider
  570. * register is not initialized. This ensures that we get a
  571. * reading from the fan count register, even if it is not optimal.
  572. * We'll compute a better divider later on.
  573. */
  574. for (i = 0; i < 3; i++) {
  575. if (!(data->has_fan & (1 << i)))
  576. continue;
  577. if (data->fan_div[i] == 0) {
  578. data->fan_div[i] = 7;
  579. nct6775_write_fan_div_common(data, i);
  580. }
  581. }
  582. }
  583. static void nct6775_init_fan_common(struct device *dev,
  584. struct nct6775_data *data)
  585. {
  586. int i;
  587. u8 reg;
  588. if (data->has_fan_div)
  589. nct6775_init_fan_div(data);
  590. /*
  591. * If fan_min is not set (0), set it to 0xff to disable it. This
  592. * prevents the unnecessary warning when fanX_min is reported as 0.
  593. */
  594. for (i = 0; i < 5; i++) {
  595. if (data->has_fan_min & (1 << i)) {
  596. reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
  597. if (!reg)
  598. nct6775_write_value(data, data->REG_FAN_MIN[i],
  599. data->has_fan_div ? 0xff
  600. : 0xff1f);
  601. }
  602. }
  603. }
  604. static void nct6775_select_fan_div(struct device *dev,
  605. struct nct6775_data *data, int nr, u16 reg)
  606. {
  607. u8 fan_div = data->fan_div[nr];
  608. u16 fan_min;
  609. if (!data->has_fan_div)
  610. return;
  611. /*
  612. * If we failed to measure the fan speed, or the reported value is not
  613. * in the optimal range, and the clock divider can be modified,
  614. * let's try that for next time.
  615. */
  616. if (reg == 0x00 && fan_div < 0x07)
  617. fan_div++;
  618. else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
  619. fan_div--;
  620. if (fan_div != data->fan_div[nr]) {
  621. dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
  622. nr + 1, div_from_reg(data->fan_div[nr]),
  623. div_from_reg(fan_div));
  624. /* Preserve min limit if possible */
  625. if (data->has_fan_min & (1 << nr)) {
  626. fan_min = data->fan_min[nr];
  627. if (fan_div > data->fan_div[nr]) {
  628. if (fan_min != 255 && fan_min > 1)
  629. fan_min >>= 1;
  630. } else {
  631. if (fan_min != 255) {
  632. fan_min <<= 1;
  633. if (fan_min > 254)
  634. fan_min = 254;
  635. }
  636. }
  637. if (fan_min != data->fan_min[nr]) {
  638. data->fan_min[nr] = fan_min;
  639. nct6775_write_value(data, data->REG_FAN_MIN[nr],
  640. fan_min);
  641. }
  642. }
  643. data->fan_div[nr] = fan_div;
  644. nct6775_write_fan_div_common(data, nr);
  645. }
  646. }
  647. static struct nct6775_data *nct6775_update_device(struct device *dev)
  648. {
  649. struct nct6775_data *data = dev_get_drvdata(dev);
  650. int i, j;
  651. mutex_lock(&data->update_lock);
  652. if (time_after(jiffies, data->last_updated + HZ + HZ/2)
  653. || !data->valid) {
  654. /* Fan clock dividers */
  655. nct6775_update_fan_div_common(data);
  656. /* Measured voltages and limits */
  657. for (i = 0; i < data->in_num; i++) {
  658. if (!(data->have_in & (1 << i)))
  659. continue;
  660. data->in[i][0] = nct6775_read_value(data,
  661. data->REG_VIN[i]);
  662. data->in[i][1] = nct6775_read_value(data,
  663. data->REG_IN_MINMAX[0][i]);
  664. data->in[i][2] = nct6775_read_value(data,
  665. data->REG_IN_MINMAX[1][i]);
  666. }
  667. /* Measured fan speeds and limits */
  668. for (i = 0; i < 5; i++) {
  669. u16 reg;
  670. if (!(data->has_fan & (1 << i)))
  671. continue;
  672. reg = nct6775_read_value(data, data->REG_FAN[i]);
  673. data->rpm[i] = data->fan_from_reg(reg,
  674. data->fan_div[i]);
  675. if (data->has_fan_min & (1 << i))
  676. data->fan_min[i] = nct6775_read_value(data,
  677. data->REG_FAN_MIN[i]);
  678. nct6775_select_fan_div(dev, data, i, reg);
  679. }
  680. /* Measured temperatures and limits */
  681. for (i = 0; i < NUM_TEMP; i++) {
  682. if (!(data->have_temp & (1 << i)))
  683. continue;
  684. for (j = 0; j < 4; j++) {
  685. if (data->reg_temp[j][i])
  686. data->temp[j][i]
  687. = nct6775_read_temp(data,
  688. data->reg_temp[j][i]);
  689. }
  690. if (!(data->have_temp_fixed & (1 << i)))
  691. continue;
  692. data->temp_offset[i]
  693. = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
  694. }
  695. data->alarms = 0;
  696. for (i = 0; i < NUM_REG_ALARM; i++) {
  697. u8 alarm;
  698. if (!data->REG_ALARM[i])
  699. continue;
  700. alarm = nct6775_read_value(data, data->REG_ALARM[i]);
  701. data->alarms |= ((u64)alarm) << (i << 3);
  702. }
  703. data->last_updated = jiffies;
  704. data->valid = true;
  705. }
  706. mutex_unlock(&data->update_lock);
  707. return data;
  708. }
  709. /*
  710. * Sysfs callback functions
  711. */
  712. static ssize_t
  713. show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
  714. {
  715. struct nct6775_data *data = nct6775_update_device(dev);
  716. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  717. int nr = sattr->nr;
  718. int index = sattr->index;
  719. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
  720. }
  721. static ssize_t
  722. store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
  723. size_t count)
  724. {
  725. struct nct6775_data *data = dev_get_drvdata(dev);
  726. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  727. int nr = sattr->nr;
  728. int index = sattr->index;
  729. unsigned long val;
  730. int err = kstrtoul(buf, 10, &val);
  731. if (err < 0)
  732. return err;
  733. mutex_lock(&data->update_lock);
  734. data->in[nr][index] = in_to_reg(val, nr);
  735. nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
  736. data->in[nr][index]);
  737. mutex_unlock(&data->update_lock);
  738. return count;
  739. }
  740. static ssize_t
  741. show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
  742. {
  743. struct nct6775_data *data = nct6775_update_device(dev);
  744. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  745. int nr = data->ALARM_BITS[sattr->index];
  746. return sprintf(buf, "%u\n",
  747. (unsigned int)((data->alarms >> nr) & 0x01));
  748. }
  749. static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
  750. static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
  751. static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
  752. static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
  753. static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
  754. static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
  755. static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
  756. static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
  757. static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
  758. static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
  759. static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
  760. static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
  761. static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
  762. static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
  763. static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
  764. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  765. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  766. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  767. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  768. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
  769. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
  770. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
  771. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
  772. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
  773. static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
  774. static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
  775. static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
  776. static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
  777. static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
  778. static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
  779. static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
  780. store_in_reg, 0, 1);
  781. static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
  782. store_in_reg, 1, 1);
  783. static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
  784. store_in_reg, 2, 1);
  785. static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
  786. store_in_reg, 3, 1);
  787. static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
  788. store_in_reg, 4, 1);
  789. static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
  790. store_in_reg, 5, 1);
  791. static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
  792. store_in_reg, 6, 1);
  793. static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
  794. store_in_reg, 7, 1);
  795. static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
  796. store_in_reg, 8, 1);
  797. static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
  798. store_in_reg, 9, 1);
  799. static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
  800. store_in_reg, 10, 1);
  801. static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
  802. store_in_reg, 11, 1);
  803. static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
  804. store_in_reg, 12, 1);
  805. static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
  806. store_in_reg, 13, 1);
  807. static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
  808. store_in_reg, 14, 1);
  809. static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
  810. store_in_reg, 0, 2);
  811. static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
  812. store_in_reg, 1, 2);
  813. static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
  814. store_in_reg, 2, 2);
  815. static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
  816. store_in_reg, 3, 2);
  817. static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
  818. store_in_reg, 4, 2);
  819. static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
  820. store_in_reg, 5, 2);
  821. static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
  822. store_in_reg, 6, 2);
  823. static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
  824. store_in_reg, 7, 2);
  825. static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
  826. store_in_reg, 8, 2);
  827. static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
  828. store_in_reg, 9, 2);
  829. static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
  830. store_in_reg, 10, 2);
  831. static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
  832. store_in_reg, 11, 2);
  833. static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
  834. store_in_reg, 12, 2);
  835. static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
  836. store_in_reg, 13, 2);
  837. static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
  838. store_in_reg, 14, 2);
  839. static struct attribute *nct6775_attributes_in[15][5] = {
  840. {
  841. &sensor_dev_attr_in0_input.dev_attr.attr,
  842. &sensor_dev_attr_in0_min.dev_attr.attr,
  843. &sensor_dev_attr_in0_max.dev_attr.attr,
  844. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  845. NULL
  846. },
  847. {
  848. &sensor_dev_attr_in1_input.dev_attr.attr,
  849. &sensor_dev_attr_in1_min.dev_attr.attr,
  850. &sensor_dev_attr_in1_max.dev_attr.attr,
  851. &sensor_dev_attr_in1_alarm.dev_attr.attr,
  852. NULL
  853. },
  854. {
  855. &sensor_dev_attr_in2_input.dev_attr.attr,
  856. &sensor_dev_attr_in2_min.dev_attr.attr,
  857. &sensor_dev_attr_in2_max.dev_attr.attr,
  858. &sensor_dev_attr_in2_alarm.dev_attr.attr,
  859. NULL
  860. },
  861. {
  862. &sensor_dev_attr_in3_input.dev_attr.attr,
  863. &sensor_dev_attr_in3_min.dev_attr.attr,
  864. &sensor_dev_attr_in3_max.dev_attr.attr,
  865. &sensor_dev_attr_in3_alarm.dev_attr.attr,
  866. NULL
  867. },
  868. {
  869. &sensor_dev_attr_in4_input.dev_attr.attr,
  870. &sensor_dev_attr_in4_min.dev_attr.attr,
  871. &sensor_dev_attr_in4_max.dev_attr.attr,
  872. &sensor_dev_attr_in4_alarm.dev_attr.attr,
  873. NULL
  874. },
  875. {
  876. &sensor_dev_attr_in5_input.dev_attr.attr,
  877. &sensor_dev_attr_in5_min.dev_attr.attr,
  878. &sensor_dev_attr_in5_max.dev_attr.attr,
  879. &sensor_dev_attr_in5_alarm.dev_attr.attr,
  880. NULL
  881. },
  882. {
  883. &sensor_dev_attr_in6_input.dev_attr.attr,
  884. &sensor_dev_attr_in6_min.dev_attr.attr,
  885. &sensor_dev_attr_in6_max.dev_attr.attr,
  886. &sensor_dev_attr_in6_alarm.dev_attr.attr,
  887. NULL
  888. },
  889. {
  890. &sensor_dev_attr_in7_input.dev_attr.attr,
  891. &sensor_dev_attr_in7_min.dev_attr.attr,
  892. &sensor_dev_attr_in7_max.dev_attr.attr,
  893. &sensor_dev_attr_in7_alarm.dev_attr.attr,
  894. NULL
  895. },
  896. {
  897. &sensor_dev_attr_in8_input.dev_attr.attr,
  898. &sensor_dev_attr_in8_min.dev_attr.attr,
  899. &sensor_dev_attr_in8_max.dev_attr.attr,
  900. &sensor_dev_attr_in8_alarm.dev_attr.attr,
  901. NULL
  902. },
  903. {
  904. &sensor_dev_attr_in9_input.dev_attr.attr,
  905. &sensor_dev_attr_in9_min.dev_attr.attr,
  906. &sensor_dev_attr_in9_max.dev_attr.attr,
  907. &sensor_dev_attr_in9_alarm.dev_attr.attr,
  908. NULL
  909. },
  910. {
  911. &sensor_dev_attr_in10_input.dev_attr.attr,
  912. &sensor_dev_attr_in10_min.dev_attr.attr,
  913. &sensor_dev_attr_in10_max.dev_attr.attr,
  914. &sensor_dev_attr_in10_alarm.dev_attr.attr,
  915. NULL
  916. },
  917. {
  918. &sensor_dev_attr_in11_input.dev_attr.attr,
  919. &sensor_dev_attr_in11_min.dev_attr.attr,
  920. &sensor_dev_attr_in11_max.dev_attr.attr,
  921. &sensor_dev_attr_in11_alarm.dev_attr.attr,
  922. NULL
  923. },
  924. {
  925. &sensor_dev_attr_in12_input.dev_attr.attr,
  926. &sensor_dev_attr_in12_min.dev_attr.attr,
  927. &sensor_dev_attr_in12_max.dev_attr.attr,
  928. &sensor_dev_attr_in12_alarm.dev_attr.attr,
  929. NULL
  930. },
  931. {
  932. &sensor_dev_attr_in13_input.dev_attr.attr,
  933. &sensor_dev_attr_in13_min.dev_attr.attr,
  934. &sensor_dev_attr_in13_max.dev_attr.attr,
  935. &sensor_dev_attr_in13_alarm.dev_attr.attr,
  936. NULL
  937. },
  938. {
  939. &sensor_dev_attr_in14_input.dev_attr.attr,
  940. &sensor_dev_attr_in14_min.dev_attr.attr,
  941. &sensor_dev_attr_in14_max.dev_attr.attr,
  942. &sensor_dev_attr_in14_alarm.dev_attr.attr,
  943. NULL
  944. },
  945. };
  946. static const struct attribute_group nct6775_group_in[15] = {
  947. { .attrs = nct6775_attributes_in[0] },
  948. { .attrs = nct6775_attributes_in[1] },
  949. { .attrs = nct6775_attributes_in[2] },
  950. { .attrs = nct6775_attributes_in[3] },
  951. { .attrs = nct6775_attributes_in[4] },
  952. { .attrs = nct6775_attributes_in[5] },
  953. { .attrs = nct6775_attributes_in[6] },
  954. { .attrs = nct6775_attributes_in[7] },
  955. { .attrs = nct6775_attributes_in[8] },
  956. { .attrs = nct6775_attributes_in[9] },
  957. { .attrs = nct6775_attributes_in[10] },
  958. { .attrs = nct6775_attributes_in[11] },
  959. { .attrs = nct6775_attributes_in[12] },
  960. { .attrs = nct6775_attributes_in[13] },
  961. { .attrs = nct6775_attributes_in[14] },
  962. };
  963. static ssize_t
  964. show_fan(struct device *dev, struct device_attribute *attr, char *buf)
  965. {
  966. struct nct6775_data *data = nct6775_update_device(dev);
  967. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  968. int nr = sattr->index;
  969. return sprintf(buf, "%d\n", data->rpm[nr]);
  970. }
  971. static ssize_t
  972. show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
  973. {
  974. struct nct6775_data *data = nct6775_update_device(dev);
  975. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  976. int nr = sattr->index;
  977. return sprintf(buf, "%d\n",
  978. data->fan_from_reg_min(data->fan_min[nr],
  979. data->fan_div[nr]));
  980. }
  981. static ssize_t
  982. show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
  983. {
  984. struct nct6775_data *data = nct6775_update_device(dev);
  985. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  986. int nr = sattr->index;
  987. return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
  988. }
  989. static ssize_t
  990. store_fan_min(struct device *dev, struct device_attribute *attr,
  991. const char *buf, size_t count)
  992. {
  993. struct nct6775_data *data = dev_get_drvdata(dev);
  994. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  995. int nr = sattr->index;
  996. unsigned long val;
  997. int err;
  998. unsigned int reg;
  999. u8 new_div;
  1000. err = kstrtoul(buf, 10, &val);
  1001. if (err < 0)
  1002. return err;
  1003. mutex_lock(&data->update_lock);
  1004. if (!data->has_fan_div) {
  1005. /* NCT6776F or NCT6779D; we know this is a 13 bit register */
  1006. if (!val) {
  1007. val = 0xff1f;
  1008. } else {
  1009. if (val > 1350000U)
  1010. val = 135000U;
  1011. val = 1350000U / val;
  1012. val = (val & 0x1f) | ((val << 3) & 0xff00);
  1013. }
  1014. data->fan_min[nr] = val;
  1015. goto write_min; /* Leave fan divider alone */
  1016. }
  1017. if (!val) {
  1018. /* No min limit, alarm disabled */
  1019. data->fan_min[nr] = 255;
  1020. new_div = data->fan_div[nr]; /* No change */
  1021. dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
  1022. goto write_div;
  1023. }
  1024. reg = 1350000U / val;
  1025. if (reg >= 128 * 255) {
  1026. /*
  1027. * Speed below this value cannot possibly be represented,
  1028. * even with the highest divider (128)
  1029. */
  1030. data->fan_min[nr] = 254;
  1031. new_div = 7; /* 128 == (1 << 7) */
  1032. dev_warn(dev,
  1033. "fan%u low limit %lu below minimum %u, set to minimum\n",
  1034. nr + 1, val, data->fan_from_reg_min(254, 7));
  1035. } else if (!reg) {
  1036. /*
  1037. * Speed above this value cannot possibly be represented,
  1038. * even with the lowest divider (1)
  1039. */
  1040. data->fan_min[nr] = 1;
  1041. new_div = 0; /* 1 == (1 << 0) */
  1042. dev_warn(dev,
  1043. "fan%u low limit %lu above maximum %u, set to maximum\n",
  1044. nr + 1, val, data->fan_from_reg_min(1, 0));
  1045. } else {
  1046. /*
  1047. * Automatically pick the best divider, i.e. the one such
  1048. * that the min limit will correspond to a register value
  1049. * in the 96..192 range
  1050. */
  1051. new_div = 0;
  1052. while (reg > 192 && new_div < 7) {
  1053. reg >>= 1;
  1054. new_div++;
  1055. }
  1056. data->fan_min[nr] = reg;
  1057. }
  1058. write_div:
  1059. /*
  1060. * Write both the fan clock divider (if it changed) and the new
  1061. * fan min (unconditionally)
  1062. */
  1063. if (new_div != data->fan_div[nr]) {
  1064. dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
  1065. nr + 1, div_from_reg(data->fan_div[nr]),
  1066. div_from_reg(new_div));
  1067. data->fan_div[nr] = new_div;
  1068. nct6775_write_fan_div_common(data, nr);
  1069. /* Give the chip time to sample a new speed value */
  1070. data->last_updated = jiffies;
  1071. }
  1072. write_min:
  1073. nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
  1074. mutex_unlock(&data->update_lock);
  1075. return count;
  1076. }
  1077. static struct sensor_device_attribute sda_fan_input[] = {
  1078. SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
  1079. SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
  1080. SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
  1081. SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
  1082. SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
  1083. };
  1084. static struct sensor_device_attribute sda_fan_alarm[] = {
  1085. SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
  1086. SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
  1087. SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
  1088. SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
  1089. SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
  1090. };
  1091. static struct sensor_device_attribute sda_fan_min[] = {
  1092. SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
  1093. store_fan_min, 0),
  1094. SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
  1095. store_fan_min, 1),
  1096. SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
  1097. store_fan_min, 2),
  1098. SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
  1099. store_fan_min, 3),
  1100. SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
  1101. store_fan_min, 4),
  1102. };
  1103. static struct sensor_device_attribute sda_fan_div[] = {
  1104. SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
  1105. SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
  1106. SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
  1107. SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
  1108. SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
  1109. };
  1110. static ssize_t
  1111. show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
  1112. {
  1113. struct nct6775_data *data = nct6775_update_device(dev);
  1114. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  1115. int nr = sattr->index;
  1116. return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
  1117. }
  1118. static ssize_t
  1119. show_temp(struct device *dev, struct device_attribute *attr, char *buf)
  1120. {
  1121. struct nct6775_data *data = nct6775_update_device(dev);
  1122. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  1123. int nr = sattr->nr;
  1124. int index = sattr->index;
  1125. return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
  1126. }
  1127. static ssize_t
  1128. store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
  1129. size_t count)
  1130. {
  1131. struct nct6775_data *data = dev_get_drvdata(dev);
  1132. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  1133. int nr = sattr->nr;
  1134. int index = sattr->index;
  1135. int err;
  1136. long val;
  1137. err = kstrtol(buf, 10, &val);
  1138. if (err < 0)
  1139. return err;
  1140. mutex_lock(&data->update_lock);
  1141. data->temp[index][nr] = LM75_TEMP_TO_REG(val);
  1142. nct6775_write_temp(data, data->reg_temp[index][nr],
  1143. data->temp[index][nr]);
  1144. mutex_unlock(&data->update_lock);
  1145. return count;
  1146. }
  1147. static ssize_t
  1148. show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
  1149. {
  1150. struct nct6775_data *data = nct6775_update_device(dev);
  1151. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  1152. return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
  1153. }
  1154. static ssize_t
  1155. store_temp_offset(struct device *dev, struct device_attribute *attr,
  1156. const char *buf, size_t count)
  1157. {
  1158. struct nct6775_data *data = dev_get_drvdata(dev);
  1159. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  1160. int nr = sattr->index;
  1161. long val;
  1162. int err;
  1163. err = kstrtol(buf, 10, &val);
  1164. if (err < 0)
  1165. return err;
  1166. val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
  1167. mutex_lock(&data->update_lock);
  1168. data->temp_offset[nr] = val;
  1169. nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
  1170. mutex_unlock(&data->update_lock);
  1171. return count;
  1172. }
  1173. static ssize_t
  1174. show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
  1175. {
  1176. struct nct6775_data *data = nct6775_update_device(dev);
  1177. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  1178. int nr = sattr->index;
  1179. return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
  1180. }
  1181. static ssize_t
  1182. store_temp_type(struct device *dev, struct device_attribute *attr,
  1183. const char *buf, size_t count)
  1184. {
  1185. struct nct6775_data *data = nct6775_update_device(dev);
  1186. struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
  1187. int nr = sattr->index;
  1188. unsigned long val;
  1189. int err;
  1190. u8 vbat, diode, bit;
  1191. err = kstrtoul(buf, 10, &val);
  1192. if (err < 0)
  1193. return err;
  1194. if (val != 1 && val != 3 && val != 4)
  1195. return -EINVAL;
  1196. mutex_lock(&data->update_lock);
  1197. data->temp_type[nr] = val;
  1198. vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
  1199. diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
  1200. bit = 0x02 << nr;
  1201. switch (val) {
  1202. case 1: /* CPU diode (diode, current mode) */
  1203. vbat |= bit;
  1204. diode |= bit;
  1205. break;
  1206. case 3: /* diode, voltage mode */
  1207. vbat |= bit;
  1208. break;
  1209. case 4: /* thermistor */
  1210. break;
  1211. }
  1212. nct6775_write_value(data, data->REG_VBAT, vbat);
  1213. nct6775_write_value(data, data->REG_DIODE, diode);
  1214. mutex_unlock(&data->update_lock);
  1215. return count;
  1216. }
  1217. static struct sensor_device_attribute_2 sda_temp_input[] = {
  1218. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  1219. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
  1220. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
  1221. SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
  1222. SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
  1223. SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
  1224. SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
  1225. SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
  1226. SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
  1227. SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
  1228. };
  1229. static struct sensor_device_attribute sda_temp_label[] = {
  1230. SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
  1231. SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
  1232. SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
  1233. SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
  1234. SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
  1235. SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
  1236. SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
  1237. SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
  1238. SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
  1239. SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
  1240. };
  1241. static struct sensor_device_attribute_2 sda_temp_max[] = {
  1242. SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1243. 0, 1),
  1244. SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1245. 1, 1),
  1246. SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1247. 2, 1),
  1248. SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1249. 3, 1),
  1250. SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1251. 4, 1),
  1252. SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1253. 5, 1),
  1254. SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1255. 6, 1),
  1256. SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1257. 7, 1),
  1258. SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1259. 8, 1),
  1260. SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1261. 9, 1),
  1262. };
  1263. static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
  1264. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1265. 0, 2),
  1266. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1267. 1, 2),
  1268. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1269. 2, 2),
  1270. SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1271. 3, 2),
  1272. SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1273. 4, 2),
  1274. SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1275. 5, 2),
  1276. SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1277. 6, 2),
  1278. SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1279. 7, 2),
  1280. SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1281. 8, 2),
  1282. SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1283. 9, 2),
  1284. };
  1285. static struct sensor_device_attribute_2 sda_temp_crit[] = {
  1286. SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1287. 0, 3),
  1288. SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1289. 1, 3),
  1290. SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1291. 2, 3),
  1292. SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1293. 3, 3),
  1294. SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1295. 4, 3),
  1296. SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1297. 5, 3),
  1298. SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1299. 6, 3),
  1300. SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1301. 7, 3),
  1302. SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1303. 8, 3),
  1304. SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
  1305. 9, 3),
  1306. };
  1307. static struct sensor_device_attribute sda_temp_offset[] = {
  1308. SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
  1309. store_temp_offset, 0),
  1310. SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
  1311. store_temp_offset, 1),
  1312. SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
  1313. store_temp_offset, 2),
  1314. SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
  1315. store_temp_offset, 3),
  1316. SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
  1317. store_temp_offset, 4),
  1318. SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
  1319. store_temp_offset, 5),
  1320. };
  1321. static struct sensor_device_attribute sda_temp_type[] = {
  1322. SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
  1323. store_temp_type, 0),
  1324. SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
  1325. store_temp_type, 1),
  1326. SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
  1327. store_temp_type, 2),
  1328. SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
  1329. store_temp_type, 3),
  1330. SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
  1331. store_temp_type, 4),
  1332. SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
  1333. store_temp_type, 5),
  1334. };
  1335. static struct sensor_device_attribute sda_temp_alarm[] = {
  1336. SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL,
  1337. TEMP_ALARM_BASE),
  1338. SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL,
  1339. TEMP_ALARM_BASE + 1),
  1340. SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL,
  1341. TEMP_ALARM_BASE + 2),
  1342. SENSOR_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL,
  1343. TEMP_ALARM_BASE + 3),
  1344. SENSOR_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL,
  1345. TEMP_ALARM_BASE + 4),
  1346. SENSOR_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL,
  1347. TEMP_ALARM_BASE + 5),
  1348. };
  1349. #define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
  1350. static ssize_t
  1351. show_name(struct device *dev, struct device_attribute *attr, char *buf)
  1352. {
  1353. struct nct6775_data *data = dev_get_drvdata(dev);
  1354. return sprintf(buf, "%s\n", data->name);
  1355. }
  1356. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1357. static ssize_t
  1358. show_vid(struct device *dev, struct device_attribute *attr, char *buf)
  1359. {
  1360. struct nct6775_data *data = dev_get_drvdata(dev);
  1361. return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
  1362. }
  1363. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
  1364. /* Case open detection */
  1365. static ssize_t
  1366. clear_caseopen(struct device *dev, struct device_attribute *attr,
  1367. const char *buf, size_t count)
  1368. {
  1369. struct nct6775_data *data = dev_get_drvdata(dev);
  1370. struct nct6775_sio_data *sio_data = dev->platform_data;
  1371. int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
  1372. unsigned long val;
  1373. u8 reg;
  1374. int ret;
  1375. if (kstrtoul(buf, 10, &val) || val != 0)
  1376. return -EINVAL;
  1377. mutex_lock(&data->update_lock);
  1378. /*
  1379. * Use CR registers to clear caseopen status.
  1380. * The CR registers are the same for all chips, and not all chips
  1381. * support clearing the caseopen status through "regular" registers.
  1382. */
  1383. ret = superio_enter(sio_data->sioreg);
  1384. if (ret) {
  1385. count = ret;
  1386. goto error;
  1387. }
  1388. superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
  1389. reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
  1390. reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
  1391. superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
  1392. reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
  1393. superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
  1394. superio_exit(sio_data->sioreg);
  1395. data->valid = false; /* Force cache refresh */
  1396. error:
  1397. mutex_unlock(&data->update_lock);
  1398. return count;
  1399. }
  1400. static struct sensor_device_attribute sda_caseopen[] = {
  1401. SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
  1402. clear_caseopen, INTRUSION_ALARM_BASE),
  1403. SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
  1404. clear_caseopen, INTRUSION_ALARM_BASE + 1),
  1405. };
  1406. /*
  1407. * Driver and device management
  1408. */
  1409. static void nct6775_device_remove_files(struct device *dev)
  1410. {
  1411. /*
  1412. * some entries in the following arrays may not have been used in
  1413. * device_create_file(), but device_remove_file() will ignore them
  1414. */
  1415. int i;
  1416. struct nct6775_data *data = dev_get_drvdata(dev);
  1417. for (i = 0; i < data->in_num; i++)
  1418. sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
  1419. for (i = 0; i < 5; i++) {
  1420. device_remove_file(dev, &sda_fan_input[i].dev_attr);
  1421. device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
  1422. device_remove_file(dev, &sda_fan_div[i].dev_attr);
  1423. device_remove_file(dev, &sda_fan_min[i].dev_attr);
  1424. }
  1425. for (i = 0; i < NUM_TEMP; i++) {
  1426. if (!(data->have_temp & (1 << i)))
  1427. continue;
  1428. device_remove_file(dev, &sda_temp_input[i].dev_attr);
  1429. device_remove_file(dev, &sda_temp_label[i].dev_attr);
  1430. device_remove_file(dev, &sda_temp_max[i].dev_attr);
  1431. device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
  1432. device_remove_file(dev, &sda_temp_crit[i].dev_attr);
  1433. if (!(data->have_temp_fixed & (1 << i)))
  1434. continue;
  1435. device_remove_file(dev, &sda_temp_type[i].dev_attr);
  1436. device_remove_file(dev, &sda_temp_offset[i].dev_attr);
  1437. if (i >= NUM_TEMP_ALARM)
  1438. continue;
  1439. device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
  1440. }
  1441. device_remove_file(dev, &sda_caseopen[0].dev_attr);
  1442. device_remove_file(dev, &sda_caseopen[1].dev_attr);
  1443. device_remove_file(dev, &dev_attr_name);
  1444. device_remove_file(dev, &dev_attr_cpu0_vid);
  1445. }
  1446. /* Get the monitoring functions started */
  1447. static inline void nct6775_init_device(struct nct6775_data *data)
  1448. {
  1449. int i;
  1450. u8 tmp, diode;
  1451. /* Start monitoring if needed */
  1452. if (data->REG_CONFIG) {
  1453. tmp = nct6775_read_value(data, data->REG_CONFIG);
  1454. if (!(tmp & 0x01))
  1455. nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
  1456. }
  1457. /* Enable temperature sensors if needed */
  1458. for (i = 0; i < NUM_TEMP; i++) {
  1459. if (!(data->have_temp & (1 << i)))
  1460. continue;
  1461. if (!data->reg_temp_config[i])
  1462. continue;
  1463. tmp = nct6775_read_value(data, data->reg_temp_config[i]);
  1464. if (tmp & 0x01)
  1465. nct6775_write_value(data, data->reg_temp_config[i],
  1466. tmp & 0xfe);
  1467. }
  1468. /* Enable VBAT monitoring if needed */
  1469. tmp = nct6775_read_value(data, data->REG_VBAT);
  1470. if (!(tmp & 0x01))
  1471. nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
  1472. diode = nct6775_read_value(data, data->REG_DIODE);
  1473. for (i = 0; i < data->temp_fixed_num; i++) {
  1474. if (!(data->have_temp_fixed & (1 << i)))
  1475. continue;
  1476. if ((tmp & (0x02 << i))) /* diode */
  1477. data->temp_type[i] = 3 - ((diode >> i) & 0x02);
  1478. else /* thermistor */
  1479. data->temp_type[i] = 4;
  1480. }
  1481. }
  1482. static int
  1483. nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
  1484. struct nct6775_data *data)
  1485. {
  1486. int regval;
  1487. bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
  1488. int ret;
  1489. ret = superio_enter(sio_data->sioreg);
  1490. if (ret)
  1491. return ret;
  1492. /* fan4 and fan5 share some pins with the GPIO and serial flash */
  1493. if (data->kind == nct6775) {
  1494. regval = superio_inb(sio_data->sioreg, 0x2c);
  1495. fan3pin = regval & (1 << 6);
  1496. fan3min = fan3pin;
  1497. /* On NCT6775, fan4 shares pins with the fdc interface */
  1498. fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
  1499. fan4min = 0;
  1500. fan5pin = 0;
  1501. } else if (data->kind == nct6776) {
  1502. bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
  1503. superio_select(sio_data->sioreg, NCT6775_LD_HWM);
  1504. regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
  1505. if (regval & 0x80)
  1506. fan3pin = gpok;
  1507. else
  1508. fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
  1509. if (regval & 0x40)
  1510. fan4pin = gpok;
  1511. else
  1512. fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
  1513. if (regval & 0x20)
  1514. fan5pin = gpok;
  1515. else
  1516. fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
  1517. fan4min = fan4pin;
  1518. fan3min = fan3pin;
  1519. } else { /* NCT6779D */
  1520. regval = superio_inb(sio_data->sioreg, 0x1c);
  1521. fan3pin = !(regval & (1 << 5));
  1522. fan4pin = !(regval & (1 << 6));
  1523. fan5pin = !(regval & (1 << 7));
  1524. fan3min = fan3pin;
  1525. fan4min = fan4pin;
  1526. }
  1527. superio_exit(sio_data->sioreg);
  1528. data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
  1529. data->has_fan |= fan3pin << 2;
  1530. data->has_fan_min |= fan3min << 2;
  1531. data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
  1532. data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
  1533. return 0;
  1534. }
  1535. static int nct6775_probe(struct platform_device *pdev)
  1536. {
  1537. struct device *dev = &pdev->dev;
  1538. struct nct6775_sio_data *sio_data = dev->platform_data;
  1539. struct nct6775_data *data;
  1540. struct resource *res;
  1541. int i, s, err = 0;
  1542. int src, mask, available;
  1543. const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
  1544. const u16 *reg_temp_alternate, *reg_temp_crit;
  1545. int num_reg_temp;
  1546. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1547. if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
  1548. DRVNAME))
  1549. return -EBUSY;
  1550. data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
  1551. GFP_KERNEL);
  1552. if (!data)
  1553. return -ENOMEM;
  1554. data->kind = sio_data->kind;
  1555. data->addr = res->start;
  1556. mutex_init(&data->lock);
  1557. mutex_init(&data->update_lock);
  1558. data->name = nct6775_device_names[data->kind];
  1559. data->bank = 0xff; /* Force initial bank selection */
  1560. platform_set_drvdata(pdev, data);
  1561. switch (data->kind) {
  1562. case nct6775:
  1563. data->in_num = 9;
  1564. data->has_fan_div = true;
  1565. data->temp_fixed_num = 3;
  1566. data->ALARM_BITS = NCT6775_ALARM_BITS;
  1567. data->fan_from_reg = fan_from_reg16;
  1568. data->fan_from_reg_min = fan_from_reg8;
  1569. data->temp_label = nct6775_temp_label;
  1570. data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
  1571. data->REG_CONFIG = NCT6775_REG_CONFIG;
  1572. data->REG_VBAT = NCT6775_REG_VBAT;
  1573. data->REG_DIODE = NCT6775_REG_DIODE;
  1574. data->REG_VIN = NCT6775_REG_IN;
  1575. data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
  1576. data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
  1577. data->REG_FAN = NCT6775_REG_FAN;
  1578. data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
  1579. data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
  1580. data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
  1581. data->REG_ALARM = NCT6775_REG_ALARM;
  1582. reg_temp = NCT6775_REG_TEMP;
  1583. num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
  1584. reg_temp_over = NCT6775_REG_TEMP_OVER;
  1585. reg_temp_hyst = NCT6775_REG_TEMP_HYST;
  1586. reg_temp_config = NCT6775_REG_TEMP_CONFIG;
  1587. reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
  1588. reg_temp_crit = NCT6775_REG_TEMP_CRIT;
  1589. break;
  1590. case nct6776:
  1591. data->in_num = 9;
  1592. data->has_fan_div = false;
  1593. data->temp_fixed_num = 3;
  1594. data->ALARM_BITS = NCT6776_ALARM_BITS;
  1595. data->fan_from_reg = fan_from_reg13;
  1596. data->fan_from_reg_min = fan_from_reg13;
  1597. data->temp_label = nct6776_temp_label;
  1598. data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
  1599. data->REG_CONFIG = NCT6775_REG_CONFIG;
  1600. data->REG_VBAT = NCT6775_REG_VBAT;
  1601. data->REG_DIODE = NCT6775_REG_DIODE;
  1602. data->REG_VIN = NCT6775_REG_IN;
  1603. data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
  1604. data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
  1605. data->REG_FAN = NCT6775_REG_FAN;
  1606. data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
  1607. data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
  1608. data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
  1609. data->REG_ALARM = NCT6775_REG_ALARM;
  1610. reg_temp = NCT6775_REG_TEMP;
  1611. num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
  1612. reg_temp_over = NCT6775_REG_TEMP_OVER;
  1613. reg_temp_hyst = NCT6775_REG_TEMP_HYST;
  1614. reg_temp_config = NCT6776_REG_TEMP_CONFIG;
  1615. reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
  1616. reg_temp_crit = NCT6776_REG_TEMP_CRIT;
  1617. break;
  1618. case nct6779:
  1619. data->in_num = 15;
  1620. data->has_fan_div = false;
  1621. data->temp_fixed_num = 6;
  1622. data->ALARM_BITS = NCT6779_ALARM_BITS;
  1623. data->fan_from_reg = fan_from_reg13;
  1624. data->fan_from_reg_min = fan_from_reg13;
  1625. data->temp_label = nct6779_temp_label;
  1626. data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
  1627. data->REG_CONFIG = NCT6775_REG_CONFIG;
  1628. data->REG_VBAT = NCT6775_REG_VBAT;
  1629. data->REG_DIODE = NCT6775_REG_DIODE;
  1630. data->REG_VIN = NCT6779_REG_IN;
  1631. data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
  1632. data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
  1633. data->REG_FAN = NCT6779_REG_FAN;
  1634. data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
  1635. data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
  1636. data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
  1637. data->REG_ALARM = NCT6779_REG_ALARM;
  1638. reg_temp = NCT6779_REG_TEMP;
  1639. num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
  1640. reg_temp_over = NCT6779_REG_TEMP_OVER;
  1641. reg_temp_hyst = NCT6779_REG_TEMP_HYST;
  1642. reg_temp_config = NCT6779_REG_TEMP_CONFIG;
  1643. reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
  1644. reg_temp_crit = NCT6779_REG_TEMP_CRIT;
  1645. break;
  1646. default:
  1647. return -ENODEV;
  1648. }
  1649. data->have_in = (1 << data->in_num) - 1;
  1650. data->have_temp = 0;
  1651. /*
  1652. * On some boards, not all available temperature sources are monitored,
  1653. * even though some of the monitoring registers are unused.
  1654. * Get list of unused monitoring registers, then detect if any fan
  1655. * controls are configured to use unmonitored temperature sources.
  1656. * If so, assign the unmonitored temperature sources to available
  1657. * monitoring registers.
  1658. */
  1659. mask = 0;
  1660. available = 0;
  1661. for (i = 0; i < num_reg_temp; i++) {
  1662. if (reg_temp[i] == 0)
  1663. continue;
  1664. src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
  1665. if (!src || (mask & (1 << src)))
  1666. available |= 1 << i;
  1667. mask |= 1 << src;
  1668. }
  1669. mask = 0;
  1670. s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
  1671. for (i = 0; i < num_reg_temp; i++) {
  1672. if (reg_temp[i] == 0)
  1673. continue;
  1674. src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
  1675. if (!src || (mask & (1 << src)))
  1676. continue;
  1677. if (src >= data->temp_label_num ||
  1678. !strlen(data->temp_label[src])) {
  1679. dev_info(dev,
  1680. "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
  1681. src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
  1682. continue;
  1683. }
  1684. mask |= 1 << src;
  1685. /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
  1686. if (src <= data->temp_fixed_num) {
  1687. data->have_temp |= 1 << (src - 1);
  1688. data->have_temp_fixed |= 1 << (src - 1);
  1689. data->reg_temp[0][src - 1] = reg_temp[i];
  1690. data->reg_temp[1][src - 1] = reg_temp_over[i];
  1691. data->reg_temp[2][src - 1] = reg_temp_hyst[i];
  1692. data->reg_temp_config[src - 1] = reg_temp_config[i];
  1693. data->temp_src[src - 1] = src;
  1694. continue;
  1695. }
  1696. if (s >= NUM_TEMP)
  1697. continue;
  1698. /* Use dynamic index for other sources */
  1699. data->have_temp |= 1 << s;
  1700. data->reg_temp[0][s] = reg_temp[i];
  1701. data->reg_temp[1][s] = reg_temp_over[i];
  1702. data->reg_temp[2][s] = reg_temp_hyst[i];
  1703. data->reg_temp_config[s] = reg_temp_config[i];
  1704. if (reg_temp_crit[src - 1])
  1705. data->reg_temp[3][s] = reg_temp_crit[src - 1];
  1706. data->temp_src[s] = src;
  1707. s++;
  1708. }
  1709. #ifdef USE_ALTERNATE
  1710. /*
  1711. * Go through the list of alternate temp registers and enable
  1712. * if possible.
  1713. * The temperature is already monitored if the respective bit in <mask>
  1714. * is set.
  1715. */
  1716. for (i = 0; i < data->temp_label_num - 1; i++) {
  1717. if (!reg_temp_alternate[i])
  1718. continue;
  1719. if (mask & (1 << (i + 1)))
  1720. continue;
  1721. if (i < data->temp_fixed_num) {
  1722. if (data->have_temp & (1 << i))
  1723. continue;
  1724. data->have_temp |= 1 << i;
  1725. data->have_temp_fixed |= 1 << i;
  1726. data->reg_temp[0][i] = reg_temp_alternate[i];
  1727. data->reg_temp[1][i] = reg_temp_over[i];
  1728. data->reg_temp[2][i] = reg_temp_hyst[i];
  1729. data->temp_src[i] = i + 1;
  1730. continue;
  1731. }
  1732. if (s >= NUM_TEMP) /* Abort if no more space */
  1733. break;
  1734. data->have_temp |= 1 << s;
  1735. data->reg_temp[0][s] = reg_temp_alternate[i];
  1736. data->temp_src[s] = i + 1;
  1737. s++;
  1738. }
  1739. #endif /* USE_ALTERNATE */
  1740. switch (data->kind) {
  1741. case nct6775:
  1742. break;
  1743. case nct6776:
  1744. /*
  1745. * On NCT6776, AUXTIN and VIN3 pins are shared.
  1746. * Only way to detect it is to check if AUXTIN is used
  1747. * as a temperature source, and if that source is
  1748. * enabled.
  1749. *
  1750. * If that is the case, disable in6, which reports VIN3.
  1751. * Otherwise disable temp3.
  1752. */
  1753. if (data->have_temp & (1 << 2)) {
  1754. u8 reg = nct6775_read_value(data,
  1755. data->reg_temp_config[2]);
  1756. if (reg & 0x01)
  1757. data->have_temp &= ~(1 << 2);
  1758. else
  1759. data->have_in &= ~(1 << 6);
  1760. }
  1761. break;
  1762. case nct6779:
  1763. /*
  1764. * Shared pins:
  1765. * VIN4 / AUXTIN0
  1766. * VIN5 / AUXTIN1
  1767. * VIN6 / AUXTIN2
  1768. * VIN7 / AUXTIN3
  1769. *
  1770. * There does not seem to be a clean way to detect if VINx or
  1771. * AUXTINx is active, so for keep both sensor types enabled
  1772. * for now.
  1773. */
  1774. break;
  1775. }
  1776. /* Initialize the chip */
  1777. nct6775_init_device(data);
  1778. data->vrm = vid_which_vrm();
  1779. err = superio_enter(sio_data->sioreg);
  1780. if (err)
  1781. return err;
  1782. /*
  1783. * Read VID value
  1784. * We can get the VID input values directly at logical device D 0xe3.
  1785. */
  1786. superio_select(sio_data->sioreg, NCT6775_LD_VID);
  1787. data->vid = superio_inb(sio_data->sioreg, 0xe3);
  1788. superio_exit(sio_data->sioreg);
  1789. err = device_create_file(dev, &dev_attr_cpu0_vid);
  1790. if (err)
  1791. return err;
  1792. err = nct6775_check_fan_inputs(sio_data, data);
  1793. if (err)
  1794. goto exit_remove;
  1795. /* Read fan clock dividers immediately */
  1796. nct6775_init_fan_common(dev, data);
  1797. for (i = 0; i < data->in_num; i++) {
  1798. if (!(data->have_in & (1 << i)))
  1799. continue;
  1800. err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
  1801. if (err)
  1802. goto exit_remove;
  1803. }
  1804. for (i = 0; i < 5; i++) {
  1805. if (data->has_fan & (1 << i)) {
  1806. err = device_create_file(dev,
  1807. &sda_fan_input[i].dev_attr);
  1808. if (err)
  1809. goto exit_remove;
  1810. err = device_create_file(dev,
  1811. &sda_fan_alarm[i].dev_attr);
  1812. if (err)
  1813. goto exit_remove;
  1814. if (data->kind != nct6776 &&
  1815. data->kind != nct6779) {
  1816. err = device_create_file(dev,
  1817. &sda_fan_div[i].dev_attr);
  1818. if (err)
  1819. goto exit_remove;
  1820. }
  1821. if (data->has_fan_min & (1 << i)) {
  1822. err = device_create_file(dev,
  1823. &sda_fan_min[i].dev_attr);
  1824. if (err)
  1825. goto exit_remove;
  1826. }
  1827. }
  1828. }
  1829. for (i = 0; i < NUM_TEMP; i++) {
  1830. if (!(data->have_temp & (1 << i)))
  1831. continue;
  1832. err = device_create_file(dev, &sda_temp_input[i].dev_attr);
  1833. if (err)
  1834. goto exit_remove;
  1835. if (data->temp_label) {
  1836. err = device_create_file(dev,
  1837. &sda_temp_label[i].dev_attr);
  1838. if (err)
  1839. goto exit_remove;
  1840. }
  1841. if (data->reg_temp[1][i]) {
  1842. err = device_create_file(dev,
  1843. &sda_temp_max[i].dev_attr);
  1844. if (err)
  1845. goto exit_remove;
  1846. }
  1847. if (data->reg_temp[2][i]) {
  1848. err = device_create_file(dev,
  1849. &sda_temp_max_hyst[i].dev_attr);
  1850. if (err)
  1851. goto exit_remove;
  1852. }
  1853. if (data->reg_temp[3][i]) {
  1854. err = device_create_file(dev,
  1855. &sda_temp_crit[i].dev_attr);
  1856. if (err)
  1857. goto exit_remove;
  1858. }
  1859. if (!(data->have_temp_fixed & (1 << i)))
  1860. continue;
  1861. err = device_create_file(dev, &sda_temp_type[i].dev_attr);
  1862. if (err)
  1863. goto exit_remove;
  1864. err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
  1865. if (err)
  1866. goto exit_remove;
  1867. if (i >= NUM_TEMP_ALARM ||
  1868. data->ALARM_BITS[TEMP_ALARM_BASE + i] < 0)
  1869. continue;
  1870. err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
  1871. if (err)
  1872. goto exit_remove;
  1873. }
  1874. for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
  1875. if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
  1876. continue;
  1877. err = device_create_file(dev, &sda_caseopen[i].dev_attr);
  1878. if (err)
  1879. goto exit_remove;
  1880. }
  1881. err = device_create_file(dev, &dev_attr_name);
  1882. if (err)
  1883. goto exit_remove;
  1884. data->hwmon_dev = hwmon_device_register(dev);
  1885. if (IS_ERR(data->hwmon_dev)) {
  1886. err = PTR_ERR(data->hwmon_dev);
  1887. goto exit_remove;
  1888. }
  1889. return 0;
  1890. exit_remove:
  1891. nct6775_device_remove_files(dev);
  1892. return err;
  1893. }
  1894. static int nct6775_remove(struct platform_device *pdev)
  1895. {
  1896. struct nct6775_data *data = platform_get_drvdata(pdev);
  1897. hwmon_device_unregister(data->hwmon_dev);
  1898. nct6775_device_remove_files(&pdev->dev);
  1899. return 0;
  1900. }
  1901. static struct platform_driver nct6775_driver = {
  1902. .driver = {
  1903. .owner = THIS_MODULE,
  1904. .name = DRVNAME,
  1905. },
  1906. .probe = nct6775_probe,
  1907. .remove = nct6775_remove,
  1908. };
  1909. /* nct6775_find() looks for a '627 in the Super-I/O config space */
  1910. static int __init nct6775_find(int sioaddr, unsigned short *addr,
  1911. struct nct6775_sio_data *sio_data)
  1912. {
  1913. static const char sio_name_NCT6775[] __initconst = "NCT6775F";
  1914. static const char sio_name_NCT6776[] __initconst = "NCT6776F";
  1915. static const char sio_name_NCT6779[] __initconst = "NCT6779D";
  1916. u16 val;
  1917. const char *sio_name;
  1918. int err;
  1919. err = superio_enter(sioaddr);
  1920. if (err)
  1921. return err;
  1922. if (force_id)
  1923. val = force_id;
  1924. else
  1925. val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
  1926. | superio_inb(sioaddr, SIO_REG_DEVID + 1);
  1927. switch (val & SIO_ID_MASK) {
  1928. case SIO_NCT6775_ID:
  1929. sio_data->kind = nct6775;
  1930. sio_name = sio_name_NCT6775;
  1931. break;
  1932. case SIO_NCT6776_ID:
  1933. sio_data->kind = nct6776;
  1934. sio_name = sio_name_NCT6776;
  1935. break;
  1936. case SIO_NCT6779_ID:
  1937. sio_data->kind = nct6779;
  1938. sio_name = sio_name_NCT6779;
  1939. break;
  1940. default:
  1941. if (val != 0xffff)
  1942. pr_debug("unsupported chip ID: 0x%04x\n", val);
  1943. superio_exit(sioaddr);
  1944. return -ENODEV;
  1945. }
  1946. /* We have a known chip, find the HWM I/O address */
  1947. superio_select(sioaddr, NCT6775_LD_HWM);
  1948. val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
  1949. | superio_inb(sioaddr, SIO_REG_ADDR + 1);
  1950. *addr = val & IOREGION_ALIGNMENT;
  1951. if (*addr == 0) {
  1952. pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
  1953. superio_exit(sioaddr);
  1954. return -ENODEV;
  1955. }
  1956. /* Activate logical device if needed */
  1957. val = superio_inb(sioaddr, SIO_REG_ENABLE);
  1958. if (!(val & 0x01)) {
  1959. pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
  1960. superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
  1961. }
  1962. superio_exit(sioaddr);
  1963. pr_info("Found %s chip at %#x\n", sio_name, *addr);
  1964. sio_data->sioreg = sioaddr;
  1965. return 0;
  1966. }
  1967. /*
  1968. * when Super-I/O functions move to a separate file, the Super-I/O
  1969. * bus will manage the lifetime of the device and this module will only keep
  1970. * track of the nct6775 driver. But since we platform_device_alloc(), we
  1971. * must keep track of the device
  1972. */
  1973. static struct platform_device *pdev;
  1974. static int __init sensors_nct6775_init(void)
  1975. {
  1976. int err;
  1977. unsigned short address;
  1978. struct resource res;
  1979. struct nct6775_sio_data sio_data;
  1980. /*
  1981. * initialize sio_data->kind and sio_data->sioreg.
  1982. *
  1983. * when Super-I/O functions move to a separate file, the Super-I/O
  1984. * driver will probe 0x2e and 0x4e and auto-detect the presence of a
  1985. * nct6775 hardware monitor, and call probe()
  1986. */
  1987. if (nct6775_find(0x2e, &address, &sio_data) &&
  1988. nct6775_find(0x4e, &address, &sio_data))
  1989. return -ENODEV;
  1990. err = platform_driver_register(&nct6775_driver);
  1991. if (err)
  1992. goto exit;
  1993. pdev = platform_device_alloc(DRVNAME, address);
  1994. if (!pdev) {
  1995. err = -ENOMEM;
  1996. pr_err("Device allocation failed\n");
  1997. goto exit_unregister;
  1998. }
  1999. err = platform_device_add_data(pdev, &sio_data,
  2000. sizeof(struct nct6775_sio_data));
  2001. if (err) {
  2002. pr_err("Platform data allocation failed\n");
  2003. goto exit_device_put;
  2004. }
  2005. memset(&res, 0, sizeof(res));
  2006. res.name = DRVNAME;
  2007. res.start = address + IOREGION_OFFSET;
  2008. res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
  2009. res.flags = IORESOURCE_IO;
  2010. err = acpi_check_resource_conflict(&res);
  2011. if (err)
  2012. goto exit_device_put;
  2013. err = platform_device_add_resources(pdev, &res, 1);
  2014. if (err) {
  2015. pr_err("Device resource addition failed (%d)\n", err);
  2016. goto exit_device_put;
  2017. }
  2018. /* platform_device_add calls probe() */
  2019. err = platform_device_add(pdev);
  2020. if (err) {
  2021. pr_err("Device addition failed (%d)\n", err);
  2022. goto exit_device_put;
  2023. }
  2024. return 0;
  2025. exit_device_put:
  2026. platform_device_put(pdev);
  2027. exit_unregister:
  2028. platform_driver_unregister(&nct6775_driver);
  2029. exit:
  2030. return err;
  2031. }
  2032. static void __exit sensors_nct6775_exit(void)
  2033. {
  2034. platform_device_unregister(pdev);
  2035. platform_driver_unregister(&nct6775_driver);
  2036. }
  2037. MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
  2038. MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
  2039. MODULE_LICENSE("GPL");
  2040. module_init(sensors_nct6775_init);
  2041. module_exit(sensors_nct6775_exit);