atmel_serial.c 26 KB

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  1. /*
  2. * linux/drivers/char/atmel_serial.c
  3. *
  4. * Driver for Atmel AT91 / AT32 Serial ports
  5. * Copyright (C) 2003 Rick Bronson
  6. *
  7. * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
  8. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/tty.h>
  27. #include <linux/ioport.h>
  28. #include <linux/slab.h>
  29. #include <linux/init.h>
  30. #include <linux/serial.h>
  31. #include <linux/clk.h>
  32. #include <linux/console.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/tty_flip.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/atmel_pdc.h>
  37. #include <linux/atmel_serial.h>
  38. #include <asm/io.h>
  39. #include <asm/mach/serial_at91.h>
  40. #include <asm/arch/board.h>
  41. #ifdef CONFIG_ARM
  42. #include <asm/arch/cpu.h>
  43. #include <asm/arch/gpio.h>
  44. #endif
  45. #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  46. #define SUPPORT_SYSRQ
  47. #endif
  48. #include <linux/serial_core.h>
  49. #ifdef CONFIG_SERIAL_ATMEL_TTYAT
  50. /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
  51. * should coexist with the 8250 driver, such as if we have an external 16C550
  52. * UART. */
  53. #define SERIAL_ATMEL_MAJOR 204
  54. #define MINOR_START 154
  55. #define ATMEL_DEVICENAME "ttyAT"
  56. #else
  57. /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
  58. * name, but it is legally reserved for the 8250 driver. */
  59. #define SERIAL_ATMEL_MAJOR TTY_MAJOR
  60. #define MINOR_START 64
  61. #define ATMEL_DEVICENAME "ttyS"
  62. #endif
  63. #define ATMEL_ISR_PASS_LIMIT 256
  64. /* UART registers. CR is write-only, hence no GET macro */
  65. #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
  66. #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
  67. #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
  68. #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
  69. #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
  70. #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
  71. #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
  72. #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
  73. #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
  74. #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
  75. #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
  76. #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
  77. /* PDC registers */
  78. #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
  79. #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
  80. #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
  81. #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
  82. #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
  83. #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
  84. #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
  85. #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
  86. #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
  87. static int (*atmel_open_hook)(struct uart_port *);
  88. static void (*atmel_close_hook)(struct uart_port *);
  89. /*
  90. * We wrap our port structure around the generic uart_port.
  91. */
  92. struct atmel_uart_port {
  93. struct uart_port uart; /* uart */
  94. struct clk *clk; /* uart clock */
  95. unsigned short suspended; /* is port suspended? */
  96. int break_active; /* break being received */
  97. };
  98. static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
  99. #ifdef SUPPORT_SYSRQ
  100. static struct console atmel_console;
  101. #endif
  102. /*
  103. * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
  104. */
  105. static u_int atmel_tx_empty(struct uart_port *port)
  106. {
  107. return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
  108. }
  109. /*
  110. * Set state of the modem control output lines
  111. */
  112. static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
  113. {
  114. unsigned int control = 0;
  115. unsigned int mode;
  116. #ifdef CONFIG_ARCH_AT91RM9200
  117. if (cpu_is_at91rm9200()) {
  118. /*
  119. * AT91RM9200 Errata #39: RTS0 is not internally connected
  120. * to PA21. We need to drive the pin manually.
  121. */
  122. if (port->mapbase == AT91RM9200_BASE_US0) {
  123. if (mctrl & TIOCM_RTS)
  124. at91_set_gpio_value(AT91_PIN_PA21, 0);
  125. else
  126. at91_set_gpio_value(AT91_PIN_PA21, 1);
  127. }
  128. }
  129. #endif
  130. if (mctrl & TIOCM_RTS)
  131. control |= ATMEL_US_RTSEN;
  132. else
  133. control |= ATMEL_US_RTSDIS;
  134. if (mctrl & TIOCM_DTR)
  135. control |= ATMEL_US_DTREN;
  136. else
  137. control |= ATMEL_US_DTRDIS;
  138. UART_PUT_CR(port, control);
  139. /* Local loopback mode? */
  140. mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
  141. if (mctrl & TIOCM_LOOP)
  142. mode |= ATMEL_US_CHMODE_LOC_LOOP;
  143. else
  144. mode |= ATMEL_US_CHMODE_NORMAL;
  145. UART_PUT_MR(port, mode);
  146. }
  147. /*
  148. * Get state of the modem control input lines
  149. */
  150. static u_int atmel_get_mctrl(struct uart_port *port)
  151. {
  152. unsigned int status, ret = 0;
  153. status = UART_GET_CSR(port);
  154. /*
  155. * The control signals are active low.
  156. */
  157. if (!(status & ATMEL_US_DCD))
  158. ret |= TIOCM_CD;
  159. if (!(status & ATMEL_US_CTS))
  160. ret |= TIOCM_CTS;
  161. if (!(status & ATMEL_US_DSR))
  162. ret |= TIOCM_DSR;
  163. if (!(status & ATMEL_US_RI))
  164. ret |= TIOCM_RI;
  165. return ret;
  166. }
  167. /*
  168. * Stop transmitting.
  169. */
  170. static void atmel_stop_tx(struct uart_port *port)
  171. {
  172. UART_PUT_IDR(port, ATMEL_US_TXRDY);
  173. }
  174. /*
  175. * Start transmitting.
  176. */
  177. static void atmel_start_tx(struct uart_port *port)
  178. {
  179. UART_PUT_IER(port, ATMEL_US_TXRDY);
  180. }
  181. /*
  182. * Stop receiving - port is in process of being closed.
  183. */
  184. static void atmel_stop_rx(struct uart_port *port)
  185. {
  186. UART_PUT_IDR(port, ATMEL_US_RXRDY);
  187. }
  188. /*
  189. * Enable modem status interrupts
  190. */
  191. static void atmel_enable_ms(struct uart_port *port)
  192. {
  193. UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
  194. | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
  195. }
  196. /*
  197. * Control the transmission of a break signal
  198. */
  199. static void atmel_break_ctl(struct uart_port *port, int break_state)
  200. {
  201. if (break_state != 0)
  202. UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
  203. else
  204. UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
  205. }
  206. /*
  207. * Characters received (called from interrupt handler)
  208. */
  209. static void atmel_rx_chars(struct uart_port *port)
  210. {
  211. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  212. struct tty_struct *tty = port->info->tty;
  213. unsigned int status, ch, flg;
  214. status = UART_GET_CSR(port);
  215. while (status & ATMEL_US_RXRDY) {
  216. ch = UART_GET_CHAR(port);
  217. port->icount.rx++;
  218. flg = TTY_NORMAL;
  219. /*
  220. * note that the error handling code is
  221. * out of the main execution path
  222. */
  223. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  224. | ATMEL_US_OVRE | ATMEL_US_RXBRK)
  225. || atmel_port->break_active)) {
  226. /* clear error */
  227. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  228. if (status & ATMEL_US_RXBRK
  229. && !atmel_port->break_active) {
  230. /* ignore side-effect */
  231. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  232. port->icount.brk++;
  233. atmel_port->break_active = 1;
  234. UART_PUT_IER(port, ATMEL_US_RXBRK);
  235. if (uart_handle_break(port))
  236. goto ignore_char;
  237. } else {
  238. /*
  239. * This is either the end-of-break
  240. * condition or we've received at
  241. * least one character without RXBRK
  242. * being set. In both cases, the next
  243. * RXBRK will indicate start-of-break.
  244. */
  245. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  246. status &= ~ATMEL_US_RXBRK;
  247. atmel_port->break_active = 0;
  248. }
  249. if (status & ATMEL_US_PARE)
  250. port->icount.parity++;
  251. if (status & ATMEL_US_FRAME)
  252. port->icount.frame++;
  253. if (status & ATMEL_US_OVRE)
  254. port->icount.overrun++;
  255. status &= port->read_status_mask;
  256. if (status & ATMEL_US_RXBRK)
  257. flg = TTY_BREAK;
  258. else if (status & ATMEL_US_PARE)
  259. flg = TTY_PARITY;
  260. else if (status & ATMEL_US_FRAME)
  261. flg = TTY_FRAME;
  262. }
  263. if (uart_handle_sysrq_char(port, ch))
  264. goto ignore_char;
  265. uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
  266. ignore_char:
  267. status = UART_GET_CSR(port);
  268. }
  269. tty_flip_buffer_push(tty);
  270. }
  271. /*
  272. * Transmit characters (called from interrupt handler)
  273. */
  274. static void atmel_tx_chars(struct uart_port *port)
  275. {
  276. struct circ_buf *xmit = &port->info->xmit;
  277. if (port->x_char) {
  278. UART_PUT_CHAR(port, port->x_char);
  279. port->icount.tx++;
  280. port->x_char = 0;
  281. return;
  282. }
  283. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  284. atmel_stop_tx(port);
  285. return;
  286. }
  287. while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
  288. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  289. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  290. port->icount.tx++;
  291. if (uart_circ_empty(xmit))
  292. break;
  293. }
  294. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  295. uart_write_wakeup(port);
  296. if (uart_circ_empty(xmit))
  297. atmel_stop_tx(port);
  298. }
  299. /*
  300. * receive interrupt handler.
  301. */
  302. static void
  303. atmel_handle_receive(struct uart_port *port, unsigned int pending)
  304. {
  305. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  306. /* Interrupt receive */
  307. if (pending & ATMEL_US_RXRDY)
  308. atmel_rx_chars(port);
  309. else if (pending & ATMEL_US_RXBRK) {
  310. /*
  311. * End of break detected. If it came along with a
  312. * character, atmel_rx_chars will handle it.
  313. */
  314. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  315. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  316. atmel_port->break_active = 0;
  317. }
  318. }
  319. /*
  320. * transmit interrupt handler.
  321. */
  322. static void
  323. atmel_handle_transmit(struct uart_port *port, unsigned int pending)
  324. {
  325. /* Interrupt transmit */
  326. if (pending & ATMEL_US_TXRDY)
  327. atmel_tx_chars(port);
  328. }
  329. /*
  330. * status flags interrupt handler.
  331. */
  332. static void
  333. atmel_handle_status(struct uart_port *port, unsigned int pending,
  334. unsigned int status)
  335. {
  336. /* TODO: All reads to CSR will clear these interrupts! */
  337. if (pending & ATMEL_US_RIIC)
  338. port->icount.rng++;
  339. if (pending & ATMEL_US_DSRIC)
  340. port->icount.dsr++;
  341. if (pending & ATMEL_US_DCDIC)
  342. uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
  343. if (pending & ATMEL_US_CTSIC)
  344. uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
  345. if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
  346. | ATMEL_US_CTSIC))
  347. wake_up_interruptible(&port->info->delta_msr_wait);
  348. }
  349. /*
  350. * Interrupt handler
  351. */
  352. static irqreturn_t atmel_interrupt(int irq, void *dev_id)
  353. {
  354. struct uart_port *port = dev_id;
  355. unsigned int status, pending, pass_counter = 0;
  356. status = UART_GET_CSR(port);
  357. pending = status & UART_GET_IMR(port);
  358. while (pending) {
  359. atmel_handle_receive(port, pending);
  360. atmel_handle_status(port, pending, status);
  361. atmel_handle_transmit(port, pending);
  362. if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
  363. break;
  364. status = UART_GET_CSR(port);
  365. pending = status & UART_GET_IMR(port);
  366. }
  367. return IRQ_HANDLED;
  368. }
  369. /*
  370. * Perform initialization and enable port for reception
  371. */
  372. static int atmel_startup(struct uart_port *port)
  373. {
  374. int retval;
  375. /*
  376. * Ensure that no interrupts are enabled otherwise when
  377. * request_irq() is called we could get stuck trying to
  378. * handle an unexpected interrupt
  379. */
  380. UART_PUT_IDR(port, -1);
  381. /*
  382. * Allocate the IRQ
  383. */
  384. retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
  385. "atmel_serial", port);
  386. if (retval) {
  387. printk("atmel_serial: atmel_startup - Can't get irq\n");
  388. return retval;
  389. }
  390. /*
  391. * If there is a specific "open" function (to register
  392. * control line interrupts)
  393. */
  394. if (atmel_open_hook) {
  395. retval = atmel_open_hook(port);
  396. if (retval) {
  397. free_irq(port->irq, port);
  398. return retval;
  399. }
  400. }
  401. /*
  402. * Finally, enable the serial port
  403. */
  404. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  405. /* enable xmit & rcvr */
  406. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  407. /* enable receive only */
  408. UART_PUT_IER(port, ATMEL_US_RXRDY);
  409. return 0;
  410. }
  411. /*
  412. * Disable the port
  413. */
  414. static void atmel_shutdown(struct uart_port *port)
  415. {
  416. /*
  417. * Disable all interrupts, port and break condition.
  418. */
  419. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  420. UART_PUT_IDR(port, -1);
  421. /*
  422. * Free the interrupt
  423. */
  424. free_irq(port->irq, port);
  425. /*
  426. * If there is a specific "close" function (to unregister
  427. * control line interrupts)
  428. */
  429. if (atmel_close_hook)
  430. atmel_close_hook(port);
  431. }
  432. /*
  433. * Power / Clock management.
  434. */
  435. static void atmel_serial_pm(struct uart_port *port, unsigned int state,
  436. unsigned int oldstate)
  437. {
  438. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  439. switch (state) {
  440. case 0:
  441. /*
  442. * Enable the peripheral clock for this serial port.
  443. * This is called on uart_open() or a resume event.
  444. */
  445. clk_enable(atmel_port->clk);
  446. break;
  447. case 3:
  448. /*
  449. * Disable the peripheral clock for this serial port.
  450. * This is called on uart_close() or a suspend event.
  451. */
  452. clk_disable(atmel_port->clk);
  453. break;
  454. default:
  455. printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
  456. }
  457. }
  458. /*
  459. * Change the port parameters
  460. */
  461. static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
  462. struct ktermios *old)
  463. {
  464. unsigned long flags;
  465. unsigned int mode, imr, quot, baud;
  466. /* Get current mode register */
  467. mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
  468. | ATMEL_US_NBSTOP | ATMEL_US_PAR);
  469. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  470. quot = uart_get_divisor(port, baud);
  471. if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
  472. quot /= 8;
  473. mode |= ATMEL_US_USCLKS_MCK_DIV8;
  474. }
  475. /* byte size */
  476. switch (termios->c_cflag & CSIZE) {
  477. case CS5:
  478. mode |= ATMEL_US_CHRL_5;
  479. break;
  480. case CS6:
  481. mode |= ATMEL_US_CHRL_6;
  482. break;
  483. case CS7:
  484. mode |= ATMEL_US_CHRL_7;
  485. break;
  486. default:
  487. mode |= ATMEL_US_CHRL_8;
  488. break;
  489. }
  490. /* stop bits */
  491. if (termios->c_cflag & CSTOPB)
  492. mode |= ATMEL_US_NBSTOP_2;
  493. /* parity */
  494. if (termios->c_cflag & PARENB) {
  495. /* Mark or Space parity */
  496. if (termios->c_cflag & CMSPAR) {
  497. if (termios->c_cflag & PARODD)
  498. mode |= ATMEL_US_PAR_MARK;
  499. else
  500. mode |= ATMEL_US_PAR_SPACE;
  501. } else if (termios->c_cflag & PARODD)
  502. mode |= ATMEL_US_PAR_ODD;
  503. else
  504. mode |= ATMEL_US_PAR_EVEN;
  505. } else
  506. mode |= ATMEL_US_PAR_NONE;
  507. spin_lock_irqsave(&port->lock, flags);
  508. port->read_status_mask = ATMEL_US_OVRE;
  509. if (termios->c_iflag & INPCK)
  510. port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  511. if (termios->c_iflag & (BRKINT | PARMRK))
  512. port->read_status_mask |= ATMEL_US_RXBRK;
  513. /*
  514. * Characters to ignore
  515. */
  516. port->ignore_status_mask = 0;
  517. if (termios->c_iflag & IGNPAR)
  518. port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  519. if (termios->c_iflag & IGNBRK) {
  520. port->ignore_status_mask |= ATMEL_US_RXBRK;
  521. /*
  522. * If we're ignoring parity and break indicators,
  523. * ignore overruns too (for real raw support).
  524. */
  525. if (termios->c_iflag & IGNPAR)
  526. port->ignore_status_mask |= ATMEL_US_OVRE;
  527. }
  528. /* TODO: Ignore all characters if CREAD is set.*/
  529. /* update the per-port timeout */
  530. uart_update_timeout(port, termios->c_cflag, baud);
  531. /* save/disable interrupts and drain transmitter */
  532. imr = UART_GET_IMR(port);
  533. UART_PUT_IDR(port, -1);
  534. while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
  535. cpu_relax();
  536. /* disable receiver and transmitter */
  537. UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
  538. /* set the parity, stop bits and data size */
  539. UART_PUT_MR(port, mode);
  540. /* set the baud rate */
  541. UART_PUT_BRGR(port, quot);
  542. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  543. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  544. /* restore interrupts */
  545. UART_PUT_IER(port, imr);
  546. /* CTS flow-control and modem-status interrupts */
  547. if (UART_ENABLE_MS(port, termios->c_cflag))
  548. port->ops->enable_ms(port);
  549. spin_unlock_irqrestore(&port->lock, flags);
  550. }
  551. /*
  552. * Return string describing the specified port
  553. */
  554. static const char *atmel_type(struct uart_port *port)
  555. {
  556. return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
  557. }
  558. /*
  559. * Release the memory region(s) being used by 'port'.
  560. */
  561. static void atmel_release_port(struct uart_port *port)
  562. {
  563. struct platform_device *pdev = to_platform_device(port->dev);
  564. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  565. release_mem_region(port->mapbase, size);
  566. if (port->flags & UPF_IOREMAP) {
  567. iounmap(port->membase);
  568. port->membase = NULL;
  569. }
  570. }
  571. /*
  572. * Request the memory region(s) being used by 'port'.
  573. */
  574. static int atmel_request_port(struct uart_port *port)
  575. {
  576. struct platform_device *pdev = to_platform_device(port->dev);
  577. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  578. if (!request_mem_region(port->mapbase, size, "atmel_serial"))
  579. return -EBUSY;
  580. if (port->flags & UPF_IOREMAP) {
  581. port->membase = ioremap(port->mapbase, size);
  582. if (port->membase == NULL) {
  583. release_mem_region(port->mapbase, size);
  584. return -ENOMEM;
  585. }
  586. }
  587. return 0;
  588. }
  589. /*
  590. * Configure/autoconfigure the port.
  591. */
  592. static void atmel_config_port(struct uart_port *port, int flags)
  593. {
  594. if (flags & UART_CONFIG_TYPE) {
  595. port->type = PORT_ATMEL;
  596. atmel_request_port(port);
  597. }
  598. }
  599. /*
  600. * Verify the new serial_struct (for TIOCSSERIAL).
  601. */
  602. static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
  603. {
  604. int ret = 0;
  605. if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
  606. ret = -EINVAL;
  607. if (port->irq != ser->irq)
  608. ret = -EINVAL;
  609. if (ser->io_type != SERIAL_IO_MEM)
  610. ret = -EINVAL;
  611. if (port->uartclk / 16 != ser->baud_base)
  612. ret = -EINVAL;
  613. if ((void *)port->mapbase != ser->iomem_base)
  614. ret = -EINVAL;
  615. if (port->iobase != ser->port)
  616. ret = -EINVAL;
  617. if (ser->hub6 != 0)
  618. ret = -EINVAL;
  619. return ret;
  620. }
  621. static struct uart_ops atmel_pops = {
  622. .tx_empty = atmel_tx_empty,
  623. .set_mctrl = atmel_set_mctrl,
  624. .get_mctrl = atmel_get_mctrl,
  625. .stop_tx = atmel_stop_tx,
  626. .start_tx = atmel_start_tx,
  627. .stop_rx = atmel_stop_rx,
  628. .enable_ms = atmel_enable_ms,
  629. .break_ctl = atmel_break_ctl,
  630. .startup = atmel_startup,
  631. .shutdown = atmel_shutdown,
  632. .set_termios = atmel_set_termios,
  633. .type = atmel_type,
  634. .release_port = atmel_release_port,
  635. .request_port = atmel_request_port,
  636. .config_port = atmel_config_port,
  637. .verify_port = atmel_verify_port,
  638. .pm = atmel_serial_pm,
  639. };
  640. /*
  641. * Configure the port from the platform device resource info.
  642. */
  643. static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
  644. struct platform_device *pdev)
  645. {
  646. struct uart_port *port = &atmel_port->uart;
  647. struct atmel_uart_data *data = pdev->dev.platform_data;
  648. port->iotype = UPIO_MEM;
  649. port->flags = UPF_BOOT_AUTOCONF;
  650. port->ops = &atmel_pops;
  651. port->fifosize = 1;
  652. port->line = pdev->id;
  653. port->dev = &pdev->dev;
  654. port->mapbase = pdev->resource[0].start;
  655. port->irq = pdev->resource[1].start;
  656. if (data->regs)
  657. /* Already mapped by setup code */
  658. port->membase = data->regs;
  659. else {
  660. port->flags |= UPF_IOREMAP;
  661. port->membase = NULL;
  662. }
  663. /* for console, the clock could already be configured */
  664. if (!atmel_port->clk) {
  665. atmel_port->clk = clk_get(&pdev->dev, "usart");
  666. clk_enable(atmel_port->clk);
  667. port->uartclk = clk_get_rate(atmel_port->clk);
  668. }
  669. }
  670. /*
  671. * Register board-specific modem-control line handlers.
  672. */
  673. void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
  674. {
  675. if (fns->enable_ms)
  676. atmel_pops.enable_ms = fns->enable_ms;
  677. if (fns->get_mctrl)
  678. atmel_pops.get_mctrl = fns->get_mctrl;
  679. if (fns->set_mctrl)
  680. atmel_pops.set_mctrl = fns->set_mctrl;
  681. atmel_open_hook = fns->open;
  682. atmel_close_hook = fns->close;
  683. atmel_pops.pm = fns->pm;
  684. atmel_pops.set_wake = fns->set_wake;
  685. }
  686. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  687. static void atmel_console_putchar(struct uart_port *port, int ch)
  688. {
  689. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  690. cpu_relax();
  691. UART_PUT_CHAR(port, ch);
  692. }
  693. /*
  694. * Interrupts are disabled on entering
  695. */
  696. static void atmel_console_write(struct console *co, const char *s, u_int count)
  697. {
  698. struct uart_port *port = &atmel_ports[co->index].uart;
  699. unsigned int status, imr;
  700. /*
  701. * First, save IMR and then disable interrupts
  702. */
  703. imr = UART_GET_IMR(port);
  704. UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
  705. uart_console_write(port, s, count, atmel_console_putchar);
  706. /*
  707. * Finally, wait for transmitter to become empty
  708. * and restore IMR
  709. */
  710. do {
  711. status = UART_GET_CSR(port);
  712. } while (!(status & ATMEL_US_TXRDY));
  713. /* set interrupts back the way they were */
  714. UART_PUT_IER(port, imr);
  715. }
  716. /*
  717. * If the port was already initialised (eg, by a boot loader),
  718. * try to determine the current setup.
  719. */
  720. static void __init atmel_console_get_options(struct uart_port *port, int *baud,
  721. int *parity, int *bits)
  722. {
  723. unsigned int mr, quot;
  724. /*
  725. * If the baud rate generator isn't running, the port wasn't
  726. * initialized by the boot loader.
  727. */
  728. quot = UART_GET_BRGR(port);
  729. if (!quot)
  730. return;
  731. mr = UART_GET_MR(port) & ATMEL_US_CHRL;
  732. if (mr == ATMEL_US_CHRL_8)
  733. *bits = 8;
  734. else
  735. *bits = 7;
  736. mr = UART_GET_MR(port) & ATMEL_US_PAR;
  737. if (mr == ATMEL_US_PAR_EVEN)
  738. *parity = 'e';
  739. else if (mr == ATMEL_US_PAR_ODD)
  740. *parity = 'o';
  741. /*
  742. * The serial core only rounds down when matching this to a
  743. * supported baud rate. Make sure we don't end up slightly
  744. * lower than one of those, as it would make us fall through
  745. * to a much lower baud rate than we really want.
  746. */
  747. *baud = port->uartclk / (16 * (quot - 1));
  748. }
  749. static int __init atmel_console_setup(struct console *co, char *options)
  750. {
  751. struct uart_port *port = &atmel_ports[co->index].uart;
  752. int baud = 115200;
  753. int bits = 8;
  754. int parity = 'n';
  755. int flow = 'n';
  756. if (port->membase == NULL) {
  757. /* Port not initialized yet - delay setup */
  758. return -ENODEV;
  759. }
  760. UART_PUT_IDR(port, -1);
  761. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  762. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  763. if (options)
  764. uart_parse_options(options, &baud, &parity, &bits, &flow);
  765. else
  766. atmel_console_get_options(port, &baud, &parity, &bits);
  767. return uart_set_options(port, co, baud, parity, bits, flow);
  768. }
  769. static struct uart_driver atmel_uart;
  770. static struct console atmel_console = {
  771. .name = ATMEL_DEVICENAME,
  772. .write = atmel_console_write,
  773. .device = uart_console_device,
  774. .setup = atmel_console_setup,
  775. .flags = CON_PRINTBUFFER,
  776. .index = -1,
  777. .data = &atmel_uart,
  778. };
  779. #define ATMEL_CONSOLE_DEVICE &atmel_console
  780. /*
  781. * Early console initialization (before VM subsystem initialized).
  782. */
  783. static int __init atmel_console_init(void)
  784. {
  785. if (atmel_default_console_device) {
  786. add_preferred_console(ATMEL_DEVICENAME,
  787. atmel_default_console_device->id, NULL);
  788. atmel_init_port(&atmel_ports[atmel_default_console_device->id],
  789. atmel_default_console_device);
  790. register_console(&atmel_console);
  791. }
  792. return 0;
  793. }
  794. console_initcall(atmel_console_init);
  795. /*
  796. * Late console initialization.
  797. */
  798. static int __init atmel_late_console_init(void)
  799. {
  800. if (atmel_default_console_device
  801. && !(atmel_console.flags & CON_ENABLED))
  802. register_console(&atmel_console);
  803. return 0;
  804. }
  805. core_initcall(atmel_late_console_init);
  806. #else
  807. #define ATMEL_CONSOLE_DEVICE NULL
  808. #endif
  809. static struct uart_driver atmel_uart = {
  810. .owner = THIS_MODULE,
  811. .driver_name = "atmel_serial",
  812. .dev_name = ATMEL_DEVICENAME,
  813. .major = SERIAL_ATMEL_MAJOR,
  814. .minor = MINOR_START,
  815. .nr = ATMEL_MAX_UART,
  816. .cons = ATMEL_CONSOLE_DEVICE,
  817. };
  818. #ifdef CONFIG_PM
  819. static int atmel_serial_suspend(struct platform_device *pdev,
  820. pm_message_t state)
  821. {
  822. struct uart_port *port = platform_get_drvdata(pdev);
  823. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  824. if (device_may_wakeup(&pdev->dev)
  825. && !at91_suspend_entering_slow_clock())
  826. enable_irq_wake(port->irq);
  827. else {
  828. uart_suspend_port(&atmel_uart, port);
  829. atmel_port->suspended = 1;
  830. }
  831. return 0;
  832. }
  833. static int atmel_serial_resume(struct platform_device *pdev)
  834. {
  835. struct uart_port *port = platform_get_drvdata(pdev);
  836. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  837. if (atmel_port->suspended) {
  838. uart_resume_port(&atmel_uart, port);
  839. atmel_port->suspended = 0;
  840. } else
  841. disable_irq_wake(port->irq);
  842. return 0;
  843. }
  844. #else
  845. #define atmel_serial_suspend NULL
  846. #define atmel_serial_resume NULL
  847. #endif
  848. static int __devinit atmel_serial_probe(struct platform_device *pdev)
  849. {
  850. struct atmel_uart_port *port;
  851. int ret;
  852. port = &atmel_ports[pdev->id];
  853. atmel_init_port(port, pdev);
  854. ret = uart_add_one_port(&atmel_uart, &port->uart);
  855. if (!ret) {
  856. device_init_wakeup(&pdev->dev, 1);
  857. platform_set_drvdata(pdev, port);
  858. }
  859. return ret;
  860. }
  861. static int __devexit atmel_serial_remove(struct platform_device *pdev)
  862. {
  863. struct uart_port *port = platform_get_drvdata(pdev);
  864. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  865. int ret = 0;
  866. clk_disable(atmel_port->clk);
  867. clk_put(atmel_port->clk);
  868. device_init_wakeup(&pdev->dev, 0);
  869. platform_set_drvdata(pdev, NULL);
  870. if (port) {
  871. ret = uart_remove_one_port(&atmel_uart, port);
  872. kfree(port);
  873. }
  874. return ret;
  875. }
  876. static struct platform_driver atmel_serial_driver = {
  877. .probe = atmel_serial_probe,
  878. .remove = __devexit_p(atmel_serial_remove),
  879. .suspend = atmel_serial_suspend,
  880. .resume = atmel_serial_resume,
  881. .driver = {
  882. .name = "atmel_usart",
  883. .owner = THIS_MODULE,
  884. },
  885. };
  886. static int __init atmel_serial_init(void)
  887. {
  888. int ret;
  889. ret = uart_register_driver(&atmel_uart);
  890. if (ret)
  891. return ret;
  892. ret = platform_driver_register(&atmel_serial_driver);
  893. if (ret)
  894. uart_unregister_driver(&atmel_uart);
  895. return ret;
  896. }
  897. static void __exit atmel_serial_exit(void)
  898. {
  899. platform_driver_unregister(&atmel_serial_driver);
  900. uart_unregister_driver(&atmel_uart);
  901. }
  902. module_init(atmel_serial_init);
  903. module_exit(atmel_serial_exit);
  904. MODULE_AUTHOR("Rick Bronson");
  905. MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
  906. MODULE_LICENSE("GPL");