mach-imx6q.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108
  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/init.h>
  13. #include <linux/irq.h>
  14. #include <linux/irqdomain.h>
  15. #include <linux/of.h>
  16. #include <linux/of_irq.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/phy.h>
  19. #include <linux/micrel_phy.h>
  20. #include <asm/hardware/cache-l2x0.h>
  21. #include <asm/hardware/gic.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach/time.h>
  24. #include <mach/common.h>
  25. #include <mach/hardware.h>
  26. /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  27. static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  28. {
  29. /* min rx data delay */
  30. phy_write(phydev, 0x0b, 0x8105);
  31. phy_write(phydev, 0x0c, 0x0000);
  32. /* max rx/tx clock delay, min rx/tx control delay */
  33. phy_write(phydev, 0x0b, 0x8104);
  34. phy_write(phydev, 0x0c, 0xf0f0);
  35. phy_write(phydev, 0x0b, 0x104);
  36. return 0;
  37. }
  38. static void __init imx6q_init_machine(void)
  39. {
  40. if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
  41. phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
  42. ksz9021rn_phy_fixup);
  43. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  44. imx6q_pm_init();
  45. }
  46. static void __init imx6q_map_io(void)
  47. {
  48. imx_lluart_map_io();
  49. imx_scu_map_io();
  50. imx6q_clock_map_io();
  51. }
  52. static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
  53. struct device_node *interrupt_parent)
  54. {
  55. static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
  56. gpio_irq_base -= 32;
  57. irq_domain_add_simple(np, gpio_irq_base);
  58. return 0;
  59. }
  60. static const struct of_device_id imx6q_irq_match[] __initconst = {
  61. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  62. { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
  63. { /* sentinel */ }
  64. };
  65. static void __init imx6q_init_irq(void)
  66. {
  67. l2x0_of_init(0, ~0UL);
  68. imx_src_init();
  69. imx_gpc_init();
  70. of_irq_init(imx6q_irq_match);
  71. }
  72. static void __init imx6q_timer_init(void)
  73. {
  74. mx6q_clocks_init();
  75. }
  76. static struct sys_timer imx6q_timer = {
  77. .init = imx6q_timer_init,
  78. };
  79. static const char *imx6q_dt_compat[] __initdata = {
  80. "fsl,imx6q-arm2",
  81. "fsl,imx6q-sabrelite",
  82. NULL,
  83. };
  84. DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
  85. .map_io = imx6q_map_io,
  86. .init_irq = imx6q_init_irq,
  87. .handle_irq = imx6q_handle_irq,
  88. .timer = &imx6q_timer,
  89. .init_machine = imx6q_init_machine,
  90. .dt_compat = imx6q_dt_compat,
  91. MACHINE_END