display.h 16 KB

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  1. /*
  2. * linux/include/asm-arm/arch-omap/display.h
  3. *
  4. * Copyright (C) 2008 Nokia Corporation
  5. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __ASM_ARCH_OMAP_DISPLAY_H
  20. #define __ASM_ARCH_OMAP_DISPLAY_H
  21. #include <linux/list.h>
  22. #include <linux/kobject.h>
  23. #include <linux/device.h>
  24. #include <linux/platform_device.h>
  25. #include <asm/atomic.h>
  26. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  27. #define DISPC_IRQ_VSYNC (1 << 1)
  28. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  29. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  30. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  31. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  32. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  33. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  34. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  35. #define DISPC_IRQ_OCP_ERR (1 << 9)
  36. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  37. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  38. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  39. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  40. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  41. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  42. #define DISPC_IRQ_WAKEUP (1 << 16)
  43. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  44. #define DISPC_IRQ_VSYNC2 (1 << 18)
  45. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  46. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  47. struct omap_dss_device;
  48. struct omap_overlay_manager;
  49. enum omap_display_type {
  50. OMAP_DISPLAY_TYPE_NONE = 0,
  51. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  52. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  53. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  54. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  55. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  56. };
  57. enum omap_plane {
  58. OMAP_DSS_GFX = 0,
  59. OMAP_DSS_VIDEO1 = 1,
  60. OMAP_DSS_VIDEO2 = 2
  61. };
  62. enum omap_channel {
  63. OMAP_DSS_CHANNEL_LCD = 0,
  64. OMAP_DSS_CHANNEL_DIGIT = 1,
  65. OMAP_DSS_CHANNEL_LCD2 = 2,
  66. };
  67. enum omap_color_mode {
  68. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  69. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  70. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  71. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  72. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  73. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  74. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  75. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  76. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  77. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  78. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  79. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  80. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  81. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  82. };
  83. enum omap_lcd_display_type {
  84. OMAP_DSS_LCD_DISPLAY_STN,
  85. OMAP_DSS_LCD_DISPLAY_TFT,
  86. };
  87. enum omap_dss_load_mode {
  88. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  89. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  90. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  91. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  92. };
  93. enum omap_dss_trans_key_type {
  94. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  95. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  96. };
  97. enum omap_rfbi_te_mode {
  98. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  99. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  100. };
  101. enum omap_panel_config {
  102. OMAP_DSS_LCD_IVS = 1<<0,
  103. OMAP_DSS_LCD_IHS = 1<<1,
  104. OMAP_DSS_LCD_IPC = 1<<2,
  105. OMAP_DSS_LCD_IEO = 1<<3,
  106. OMAP_DSS_LCD_RF = 1<<4,
  107. OMAP_DSS_LCD_ONOFF = 1<<5,
  108. OMAP_DSS_LCD_TFT = 1<<20,
  109. };
  110. enum omap_dss_venc_type {
  111. OMAP_DSS_VENC_TYPE_COMPOSITE,
  112. OMAP_DSS_VENC_TYPE_SVIDEO,
  113. };
  114. enum omap_display_caps {
  115. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  116. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  117. };
  118. enum omap_dss_update_mode {
  119. OMAP_DSS_UPDATE_DISABLED = 0,
  120. OMAP_DSS_UPDATE_AUTO,
  121. OMAP_DSS_UPDATE_MANUAL,
  122. };
  123. enum omap_dss_display_state {
  124. OMAP_DSS_DISPLAY_DISABLED = 0,
  125. OMAP_DSS_DISPLAY_ACTIVE,
  126. OMAP_DSS_DISPLAY_SUSPENDED,
  127. };
  128. /* XXX perhaps this should be removed */
  129. enum omap_dss_overlay_managers {
  130. OMAP_DSS_OVL_MGR_LCD,
  131. OMAP_DSS_OVL_MGR_TV,
  132. OMAP_DSS_OVL_MGR_LCD2,
  133. };
  134. enum omap_dss_rotation_type {
  135. OMAP_DSS_ROT_DMA = 0,
  136. OMAP_DSS_ROT_VRFB = 1,
  137. };
  138. /* clockwise rotation angle */
  139. enum omap_dss_rotation_angle {
  140. OMAP_DSS_ROT_0 = 0,
  141. OMAP_DSS_ROT_90 = 1,
  142. OMAP_DSS_ROT_180 = 2,
  143. OMAP_DSS_ROT_270 = 3,
  144. };
  145. enum omap_overlay_caps {
  146. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  147. OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
  148. };
  149. enum omap_overlay_manager_caps {
  150. OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
  151. };
  152. /* RFBI */
  153. struct rfbi_timings {
  154. int cs_on_time;
  155. int cs_off_time;
  156. int we_on_time;
  157. int we_off_time;
  158. int re_on_time;
  159. int re_off_time;
  160. int we_cycle_time;
  161. int re_cycle_time;
  162. int cs_pulse_width;
  163. int access_time;
  164. int clk_div;
  165. u32 tim[5]; /* set by rfbi_convert_timings() */
  166. int converted;
  167. };
  168. void omap_rfbi_write_command(const void *buf, u32 len);
  169. void omap_rfbi_read_data(void *buf, u32 len);
  170. void omap_rfbi_write_data(const void *buf, u32 len);
  171. void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
  172. u16 x, u16 y,
  173. u16 w, u16 h);
  174. int omap_rfbi_enable_te(bool enable, unsigned line);
  175. int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
  176. unsigned hs_pulse_time, unsigned vs_pulse_time,
  177. int hs_pol_inv, int vs_pol_inv, int extif_div);
  178. /* DSI */
  179. void dsi_bus_lock(void);
  180. void dsi_bus_unlock(void);
  181. int dsi_vc_dcs_write(int channel, u8 *data, int len);
  182. int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
  183. int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
  184. int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
  185. int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
  186. int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
  187. int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
  188. int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
  189. int dsi_vc_send_null(int channel);
  190. int dsi_vc_send_bta_sync(int channel);
  191. /* Board specific data */
  192. struct omap_dss_board_info {
  193. int (*get_last_off_on_transaction_id)(struct device *dev);
  194. int num_devices;
  195. struct omap_dss_device **devices;
  196. struct omap_dss_device *default_device;
  197. };
  198. #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
  199. /* Init with the board info */
  200. extern int omap_display_init(struct omap_dss_board_info *board_data);
  201. #else
  202. static inline int omap_display_init(struct omap_dss_board_info *board_data)
  203. {
  204. return 0;
  205. }
  206. #endif
  207. struct omap_display_platform_data {
  208. struct omap_dss_board_info *board_data;
  209. /* TODO: Additional members to be added when PM is considered */
  210. bool (*opt_clock_available)(const char *clk_role);
  211. };
  212. struct omap_video_timings {
  213. /* Unit: pixels */
  214. u16 x_res;
  215. /* Unit: pixels */
  216. u16 y_res;
  217. /* Unit: KHz */
  218. u32 pixel_clock;
  219. /* Unit: pixel clocks */
  220. u16 hsw; /* Horizontal synchronization pulse width */
  221. /* Unit: pixel clocks */
  222. u16 hfp; /* Horizontal front porch */
  223. /* Unit: pixel clocks */
  224. u16 hbp; /* Horizontal back porch */
  225. /* Unit: line clocks */
  226. u16 vsw; /* Vertical synchronization pulse width */
  227. /* Unit: line clocks */
  228. u16 vfp; /* Vertical front porch */
  229. /* Unit: line clocks */
  230. u16 vbp; /* Vertical back porch */
  231. };
  232. #ifdef CONFIG_OMAP2_DSS_VENC
  233. /* Hardcoded timings for tv modes. Venc only uses these to
  234. * identify the mode, and does not actually use the configs
  235. * itself. However, the configs should be something that
  236. * a normal monitor can also show */
  237. extern const struct omap_video_timings omap_dss_pal_timings;
  238. extern const struct omap_video_timings omap_dss_ntsc_timings;
  239. #endif
  240. struct omap_overlay_info {
  241. bool enabled;
  242. u32 paddr;
  243. void __iomem *vaddr;
  244. u16 screen_width;
  245. u16 width;
  246. u16 height;
  247. enum omap_color_mode color_mode;
  248. u8 rotation;
  249. enum omap_dss_rotation_type rotation_type;
  250. bool mirror;
  251. u16 pos_x;
  252. u16 pos_y;
  253. u16 out_width; /* if 0, out_width == width */
  254. u16 out_height; /* if 0, out_height == height */
  255. u8 global_alpha;
  256. u8 pre_mult_alpha;
  257. };
  258. struct omap_overlay {
  259. struct kobject kobj;
  260. struct list_head list;
  261. /* static fields */
  262. const char *name;
  263. int id;
  264. enum omap_color_mode supported_modes;
  265. enum omap_overlay_caps caps;
  266. /* dynamic fields */
  267. struct omap_overlay_manager *manager;
  268. struct omap_overlay_info info;
  269. /* if true, info has been changed, but not applied() yet */
  270. bool info_dirty;
  271. int (*set_manager)(struct omap_overlay *ovl,
  272. struct omap_overlay_manager *mgr);
  273. int (*unset_manager)(struct omap_overlay *ovl);
  274. int (*set_overlay_info)(struct omap_overlay *ovl,
  275. struct omap_overlay_info *info);
  276. void (*get_overlay_info)(struct omap_overlay *ovl,
  277. struct omap_overlay_info *info);
  278. int (*wait_for_go)(struct omap_overlay *ovl);
  279. };
  280. struct omap_overlay_manager_info {
  281. u32 default_color;
  282. enum omap_dss_trans_key_type trans_key_type;
  283. u32 trans_key;
  284. bool trans_enabled;
  285. bool alpha_enabled;
  286. };
  287. struct omap_overlay_manager {
  288. struct kobject kobj;
  289. struct list_head list;
  290. /* static fields */
  291. const char *name;
  292. int id;
  293. enum omap_overlay_manager_caps caps;
  294. int num_overlays;
  295. struct omap_overlay **overlays;
  296. enum omap_display_type supported_displays;
  297. /* dynamic fields */
  298. struct omap_dss_device *device;
  299. struct omap_overlay_manager_info info;
  300. bool device_changed;
  301. /* if true, info has been changed but not applied() yet */
  302. bool info_dirty;
  303. int (*set_device)(struct omap_overlay_manager *mgr,
  304. struct omap_dss_device *dssdev);
  305. int (*unset_device)(struct omap_overlay_manager *mgr);
  306. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  307. struct omap_overlay_manager_info *info);
  308. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  309. struct omap_overlay_manager_info *info);
  310. int (*apply)(struct omap_overlay_manager *mgr);
  311. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  312. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  313. int (*enable)(struct omap_overlay_manager *mgr);
  314. int (*disable)(struct omap_overlay_manager *mgr);
  315. };
  316. struct omap_dss_device {
  317. struct device dev;
  318. enum omap_display_type type;
  319. enum omap_channel channel;
  320. union {
  321. struct {
  322. u8 data_lines;
  323. } dpi;
  324. struct {
  325. u8 channel;
  326. u8 data_lines;
  327. } rfbi;
  328. struct {
  329. u8 datapairs;
  330. } sdi;
  331. struct {
  332. u8 clk_lane;
  333. u8 clk_pol;
  334. u8 data1_lane;
  335. u8 data1_pol;
  336. u8 data2_lane;
  337. u8 data2_pol;
  338. struct {
  339. u16 regn;
  340. u16 regm;
  341. u16 regm_dispc;
  342. u16 regm_dsi;
  343. u16 lp_clk_div;
  344. u16 lck_div;
  345. u16 pck_div;
  346. } div;
  347. bool ext_te;
  348. u8 ext_te_gpio;
  349. } dsi;
  350. struct {
  351. enum omap_dss_venc_type type;
  352. bool invert_polarity;
  353. } venc;
  354. } phy;
  355. struct {
  356. struct omap_video_timings timings;
  357. int acbi; /* ac-bias pin transitions per interrupt */
  358. /* Unit: line clocks */
  359. int acb; /* ac-bias pin frequency */
  360. enum omap_panel_config config;
  361. } panel;
  362. struct {
  363. u8 pixel_size;
  364. struct rfbi_timings rfbi_timings;
  365. } ctrl;
  366. int reset_gpio;
  367. int max_backlight_level;
  368. const char *name;
  369. /* used to match device to driver */
  370. const char *driver_name;
  371. void *data;
  372. struct omap_dss_driver *driver;
  373. /* helper variable for driver suspend/resume */
  374. bool activate_after_resume;
  375. enum omap_display_caps caps;
  376. struct omap_overlay_manager *manager;
  377. enum omap_dss_display_state state;
  378. /* platform specific */
  379. int (*platform_enable)(struct omap_dss_device *dssdev);
  380. void (*platform_disable)(struct omap_dss_device *dssdev);
  381. int (*set_backlight)(struct omap_dss_device *dssdev, int level);
  382. int (*get_backlight)(struct omap_dss_device *dssdev);
  383. };
  384. struct omap_dss_driver {
  385. struct device_driver driver;
  386. int (*probe)(struct omap_dss_device *);
  387. void (*remove)(struct omap_dss_device *);
  388. int (*enable)(struct omap_dss_device *display);
  389. void (*disable)(struct omap_dss_device *display);
  390. int (*suspend)(struct omap_dss_device *display);
  391. int (*resume)(struct omap_dss_device *display);
  392. int (*run_test)(struct omap_dss_device *display, int test);
  393. int (*set_update_mode)(struct omap_dss_device *dssdev,
  394. enum omap_dss_update_mode);
  395. enum omap_dss_update_mode (*get_update_mode)(
  396. struct omap_dss_device *dssdev);
  397. int (*update)(struct omap_dss_device *dssdev,
  398. u16 x, u16 y, u16 w, u16 h);
  399. int (*sync)(struct omap_dss_device *dssdev);
  400. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  401. int (*get_te)(struct omap_dss_device *dssdev);
  402. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  403. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  404. bool (*get_mirror)(struct omap_dss_device *dssdev);
  405. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  406. int (*memory_read)(struct omap_dss_device *dssdev,
  407. void *buf, size_t size,
  408. u16 x, u16 y, u16 w, u16 h);
  409. void (*get_resolution)(struct omap_dss_device *dssdev,
  410. u16 *xres, u16 *yres);
  411. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  412. int (*check_timings)(struct omap_dss_device *dssdev,
  413. struct omap_video_timings *timings);
  414. void (*set_timings)(struct omap_dss_device *dssdev,
  415. struct omap_video_timings *timings);
  416. void (*get_timings)(struct omap_dss_device *dssdev,
  417. struct omap_video_timings *timings);
  418. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  419. u32 (*get_wss)(struct omap_dss_device *dssdev);
  420. };
  421. int omap_dss_register_driver(struct omap_dss_driver *);
  422. void omap_dss_unregister_driver(struct omap_dss_driver *);
  423. int omap_dss_register_device(struct omap_dss_device *);
  424. void omap_dss_unregister_device(struct omap_dss_device *);
  425. void omap_dss_get_device(struct omap_dss_device *dssdev);
  426. void omap_dss_put_device(struct omap_dss_device *dssdev);
  427. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  428. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  429. struct omap_dss_device *omap_dss_find_device(void *data,
  430. int (*match)(struct omap_dss_device *dssdev, void *data));
  431. int omap_dss_start_device(struct omap_dss_device *dssdev);
  432. void omap_dss_stop_device(struct omap_dss_device *dssdev);
  433. int omap_dss_get_num_overlay_managers(void);
  434. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  435. int omap_dss_get_num_overlays(void);
  436. struct omap_overlay *omap_dss_get_overlay(int num);
  437. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  438. u16 *xres, u16 *yres);
  439. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  440. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  441. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  442. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  443. int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
  444. int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
  445. unsigned long timeout);
  446. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  447. #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
  448. void omapdss_dsi_vc_enable_hs(int channel, bool enable);
  449. int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
  450. int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
  451. u16 *x, u16 *y, u16 *w, u16 *h,
  452. bool enlarge_update_area);
  453. int omap_dsi_update(struct omap_dss_device *dssdev,
  454. int channel,
  455. u16 x, u16 y, u16 w, u16 h,
  456. void (*callback)(int, void *), void *data);
  457. int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
  458. void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
  459. int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
  460. void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
  461. void dpi_set_timings(struct omap_dss_device *dssdev,
  462. struct omap_video_timings *timings);
  463. int dpi_check_timings(struct omap_dss_device *dssdev,
  464. struct omap_video_timings *timings);
  465. int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
  466. void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
  467. int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
  468. void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
  469. int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
  470. u16 *x, u16 *y, u16 *w, u16 *h);
  471. int omap_rfbi_update(struct omap_dss_device *dssdev,
  472. u16 x, u16 y, u16 w, u16 h,
  473. void (*callback)(void *), void *data);
  474. #endif