setup.c 15 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/config.h>
  19. #include <linux/cpu.h>
  20. #include <linux/errno.h>
  21. #include <linux/sched.h>
  22. #include <linux/kernel.h>
  23. #include <linux/mm.h>
  24. #include <linux/stddef.h>
  25. #include <linux/unistd.h>
  26. #include <linux/slab.h>
  27. #include <linux/user.h>
  28. #include <linux/a.out.h>
  29. #include <linux/tty.h>
  30. #include <linux/major.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/reboot.h>
  33. #include <linux/init.h>
  34. #include <linux/ioport.h>
  35. #include <linux/console.h>
  36. #include <linux/pci.h>
  37. #include <linux/utsname.h>
  38. #include <linux/adb.h>
  39. #include <linux/module.h>
  40. #include <linux/delay.h>
  41. #include <linux/irq.h>
  42. #include <linux/seq_file.h>
  43. #include <linux/root_dev.h>
  44. #include <asm/mmu.h>
  45. #include <asm/processor.h>
  46. #include <asm/io.h>
  47. #include <asm/pgtable.h>
  48. #include <asm/prom.h>
  49. #include <asm/rtas.h>
  50. #include <asm/pci-bridge.h>
  51. #include <asm/iommu.h>
  52. #include <asm/dma.h>
  53. #include <asm/machdep.h>
  54. #include <asm/irq.h>
  55. #include <asm/time.h>
  56. #include <asm/nvram.h>
  57. #include "xics.h"
  58. #include <asm/firmware.h>
  59. #include <asm/pmc.h>
  60. #include <asm/mpic.h>
  61. #include <asm/ppc-pci.h>
  62. #include <asm/i8259.h>
  63. #include <asm/udbg.h>
  64. #include <asm/smp.h>
  65. #include "plpar_wrappers.h"
  66. #ifdef DEBUG
  67. #define DBG(fmt...) udbg_printf(fmt)
  68. #else
  69. #define DBG(fmt...)
  70. #endif
  71. extern void find_udbg_vterm(void);
  72. extern void system_reset_fwnmi(void); /* from head.S */
  73. extern void machine_check_fwnmi(void); /* from head.S */
  74. extern void generic_find_legacy_serial_ports(u64 *physport,
  75. unsigned int *default_speed);
  76. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  77. extern void pSeries_system_reset_exception(struct pt_regs *regs);
  78. extern int pSeries_machine_check_exception(struct pt_regs *regs);
  79. static void pseries_shared_idle(void);
  80. static void pseries_dedicated_idle(void);
  81. struct mpic *pSeries_mpic;
  82. void pSeries_show_cpuinfo(struct seq_file *m)
  83. {
  84. struct device_node *root;
  85. const char *model = "";
  86. root = of_find_node_by_path("/");
  87. if (root)
  88. model = get_property(root, "model", NULL);
  89. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  90. of_node_put(root);
  91. }
  92. /* Initialize firmware assisted non-maskable interrupts if
  93. * the firmware supports this feature.
  94. *
  95. */
  96. static void __init fwnmi_init(void)
  97. {
  98. int ret;
  99. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  100. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  101. return;
  102. ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
  103. __pa((unsigned long)system_reset_fwnmi),
  104. __pa((unsigned long)machine_check_fwnmi));
  105. if (ret == 0)
  106. fwnmi_active = 1;
  107. }
  108. static void __init pSeries_init_mpic(void)
  109. {
  110. unsigned int *addrp;
  111. struct device_node *np;
  112. unsigned long intack = 0;
  113. /* All ISUs are setup, complete initialization */
  114. mpic_init(pSeries_mpic);
  115. /* Check what kind of cascade ACK we have */
  116. if (!(np = of_find_node_by_name(NULL, "pci"))
  117. || !(addrp = (unsigned int *)
  118. get_property(np, "8259-interrupt-acknowledge", NULL)))
  119. printk(KERN_ERR "Cannot find pci to get ack address\n");
  120. else
  121. intack = addrp[prom_n_addr_cells(np)-1];
  122. of_node_put(np);
  123. /* Setup the legacy interrupts & controller */
  124. i8259_init(intack, 0);
  125. /* Hook cascade to mpic */
  126. mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
  127. }
  128. static void __init pSeries_setup_mpic(void)
  129. {
  130. unsigned int *opprop;
  131. unsigned long openpic_addr = 0;
  132. unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
  133. struct device_node *root;
  134. int irq_count;
  135. /* Find the Open PIC if present */
  136. root = of_find_node_by_path("/");
  137. opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
  138. if (opprop != 0) {
  139. int n = prom_n_addr_cells(root);
  140. for (openpic_addr = 0; n > 0; --n)
  141. openpic_addr = (openpic_addr << 32) + *opprop++;
  142. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  143. }
  144. of_node_put(root);
  145. BUG_ON(openpic_addr == 0);
  146. /* Get the sense values from OF */
  147. prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
  148. /* Setup the openpic driver */
  149. irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
  150. pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
  151. 16, 16, irq_count, /* isu size, irq offset, irq count */
  152. NR_IRQS - 4, /* ipi offset */
  153. senses, irq_count, /* sense & sense size */
  154. " MPIC ");
  155. }
  156. static void pseries_lpar_enable_pmcs(void)
  157. {
  158. unsigned long set, reset;
  159. power4_enable_pmcs();
  160. set = 1UL << 63;
  161. reset = 0;
  162. plpar_hcall_norets(H_PERFMON, set, reset);
  163. /* instruct hypervisor to maintain PMCs */
  164. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  165. get_paca()->lppaca.pmcregs_in_use = 1;
  166. }
  167. static void __init pSeries_setup_arch(void)
  168. {
  169. /* Fixup ppc_md depending on the type of interrupt controller */
  170. if (ppc64_interrupt_controller == IC_OPEN_PIC) {
  171. ppc_md.init_IRQ = pSeries_init_mpic;
  172. ppc_md.get_irq = mpic_get_irq;
  173. ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
  174. /* Allocate the mpic now, so that find_and_init_phbs() can
  175. * fill the ISUs */
  176. pSeries_setup_mpic();
  177. } else {
  178. ppc_md.init_IRQ = xics_init_IRQ;
  179. ppc_md.get_irq = xics_get_irq;
  180. ppc_md.cpu_irq_down = xics_teardown_cpu;
  181. }
  182. #ifdef CONFIG_SMP
  183. smp_init_pSeries();
  184. #endif
  185. /* openpic global configuration register (64-bit format). */
  186. /* openpic Interrupt Source Unit pointer (64-bit format). */
  187. /* python0 facility area (mmio) (64-bit format) REAL address. */
  188. /* init to some ~sane value until calibrate_delay() runs */
  189. loops_per_jiffy = 50000000;
  190. if (ROOT_DEV == 0) {
  191. printk("No ramdisk, default root is /dev/sda2\n");
  192. ROOT_DEV = Root_SDA2;
  193. }
  194. fwnmi_init();
  195. /* Find and initialize PCI host bridges */
  196. init_pci_config_tokens();
  197. find_and_init_phbs();
  198. eeh_init();
  199. pSeries_nvram_init();
  200. /* Choose an idle loop */
  201. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  202. vpa_init(boot_cpuid);
  203. if (get_paca()->lppaca.shared_proc) {
  204. printk(KERN_INFO "Using shared processor idle loop\n");
  205. ppc_md.idle_loop = pseries_shared_idle;
  206. } else {
  207. printk(KERN_INFO "Using dedicated idle loop\n");
  208. ppc_md.idle_loop = pseries_dedicated_idle;
  209. }
  210. } else {
  211. printk(KERN_INFO "Using default idle loop\n");
  212. ppc_md.idle_loop = default_idle;
  213. }
  214. if (platform_is_lpar())
  215. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  216. else
  217. ppc_md.enable_pmcs = power4_enable_pmcs;
  218. }
  219. static int __init pSeries_init_panel(void)
  220. {
  221. /* Manually leave the kernel version on the panel. */
  222. ppc_md.progress("Linux ppc64\n", 0);
  223. ppc_md.progress(system_utsname.version, 0);
  224. return 0;
  225. }
  226. arch_initcall(pSeries_init_panel);
  227. /* Build up the ppc64_firmware_features bitmask field
  228. * using contents of device-tree/ibm,hypertas-functions.
  229. * Ultimately this functionality may be moved into prom.c prom_init().
  230. */
  231. static void __init fw_feature_init(void)
  232. {
  233. struct device_node * dn;
  234. char * hypertas;
  235. unsigned int len;
  236. DBG(" -> fw_feature_init()\n");
  237. ppc64_firmware_features = 0;
  238. dn = of_find_node_by_path("/rtas");
  239. if (dn == NULL) {
  240. printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
  241. goto no_rtas;
  242. }
  243. hypertas = get_property(dn, "ibm,hypertas-functions", &len);
  244. if (hypertas) {
  245. while (len > 0){
  246. int i, hypertas_len;
  247. /* check value against table of strings */
  248. for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
  249. if ((firmware_features_table[i].name) &&
  250. (strcmp(firmware_features_table[i].name,hypertas))==0) {
  251. /* we have a match */
  252. ppc64_firmware_features |=
  253. (firmware_features_table[i].val);
  254. break;
  255. }
  256. }
  257. hypertas_len = strlen(hypertas);
  258. len -= hypertas_len +1;
  259. hypertas+= hypertas_len +1;
  260. }
  261. }
  262. of_node_put(dn);
  263. no_rtas:
  264. DBG(" <- fw_feature_init()\n");
  265. }
  266. static void __init pSeries_discover_pic(void)
  267. {
  268. struct device_node *np;
  269. char *typep;
  270. /*
  271. * Setup interrupt mapping options that are needed for finish_device_tree
  272. * to properly parse the OF interrupt tree & do the virtual irq mapping
  273. */
  274. __irq_offset_value = NUM_ISA_INTERRUPTS;
  275. ppc64_interrupt_controller = IC_INVALID;
  276. for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
  277. typep = (char *)get_property(np, "compatible", NULL);
  278. if (strstr(typep, "open-pic"))
  279. ppc64_interrupt_controller = IC_OPEN_PIC;
  280. else if (strstr(typep, "ppc-xicp"))
  281. ppc64_interrupt_controller = IC_PPC_XIC;
  282. else
  283. printk("pSeries_discover_pic: failed to recognize"
  284. " interrupt-controller\n");
  285. break;
  286. }
  287. }
  288. static void pSeries_mach_cpu_die(void)
  289. {
  290. local_irq_disable();
  291. idle_task_exit();
  292. /* Some hardware requires clearing the CPPR, while other hardware does not
  293. * it is safe either way
  294. */
  295. pSeriesLP_cppr_info(0, 0);
  296. rtas_stop_self();
  297. /* Should never get here... */
  298. BUG();
  299. for(;;);
  300. }
  301. static int pseries_set_dabr(unsigned long dabr)
  302. {
  303. return plpar_hcall_norets(H_SET_DABR, dabr);
  304. }
  305. static int pseries_set_xdabr(unsigned long dabr)
  306. {
  307. /* We want to catch accesses from kernel and userspace */
  308. return plpar_hcall_norets(H_SET_XDABR, dabr,
  309. H_DABRX_KERNEL | H_DABRX_USER);
  310. }
  311. /*
  312. * Early initialization. Relocation is on but do not reference unbolted pages
  313. */
  314. static void __init pSeries_init_early(void)
  315. {
  316. void *comport;
  317. int iommu_off = 0;
  318. unsigned int default_speed;
  319. u64 physport;
  320. DBG(" -> pSeries_init_early()\n");
  321. fw_feature_init();
  322. if (platform_is_lpar())
  323. hpte_init_lpar();
  324. else {
  325. hpte_init_native();
  326. iommu_off = (of_chosen &&
  327. get_property(of_chosen, "linux,iommu-off", NULL));
  328. }
  329. generic_find_legacy_serial_ports(&physport, &default_speed);
  330. if (platform_is_lpar())
  331. find_udbg_vterm();
  332. else if (physport) {
  333. /* Map the uart for udbg. */
  334. comport = (void *)ioremap(physport, 16);
  335. udbg_init_uart(comport, default_speed);
  336. DBG("Hello World !\n");
  337. }
  338. if (firmware_has_feature(FW_FEATURE_DABR))
  339. ppc_md.set_dabr = pseries_set_dabr;
  340. else if (firmware_has_feature(FW_FEATURE_XDABR))
  341. ppc_md.set_dabr = pseries_set_xdabr;
  342. iommu_init_early_pSeries();
  343. pSeries_discover_pic();
  344. DBG(" <- pSeries_init_early()\n");
  345. }
  346. static int pSeries_check_legacy_ioport(unsigned int baseport)
  347. {
  348. struct device_node *np;
  349. #define I8042_DATA_REG 0x60
  350. #define FDC_BASE 0x3f0
  351. switch(baseport) {
  352. case I8042_DATA_REG:
  353. np = of_find_node_by_type(NULL, "8042");
  354. if (np == NULL)
  355. return -ENODEV;
  356. of_node_put(np);
  357. break;
  358. case FDC_BASE:
  359. np = of_find_node_by_type(NULL, "fdc");
  360. if (np == NULL)
  361. return -ENODEV;
  362. of_node_put(np);
  363. break;
  364. }
  365. return 0;
  366. }
  367. /*
  368. * Called very early, MMU is off, device-tree isn't unflattened
  369. */
  370. extern struct machdep_calls pSeries_md;
  371. static int __init pSeries_probe(int platform)
  372. {
  373. if (platform != PLATFORM_PSERIES &&
  374. platform != PLATFORM_PSERIES_LPAR)
  375. return 0;
  376. /* if we have some ppc_md fixups for LPAR to do, do
  377. * it here ...
  378. */
  379. return 1;
  380. }
  381. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  382. static inline void dedicated_idle_sleep(unsigned int cpu)
  383. {
  384. struct paca_struct *ppaca = &paca[cpu ^ 1];
  385. /* Only sleep if the other thread is not idle */
  386. if (!(ppaca->lppaca.idle)) {
  387. local_irq_disable();
  388. /*
  389. * We are about to sleep the thread and so wont be polling any
  390. * more.
  391. */
  392. clear_thread_flag(TIF_POLLING_NRFLAG);
  393. smp_mb__after_clear_bit();
  394. /*
  395. * SMT dynamic mode. Cede will result in this thread going
  396. * dormant, if the partner thread is still doing work. Thread
  397. * wakes up if partner goes idle, an interrupt is presented, or
  398. * a prod occurs. Returning from the cede enables external
  399. * interrupts.
  400. */
  401. if (!need_resched())
  402. cede_processor();
  403. else
  404. local_irq_enable();
  405. set_thread_flag(TIF_POLLING_NRFLAG);
  406. } else {
  407. /*
  408. * Give the HV an opportunity at the processor, since we are
  409. * not doing any work.
  410. */
  411. poll_pending();
  412. }
  413. }
  414. static void pseries_dedicated_idle(void)
  415. {
  416. struct paca_struct *lpaca = get_paca();
  417. unsigned int cpu = smp_processor_id();
  418. unsigned long start_snooze;
  419. unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
  420. set_thread_flag(TIF_POLLING_NRFLAG);
  421. while (1) {
  422. /*
  423. * Indicate to the HV that we are idle. Now would be
  424. * a good time to find other work to dispatch.
  425. */
  426. lpaca->lppaca.idle = 1;
  427. if (!need_resched()) {
  428. start_snooze = __get_tb() +
  429. *smt_snooze_delay * tb_ticks_per_usec;
  430. while (!need_resched() && !cpu_is_offline(cpu)) {
  431. ppc64_runlatch_off();
  432. /*
  433. * Go into low thread priority and possibly
  434. * low power mode.
  435. */
  436. HMT_low();
  437. HMT_very_low();
  438. if (*smt_snooze_delay != 0 &&
  439. __get_tb() > start_snooze) {
  440. HMT_medium();
  441. dedicated_idle_sleep(cpu);
  442. }
  443. }
  444. HMT_medium();
  445. }
  446. lpaca->lppaca.idle = 0;
  447. ppc64_runlatch_on();
  448. preempt_enable_no_resched();
  449. schedule();
  450. preempt_disable();
  451. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  452. cpu_die();
  453. }
  454. }
  455. static void pseries_shared_idle(void)
  456. {
  457. struct paca_struct *lpaca = get_paca();
  458. unsigned int cpu = smp_processor_id();
  459. while (1) {
  460. /*
  461. * Indicate to the HV that we are idle. Now would be
  462. * a good time to find other work to dispatch.
  463. */
  464. lpaca->lppaca.idle = 1;
  465. while (!need_resched() && !cpu_is_offline(cpu)) {
  466. local_irq_disable();
  467. ppc64_runlatch_off();
  468. /*
  469. * Yield the processor to the hypervisor. We return if
  470. * an external interrupt occurs (which are driven prior
  471. * to returning here) or if a prod occurs from another
  472. * processor. When returning here, external interrupts
  473. * are enabled.
  474. *
  475. * Check need_resched() again with interrupts disabled
  476. * to avoid a race.
  477. */
  478. if (!need_resched())
  479. cede_processor();
  480. else
  481. local_irq_enable();
  482. HMT_medium();
  483. }
  484. lpaca->lppaca.idle = 0;
  485. ppc64_runlatch_on();
  486. preempt_enable_no_resched();
  487. schedule();
  488. preempt_disable();
  489. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  490. cpu_die();
  491. }
  492. }
  493. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  494. {
  495. if (platform_is_lpar())
  496. return PCI_PROBE_DEVTREE;
  497. return PCI_PROBE_NORMAL;
  498. }
  499. struct machdep_calls __initdata pSeries_md = {
  500. .probe = pSeries_probe,
  501. .setup_arch = pSeries_setup_arch,
  502. .init_early = pSeries_init_early,
  503. .show_cpuinfo = pSeries_show_cpuinfo,
  504. .log_error = pSeries_log_error,
  505. .pcibios_fixup = pSeries_final_fixup,
  506. .pci_probe_mode = pSeries_pci_probe_mode,
  507. .irq_bus_setup = pSeries_irq_bus_setup,
  508. .restart = rtas_restart,
  509. .power_off = rtas_power_off,
  510. .halt = rtas_halt,
  511. .panic = rtas_os_term,
  512. .cpu_die = pSeries_mach_cpu_die,
  513. .get_boot_time = rtas_get_boot_time,
  514. .get_rtc_time = rtas_get_rtc_time,
  515. .set_rtc_time = rtas_set_rtc_time,
  516. .calibrate_decr = generic_calibrate_decr,
  517. .progress = rtas_progress,
  518. .check_legacy_ioport = pSeries_check_legacy_ioport,
  519. .system_reset_exception = pSeries_system_reset_exception,
  520. .machine_check_exception = pSeries_machine_check_exception,
  521. };