ixgb_main.c 55 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. /* Change Log
  22. * 1.0.88 01/05/05
  23. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  24. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  25. * 1.0.84 10/26/04
  26. * - reset buffer_info->dma in Tx resource cleanup logic
  27. * 1.0.83 10/12/04
  28. * - sparse cleanup - shemminger@osdl.org
  29. * - fix tx resource cleanup logic
  30. */
  31. char ixgb_driver_name[] = "ixgb";
  32. char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  33. #ifndef CONFIG_IXGB_NAPI
  34. #define DRIVERNAPI
  35. #else
  36. #define DRIVERNAPI "-NAPI"
  37. #endif
  38. char ixgb_driver_version[] = "1.0.95-k2"DRIVERNAPI;
  39. char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  40. /* ixgb_pci_tbl - PCI Device ID Table
  41. *
  42. * Wildcard entries (PCI_ANY_ID) should come last
  43. * Last entry must be all 0s
  44. *
  45. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  46. * Class, Class Mask, private data (not used) }
  47. */
  48. static struct pci_device_id ixgb_pci_tbl[] = {
  49. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  50. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  51. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  52. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  53. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  54. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  55. /* required last entry */
  56. {0,}
  57. };
  58. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  59. /* Local Function Prototypes */
  60. int ixgb_up(struct ixgb_adapter *adapter);
  61. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  62. void ixgb_reset(struct ixgb_adapter *adapter);
  63. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  64. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  65. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  66. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  67. void ixgb_update_stats(struct ixgb_adapter *adapter);
  68. static int ixgb_init_module(void);
  69. static void ixgb_exit_module(void);
  70. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  71. static void __devexit ixgb_remove(struct pci_dev *pdev);
  72. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  73. static int ixgb_open(struct net_device *netdev);
  74. static int ixgb_close(struct net_device *netdev);
  75. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  76. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  77. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  78. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  79. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  80. static void ixgb_set_multi(struct net_device *netdev);
  81. static void ixgb_watchdog(unsigned long data);
  82. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  83. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  84. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  85. static int ixgb_set_mac(struct net_device *netdev, void *p);
  86. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  87. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  88. #ifdef CONFIG_IXGB_NAPI
  89. static int ixgb_clean(struct net_device *netdev, int *budget);
  90. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  91. int *work_done, int work_to_do);
  92. #else
  93. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  94. #endif
  95. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  96. void ixgb_set_ethtool_ops(struct net_device *netdev);
  97. static void ixgb_tx_timeout(struct net_device *dev);
  98. static void ixgb_tx_timeout_task(struct net_device *dev);
  99. static void ixgb_vlan_rx_register(struct net_device *netdev,
  100. struct vlan_group *grp);
  101. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  102. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  103. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  104. #ifdef CONFIG_NET_POLL_CONTROLLER
  105. /* for netdump / net console */
  106. static void ixgb_netpoll(struct net_device *dev);
  107. #endif
  108. /* Exported from other modules */
  109. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  110. static struct pci_driver ixgb_driver = {
  111. .name = ixgb_driver_name,
  112. .id_table = ixgb_pci_tbl,
  113. .probe = ixgb_probe,
  114. .remove = __devexit_p(ixgb_remove),
  115. };
  116. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  117. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  118. MODULE_LICENSE("GPL");
  119. /* some defines for controlling descriptor fetches in h/w */
  120. #define RXDCTL_PTHRESH_DEFAULT 128 /* chip considers prefech below this */
  121. #define RXDCTL_HTHRESH_DEFAULT 16 /* chip will only prefetch if tail is
  122. pushed this many descriptors from head */
  123. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  124. /**
  125. * ixgb_init_module - Driver Registration Routine
  126. *
  127. * ixgb_init_module is the first routine called when the driver is
  128. * loaded. All it does is register with the PCI subsystem.
  129. **/
  130. static int __init
  131. ixgb_init_module(void)
  132. {
  133. printk(KERN_INFO "%s - version %s\n",
  134. ixgb_driver_string, ixgb_driver_version);
  135. printk(KERN_INFO "%s\n", ixgb_copyright);
  136. return pci_module_init(&ixgb_driver);
  137. }
  138. module_init(ixgb_init_module);
  139. /**
  140. * ixgb_exit_module - Driver Exit Cleanup Routine
  141. *
  142. * ixgb_exit_module is called just before the driver is removed
  143. * from memory.
  144. **/
  145. static void __exit
  146. ixgb_exit_module(void)
  147. {
  148. pci_unregister_driver(&ixgb_driver);
  149. }
  150. module_exit(ixgb_exit_module);
  151. /**
  152. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  153. * @adapter: board private structure
  154. **/
  155. static inline void
  156. ixgb_irq_disable(struct ixgb_adapter *adapter)
  157. {
  158. atomic_inc(&adapter->irq_sem);
  159. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  160. IXGB_WRITE_FLUSH(&adapter->hw);
  161. synchronize_irq(adapter->pdev->irq);
  162. }
  163. /**
  164. * ixgb_irq_enable - Enable default interrupt generation settings
  165. * @adapter: board private structure
  166. **/
  167. static inline void
  168. ixgb_irq_enable(struct ixgb_adapter *adapter)
  169. {
  170. if(atomic_dec_and_test(&adapter->irq_sem)) {
  171. IXGB_WRITE_REG(&adapter->hw, IMS,
  172. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  173. IXGB_INT_LSC);
  174. IXGB_WRITE_FLUSH(&adapter->hw);
  175. }
  176. }
  177. int
  178. ixgb_up(struct ixgb_adapter *adapter)
  179. {
  180. struct net_device *netdev = adapter->netdev;
  181. int err;
  182. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  183. struct ixgb_hw *hw = &adapter->hw;
  184. /* hardware has been reset, we need to reload some things */
  185. ixgb_set_multi(netdev);
  186. ixgb_restore_vlan(adapter);
  187. ixgb_configure_tx(adapter);
  188. ixgb_setup_rctl(adapter);
  189. ixgb_configure_rx(adapter);
  190. ixgb_alloc_rx_buffers(adapter);
  191. #ifdef CONFIG_PCI_MSI
  192. {
  193. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  194. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  195. adapter->have_msi = TRUE;
  196. if (!pcix)
  197. adapter->have_msi = FALSE;
  198. else if((err = pci_enable_msi(adapter->pdev))) {
  199. printk (KERN_ERR
  200. "Unable to allocate MSI interrupt Error: %d\n", err);
  201. adapter->have_msi = FALSE;
  202. /* proceed to try to request regular interrupt */
  203. }
  204. }
  205. #endif
  206. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  207. SA_SHIRQ | SA_SAMPLE_RANDOM,
  208. netdev->name, netdev)))
  209. return err;
  210. /* disable interrupts and get the hardware into a known state */
  211. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  212. if((hw->max_frame_size != max_frame) ||
  213. (hw->max_frame_size !=
  214. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  215. hw->max_frame_size = max_frame;
  216. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  217. if(hw->max_frame_size >
  218. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  219. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  220. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  221. ctrl0 |= IXGB_CTRL0_JFE;
  222. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  223. }
  224. }
  225. }
  226. mod_timer(&adapter->watchdog_timer, jiffies);
  227. ixgb_irq_enable(adapter);
  228. #ifdef CONFIG_IXGB_NAPI
  229. netif_poll_enable(netdev);
  230. #endif
  231. return 0;
  232. }
  233. void
  234. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  235. {
  236. struct net_device *netdev = adapter->netdev;
  237. ixgb_irq_disable(adapter);
  238. free_irq(adapter->pdev->irq, netdev);
  239. #ifdef CONFIG_PCI_MSI
  240. if(adapter->have_msi == TRUE)
  241. pci_disable_msi(adapter->pdev);
  242. #endif
  243. if(kill_watchdog)
  244. del_timer_sync(&adapter->watchdog_timer);
  245. #ifdef CONFIG_IXGB_NAPI
  246. netif_poll_disable(netdev);
  247. #endif
  248. adapter->link_speed = 0;
  249. adapter->link_duplex = 0;
  250. netif_carrier_off(netdev);
  251. netif_stop_queue(netdev);
  252. ixgb_reset(adapter);
  253. ixgb_clean_tx_ring(adapter);
  254. ixgb_clean_rx_ring(adapter);
  255. }
  256. void
  257. ixgb_reset(struct ixgb_adapter *adapter)
  258. {
  259. ixgb_adapter_stop(&adapter->hw);
  260. if(!ixgb_init_hw(&adapter->hw))
  261. IXGB_DBG("ixgb_init_hw failed.\n");
  262. }
  263. /**
  264. * ixgb_probe - Device Initialization Routine
  265. * @pdev: PCI device information struct
  266. * @ent: entry in ixgb_pci_tbl
  267. *
  268. * Returns 0 on success, negative on failure
  269. *
  270. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  271. * The OS initialization, configuring of the adapter private structure,
  272. * and a hardware reset occur.
  273. **/
  274. static int __devinit
  275. ixgb_probe(struct pci_dev *pdev,
  276. const struct pci_device_id *ent)
  277. {
  278. struct net_device *netdev = NULL;
  279. struct ixgb_adapter *adapter;
  280. static int cards_found = 0;
  281. unsigned long mmio_start;
  282. int mmio_len;
  283. int pci_using_dac;
  284. int i;
  285. int err;
  286. if((err = pci_enable_device(pdev)))
  287. return err;
  288. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  289. pci_using_dac = 1;
  290. } else {
  291. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  292. IXGB_ERR("No usable DMA configuration, aborting\n");
  293. return err;
  294. }
  295. pci_using_dac = 0;
  296. }
  297. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  298. return err;
  299. pci_set_master(pdev);
  300. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  301. if(!netdev) {
  302. err = -ENOMEM;
  303. goto err_alloc_etherdev;
  304. }
  305. SET_MODULE_OWNER(netdev);
  306. SET_NETDEV_DEV(netdev, &pdev->dev);
  307. pci_set_drvdata(pdev, netdev);
  308. adapter = netdev->priv;
  309. adapter->netdev = netdev;
  310. adapter->pdev = pdev;
  311. adapter->hw.back = adapter;
  312. mmio_start = pci_resource_start(pdev, BAR_0);
  313. mmio_len = pci_resource_len(pdev, BAR_0);
  314. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  315. if(!adapter->hw.hw_addr) {
  316. err = -EIO;
  317. goto err_ioremap;
  318. }
  319. for(i = BAR_1; i <= BAR_5; i++) {
  320. if(pci_resource_len(pdev, i) == 0)
  321. continue;
  322. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  323. adapter->hw.io_base = pci_resource_start(pdev, i);
  324. break;
  325. }
  326. }
  327. netdev->open = &ixgb_open;
  328. netdev->stop = &ixgb_close;
  329. netdev->hard_start_xmit = &ixgb_xmit_frame;
  330. netdev->get_stats = &ixgb_get_stats;
  331. netdev->set_multicast_list = &ixgb_set_multi;
  332. netdev->set_mac_address = &ixgb_set_mac;
  333. netdev->change_mtu = &ixgb_change_mtu;
  334. ixgb_set_ethtool_ops(netdev);
  335. netdev->tx_timeout = &ixgb_tx_timeout;
  336. netdev->watchdog_timeo = HZ;
  337. #ifdef CONFIG_IXGB_NAPI
  338. netdev->poll = &ixgb_clean;
  339. netdev->weight = 64;
  340. #endif
  341. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  342. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  343. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  344. #ifdef CONFIG_NET_POLL_CONTROLLER
  345. netdev->poll_controller = ixgb_netpoll;
  346. #endif
  347. netdev->mem_start = mmio_start;
  348. netdev->mem_end = mmio_start + mmio_len;
  349. netdev->base_addr = adapter->hw.io_base;
  350. adapter->bd_number = cards_found;
  351. adapter->link_speed = 0;
  352. adapter->link_duplex = 0;
  353. /* setup the private structure */
  354. if((err = ixgb_sw_init(adapter)))
  355. goto err_sw_init;
  356. netdev->features = NETIF_F_SG |
  357. NETIF_F_HW_CSUM |
  358. NETIF_F_HW_VLAN_TX |
  359. NETIF_F_HW_VLAN_RX |
  360. NETIF_F_HW_VLAN_FILTER;
  361. #ifdef NETIF_F_TSO
  362. netdev->features |= NETIF_F_TSO;
  363. #endif
  364. if(pci_using_dac)
  365. netdev->features |= NETIF_F_HIGHDMA;
  366. /* make sure the EEPROM is good */
  367. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  368. printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
  369. err = -EIO;
  370. goto err_eeprom;
  371. }
  372. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  373. if(!is_valid_ether_addr(netdev->dev_addr)) {
  374. err = -EIO;
  375. goto err_eeprom;
  376. }
  377. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  378. init_timer(&adapter->watchdog_timer);
  379. adapter->watchdog_timer.function = &ixgb_watchdog;
  380. adapter->watchdog_timer.data = (unsigned long)adapter;
  381. INIT_WORK(&adapter->tx_timeout_task,
  382. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  383. if((err = register_netdev(netdev)))
  384. goto err_register;
  385. /* we're going to reset, so assume we have no link for now */
  386. netif_carrier_off(netdev);
  387. netif_stop_queue(netdev);
  388. printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
  389. netdev->name);
  390. ixgb_check_options(adapter);
  391. /* reset the hardware with the new settings */
  392. ixgb_reset(adapter);
  393. cards_found++;
  394. return 0;
  395. err_register:
  396. err_sw_init:
  397. err_eeprom:
  398. iounmap(adapter->hw.hw_addr);
  399. err_ioremap:
  400. free_netdev(netdev);
  401. err_alloc_etherdev:
  402. pci_release_regions(pdev);
  403. return err;
  404. }
  405. /**
  406. * ixgb_remove - Device Removal Routine
  407. * @pdev: PCI device information struct
  408. *
  409. * ixgb_remove is called by the PCI subsystem to alert the driver
  410. * that it should release a PCI device. The could be caused by a
  411. * Hot-Plug event, or because the driver is going to be removed from
  412. * memory.
  413. **/
  414. static void __devexit
  415. ixgb_remove(struct pci_dev *pdev)
  416. {
  417. struct net_device *netdev = pci_get_drvdata(pdev);
  418. struct ixgb_adapter *adapter = netdev->priv;
  419. unregister_netdev(netdev);
  420. iounmap(adapter->hw.hw_addr);
  421. pci_release_regions(pdev);
  422. free_netdev(netdev);
  423. }
  424. /**
  425. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  426. * @adapter: board private structure to initialize
  427. *
  428. * ixgb_sw_init initializes the Adapter private data structure.
  429. * Fields are initialized based on PCI device information and
  430. * OS network device settings (MTU size).
  431. **/
  432. static int __devinit
  433. ixgb_sw_init(struct ixgb_adapter *adapter)
  434. {
  435. struct ixgb_hw *hw = &adapter->hw;
  436. struct net_device *netdev = adapter->netdev;
  437. struct pci_dev *pdev = adapter->pdev;
  438. /* PCI config space info */
  439. hw->vendor_id = pdev->vendor;
  440. hw->device_id = pdev->device;
  441. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  442. hw->subsystem_id = pdev->subsystem_device;
  443. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  444. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  445. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  446. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  447. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  448. hw->mac_type = ixgb_82597;
  449. else {
  450. /* should never have loaded on this device */
  451. printk(KERN_ERR "ixgb: unsupported device id\n");
  452. }
  453. /* enable flow control to be programmed */
  454. hw->fc.send_xon = 1;
  455. atomic_set(&adapter->irq_sem, 1);
  456. spin_lock_init(&adapter->tx_lock);
  457. return 0;
  458. }
  459. /**
  460. * ixgb_open - Called when a network interface is made active
  461. * @netdev: network interface device structure
  462. *
  463. * Returns 0 on success, negative value on failure
  464. *
  465. * The open entry point is called when a network interface is made
  466. * active by the system (IFF_UP). At this point all resources needed
  467. * for transmit and receive operations are allocated, the interrupt
  468. * handler is registered with the OS, the watchdog timer is started,
  469. * and the stack is notified that the interface is ready.
  470. **/
  471. static int
  472. ixgb_open(struct net_device *netdev)
  473. {
  474. struct ixgb_adapter *adapter = netdev->priv;
  475. int err;
  476. /* allocate transmit descriptors */
  477. if((err = ixgb_setup_tx_resources(adapter)))
  478. goto err_setup_tx;
  479. /* allocate receive descriptors */
  480. if((err = ixgb_setup_rx_resources(adapter)))
  481. goto err_setup_rx;
  482. if((err = ixgb_up(adapter)))
  483. goto err_up;
  484. return 0;
  485. err_up:
  486. ixgb_free_rx_resources(adapter);
  487. err_setup_rx:
  488. ixgb_free_tx_resources(adapter);
  489. err_setup_tx:
  490. ixgb_reset(adapter);
  491. return err;
  492. }
  493. /**
  494. * ixgb_close - Disables a network interface
  495. * @netdev: network interface device structure
  496. *
  497. * Returns 0, this is not allowed to fail
  498. *
  499. * The close entry point is called when an interface is de-activated
  500. * by the OS. The hardware is still under the drivers control, but
  501. * needs to be disabled. A global MAC reset is issued to stop the
  502. * hardware, and all transmit and receive resources are freed.
  503. **/
  504. static int
  505. ixgb_close(struct net_device *netdev)
  506. {
  507. struct ixgb_adapter *adapter = netdev->priv;
  508. ixgb_down(adapter, TRUE);
  509. ixgb_free_tx_resources(adapter);
  510. ixgb_free_rx_resources(adapter);
  511. return 0;
  512. }
  513. /**
  514. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  515. * @adapter: board private structure
  516. *
  517. * Return 0 on success, negative on failure
  518. **/
  519. int
  520. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  521. {
  522. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  523. struct pci_dev *pdev = adapter->pdev;
  524. int size;
  525. size = sizeof(struct ixgb_buffer) * txdr->count;
  526. txdr->buffer_info = vmalloc(size);
  527. if(!txdr->buffer_info) {
  528. return -ENOMEM;
  529. }
  530. memset(txdr->buffer_info, 0, size);
  531. /* round up to nearest 4K */
  532. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  533. IXGB_ROUNDUP(txdr->size, 4096);
  534. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  535. if(!txdr->desc) {
  536. vfree(txdr->buffer_info);
  537. return -ENOMEM;
  538. }
  539. memset(txdr->desc, 0, txdr->size);
  540. txdr->next_to_use = 0;
  541. txdr->next_to_clean = 0;
  542. return 0;
  543. }
  544. /**
  545. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  546. * @adapter: board private structure
  547. *
  548. * Configure the Tx unit of the MAC after a reset.
  549. **/
  550. static void
  551. ixgb_configure_tx(struct ixgb_adapter *adapter)
  552. {
  553. uint64_t tdba = adapter->tx_ring.dma;
  554. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  555. uint32_t tctl;
  556. struct ixgb_hw *hw = &adapter->hw;
  557. /* Setup the Base and Length of the Tx Descriptor Ring
  558. * tx_ring.dma can be either a 32 or 64 bit value
  559. */
  560. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  561. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  562. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  563. /* Setup the HW Tx Head and Tail descriptor pointers */
  564. IXGB_WRITE_REG(hw, TDH, 0);
  565. IXGB_WRITE_REG(hw, TDT, 0);
  566. /* don't set up txdctl, it induces performance problems if configured
  567. * incorrectly */
  568. /* Set the Tx Interrupt Delay register */
  569. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  570. /* Program the Transmit Control Register */
  571. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  572. IXGB_WRITE_REG(hw, TCTL, tctl);
  573. /* Setup Transmit Descriptor Settings for this adapter */
  574. adapter->tx_cmd_type =
  575. IXGB_TX_DESC_TYPE
  576. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  577. }
  578. /**
  579. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  580. * @adapter: board private structure
  581. *
  582. * Returns 0 on success, negative on failure
  583. **/
  584. int
  585. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  586. {
  587. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  588. struct pci_dev *pdev = adapter->pdev;
  589. int size;
  590. size = sizeof(struct ixgb_buffer) * rxdr->count;
  591. rxdr->buffer_info = vmalloc(size);
  592. if(!rxdr->buffer_info) {
  593. return -ENOMEM;
  594. }
  595. memset(rxdr->buffer_info, 0, size);
  596. /* Round up to nearest 4K */
  597. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  598. IXGB_ROUNDUP(rxdr->size, 4096);
  599. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  600. if(!rxdr->desc) {
  601. vfree(rxdr->buffer_info);
  602. return -ENOMEM;
  603. }
  604. memset(rxdr->desc, 0, rxdr->size);
  605. rxdr->next_to_clean = 0;
  606. rxdr->next_to_use = 0;
  607. return 0;
  608. }
  609. /**
  610. * ixgb_setup_rctl - configure the receive control register
  611. * @adapter: Board private structure
  612. **/
  613. static void
  614. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  615. {
  616. uint32_t rctl;
  617. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  618. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  619. rctl |=
  620. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  621. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  622. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  623. rctl |= IXGB_RCTL_SECRC;
  624. switch (adapter->rx_buffer_len) {
  625. case IXGB_RXBUFFER_2048:
  626. default:
  627. rctl |= IXGB_RCTL_BSIZE_2048;
  628. break;
  629. case IXGB_RXBUFFER_4096:
  630. rctl |= IXGB_RCTL_BSIZE_4096;
  631. break;
  632. case IXGB_RXBUFFER_8192:
  633. rctl |= IXGB_RCTL_BSIZE_8192;
  634. break;
  635. case IXGB_RXBUFFER_16384:
  636. rctl |= IXGB_RCTL_BSIZE_16384;
  637. break;
  638. }
  639. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  640. }
  641. /**
  642. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  643. * @adapter: board private structure
  644. *
  645. * Configure the Rx unit of the MAC after a reset.
  646. **/
  647. static void
  648. ixgb_configure_rx(struct ixgb_adapter *adapter)
  649. {
  650. uint64_t rdba = adapter->rx_ring.dma;
  651. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  652. struct ixgb_hw *hw = &adapter->hw;
  653. uint32_t rctl;
  654. uint32_t rxcsum;
  655. uint32_t rxdctl;
  656. /* make sure receives are disabled while setting up the descriptors */
  657. rctl = IXGB_READ_REG(hw, RCTL);
  658. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  659. /* set the Receive Delay Timer Register */
  660. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  661. /* Setup the Base and Length of the Rx Descriptor Ring */
  662. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  663. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  664. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  665. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  666. IXGB_WRITE_REG(hw, RDH, 0);
  667. IXGB_WRITE_REG(hw, RDT, 0);
  668. /* set up pre-fetching of receive buffers so we get some before we
  669. * run out (default hardware behavior is to run out before fetching
  670. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  671. * and the descriptors in hw cache are below PTHRESH. This avoids
  672. * the hardware behavior of fetching <=512 descriptors in a single
  673. * burst that pre-empts all other activity, usually causing fifo
  674. * overflows. */
  675. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  676. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  677. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  678. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  679. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  680. /* Enable Receive Checksum Offload for TCP and UDP */
  681. if(adapter->rx_csum == TRUE) {
  682. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  683. rxcsum |= IXGB_RXCSUM_TUOFL;
  684. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  685. }
  686. /* Enable Receives */
  687. IXGB_WRITE_REG(hw, RCTL, rctl);
  688. }
  689. /**
  690. * ixgb_free_tx_resources - Free Tx Resources
  691. * @adapter: board private structure
  692. *
  693. * Free all transmit software resources
  694. **/
  695. void
  696. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  697. {
  698. struct pci_dev *pdev = adapter->pdev;
  699. ixgb_clean_tx_ring(adapter);
  700. vfree(adapter->tx_ring.buffer_info);
  701. adapter->tx_ring.buffer_info = NULL;
  702. pci_free_consistent(pdev, adapter->tx_ring.size,
  703. adapter->tx_ring.desc, adapter->tx_ring.dma);
  704. adapter->tx_ring.desc = NULL;
  705. }
  706. static inline void
  707. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  708. struct ixgb_buffer *buffer_info)
  709. {
  710. struct pci_dev *pdev = adapter->pdev;
  711. if(buffer_info->dma) {
  712. pci_unmap_page(pdev,
  713. buffer_info->dma,
  714. buffer_info->length,
  715. PCI_DMA_TODEVICE);
  716. buffer_info->dma = 0;
  717. }
  718. if(buffer_info->skb) {
  719. dev_kfree_skb_any(buffer_info->skb);
  720. buffer_info->skb = NULL;
  721. }
  722. }
  723. /**
  724. * ixgb_clean_tx_ring - Free Tx Buffers
  725. * @adapter: board private structure
  726. **/
  727. static void
  728. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  729. {
  730. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  731. struct ixgb_buffer *buffer_info;
  732. unsigned long size;
  733. unsigned int i;
  734. /* Free all the Tx ring sk_buffs */
  735. for(i = 0; i < tx_ring->count; i++) {
  736. buffer_info = &tx_ring->buffer_info[i];
  737. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  738. }
  739. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  740. memset(tx_ring->buffer_info, 0, size);
  741. /* Zero out the descriptor ring */
  742. memset(tx_ring->desc, 0, tx_ring->size);
  743. tx_ring->next_to_use = 0;
  744. tx_ring->next_to_clean = 0;
  745. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  746. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  747. }
  748. /**
  749. * ixgb_free_rx_resources - Free Rx Resources
  750. * @adapter: board private structure
  751. *
  752. * Free all receive software resources
  753. **/
  754. void
  755. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  756. {
  757. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  758. struct pci_dev *pdev = adapter->pdev;
  759. ixgb_clean_rx_ring(adapter);
  760. vfree(rx_ring->buffer_info);
  761. rx_ring->buffer_info = NULL;
  762. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  763. rx_ring->desc = NULL;
  764. }
  765. /**
  766. * ixgb_clean_rx_ring - Free Rx Buffers
  767. * @adapter: board private structure
  768. **/
  769. static void
  770. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  771. {
  772. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  773. struct ixgb_buffer *buffer_info;
  774. struct pci_dev *pdev = adapter->pdev;
  775. unsigned long size;
  776. unsigned int i;
  777. /* Free all the Rx ring sk_buffs */
  778. for(i = 0; i < rx_ring->count; i++) {
  779. buffer_info = &rx_ring->buffer_info[i];
  780. if(buffer_info->skb) {
  781. pci_unmap_single(pdev,
  782. buffer_info->dma,
  783. buffer_info->length,
  784. PCI_DMA_FROMDEVICE);
  785. dev_kfree_skb(buffer_info->skb);
  786. buffer_info->skb = NULL;
  787. }
  788. }
  789. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  790. memset(rx_ring->buffer_info, 0, size);
  791. /* Zero out the descriptor ring */
  792. memset(rx_ring->desc, 0, rx_ring->size);
  793. rx_ring->next_to_clean = 0;
  794. rx_ring->next_to_use = 0;
  795. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  796. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  797. }
  798. /**
  799. * ixgb_set_mac - Change the Ethernet Address of the NIC
  800. * @netdev: network interface device structure
  801. * @p: pointer to an address structure
  802. *
  803. * Returns 0 on success, negative on failure
  804. **/
  805. static int
  806. ixgb_set_mac(struct net_device *netdev, void *p)
  807. {
  808. struct ixgb_adapter *adapter = netdev->priv;
  809. struct sockaddr *addr = p;
  810. if(!is_valid_ether_addr(addr->sa_data))
  811. return -EADDRNOTAVAIL;
  812. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  813. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  814. return 0;
  815. }
  816. /**
  817. * ixgb_set_multi - Multicast and Promiscuous mode set
  818. * @netdev: network interface device structure
  819. *
  820. * The set_multi entry point is called whenever the multicast address
  821. * list or the network interface flags are updated. This routine is
  822. * responsible for configuring the hardware for proper multicast,
  823. * promiscuous mode, and all-multi behavior.
  824. **/
  825. static void
  826. ixgb_set_multi(struct net_device *netdev)
  827. {
  828. struct ixgb_adapter *adapter = netdev->priv;
  829. struct ixgb_hw *hw = &adapter->hw;
  830. struct dev_mc_list *mc_ptr;
  831. uint32_t rctl;
  832. int i;
  833. /* Check for Promiscuous and All Multicast modes */
  834. rctl = IXGB_READ_REG(hw, RCTL);
  835. if(netdev->flags & IFF_PROMISC) {
  836. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  837. } else if(netdev->flags & IFF_ALLMULTI) {
  838. rctl |= IXGB_RCTL_MPE;
  839. rctl &= ~IXGB_RCTL_UPE;
  840. } else {
  841. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  842. }
  843. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  844. rctl |= IXGB_RCTL_MPE;
  845. IXGB_WRITE_REG(hw, RCTL, rctl);
  846. } else {
  847. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  848. IXGB_WRITE_REG(hw, RCTL, rctl);
  849. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  850. i++, mc_ptr = mc_ptr->next)
  851. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  852. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  853. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  854. }
  855. }
  856. /**
  857. * ixgb_watchdog - Timer Call-back
  858. * @data: pointer to netdev cast into an unsigned long
  859. **/
  860. static void
  861. ixgb_watchdog(unsigned long data)
  862. {
  863. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  864. struct net_device *netdev = adapter->netdev;
  865. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  866. ixgb_check_for_link(&adapter->hw);
  867. if (ixgb_check_for_bad_link(&adapter->hw)) {
  868. /* force the reset path */
  869. netif_stop_queue(netdev);
  870. }
  871. if(adapter->hw.link_up) {
  872. if(!netif_carrier_ok(netdev)) {
  873. printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
  874. netdev->name, 10000, "Full Duplex");
  875. adapter->link_speed = 10000;
  876. adapter->link_duplex = FULL_DUPLEX;
  877. netif_carrier_on(netdev);
  878. netif_wake_queue(netdev);
  879. }
  880. } else {
  881. if(netif_carrier_ok(netdev)) {
  882. adapter->link_speed = 0;
  883. adapter->link_duplex = 0;
  884. printk(KERN_INFO
  885. "ixgb: %s NIC Link is Down\n",
  886. netdev->name);
  887. netif_carrier_off(netdev);
  888. netif_stop_queue(netdev);
  889. }
  890. }
  891. ixgb_update_stats(adapter);
  892. if(!netif_carrier_ok(netdev)) {
  893. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  894. /* We've lost link, so the controller stops DMA,
  895. * but we've got queued Tx work that's never going
  896. * to get done, so reset controller to flush Tx.
  897. * (Do the reset outside of interrupt context). */
  898. schedule_work(&adapter->tx_timeout_task);
  899. }
  900. }
  901. /* Force detection of hung controller every watchdog period */
  902. adapter->detect_tx_hung = TRUE;
  903. /* generate an interrupt to force clean up of any stragglers */
  904. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  905. /* Reset the timer */
  906. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  907. }
  908. #define IXGB_TX_FLAGS_CSUM 0x00000001
  909. #define IXGB_TX_FLAGS_VLAN 0x00000002
  910. #define IXGB_TX_FLAGS_TSO 0x00000004
  911. static inline int
  912. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  913. {
  914. #ifdef NETIF_F_TSO
  915. struct ixgb_context_desc *context_desc;
  916. unsigned int i;
  917. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  918. uint16_t ipcse, tucse, mss;
  919. int err;
  920. if(likely(skb_shinfo(skb)->tso_size)) {
  921. if (skb_header_cloned(skb)) {
  922. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  923. if (err)
  924. return err;
  925. }
  926. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  927. mss = skb_shinfo(skb)->tso_size;
  928. skb->nh.iph->tot_len = 0;
  929. skb->nh.iph->check = 0;
  930. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  931. skb->nh.iph->daddr,
  932. 0, IPPROTO_TCP, 0);
  933. ipcss = skb->nh.raw - skb->data;
  934. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  935. ipcse = skb->h.raw - skb->data - 1;
  936. tucss = skb->h.raw - skb->data;
  937. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  938. tucse = 0;
  939. i = adapter->tx_ring.next_to_use;
  940. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  941. context_desc->ipcss = ipcss;
  942. context_desc->ipcso = ipcso;
  943. context_desc->ipcse = cpu_to_le16(ipcse);
  944. context_desc->tucss = tucss;
  945. context_desc->tucso = tucso;
  946. context_desc->tucse = cpu_to_le16(tucse);
  947. context_desc->mss = cpu_to_le16(mss);
  948. context_desc->hdr_len = hdr_len;
  949. context_desc->status = 0;
  950. context_desc->cmd_type_len = cpu_to_le32(
  951. IXGB_CONTEXT_DESC_TYPE
  952. | IXGB_CONTEXT_DESC_CMD_TSE
  953. | IXGB_CONTEXT_DESC_CMD_IP
  954. | IXGB_CONTEXT_DESC_CMD_TCP
  955. | IXGB_CONTEXT_DESC_CMD_IDE
  956. | (skb->len - (hdr_len)));
  957. if(++i == adapter->tx_ring.count) i = 0;
  958. adapter->tx_ring.next_to_use = i;
  959. return 1;
  960. }
  961. #endif
  962. return 0;
  963. }
  964. static inline boolean_t
  965. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  966. {
  967. struct ixgb_context_desc *context_desc;
  968. unsigned int i;
  969. uint8_t css, cso;
  970. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  971. css = skb->h.raw - skb->data;
  972. cso = (skb->h.raw + skb->csum) - skb->data;
  973. i = adapter->tx_ring.next_to_use;
  974. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  975. context_desc->tucss = css;
  976. context_desc->tucso = cso;
  977. context_desc->tucse = 0;
  978. /* zero out any previously existing data in one instruction */
  979. *(uint32_t *)&(context_desc->ipcss) = 0;
  980. context_desc->status = 0;
  981. context_desc->hdr_len = 0;
  982. context_desc->mss = 0;
  983. context_desc->cmd_type_len =
  984. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  985. | IXGB_TX_DESC_CMD_IDE);
  986. if(++i == adapter->tx_ring.count) i = 0;
  987. adapter->tx_ring.next_to_use = i;
  988. return TRUE;
  989. }
  990. return FALSE;
  991. }
  992. #define IXGB_MAX_TXD_PWR 14
  993. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  994. static inline int
  995. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  996. unsigned int first)
  997. {
  998. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  999. struct ixgb_buffer *buffer_info;
  1000. int len = skb->len;
  1001. unsigned int offset = 0, size, count = 0, i;
  1002. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1003. unsigned int f;
  1004. len -= skb->data_len;
  1005. i = tx_ring->next_to_use;
  1006. while(len) {
  1007. buffer_info = &tx_ring->buffer_info[i];
  1008. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1009. buffer_info->length = size;
  1010. buffer_info->dma =
  1011. pci_map_single(adapter->pdev,
  1012. skb->data + offset,
  1013. size,
  1014. PCI_DMA_TODEVICE);
  1015. buffer_info->time_stamp = jiffies;
  1016. len -= size;
  1017. offset += size;
  1018. count++;
  1019. if(++i == tx_ring->count) i = 0;
  1020. }
  1021. for(f = 0; f < nr_frags; f++) {
  1022. struct skb_frag_struct *frag;
  1023. frag = &skb_shinfo(skb)->frags[f];
  1024. len = frag->size;
  1025. offset = 0;
  1026. while(len) {
  1027. buffer_info = &tx_ring->buffer_info[i];
  1028. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1029. buffer_info->length = size;
  1030. buffer_info->dma =
  1031. pci_map_page(adapter->pdev,
  1032. frag->page,
  1033. frag->page_offset + offset,
  1034. size,
  1035. PCI_DMA_TODEVICE);
  1036. buffer_info->time_stamp = jiffies;
  1037. len -= size;
  1038. offset += size;
  1039. count++;
  1040. if(++i == tx_ring->count) i = 0;
  1041. }
  1042. }
  1043. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1044. tx_ring->buffer_info[i].skb = skb;
  1045. tx_ring->buffer_info[first].next_to_watch = i;
  1046. return count;
  1047. }
  1048. static inline void
  1049. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1050. {
  1051. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1052. struct ixgb_tx_desc *tx_desc = NULL;
  1053. struct ixgb_buffer *buffer_info;
  1054. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1055. uint8_t status = 0;
  1056. uint8_t popts = 0;
  1057. unsigned int i;
  1058. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1059. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1060. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1061. }
  1062. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1063. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1064. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1065. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1066. }
  1067. i = tx_ring->next_to_use;
  1068. while(count--) {
  1069. buffer_info = &tx_ring->buffer_info[i];
  1070. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1071. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1072. tx_desc->cmd_type_len =
  1073. cpu_to_le32(cmd_type_len | buffer_info->length);
  1074. tx_desc->status = status;
  1075. tx_desc->popts = popts;
  1076. tx_desc->vlan = cpu_to_le16(vlan_id);
  1077. if(++i == tx_ring->count) i = 0;
  1078. }
  1079. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1080. | IXGB_TX_DESC_CMD_RS );
  1081. /* Force memory writes to complete before letting h/w
  1082. * know there are new descriptors to fetch. (Only
  1083. * applicable for weak-ordered memory model archs,
  1084. * such as IA-64). */
  1085. wmb();
  1086. tx_ring->next_to_use = i;
  1087. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1088. }
  1089. /* Tx Descriptors needed, worst case */
  1090. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1091. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1092. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1093. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
  1094. static int
  1095. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1096. {
  1097. struct ixgb_adapter *adapter = netdev->priv;
  1098. unsigned int first;
  1099. unsigned int tx_flags = 0;
  1100. unsigned long flags;
  1101. int vlan_id = 0;
  1102. int tso;
  1103. if(skb->len <= 0) {
  1104. dev_kfree_skb_any(skb);
  1105. return 0;
  1106. }
  1107. spin_lock_irqsave(&adapter->tx_lock, flags);
  1108. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1109. netif_stop_queue(netdev);
  1110. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1111. return 1;
  1112. }
  1113. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1114. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1115. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1116. vlan_id = vlan_tx_tag_get(skb);
  1117. }
  1118. first = adapter->tx_ring.next_to_use;
  1119. tso = ixgb_tso(adapter, skb);
  1120. if (tso < 0) {
  1121. dev_kfree_skb_any(skb);
  1122. return NETDEV_TX_OK;
  1123. }
  1124. if (tso)
  1125. tx_flags |= IXGB_TX_FLAGS_TSO;
  1126. else if(ixgb_tx_csum(adapter, skb))
  1127. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1128. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1129. tx_flags);
  1130. netdev->trans_start = jiffies;
  1131. return 0;
  1132. }
  1133. /**
  1134. * ixgb_tx_timeout - Respond to a Tx Hang
  1135. * @netdev: network interface device structure
  1136. **/
  1137. static void
  1138. ixgb_tx_timeout(struct net_device *netdev)
  1139. {
  1140. struct ixgb_adapter *adapter = netdev->priv;
  1141. /* Do the reset outside of interrupt context */
  1142. schedule_work(&adapter->tx_timeout_task);
  1143. }
  1144. static void
  1145. ixgb_tx_timeout_task(struct net_device *netdev)
  1146. {
  1147. struct ixgb_adapter *adapter = netdev->priv;
  1148. ixgb_down(adapter, TRUE);
  1149. ixgb_up(adapter);
  1150. }
  1151. /**
  1152. * ixgb_get_stats - Get System Network Statistics
  1153. * @netdev: network interface device structure
  1154. *
  1155. * Returns the address of the device statistics structure.
  1156. * The statistics are actually updated from the timer callback.
  1157. **/
  1158. static struct net_device_stats *
  1159. ixgb_get_stats(struct net_device *netdev)
  1160. {
  1161. struct ixgb_adapter *adapter = netdev->priv;
  1162. return &adapter->net_stats;
  1163. }
  1164. /**
  1165. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1166. * @netdev: network interface device structure
  1167. * @new_mtu: new value for maximum frame size
  1168. *
  1169. * Returns 0 on success, negative on failure
  1170. **/
  1171. static int
  1172. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1173. {
  1174. struct ixgb_adapter *adapter = netdev->priv;
  1175. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1176. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1177. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1178. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1179. IXGB_ERR("Invalid MTU setting\n");
  1180. return -EINVAL;
  1181. }
  1182. if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1183. || (max_frame <= IXGB_RXBUFFER_2048)) {
  1184. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  1185. } else if(max_frame <= IXGB_RXBUFFER_4096) {
  1186. adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
  1187. } else if(max_frame <= IXGB_RXBUFFER_8192) {
  1188. adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
  1189. } else {
  1190. adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
  1191. }
  1192. netdev->mtu = new_mtu;
  1193. if(old_max_frame != max_frame && netif_running(netdev)) {
  1194. ixgb_down(adapter, TRUE);
  1195. ixgb_up(adapter);
  1196. }
  1197. return 0;
  1198. }
  1199. /**
  1200. * ixgb_update_stats - Update the board statistics counters.
  1201. * @adapter: board private structure
  1202. **/
  1203. void
  1204. ixgb_update_stats(struct ixgb_adapter *adapter)
  1205. {
  1206. struct net_device *netdev = adapter->netdev;
  1207. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1208. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1209. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1210. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1211. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1212. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1213. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1214. /* fix up multicast stats by removing broadcasts */
  1215. multi -= bcast;
  1216. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1217. adapter->stats.mprch += (multi >> 32);
  1218. adapter->stats.bprcl += bcast_l;
  1219. adapter->stats.bprch += bcast_h;
  1220. } else {
  1221. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1222. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1223. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1224. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1225. }
  1226. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1227. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1228. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1229. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1230. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1231. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1232. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1233. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1234. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1235. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1236. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1237. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1238. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1239. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1240. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1241. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1242. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1243. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1244. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1245. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1246. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1247. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1248. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1249. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1250. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1251. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1252. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1253. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1254. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1255. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1256. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1257. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1258. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1259. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1260. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1261. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1262. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1263. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1264. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1265. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1266. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1267. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1268. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1269. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1270. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1271. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1272. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1273. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1274. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1275. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1276. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1277. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1278. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1279. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1280. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1281. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1282. /* Fill out the OS statistics structure */
  1283. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1284. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1285. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1286. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1287. adapter->net_stats.multicast = adapter->stats.mprcl;
  1288. adapter->net_stats.collisions = 0;
  1289. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1290. * with a length in the type/len field */
  1291. adapter->net_stats.rx_errors =
  1292. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1293. adapter->stats.ruc +
  1294. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1295. adapter->stats.icbc +
  1296. adapter->stats.ecbc + adapter->stats.mpc;
  1297. adapter->net_stats.rx_dropped = adapter->stats.mpc;
  1298. /* see above
  1299. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1300. */
  1301. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1302. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1303. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1304. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1305. adapter->net_stats.tx_errors = 0;
  1306. adapter->net_stats.rx_frame_errors = 0;
  1307. adapter->net_stats.tx_aborted_errors = 0;
  1308. adapter->net_stats.tx_carrier_errors = 0;
  1309. adapter->net_stats.tx_fifo_errors = 0;
  1310. adapter->net_stats.tx_heartbeat_errors = 0;
  1311. adapter->net_stats.tx_window_errors = 0;
  1312. }
  1313. #define IXGB_MAX_INTR 10
  1314. /**
  1315. * ixgb_intr - Interrupt Handler
  1316. * @irq: interrupt number
  1317. * @data: pointer to a network interface device structure
  1318. * @pt_regs: CPU registers structure
  1319. **/
  1320. static irqreturn_t
  1321. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1322. {
  1323. struct net_device *netdev = data;
  1324. struct ixgb_adapter *adapter = netdev->priv;
  1325. struct ixgb_hw *hw = &adapter->hw;
  1326. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1327. #ifndef CONFIG_IXGB_NAPI
  1328. unsigned int i;
  1329. #endif
  1330. if(unlikely(!icr))
  1331. return IRQ_NONE; /* Not our interrupt */
  1332. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1333. mod_timer(&adapter->watchdog_timer, jiffies);
  1334. }
  1335. #ifdef CONFIG_IXGB_NAPI
  1336. if(netif_rx_schedule_prep(netdev)) {
  1337. /* Disable interrupts and register for poll. The flush
  1338. of the posted write is intentionally left out.
  1339. */
  1340. atomic_inc(&adapter->irq_sem);
  1341. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1342. __netif_rx_schedule(netdev);
  1343. }
  1344. #else
  1345. /* yes, that is actually a & and it is meant to make sure that
  1346. * every pass through this for loop checks both receive and
  1347. * transmit queues for completed descriptors, intended to
  1348. * avoid starvation issues and assist tx/rx fairness. */
  1349. for(i = 0; i < IXGB_MAX_INTR; i++)
  1350. if(!ixgb_clean_rx_irq(adapter) &
  1351. !ixgb_clean_tx_irq(adapter))
  1352. break;
  1353. #endif
  1354. return IRQ_HANDLED;
  1355. }
  1356. #ifdef CONFIG_IXGB_NAPI
  1357. /**
  1358. * ixgb_clean - NAPI Rx polling callback
  1359. * @adapter: board private structure
  1360. **/
  1361. static int
  1362. ixgb_clean(struct net_device *netdev, int *budget)
  1363. {
  1364. struct ixgb_adapter *adapter = netdev->priv;
  1365. int work_to_do = min(*budget, netdev->quota);
  1366. int tx_cleaned;
  1367. int work_done = 0;
  1368. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1369. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1370. *budget -= work_done;
  1371. netdev->quota -= work_done;
  1372. /* if no Tx and not enough Rx work done, exit the polling mode */
  1373. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1374. netif_rx_complete(netdev);
  1375. ixgb_irq_enable(adapter);
  1376. return 0;
  1377. }
  1378. return 1;
  1379. }
  1380. #endif
  1381. /**
  1382. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1383. * @adapter: board private structure
  1384. **/
  1385. static boolean_t
  1386. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1387. {
  1388. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1389. struct net_device *netdev = adapter->netdev;
  1390. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1391. struct ixgb_buffer *buffer_info;
  1392. unsigned int i, eop;
  1393. boolean_t cleaned = FALSE;
  1394. i = tx_ring->next_to_clean;
  1395. eop = tx_ring->buffer_info[i].next_to_watch;
  1396. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1397. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1398. for(cleaned = FALSE; !cleaned; ) {
  1399. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1400. buffer_info = &tx_ring->buffer_info[i];
  1401. if (tx_desc->popts
  1402. & (IXGB_TX_DESC_POPTS_TXSM |
  1403. IXGB_TX_DESC_POPTS_IXSM))
  1404. adapter->hw_csum_tx_good++;
  1405. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1406. *(uint32_t *)&(tx_desc->status) = 0;
  1407. cleaned = (i == eop);
  1408. if(++i == tx_ring->count) i = 0;
  1409. }
  1410. eop = tx_ring->buffer_info[i].next_to_watch;
  1411. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1412. }
  1413. tx_ring->next_to_clean = i;
  1414. spin_lock(&adapter->tx_lock);
  1415. if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1416. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
  1417. netif_wake_queue(netdev);
  1418. }
  1419. spin_unlock(&adapter->tx_lock);
  1420. if(adapter->detect_tx_hung) {
  1421. /* detect a transmit hang in hardware, this serializes the
  1422. * check with the clearing of time_stamp and movement of i */
  1423. adapter->detect_tx_hung = FALSE;
  1424. if(tx_ring->buffer_info[i].dma &&
  1425. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  1426. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1427. IXGB_STATUS_TXOFF))
  1428. netif_stop_queue(netdev);
  1429. }
  1430. return cleaned;
  1431. }
  1432. /**
  1433. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1434. * @adapter: board private structure
  1435. * @rx_desc: receive descriptor
  1436. * @sk_buff: socket buffer with received data
  1437. **/
  1438. static inline void
  1439. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1440. struct ixgb_rx_desc *rx_desc,
  1441. struct sk_buff *skb)
  1442. {
  1443. /* Ignore Checksum bit is set OR
  1444. * TCP Checksum has not been calculated
  1445. */
  1446. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1447. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1448. skb->ip_summed = CHECKSUM_NONE;
  1449. return;
  1450. }
  1451. /* At this point we know the hardware did the TCP checksum */
  1452. /* now look at the TCP checksum error bit */
  1453. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1454. /* let the stack verify checksum errors */
  1455. skb->ip_summed = CHECKSUM_NONE;
  1456. adapter->hw_csum_rx_error++;
  1457. } else {
  1458. /* TCP checksum is good */
  1459. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1460. adapter->hw_csum_rx_good++;
  1461. }
  1462. }
  1463. /**
  1464. * ixgb_clean_rx_irq - Send received data up the network stack,
  1465. * @adapter: board private structure
  1466. **/
  1467. static boolean_t
  1468. #ifdef CONFIG_IXGB_NAPI
  1469. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1470. #else
  1471. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1472. #endif
  1473. {
  1474. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1475. struct net_device *netdev = adapter->netdev;
  1476. struct pci_dev *pdev = adapter->pdev;
  1477. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1478. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1479. uint32_t length;
  1480. unsigned int i, j;
  1481. boolean_t cleaned = FALSE;
  1482. i = rx_ring->next_to_clean;
  1483. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1484. buffer_info = &rx_ring->buffer_info[i];
  1485. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1486. struct sk_buff *skb, *next_skb;
  1487. u8 status;
  1488. #ifdef CONFIG_IXGB_NAPI
  1489. if(*work_done >= work_to_do)
  1490. break;
  1491. (*work_done)++;
  1492. #endif
  1493. status = rx_desc->status;
  1494. skb = buffer_info->skb;
  1495. prefetch(skb->data);
  1496. if(++i == rx_ring->count) i = 0;
  1497. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1498. prefetch(next_rxd);
  1499. if((j = i + 1) == rx_ring->count) j = 0;
  1500. next2_buffer = &rx_ring->buffer_info[j];
  1501. prefetch(next2_buffer);
  1502. next_buffer = &rx_ring->buffer_info[i];
  1503. next_skb = next_buffer->skb;
  1504. prefetch(next_skb);
  1505. cleaned = TRUE;
  1506. pci_unmap_single(pdev,
  1507. buffer_info->dma,
  1508. buffer_info->length,
  1509. PCI_DMA_FROMDEVICE);
  1510. length = le16_to_cpu(rx_desc->length);
  1511. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1512. /* All receives must fit into a single buffer */
  1513. IXGB_DBG("Receive packet consumed multiple buffers "
  1514. "length<%x>\n", length);
  1515. dev_kfree_skb_irq(skb);
  1516. goto rxdesc_done;
  1517. }
  1518. if (unlikely(rx_desc->errors
  1519. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1520. | IXGB_RX_DESC_ERRORS_P |
  1521. IXGB_RX_DESC_ERRORS_RXE))) {
  1522. dev_kfree_skb_irq(skb);
  1523. goto rxdesc_done;
  1524. }
  1525. /* Good Receive */
  1526. skb_put(skb, length);
  1527. /* Receive Checksum Offload */
  1528. ixgb_rx_checksum(adapter, rx_desc, skb);
  1529. skb->protocol = eth_type_trans(skb, netdev);
  1530. #ifdef CONFIG_IXGB_NAPI
  1531. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1532. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1533. le16_to_cpu(rx_desc->special) &
  1534. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1535. } else {
  1536. netif_receive_skb(skb);
  1537. }
  1538. #else /* CONFIG_IXGB_NAPI */
  1539. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1540. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1541. le16_to_cpu(rx_desc->special) &
  1542. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1543. } else {
  1544. netif_rx(skb);
  1545. }
  1546. #endif /* CONFIG_IXGB_NAPI */
  1547. netdev->last_rx = jiffies;
  1548. rxdesc_done:
  1549. /* clean up descriptor, might be written over by hw */
  1550. rx_desc->status = 0;
  1551. buffer_info->skb = NULL;
  1552. /* use prefetched values */
  1553. rx_desc = next_rxd;
  1554. buffer_info = next_buffer;
  1555. }
  1556. rx_ring->next_to_clean = i;
  1557. ixgb_alloc_rx_buffers(adapter);
  1558. return cleaned;
  1559. }
  1560. /**
  1561. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1562. * @adapter: address of board private structure
  1563. **/
  1564. static void
  1565. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1566. {
  1567. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1568. struct net_device *netdev = adapter->netdev;
  1569. struct pci_dev *pdev = adapter->pdev;
  1570. struct ixgb_rx_desc *rx_desc;
  1571. struct ixgb_buffer *buffer_info;
  1572. struct sk_buff *skb;
  1573. unsigned int i;
  1574. int num_group_tail_writes;
  1575. long cleancount;
  1576. i = rx_ring->next_to_use;
  1577. buffer_info = &rx_ring->buffer_info[i];
  1578. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1579. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1580. /* leave three descriptors unused */
  1581. while(--cleancount > 2) {
  1582. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1583. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1584. if(unlikely(!skb)) {
  1585. /* Better luck next round */
  1586. break;
  1587. }
  1588. /* Make buffer alignment 2 beyond a 16 byte boundary
  1589. * this will result in a 16 byte aligned IP header after
  1590. * the 14 byte MAC header is removed
  1591. */
  1592. skb_reserve(skb, NET_IP_ALIGN);
  1593. skb->dev = netdev;
  1594. buffer_info->skb = skb;
  1595. buffer_info->length = adapter->rx_buffer_len;
  1596. buffer_info->dma =
  1597. pci_map_single(pdev,
  1598. skb->data,
  1599. adapter->rx_buffer_len,
  1600. PCI_DMA_FROMDEVICE);
  1601. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1602. /* guarantee DD bit not set now before h/w gets descriptor
  1603. * this is the rest of the workaround for h/w double
  1604. * writeback. */
  1605. rx_desc->status = 0;
  1606. if((i & ~(num_group_tail_writes- 1)) == i) {
  1607. /* Force memory writes to complete before letting h/w
  1608. * know there are new descriptors to fetch. (Only
  1609. * applicable for weak-ordered memory model archs,
  1610. * such as IA-64). */
  1611. wmb();
  1612. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1613. }
  1614. if(++i == rx_ring->count) i = 0;
  1615. buffer_info = &rx_ring->buffer_info[i];
  1616. }
  1617. rx_ring->next_to_use = i;
  1618. }
  1619. /**
  1620. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1621. *
  1622. * @param netdev network interface device structure
  1623. * @param grp indicates to enable or disable tagging/stripping
  1624. **/
  1625. static void
  1626. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1627. {
  1628. struct ixgb_adapter *adapter = netdev->priv;
  1629. uint32_t ctrl, rctl;
  1630. ixgb_irq_disable(adapter);
  1631. adapter->vlgrp = grp;
  1632. if(grp) {
  1633. /* enable VLAN tag insert/strip */
  1634. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1635. ctrl |= IXGB_CTRL0_VME;
  1636. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1637. /* enable VLAN receive filtering */
  1638. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1639. rctl |= IXGB_RCTL_VFE;
  1640. rctl &= ~IXGB_RCTL_CFIEN;
  1641. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1642. } else {
  1643. /* disable VLAN tag insert/strip */
  1644. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1645. ctrl &= ~IXGB_CTRL0_VME;
  1646. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1647. /* disable VLAN filtering */
  1648. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1649. rctl &= ~IXGB_RCTL_VFE;
  1650. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1651. }
  1652. ixgb_irq_enable(adapter);
  1653. }
  1654. static void
  1655. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1656. {
  1657. struct ixgb_adapter *adapter = netdev->priv;
  1658. uint32_t vfta, index;
  1659. /* add VID to filter table */
  1660. index = (vid >> 5) & 0x7F;
  1661. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1662. vfta |= (1 << (vid & 0x1F));
  1663. ixgb_write_vfta(&adapter->hw, index, vfta);
  1664. }
  1665. static void
  1666. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1667. {
  1668. struct ixgb_adapter *adapter = netdev->priv;
  1669. uint32_t vfta, index;
  1670. ixgb_irq_disable(adapter);
  1671. if(adapter->vlgrp)
  1672. adapter->vlgrp->vlan_devices[vid] = NULL;
  1673. ixgb_irq_enable(adapter);
  1674. /* remove VID from filter table*/
  1675. index = (vid >> 5) & 0x7F;
  1676. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1677. vfta &= ~(1 << (vid & 0x1F));
  1678. ixgb_write_vfta(&adapter->hw, index, vfta);
  1679. }
  1680. static void
  1681. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1682. {
  1683. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1684. if(adapter->vlgrp) {
  1685. uint16_t vid;
  1686. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1687. if(!adapter->vlgrp->vlan_devices[vid])
  1688. continue;
  1689. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1690. }
  1691. }
  1692. }
  1693. #ifdef CONFIG_NET_POLL_CONTROLLER
  1694. /*
  1695. * Polling 'interrupt' - used by things like netconsole to send skbs
  1696. * without having to re-enable interrupts. It's not called while
  1697. * the interrupt routine is executing.
  1698. */
  1699. static void ixgb_netpoll(struct net_device *dev)
  1700. {
  1701. struct ixgb_adapter *adapter = dev->priv;
  1702. disable_irq(adapter->pdev->irq);
  1703. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1704. enable_irq(adapter->pdev->irq);
  1705. }
  1706. #endif
  1707. /* ixgb_main.c */