nmi.c 12 KB

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  1. /*
  2. * NMI watchdog support on APIC systems
  3. *
  4. * Started by Ingo Molnar <mingo@redhat.com>
  5. *
  6. * Fixes:
  7. * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
  8. * Mikael Pettersson : Power Management for local APIC NMI watchdog.
  9. * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog.
  10. * Pavel Machek and
  11. * Mikael Pettersson : PM converted to driver model. Disable/enable API.
  12. */
  13. #include <asm/apic.h>
  14. #include <linux/nmi.h>
  15. #include <linux/mm.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/module.h>
  19. #include <linux/sysdev.h>
  20. #include <linux/sysctl.h>
  21. #include <linux/percpu.h>
  22. #include <linux/kprobes.h>
  23. #include <linux/cpumask.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/smp.h>
  27. #include <asm/i8259.h>
  28. #include <asm/io_apic.h>
  29. #include <asm/smp.h>
  30. #include <asm/nmi.h>
  31. #include <asm/proto.h>
  32. #include <asm/timer.h>
  33. #include <asm/mce.h>
  34. #include <mach_traps.h>
  35. int unknown_nmi_panic;
  36. int nmi_watchdog_enabled;
  37. static cpumask_t backtrace_mask = CPU_MASK_NONE;
  38. /* nmi_active:
  39. * >0: the lapic NMI watchdog is active, but can be disabled
  40. * <0: the lapic NMI watchdog has not been set up, and cannot
  41. * be enabled
  42. * 0: the lapic NMI watchdog is disabled, but can be enabled
  43. */
  44. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  45. EXPORT_SYMBOL(nmi_active);
  46. unsigned int nmi_watchdog = NMI_NONE;
  47. EXPORT_SYMBOL(nmi_watchdog);
  48. static int panic_on_timeout;
  49. static unsigned int nmi_hz = HZ;
  50. static DEFINE_PER_CPU(short, wd_enabled);
  51. static int endflag __initdata;
  52. static inline unsigned int get_nmi_count(int cpu)
  53. {
  54. #ifdef CONFIG_X86_64
  55. return cpu_pda(cpu)->__nmi_count;
  56. #else
  57. return nmi_count(cpu);
  58. #endif
  59. }
  60. static inline int mce_in_progress(void)
  61. {
  62. #if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
  63. return atomic_read(&mce_entry) > 0;
  64. #endif
  65. return 0;
  66. }
  67. /*
  68. * Take the local apic timer and PIT/HPET into account. We don't
  69. * know which one is active, when we have highres/dyntick on
  70. */
  71. static inline unsigned int get_timer_irqs(int cpu)
  72. {
  73. #ifdef CONFIG_X86_64
  74. return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
  75. #else
  76. return per_cpu(irq_stat, cpu).apic_timer_irqs +
  77. per_cpu(irq_stat, cpu).irq0_irqs;
  78. #endif
  79. }
  80. #ifdef CONFIG_SMP
  81. /*
  82. * The performance counters used by NMI_LOCAL_APIC don't trigger when
  83. * the CPU is idle. To make sure the NMI watchdog really ticks on all
  84. * CPUs during the test make them busy.
  85. */
  86. static __init void nmi_cpu_busy(void *data)
  87. {
  88. local_irq_enable_in_hardirq();
  89. /*
  90. * Intentionally don't use cpu_relax here. This is
  91. * to make sure that the performance counter really ticks,
  92. * even if there is a simulator or similar that catches the
  93. * pause instruction. On a real HT machine this is fine because
  94. * all other CPUs are busy with "useless" delay loops and don't
  95. * care if they get somewhat less cycles.
  96. */
  97. while (endflag == 0)
  98. mb();
  99. }
  100. #endif
  101. int __init check_nmi_watchdog(void)
  102. {
  103. unsigned int *prev_nmi_count;
  104. int cpu;
  105. if (!nmi_watchdog_active() || !atomic_read(&nmi_active))
  106. return 0;
  107. prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL);
  108. if (!prev_nmi_count)
  109. goto error;
  110. printk(KERN_INFO "Testing NMI watchdog ... ");
  111. #ifdef CONFIG_SMP
  112. if (nmi_watchdog == NMI_LOCAL_APIC)
  113. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0);
  114. #endif
  115. for_each_possible_cpu(cpu)
  116. prev_nmi_count[cpu] = get_nmi_count(cpu);
  117. local_irq_enable();
  118. mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
  119. for_each_online_cpu(cpu) {
  120. if (!per_cpu(wd_enabled, cpu))
  121. continue;
  122. if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) {
  123. printk(KERN_WARNING "WARNING: CPU#%d: NMI "
  124. "appears to be stuck (%d->%d)!\n",
  125. cpu,
  126. prev_nmi_count[cpu],
  127. get_nmi_count(cpu));
  128. per_cpu(wd_enabled, cpu) = 0;
  129. atomic_dec(&nmi_active);
  130. }
  131. }
  132. endflag = 1;
  133. if (!atomic_read(&nmi_active)) {
  134. kfree(prev_nmi_count);
  135. atomic_set(&nmi_active, -1);
  136. goto error;
  137. }
  138. printk("OK.\n");
  139. /*
  140. * now that we know it works we can reduce NMI frequency to
  141. * something more reasonable; makes a difference in some configs
  142. */
  143. if (nmi_watchdog == NMI_LOCAL_APIC)
  144. nmi_hz = lapic_adjust_nmi_hz(1);
  145. kfree(prev_nmi_count);
  146. return 0;
  147. error:
  148. if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
  149. disable_8259A_irq(0);
  150. return -1;
  151. }
  152. static int __init setup_nmi_watchdog(char *str)
  153. {
  154. unsigned int nmi;
  155. if (!strncmp(str, "panic", 5)) {
  156. panic_on_timeout = 1;
  157. str = strchr(str, ',');
  158. if (!str)
  159. return 1;
  160. ++str;
  161. }
  162. get_option(&str, &nmi);
  163. if (nmi >= NMI_INVALID)
  164. return 0;
  165. nmi_watchdog = nmi;
  166. return 1;
  167. }
  168. __setup("nmi_watchdog=", setup_nmi_watchdog);
  169. /*
  170. * Suspend/resume support
  171. */
  172. #ifdef CONFIG_PM
  173. static int nmi_pm_active; /* nmi_active before suspend */
  174. static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
  175. {
  176. /* only CPU0 goes here, other CPUs should be offline */
  177. nmi_pm_active = atomic_read(&nmi_active);
  178. stop_apic_nmi_watchdog(NULL);
  179. BUG_ON(atomic_read(&nmi_active) != 0);
  180. return 0;
  181. }
  182. static int lapic_nmi_resume(struct sys_device *dev)
  183. {
  184. /* only CPU0 goes here, other CPUs should be offline */
  185. if (nmi_pm_active > 0) {
  186. setup_apic_nmi_watchdog(NULL);
  187. touch_nmi_watchdog();
  188. }
  189. return 0;
  190. }
  191. static struct sysdev_class nmi_sysclass = {
  192. .name = "lapic_nmi",
  193. .resume = lapic_nmi_resume,
  194. .suspend = lapic_nmi_suspend,
  195. };
  196. static struct sys_device device_lapic_nmi = {
  197. .id = 0,
  198. .cls = &nmi_sysclass,
  199. };
  200. static int __init init_lapic_nmi_sysfs(void)
  201. {
  202. int error;
  203. /*
  204. * should really be a BUG_ON but b/c this is an
  205. * init call, it just doesn't work. -dcz
  206. */
  207. if (nmi_watchdog != NMI_LOCAL_APIC)
  208. return 0;
  209. if (atomic_read(&nmi_active) < 0)
  210. return 0;
  211. error = sysdev_class_register(&nmi_sysclass);
  212. if (!error)
  213. error = sysdev_register(&device_lapic_nmi);
  214. return error;
  215. }
  216. /* must come after the local APIC's device_initcall() */
  217. late_initcall(init_lapic_nmi_sysfs);
  218. #endif /* CONFIG_PM */
  219. static void __acpi_nmi_enable(void *__unused)
  220. {
  221. apic_write_around(APIC_LVT0, APIC_DM_NMI);
  222. }
  223. /*
  224. * Enable timer based NMIs on all CPUs:
  225. */
  226. void acpi_nmi_enable(void)
  227. {
  228. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  229. on_each_cpu(__acpi_nmi_enable, NULL, 0, 1);
  230. }
  231. static void __acpi_nmi_disable(void *__unused)
  232. {
  233. apic_write_around(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
  234. }
  235. /*
  236. * Disable timer based NMIs on all CPUs:
  237. */
  238. void acpi_nmi_disable(void)
  239. {
  240. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  241. on_each_cpu(__acpi_nmi_disable, NULL, 0, 1);
  242. }
  243. void setup_apic_nmi_watchdog(void *unused)
  244. {
  245. if (__get_cpu_var(wd_enabled))
  246. return;
  247. /* cheap hack to support suspend/resume */
  248. /* if cpu0 is not active neither should the other cpus */
  249. if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
  250. return;
  251. switch (nmi_watchdog) {
  252. case NMI_LOCAL_APIC:
  253. /* enable it before to avoid race with handler */
  254. __get_cpu_var(wd_enabled) = 1;
  255. if (lapic_watchdog_init(nmi_hz) < 0) {
  256. __get_cpu_var(wd_enabled) = 0;
  257. return;
  258. }
  259. /* FALL THROUGH */
  260. case NMI_IO_APIC:
  261. __get_cpu_var(wd_enabled) = 1;
  262. atomic_inc(&nmi_active);
  263. }
  264. }
  265. void stop_apic_nmi_watchdog(void *unused)
  266. {
  267. /* only support LOCAL and IO APICs for now */
  268. if (!nmi_watchdog_active())
  269. return;
  270. if (__get_cpu_var(wd_enabled) == 0)
  271. return;
  272. if (nmi_watchdog == NMI_LOCAL_APIC)
  273. lapic_watchdog_stop();
  274. __get_cpu_var(wd_enabled) = 0;
  275. atomic_dec(&nmi_active);
  276. }
  277. /*
  278. * the best way to detect whether a CPU has a 'hard lockup' problem
  279. * is to check it's local APIC timer IRQ counts. If they are not
  280. * changing then that CPU has some problem.
  281. *
  282. * as these watchdog NMI IRQs are generated on every CPU, we only
  283. * have to check the current processor.
  284. *
  285. * since NMIs don't listen to _any_ locks, we have to be extremely
  286. * careful not to rely on unsafe variables. The printk might lock
  287. * up though, so we have to break up any console locks first ...
  288. * [when there will be more tty-related locks, break them up here too!]
  289. */
  290. static DEFINE_PER_CPU(unsigned, last_irq_sum);
  291. static DEFINE_PER_CPU(local_t, alert_counter);
  292. static DEFINE_PER_CPU(int, nmi_touch);
  293. void touch_nmi_watchdog(void)
  294. {
  295. if (nmi_watchdog_active()) {
  296. unsigned cpu;
  297. /*
  298. * Tell other CPUs to reset their alert counters. We cannot
  299. * do it ourselves because the alert count increase is not
  300. * atomic.
  301. */
  302. for_each_present_cpu(cpu) {
  303. if (per_cpu(nmi_touch, cpu) != 1)
  304. per_cpu(nmi_touch, cpu) = 1;
  305. }
  306. }
  307. /*
  308. * Tickle the softlockup detector too:
  309. */
  310. touch_softlockup_watchdog();
  311. }
  312. EXPORT_SYMBOL(touch_nmi_watchdog);
  313. notrace __kprobes int
  314. nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
  315. {
  316. /*
  317. * Since current_thread_info()-> is always on the stack, and we
  318. * always switch the stack NMI-atomically, it's safe to use
  319. * smp_processor_id().
  320. */
  321. unsigned int sum;
  322. int touched = 0;
  323. int cpu = smp_processor_id();
  324. int rc = 0;
  325. /* check for other users first */
  326. if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
  327. == NOTIFY_STOP) {
  328. rc = 1;
  329. touched = 1;
  330. }
  331. sum = get_timer_irqs(cpu);
  332. if (__get_cpu_var(nmi_touch)) {
  333. __get_cpu_var(nmi_touch) = 0;
  334. touched = 1;
  335. }
  336. if (cpu_isset(cpu, backtrace_mask)) {
  337. static DEFINE_SPINLOCK(lock); /* Serialise the printks */
  338. spin_lock(&lock);
  339. printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
  340. dump_stack();
  341. spin_unlock(&lock);
  342. cpu_clear(cpu, backtrace_mask);
  343. }
  344. /* Could check oops_in_progress here too, but it's safer not to */
  345. if (mce_in_progress())
  346. touched = 1;
  347. /* if the none of the timers isn't firing, this cpu isn't doing much */
  348. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  349. /*
  350. * Ayiee, looks like this CPU is stuck ...
  351. * wait a few IRQs (5 seconds) before doing the oops ...
  352. */
  353. local_inc(&__get_cpu_var(alert_counter));
  354. if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz)
  355. /*
  356. * die_nmi will return ONLY if NOTIFY_STOP happens..
  357. */
  358. die_nmi("BUG: NMI Watchdog detected LOCKUP",
  359. regs, panic_on_timeout);
  360. } else {
  361. __get_cpu_var(last_irq_sum) = sum;
  362. local_set(&__get_cpu_var(alert_counter), 0);
  363. }
  364. /* see if the nmi watchdog went off */
  365. if (!__get_cpu_var(wd_enabled))
  366. return rc;
  367. switch (nmi_watchdog) {
  368. case NMI_LOCAL_APIC:
  369. rc |= lapic_wd_event(nmi_hz);
  370. break;
  371. case NMI_IO_APIC:
  372. /*
  373. * don't know how to accurately check for this.
  374. * just assume it was a watchdog timer interrupt
  375. * This matches the old behaviour.
  376. */
  377. rc = 1;
  378. break;
  379. }
  380. return rc;
  381. }
  382. #ifdef CONFIG_SYSCTL
  383. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
  384. {
  385. unsigned char reason = get_nmi_reason();
  386. char buf[64];
  387. sprintf(buf, "NMI received for unknown reason %02x\n", reason);
  388. die_nmi(buf, regs, 1); /* Always panic here */
  389. return 0;
  390. }
  391. /*
  392. * proc handler for /proc/sys/kernel/nmi
  393. */
  394. int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
  395. void __user *buffer, size_t *length, loff_t *ppos)
  396. {
  397. int old_state;
  398. nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
  399. old_state = nmi_watchdog_enabled;
  400. proc_dointvec(table, write, file, buffer, length, ppos);
  401. if (!!old_state == !!nmi_watchdog_enabled)
  402. return 0;
  403. if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) {
  404. printk(KERN_WARNING
  405. "NMI watchdog is permanently disabled\n");
  406. return -EIO;
  407. }
  408. if (nmi_watchdog == NMI_LOCAL_APIC) {
  409. if (nmi_watchdog_enabled)
  410. enable_lapic_nmi_watchdog();
  411. else
  412. disable_lapic_nmi_watchdog();
  413. } else {
  414. printk(KERN_WARNING
  415. "NMI watchdog doesn't know what hardware to touch\n");
  416. return -EIO;
  417. }
  418. return 0;
  419. }
  420. #endif /* CONFIG_SYSCTL */
  421. int do_nmi_callback(struct pt_regs *regs, int cpu)
  422. {
  423. #ifdef CONFIG_SYSCTL
  424. if (unknown_nmi_panic)
  425. return unknown_nmi_panic_callback(regs, cpu);
  426. #endif
  427. return 0;
  428. }
  429. void __trigger_all_cpu_backtrace(void)
  430. {
  431. int i;
  432. backtrace_mask = cpu_online_map;
  433. /* Wait for up to 10 seconds for all CPUs to do the backtrace */
  434. for (i = 0; i < 10 * 1000; i++) {
  435. if (cpus_empty(backtrace_mask))
  436. break;
  437. mdelay(1);
  438. }
  439. }