sysfs.c 16 KB

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  1. #include <linux/device.h>
  2. #include <linux/cpu.h>
  3. #include <linux/smp.h>
  4. #include <linux/percpu.h>
  5. #include <linux/init.h>
  6. #include <linux/sched.h>
  7. #include <linux/export.h>
  8. #include <linux/nodemask.h>
  9. #include <linux/cpumask.h>
  10. #include <linux/notifier.h>
  11. #include <asm/current.h>
  12. #include <asm/processor.h>
  13. #include <asm/cputable.h>
  14. #include <asm/hvcall.h>
  15. #include <asm/prom.h>
  16. #include <asm/machdep.h>
  17. #include <asm/smp.h>
  18. #include <asm/pmc.h>
  19. #include "cacheinfo.h"
  20. #ifdef CONFIG_PPC64
  21. #include <asm/paca.h>
  22. #include <asm/lppaca.h>
  23. #endif
  24. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  25. /*
  26. * SMT snooze delay stuff, 64-bit only for now
  27. */
  28. #ifdef CONFIG_PPC64
  29. /* Time in microseconds we delay before sleeping in the idle loop */
  30. DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
  31. static ssize_t store_smt_snooze_delay(struct device *dev,
  32. struct device_attribute *attr,
  33. const char *buf,
  34. size_t count)
  35. {
  36. struct cpu *cpu = container_of(dev, struct cpu, dev);
  37. ssize_t ret;
  38. long snooze;
  39. ret = sscanf(buf, "%ld", &snooze);
  40. if (ret != 1)
  41. return -EINVAL;
  42. per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
  43. update_smt_snooze_delay(snooze);
  44. return count;
  45. }
  46. static ssize_t show_smt_snooze_delay(struct device *dev,
  47. struct device_attribute *attr,
  48. char *buf)
  49. {
  50. struct cpu *cpu = container_of(dev, struct cpu, dev);
  51. return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
  52. }
  53. static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
  54. store_smt_snooze_delay);
  55. static int __init setup_smt_snooze_delay(char *str)
  56. {
  57. unsigned int cpu;
  58. long snooze;
  59. if (!cpu_has_feature(CPU_FTR_SMT))
  60. return 1;
  61. snooze = simple_strtol(str, NULL, 10);
  62. for_each_possible_cpu(cpu)
  63. per_cpu(smt_snooze_delay, cpu) = snooze;
  64. return 1;
  65. }
  66. __setup("smt-snooze-delay=", setup_smt_snooze_delay);
  67. #endif /* CONFIG_PPC64 */
  68. /*
  69. * Enabling PMCs will slow partition context switch times so we only do
  70. * it the first time we write to the PMCs.
  71. */
  72. static DEFINE_PER_CPU(char, pmcs_enabled);
  73. void ppc_enable_pmcs(void)
  74. {
  75. ppc_set_pmu_inuse(1);
  76. /* Only need to enable them once */
  77. if (__get_cpu_var(pmcs_enabled))
  78. return;
  79. __get_cpu_var(pmcs_enabled) = 1;
  80. if (ppc_md.enable_pmcs)
  81. ppc_md.enable_pmcs();
  82. }
  83. EXPORT_SYMBOL(ppc_enable_pmcs);
  84. #define SYSFS_PMCSETUP(NAME, ADDRESS) \
  85. static void read_##NAME(void *val) \
  86. { \
  87. *(unsigned long *)val = mfspr(ADDRESS); \
  88. } \
  89. static void write_##NAME(void *val) \
  90. { \
  91. ppc_enable_pmcs(); \
  92. mtspr(ADDRESS, *(unsigned long *)val); \
  93. } \
  94. static ssize_t show_##NAME(struct device *dev, \
  95. struct device_attribute *attr, \
  96. char *buf) \
  97. { \
  98. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  99. unsigned long val; \
  100. smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
  101. return sprintf(buf, "%lx\n", val); \
  102. } \
  103. static ssize_t __used \
  104. store_##NAME(struct device *dev, struct device_attribute *attr, \
  105. const char *buf, size_t count) \
  106. { \
  107. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  108. unsigned long val; \
  109. int ret = sscanf(buf, "%lx", &val); \
  110. if (ret != 1) \
  111. return -EINVAL; \
  112. smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
  113. return count; \
  114. }
  115. /* Let's define all possible registers, we'll only hook up the ones
  116. * that are implemented on the current processor
  117. */
  118. #if defined(CONFIG_PPC64)
  119. #define HAS_PPC_PMC_CLASSIC 1
  120. #define HAS_PPC_PMC_IBM 1
  121. #define HAS_PPC_PMC_PA6T 1
  122. #elif defined(CONFIG_6xx)
  123. #define HAS_PPC_PMC_CLASSIC 1
  124. #define HAS_PPC_PMC_IBM 1
  125. #define HAS_PPC_PMC_G4 1
  126. #endif
  127. #ifdef HAS_PPC_PMC_CLASSIC
  128. SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
  129. SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
  130. SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
  131. SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
  132. SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
  133. SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
  134. SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
  135. SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
  136. #ifdef HAS_PPC_PMC_G4
  137. SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
  138. #endif
  139. #ifdef CONFIG_PPC64
  140. SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
  141. SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
  142. SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
  143. SYSFS_PMCSETUP(purr, SPRN_PURR);
  144. SYSFS_PMCSETUP(spurr, SPRN_SPURR);
  145. SYSFS_PMCSETUP(dscr, SPRN_DSCR);
  146. SYSFS_PMCSETUP(pir, SPRN_PIR);
  147. static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
  148. static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
  149. static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
  150. static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
  151. static DEVICE_ATTR(pir, 0400, show_pir, NULL);
  152. unsigned long dscr_default = 0;
  153. EXPORT_SYMBOL(dscr_default);
  154. static ssize_t show_dscr_default(struct device *dev,
  155. struct device_attribute *attr, char *buf)
  156. {
  157. return sprintf(buf, "%lx\n", dscr_default);
  158. }
  159. static void update_dscr(void *dummy)
  160. {
  161. if (!current->thread.dscr_inherit)
  162. mtspr(SPRN_DSCR, dscr_default);
  163. }
  164. static ssize_t __used store_dscr_default(struct device *dev,
  165. struct device_attribute *attr, const char *buf,
  166. size_t count)
  167. {
  168. unsigned long val;
  169. int ret = 0;
  170. ret = sscanf(buf, "%lx", &val);
  171. if (ret != 1)
  172. return -EINVAL;
  173. dscr_default = val;
  174. on_each_cpu(update_dscr, NULL, 1);
  175. return count;
  176. }
  177. static DEVICE_ATTR(dscr_default, 0600,
  178. show_dscr_default, store_dscr_default);
  179. static void sysfs_create_dscr_default(void)
  180. {
  181. int err = 0;
  182. if (cpu_has_feature(CPU_FTR_DSCR))
  183. err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
  184. }
  185. #endif /* CONFIG_PPC64 */
  186. #ifdef HAS_PPC_PMC_PA6T
  187. SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
  188. SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
  189. SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
  190. SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
  191. SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
  192. SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
  193. #ifdef CONFIG_DEBUG_KERNEL
  194. SYSFS_PMCSETUP(hid0, SPRN_HID0);
  195. SYSFS_PMCSETUP(hid1, SPRN_HID1);
  196. SYSFS_PMCSETUP(hid4, SPRN_HID4);
  197. SYSFS_PMCSETUP(hid5, SPRN_HID5);
  198. SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
  199. SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
  200. SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
  201. SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
  202. SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
  203. SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
  204. SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
  205. SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
  206. SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
  207. SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
  208. SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
  209. SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
  210. SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
  211. SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
  212. SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
  213. SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
  214. SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
  215. SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
  216. SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
  217. SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
  218. SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
  219. SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
  220. SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
  221. SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
  222. #endif /* CONFIG_DEBUG_KERNEL */
  223. #endif /* HAS_PPC_PMC_PA6T */
  224. #ifdef HAS_PPC_PMC_IBM
  225. static struct device_attribute ibm_common_attrs[] = {
  226. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  227. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  228. };
  229. #endif /* HAS_PPC_PMC_G4 */
  230. #ifdef HAS_PPC_PMC_G4
  231. static struct device_attribute g4_common_attrs[] = {
  232. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  233. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  234. __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
  235. };
  236. #endif /* HAS_PPC_PMC_G4 */
  237. static struct device_attribute classic_pmc_attrs[] = {
  238. __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
  239. __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
  240. __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
  241. __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
  242. __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
  243. __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
  244. #ifdef CONFIG_PPC64
  245. __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
  246. __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
  247. #endif
  248. };
  249. #ifdef HAS_PPC_PMC_PA6T
  250. static struct device_attribute pa6t_attrs[] = {
  251. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  252. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  253. __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
  254. __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
  255. __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
  256. __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
  257. __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
  258. __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
  259. #ifdef CONFIG_DEBUG_KERNEL
  260. __ATTR(hid0, 0600, show_hid0, store_hid0),
  261. __ATTR(hid1, 0600, show_hid1, store_hid1),
  262. __ATTR(hid4, 0600, show_hid4, store_hid4),
  263. __ATTR(hid5, 0600, show_hid5, store_hid5),
  264. __ATTR(ima0, 0600, show_ima0, store_ima0),
  265. __ATTR(ima1, 0600, show_ima1, store_ima1),
  266. __ATTR(ima2, 0600, show_ima2, store_ima2),
  267. __ATTR(ima3, 0600, show_ima3, store_ima3),
  268. __ATTR(ima4, 0600, show_ima4, store_ima4),
  269. __ATTR(ima5, 0600, show_ima5, store_ima5),
  270. __ATTR(ima6, 0600, show_ima6, store_ima6),
  271. __ATTR(ima7, 0600, show_ima7, store_ima7),
  272. __ATTR(ima8, 0600, show_ima8, store_ima8),
  273. __ATTR(ima9, 0600, show_ima9, store_ima9),
  274. __ATTR(imaat, 0600, show_imaat, store_imaat),
  275. __ATTR(btcr, 0600, show_btcr, store_btcr),
  276. __ATTR(pccr, 0600, show_pccr, store_pccr),
  277. __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
  278. __ATTR(der, 0600, show_der, store_der),
  279. __ATTR(mer, 0600, show_mer, store_mer),
  280. __ATTR(ber, 0600, show_ber, store_ber),
  281. __ATTR(ier, 0600, show_ier, store_ier),
  282. __ATTR(sier, 0600, show_sier, store_sier),
  283. __ATTR(siar, 0600, show_siar, store_siar),
  284. __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
  285. __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
  286. __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
  287. __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
  288. #endif /* CONFIG_DEBUG_KERNEL */
  289. };
  290. #endif /* HAS_PPC_PMC_PA6T */
  291. #endif /* HAS_PPC_PMC_CLASSIC */
  292. static void __cpuinit register_cpu_online(unsigned int cpu)
  293. {
  294. struct cpu *c = &per_cpu(cpu_devices, cpu);
  295. struct device *s = &c->dev;
  296. struct device_attribute *attrs, *pmc_attrs;
  297. int i, nattrs;
  298. #ifdef CONFIG_PPC64
  299. if (cpu_has_feature(CPU_FTR_SMT))
  300. device_create_file(s, &dev_attr_smt_snooze_delay);
  301. #endif
  302. /* PMC stuff */
  303. switch (cur_cpu_spec->pmc_type) {
  304. #ifdef HAS_PPC_PMC_IBM
  305. case PPC_PMC_IBM:
  306. attrs = ibm_common_attrs;
  307. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  308. pmc_attrs = classic_pmc_attrs;
  309. break;
  310. #endif /* HAS_PPC_PMC_IBM */
  311. #ifdef HAS_PPC_PMC_G4
  312. case PPC_PMC_G4:
  313. attrs = g4_common_attrs;
  314. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  315. pmc_attrs = classic_pmc_attrs;
  316. break;
  317. #endif /* HAS_PPC_PMC_G4 */
  318. #ifdef HAS_PPC_PMC_PA6T
  319. case PPC_PMC_PA6T:
  320. /* PA Semi starts counting at PMC0 */
  321. attrs = pa6t_attrs;
  322. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  323. pmc_attrs = NULL;
  324. break;
  325. #endif /* HAS_PPC_PMC_PA6T */
  326. default:
  327. attrs = NULL;
  328. nattrs = 0;
  329. pmc_attrs = NULL;
  330. }
  331. for (i = 0; i < nattrs; i++)
  332. device_create_file(s, &attrs[i]);
  333. if (pmc_attrs)
  334. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  335. device_create_file(s, &pmc_attrs[i]);
  336. #ifdef CONFIG_PPC64
  337. if (cpu_has_feature(CPU_FTR_MMCRA))
  338. device_create_file(s, &dev_attr_mmcra);
  339. if (cpu_has_feature(CPU_FTR_PURR))
  340. device_create_file(s, &dev_attr_purr);
  341. if (cpu_has_feature(CPU_FTR_SPURR))
  342. device_create_file(s, &dev_attr_spurr);
  343. if (cpu_has_feature(CPU_FTR_DSCR))
  344. device_create_file(s, &dev_attr_dscr);
  345. if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
  346. device_create_file(s, &dev_attr_pir);
  347. #endif /* CONFIG_PPC64 */
  348. cacheinfo_cpu_online(cpu);
  349. }
  350. #ifdef CONFIG_HOTPLUG_CPU
  351. static void unregister_cpu_online(unsigned int cpu)
  352. {
  353. struct cpu *c = &per_cpu(cpu_devices, cpu);
  354. struct device *s = &c->dev;
  355. struct device_attribute *attrs, *pmc_attrs;
  356. int i, nattrs;
  357. BUG_ON(!c->hotpluggable);
  358. #ifdef CONFIG_PPC64
  359. if (cpu_has_feature(CPU_FTR_SMT))
  360. device_remove_file(s, &dev_attr_smt_snooze_delay);
  361. #endif
  362. /* PMC stuff */
  363. switch (cur_cpu_spec->pmc_type) {
  364. #ifdef HAS_PPC_PMC_IBM
  365. case PPC_PMC_IBM:
  366. attrs = ibm_common_attrs;
  367. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  368. pmc_attrs = classic_pmc_attrs;
  369. break;
  370. #endif /* HAS_PPC_PMC_IBM */
  371. #ifdef HAS_PPC_PMC_G4
  372. case PPC_PMC_G4:
  373. attrs = g4_common_attrs;
  374. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  375. pmc_attrs = classic_pmc_attrs;
  376. break;
  377. #endif /* HAS_PPC_PMC_G4 */
  378. #ifdef HAS_PPC_PMC_PA6T
  379. case PPC_PMC_PA6T:
  380. /* PA Semi starts counting at PMC0 */
  381. attrs = pa6t_attrs;
  382. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  383. pmc_attrs = NULL;
  384. break;
  385. #endif /* HAS_PPC_PMC_PA6T */
  386. default:
  387. attrs = NULL;
  388. nattrs = 0;
  389. pmc_attrs = NULL;
  390. }
  391. for (i = 0; i < nattrs; i++)
  392. device_remove_file(s, &attrs[i]);
  393. if (pmc_attrs)
  394. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  395. device_remove_file(s, &pmc_attrs[i]);
  396. #ifdef CONFIG_PPC64
  397. if (cpu_has_feature(CPU_FTR_MMCRA))
  398. device_remove_file(s, &dev_attr_mmcra);
  399. if (cpu_has_feature(CPU_FTR_PURR))
  400. device_remove_file(s, &dev_attr_purr);
  401. if (cpu_has_feature(CPU_FTR_SPURR))
  402. device_remove_file(s, &dev_attr_spurr);
  403. if (cpu_has_feature(CPU_FTR_DSCR))
  404. device_remove_file(s, &dev_attr_dscr);
  405. if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
  406. device_remove_file(s, &dev_attr_pir);
  407. #endif /* CONFIG_PPC64 */
  408. cacheinfo_cpu_offline(cpu);
  409. }
  410. #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
  411. ssize_t arch_cpu_probe(const char *buf, size_t count)
  412. {
  413. if (ppc_md.cpu_probe)
  414. return ppc_md.cpu_probe(buf, count);
  415. return -EINVAL;
  416. }
  417. ssize_t arch_cpu_release(const char *buf, size_t count)
  418. {
  419. if (ppc_md.cpu_release)
  420. return ppc_md.cpu_release(buf, count);
  421. return -EINVAL;
  422. }
  423. #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
  424. #endif /* CONFIG_HOTPLUG_CPU */
  425. static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
  426. unsigned long action, void *hcpu)
  427. {
  428. unsigned int cpu = (unsigned int)(long)hcpu;
  429. switch (action) {
  430. case CPU_ONLINE:
  431. case CPU_ONLINE_FROZEN:
  432. register_cpu_online(cpu);
  433. break;
  434. #ifdef CONFIG_HOTPLUG_CPU
  435. case CPU_DEAD:
  436. case CPU_DEAD_FROZEN:
  437. unregister_cpu_online(cpu);
  438. break;
  439. #endif
  440. }
  441. return NOTIFY_OK;
  442. }
  443. static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
  444. .notifier_call = sysfs_cpu_notify,
  445. };
  446. static DEFINE_MUTEX(cpu_mutex);
  447. int cpu_add_dev_attr(struct device_attribute *attr)
  448. {
  449. int cpu;
  450. mutex_lock(&cpu_mutex);
  451. for_each_possible_cpu(cpu) {
  452. device_create_file(get_cpu_device(cpu), attr);
  453. }
  454. mutex_unlock(&cpu_mutex);
  455. return 0;
  456. }
  457. EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
  458. int cpu_add_dev_attr_group(struct attribute_group *attrs)
  459. {
  460. int cpu;
  461. struct device *dev;
  462. int ret;
  463. mutex_lock(&cpu_mutex);
  464. for_each_possible_cpu(cpu) {
  465. dev = get_cpu_device(cpu);
  466. ret = sysfs_create_group(&dev->kobj, attrs);
  467. WARN_ON(ret != 0);
  468. }
  469. mutex_unlock(&cpu_mutex);
  470. return 0;
  471. }
  472. EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
  473. void cpu_remove_dev_attr(struct device_attribute *attr)
  474. {
  475. int cpu;
  476. mutex_lock(&cpu_mutex);
  477. for_each_possible_cpu(cpu) {
  478. device_remove_file(get_cpu_device(cpu), attr);
  479. }
  480. mutex_unlock(&cpu_mutex);
  481. }
  482. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
  483. void cpu_remove_dev_attr_group(struct attribute_group *attrs)
  484. {
  485. int cpu;
  486. struct device *dev;
  487. mutex_lock(&cpu_mutex);
  488. for_each_possible_cpu(cpu) {
  489. dev = get_cpu_device(cpu);
  490. sysfs_remove_group(&dev->kobj, attrs);
  491. }
  492. mutex_unlock(&cpu_mutex);
  493. }
  494. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
  495. /* NUMA stuff */
  496. #ifdef CONFIG_NUMA
  497. static void register_nodes(void)
  498. {
  499. int i;
  500. for (i = 0; i < MAX_NUMNODES; i++)
  501. register_one_node(i);
  502. }
  503. int sysfs_add_device_to_node(struct device *dev, int nid)
  504. {
  505. struct node *node = &node_devices[nid];
  506. return sysfs_create_link(&node->dev.kobj, &dev->kobj,
  507. kobject_name(&dev->kobj));
  508. }
  509. EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
  510. void sysfs_remove_device_from_node(struct device *dev, int nid)
  511. {
  512. struct node *node = &node_devices[nid];
  513. sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
  514. }
  515. EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
  516. #else
  517. static void register_nodes(void)
  518. {
  519. return;
  520. }
  521. #endif
  522. /* Only valid if CPU is present. */
  523. static ssize_t show_physical_id(struct device *dev,
  524. struct device_attribute *attr, char *buf)
  525. {
  526. struct cpu *cpu = container_of(dev, struct cpu, dev);
  527. return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
  528. }
  529. static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
  530. static int __init topology_init(void)
  531. {
  532. int cpu;
  533. register_nodes();
  534. register_cpu_notifier(&sysfs_cpu_nb);
  535. for_each_possible_cpu(cpu) {
  536. struct cpu *c = &per_cpu(cpu_devices, cpu);
  537. /*
  538. * For now, we just see if the system supports making
  539. * the RTAS calls for CPU hotplug. But, there may be a
  540. * more comprehensive way to do this for an individual
  541. * CPU. For instance, the boot cpu might never be valid
  542. * for hotplugging.
  543. */
  544. if (ppc_md.cpu_die)
  545. c->hotpluggable = 1;
  546. if (cpu_online(cpu) || c->hotpluggable) {
  547. register_cpu(c, cpu);
  548. device_create_file(&c->dev, &dev_attr_physical_id);
  549. }
  550. if (cpu_online(cpu))
  551. register_cpu_online(cpu);
  552. }
  553. #ifdef CONFIG_PPC64
  554. sysfs_create_dscr_default();
  555. #endif /* CONFIG_PPC64 */
  556. return 0;
  557. }
  558. subsys_initcall(topology_init);