Kconfig.cpu 9.5 KB

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  1. # Put here option for CPU selection and depending optimization
  2. if !X86_ELAN
  3. choice
  4. prompt "Processor family"
  5. default M686
  6. config M386
  7. bool "386"
  8. depends on !UML
  9. ---help---
  10. This is the processor type of your CPU. This information is used for
  11. optimizing purposes. In order to compile a kernel that can run on
  12. all x86 CPU types (albeit not optimally fast), you can specify
  13. "386" here.
  14. The kernel will not necessarily run on earlier architectures than
  15. the one you have chosen, e.g. a Pentium optimized kernel will run on
  16. a PPro, but not necessarily on a i486.
  17. Here are the settings recommended for greatest speed:
  18. - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
  19. 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
  20. will run on a 386 class machine.
  21. - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
  22. SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
  23. - "586" for generic Pentium CPUs lacking the TSC
  24. (time stamp counter) register.
  25. - "Pentium-Classic" for the Intel Pentium.
  26. - "Pentium-MMX" for the Intel Pentium MMX.
  27. - "Pentium-Pro" for the Intel Pentium Pro.
  28. - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
  29. - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
  30. - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
  31. - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
  32. - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
  33. - "Crusoe" for the Transmeta Crusoe series.
  34. - "Efficeon" for the Transmeta Efficeon series.
  35. - "Winchip-C6" for original IDT Winchip.
  36. - "Winchip-2" for IDT Winchip 2.
  37. - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
  38. - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
  39. - "Geode GX/LX" For AMD Geode GX and LX processors.
  40. - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
  41. - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
  42. If you don't know what to do, choose "386".
  43. config M486
  44. bool "486"
  45. help
  46. Select this for a 486 series processor, either Intel or one of the
  47. compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
  48. DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
  49. U5S.
  50. config M586
  51. bool "586/K5/5x86/6x86/6x86MX"
  52. help
  53. Select this for an 586 or 686 series processor such as the AMD K5,
  54. the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
  55. assume the RDTSC (Read Time Stamp Counter) instruction.
  56. config M586TSC
  57. bool "Pentium-Classic"
  58. help
  59. Select this for a Pentium Classic processor with the RDTSC (Read
  60. Time Stamp Counter) instruction for benchmarking.
  61. config M586MMX
  62. bool "Pentium-MMX"
  63. help
  64. Select this for a Pentium with the MMX graphics/multimedia
  65. extended instructions.
  66. config M686
  67. bool "Pentium-Pro"
  68. help
  69. Select this for Intel Pentium Pro chips. This enables the use of
  70. Pentium Pro extended instructions, and disables the init-time guard
  71. against the f00f bug found in earlier Pentiums.
  72. config MPENTIUMII
  73. bool "Pentium-II/Celeron(pre-Coppermine)"
  74. help
  75. Select this for Intel chips based on the Pentium-II and
  76. pre-Coppermine Celeron core. This option enables an unaligned
  77. copy optimization, compiles the kernel with optimization flags
  78. tailored for the chip, and applies any applicable Pentium Pro
  79. optimizations.
  80. config MPENTIUMIII
  81. bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
  82. help
  83. Select this for Intel chips based on the Pentium-III and
  84. Celeron-Coppermine core. This option enables use of some
  85. extended prefetch instructions in addition to the Pentium II
  86. extensions.
  87. config MPENTIUMM
  88. bool "Pentium M"
  89. help
  90. Select this for Intel Pentium M (not Pentium-4 M)
  91. notebook chips.
  92. config MCORE2
  93. bool "Core 2/newer Xeon"
  94. help
  95. Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
  96. CPUs. You can distingush newer from older Xeons by the CPU family
  97. in /proc/cpuinfo. Newer ones have 6.
  98. config MPENTIUM4
  99. bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
  100. help
  101. Select this for Intel Pentium 4 chips. This includes the
  102. Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
  103. (not Pentium M) chips. This option enables compile flags
  104. optimized for the chip, uses the correct cache shift, and
  105. applies any applicable Pentium III optimizations.
  106. config MK6
  107. bool "K6/K6-II/K6-III"
  108. help
  109. Select this for an AMD K6-family processor. Enables use of
  110. some extended instructions, and passes appropriate optimization
  111. flags to GCC.
  112. config MK7
  113. bool "Athlon/Duron/K7"
  114. help
  115. Select this for an AMD Athlon K7-family processor. Enables use of
  116. some extended instructions, and passes appropriate optimization
  117. flags to GCC.
  118. config MK8
  119. bool "Opteron/Athlon64/Hammer/K8"
  120. help
  121. Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
  122. use of some extended instructions, and passes appropriate optimization
  123. flags to GCC.
  124. config MCRUSOE
  125. bool "Crusoe"
  126. help
  127. Select this for a Transmeta Crusoe processor. Treats the processor
  128. like a 586 with TSC, and sets some GCC optimization flags (like a
  129. Pentium Pro with no alignment requirements).
  130. config MEFFICEON
  131. bool "Efficeon"
  132. help
  133. Select this for a Transmeta Efficeon processor.
  134. config MWINCHIPC6
  135. bool "Winchip-C6"
  136. help
  137. Select this for an IDT Winchip C6 chip. Linux and GCC
  138. treat this chip as a 586TSC with some extended instructions
  139. and alignment requirements.
  140. config MWINCHIP2
  141. bool "Winchip-2"
  142. help
  143. Select this for an IDT Winchip-2. Linux and GCC
  144. treat this chip as a 586TSC with some extended instructions
  145. and alignment requirements.
  146. config MWINCHIP3D
  147. bool "Winchip-2A/Winchip-3"
  148. help
  149. Select this for an IDT Winchip-2A or 3. Linux and GCC
  150. treat this chip as a 586TSC with some extended instructions
  151. and alignment reqirements. Also enable out of order memory
  152. stores for this CPU, which can increase performance of some
  153. operations.
  154. config MGEODEGX1
  155. bool "GeodeGX1"
  156. help
  157. Select this for a Geode GX1 (Cyrix MediaGX) chip.
  158. config MGEODE_LX
  159. bool "Geode GX/LX"
  160. help
  161. Select this for AMD Geode GX and LX processors.
  162. config MCYRIXIII
  163. bool "CyrixIII/VIA-C3"
  164. help
  165. Select this for a Cyrix III or C3 chip. Presently Linux and GCC
  166. treat this chip as a generic 586. Whilst the CPU is 686 class,
  167. it lacks the cmov extension which gcc assumes is present when
  168. generating 686 code.
  169. Note that Nehemiah (Model 9) and above will not boot with this
  170. kernel due to them lacking the 3DNow! instructions used in earlier
  171. incarnations of the CPU.
  172. config MVIAC3_2
  173. bool "VIA C3-2 (Nehemiah)"
  174. help
  175. Select this for a VIA C3 "Nehemiah". Selecting this enables usage
  176. of SSE and tells gcc to treat the CPU as a 686.
  177. Note, this kernel will not boot on older (pre model 9) C3s.
  178. endchoice
  179. config X86_GENERIC
  180. bool "Generic x86 support"
  181. help
  182. Instead of just including optimizations for the selected
  183. x86 variant (e.g. PII, Crusoe or Athlon), include some more
  184. generic optimizations as well. This will make the kernel
  185. perform better on x86 CPUs other than that selected.
  186. This is really intended for distributors who need more
  187. generic optimizations.
  188. endif
  189. #
  190. # Define implied options from the CPU selection here
  191. #
  192. config X86_CMPXCHG
  193. bool
  194. depends on !M386
  195. default y
  196. config X86_XADD
  197. bool
  198. depends on !M386
  199. default y
  200. config X86_L1_CACHE_SHIFT
  201. int
  202. default "7" if MPENTIUM4 || X86_GENERIC
  203. default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
  204. default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
  205. default "6" if MK7 || MK8 || MPENTIUMM || MCORE2
  206. config RWSEM_GENERIC_SPINLOCK
  207. bool
  208. depends on M386
  209. default y
  210. config RWSEM_XCHGADD_ALGORITHM
  211. bool
  212. depends on !M386
  213. default y
  214. config ARCH_HAS_ILOG2_U32
  215. bool
  216. default n
  217. config ARCH_HAS_ILOG2_U64
  218. bool
  219. default n
  220. config GENERIC_CALIBRATE_DELAY
  221. bool
  222. default y
  223. config X86_PPRO_FENCE
  224. bool
  225. depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
  226. default y
  227. config X86_F00F_BUG
  228. bool
  229. depends on M586MMX || M586TSC || M586 || M486 || M386
  230. default y
  231. config X86_WP_WORKS_OK
  232. bool
  233. depends on !M386
  234. default y
  235. config X86_INVLPG
  236. bool
  237. depends on !M386
  238. default y
  239. config X86_BSWAP
  240. bool
  241. depends on !M386
  242. default y
  243. config X86_POPAD_OK
  244. bool
  245. depends on !M386
  246. default y
  247. config X86_CMPXCHG64
  248. bool
  249. depends on !M386 && !M486
  250. default y
  251. config X86_ALIGNMENT_16
  252. bool
  253. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
  254. default y
  255. config X86_GOOD_APIC
  256. bool
  257. depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2
  258. default y
  259. config X86_INTEL_USERCOPY
  260. bool
  261. depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
  262. default y
  263. config X86_USE_PPRO_CHECKSUM
  264. bool
  265. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2
  266. default y
  267. config X86_USE_3DNOW
  268. bool
  269. depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
  270. default y
  271. config X86_OOSTORE
  272. bool
  273. depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
  274. default y
  275. config X86_TSC
  276. bool
  277. depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ
  278. default y