mpc834x_mds.dts 7.5 KB

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  1. /*
  2. * MPC8349E MDS Device Tree Source
  3. *
  4. * Copyright 2005, 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8349EMDS";
  13. compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8349@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <8000>; // L1, 32K
  25. i-cache-size = <8000>; // L1, 32K
  26. timebase-frequency = <0>; // from bootloader
  27. bus-frequency = <0>; // from bootloader
  28. clock-frequency = <0>; // from bootloader
  29. };
  30. };
  31. memory {
  32. device_type = "memory";
  33. reg = <00000000 10000000>; // 256MB at 0
  34. };
  35. bcsr@e2400000 {
  36. device_type = "board-control";
  37. reg = <e2400000 8000>;
  38. };
  39. soc8349@e0000000 {
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. device_type = "soc";
  43. ranges = <0 e0000000 00100000>;
  44. reg = <e0000000 00000200>;
  45. bus-frequency = <0>;
  46. wdt@200 {
  47. device_type = "watchdog";
  48. compatible = "mpc83xx_wdt";
  49. reg = <200 100>;
  50. };
  51. i2c@3000 {
  52. device_type = "i2c";
  53. compatible = "fsl-i2c";
  54. reg = <3000 100>;
  55. interrupts = <e 8>;
  56. interrupt-parent = < &ipic >;
  57. dfsrr;
  58. };
  59. i2c@3100 {
  60. device_type = "i2c";
  61. compatible = "fsl-i2c";
  62. reg = <3100 100>;
  63. interrupts = <f 8>;
  64. interrupt-parent = < &ipic >;
  65. dfsrr;
  66. };
  67. spi@7000 {
  68. device_type = "spi";
  69. compatible = "mpc83xx_spi";
  70. reg = <7000 1000>;
  71. interrupts = <10 8>;
  72. interrupt-parent = < &ipic >;
  73. mode = <0>;
  74. };
  75. /* phy type (ULPI or SERIAL) are only types supportted for MPH */
  76. /* port = 0 or 1 */
  77. usb@22000 {
  78. device_type = "usb";
  79. compatible = "fsl-usb2-mph";
  80. reg = <22000 1000>;
  81. #address-cells = <1>;
  82. #size-cells = <0>;
  83. interrupt-parent = < &ipic >;
  84. interrupts = <27 8>;
  85. phy_type = "ulpi";
  86. port1;
  87. };
  88. /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  89. usb@23000 {
  90. device_type = "usb";
  91. compatible = "fsl-usb2-dr";
  92. reg = <23000 1000>;
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. interrupt-parent = < &ipic >;
  96. interrupts = <26 8>;
  97. dr_mode = "otg";
  98. phy_type = "ulpi";
  99. };
  100. mdio@24520 {
  101. device_type = "mdio";
  102. compatible = "gianfar";
  103. reg = <24520 20>;
  104. #address-cells = <1>;
  105. #size-cells = <0>;
  106. phy0: ethernet-phy@0 {
  107. interrupt-parent = < &ipic >;
  108. interrupts = <11 8>;
  109. reg = <0>;
  110. device_type = "ethernet-phy";
  111. };
  112. phy1: ethernet-phy@1 {
  113. interrupt-parent = < &ipic >;
  114. interrupts = <12 8>;
  115. reg = <1>;
  116. device_type = "ethernet-phy";
  117. };
  118. };
  119. ethernet@24000 {
  120. device_type = "network";
  121. model = "TSEC";
  122. compatible = "gianfar";
  123. reg = <24000 1000>;
  124. /*
  125. * address is deprecated and will be removed
  126. * in 2.6.25. Only recent versions of
  127. * U-Boot support local-mac-address, however.
  128. */
  129. address = [ 00 00 00 00 00 00 ];
  130. local-mac-address = [ 00 00 00 00 00 00 ];
  131. interrupts = <20 8 21 8 22 8>;
  132. interrupt-parent = < &ipic >;
  133. phy-handle = < &phy0 >;
  134. };
  135. ethernet@25000 {
  136. #address-cells = <1>;
  137. #size-cells = <0>;
  138. device_type = "network";
  139. model = "TSEC";
  140. compatible = "gianfar";
  141. reg = <25000 1000>;
  142. /*
  143. * address is deprecated and will be removed
  144. * in 2.6.25. Only recent versions of
  145. * U-Boot support local-mac-address, however.
  146. */
  147. address = [ 00 00 00 00 00 00 ];
  148. local-mac-address = [ 00 00 00 00 00 00 ];
  149. interrupts = <23 8 24 8 25 8>;
  150. interrupt-parent = < &ipic >;
  151. phy-handle = < &phy1 >;
  152. };
  153. serial@4500 {
  154. device_type = "serial";
  155. compatible = "ns16550";
  156. reg = <4500 100>;
  157. clock-frequency = <0>;
  158. interrupts = <9 8>;
  159. interrupt-parent = < &ipic >;
  160. };
  161. serial@4600 {
  162. device_type = "serial";
  163. compatible = "ns16550";
  164. reg = <4600 100>;
  165. clock-frequency = <0>;
  166. interrupts = <a 8>;
  167. interrupt-parent = < &ipic >;
  168. };
  169. /* May need to remove if on a part without crypto engine */
  170. crypto@30000 {
  171. device_type = "crypto";
  172. model = "SEC2";
  173. compatible = "talitos";
  174. reg = <30000 10000>;
  175. interrupts = <b 8>;
  176. interrupt-parent = < &ipic >;
  177. num-channels = <4>;
  178. channel-fifo-len = <18>;
  179. exec-units-mask = <0000007e>;
  180. /* desc mask is for rev2.0,
  181. * we need runtime fixup for >2.0 */
  182. descriptor-types-mask = <01010ebf>;
  183. };
  184. /* IPIC
  185. * interrupts cell = <intr #, sense>
  186. * sense values match linux IORESOURCE_IRQ_* defines:
  187. * sense == 8: Level, low assertion
  188. * sense == 2: Edge, high-to-low change
  189. */
  190. ipic: pic@700 {
  191. interrupt-controller;
  192. #address-cells = <0>;
  193. #interrupt-cells = <2>;
  194. reg = <700 100>;
  195. device_type = "ipic";
  196. };
  197. };
  198. pci@e0008500 {
  199. interrupt-map-mask = <f800 0 0 7>;
  200. interrupt-map = <
  201. /* IDSEL 0x11 */
  202. 8800 0 0 1 &ipic 14 8
  203. 8800 0 0 2 &ipic 15 8
  204. 8800 0 0 3 &ipic 16 8
  205. 8800 0 0 4 &ipic 17 8
  206. /* IDSEL 0x12 */
  207. 9000 0 0 1 &ipic 16 8
  208. 9000 0 0 2 &ipic 17 8
  209. 9000 0 0 3 &ipic 14 8
  210. 9000 0 0 4 &ipic 15 8
  211. /* IDSEL 0x13 */
  212. 9800 0 0 1 &ipic 17 8
  213. 9800 0 0 2 &ipic 14 8
  214. 9800 0 0 3 &ipic 15 8
  215. 9800 0 0 4 &ipic 16 8
  216. /* IDSEL 0x15 */
  217. a800 0 0 1 &ipic 14 8
  218. a800 0 0 2 &ipic 15 8
  219. a800 0 0 3 &ipic 16 8
  220. a800 0 0 4 &ipic 17 8
  221. /* IDSEL 0x16 */
  222. b000 0 0 1 &ipic 17 8
  223. b000 0 0 2 &ipic 14 8
  224. b000 0 0 3 &ipic 15 8
  225. b000 0 0 4 &ipic 16 8
  226. /* IDSEL 0x17 */
  227. b800 0 0 1 &ipic 16 8
  228. b800 0 0 2 &ipic 17 8
  229. b800 0 0 3 &ipic 14 8
  230. b800 0 0 4 &ipic 15 8
  231. /* IDSEL 0x18 */
  232. c000 0 0 1 &ipic 15 8
  233. c000 0 0 2 &ipic 16 8
  234. c000 0 0 3 &ipic 17 8
  235. c000 0 0 4 &ipic 14 8>;
  236. interrupt-parent = < &ipic >;
  237. interrupts = <42 8>;
  238. bus-range = <0 0>;
  239. ranges = <02000000 0 90000000 90000000 0 10000000
  240. 42000000 0 80000000 80000000 0 10000000
  241. 01000000 0 00000000 e2000000 0 00100000>;
  242. clock-frequency = <3f940aa>;
  243. #interrupt-cells = <1>;
  244. #size-cells = <2>;
  245. #address-cells = <3>;
  246. reg = <e0008500 100>;
  247. compatible = "fsl,mpc8349-pci";
  248. device_type = "pci";
  249. };
  250. pci@e0008600 {
  251. interrupt-map-mask = <f800 0 0 7>;
  252. interrupt-map = <
  253. /* IDSEL 0x11 */
  254. 8800 0 0 1 &ipic 14 8
  255. 8800 0 0 2 &ipic 15 8
  256. 8800 0 0 3 &ipic 16 8
  257. 8800 0 0 4 &ipic 17 8
  258. /* IDSEL 0x12 */
  259. 9000 0 0 1 &ipic 16 8
  260. 9000 0 0 2 &ipic 17 8
  261. 9000 0 0 3 &ipic 14 8
  262. 9000 0 0 4 &ipic 15 8
  263. /* IDSEL 0x13 */
  264. 9800 0 0 1 &ipic 17 8
  265. 9800 0 0 2 &ipic 14 8
  266. 9800 0 0 3 &ipic 15 8
  267. 9800 0 0 4 &ipic 16 8
  268. /* IDSEL 0x15 */
  269. a800 0 0 1 &ipic 14 8
  270. a800 0 0 2 &ipic 15 8
  271. a800 0 0 3 &ipic 16 8
  272. a800 0 0 4 &ipic 17 8
  273. /* IDSEL 0x16 */
  274. b000 0 0 1 &ipic 17 8
  275. b000 0 0 2 &ipic 14 8
  276. b000 0 0 3 &ipic 15 8
  277. b000 0 0 4 &ipic 16 8
  278. /* IDSEL 0x17 */
  279. b800 0 0 1 &ipic 16 8
  280. b800 0 0 2 &ipic 17 8
  281. b800 0 0 3 &ipic 14 8
  282. b800 0 0 4 &ipic 15 8
  283. /* IDSEL 0x18 */
  284. c000 0 0 1 &ipic 15 8
  285. c000 0 0 2 &ipic 16 8
  286. c000 0 0 3 &ipic 17 8
  287. c000 0 0 4 &ipic 14 8>;
  288. interrupt-parent = < &ipic >;
  289. interrupts = <42 8>;
  290. bus-range = <0 0>;
  291. ranges = <02000000 0 b0000000 b0000000 0 10000000
  292. 42000000 0 a0000000 a0000000 0 10000000
  293. 01000000 0 00000000 e2100000 0 00100000>;
  294. clock-frequency = <3f940aa>;
  295. #interrupt-cells = <1>;
  296. #size-cells = <2>;
  297. #address-cells = <3>;
  298. reg = <e0008600 100>;
  299. compatible = "fsl,mpc8349-pci";
  300. device_type = "pci";
  301. };
  302. };