aesni-intel_glue.c 32 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148
  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <asm/cpu_device_id.h>
  31. #include <asm/i387.h>
  32. #include <asm/crypto/aes.h>
  33. #include <asm/crypto/ablk_helper.h>
  34. #include <crypto/scatterwalk.h>
  35. #include <crypto/internal/aead.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/spinlock.h>
  38. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  39. #define HAS_CTR
  40. #endif
  41. #if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
  42. #define HAS_LRW
  43. #endif
  44. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  45. #define HAS_PCBC
  46. #endif
  47. #if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
  48. #define HAS_XTS
  49. #endif
  50. /* This data is stored at the end of the crypto_tfm struct.
  51. * It's a type of per "session" data storage location.
  52. * This needs to be 16 byte aligned.
  53. */
  54. struct aesni_rfc4106_gcm_ctx {
  55. u8 hash_subkey[16];
  56. struct crypto_aes_ctx aes_key_expanded;
  57. u8 nonce[4];
  58. struct cryptd_aead *cryptd_tfm;
  59. };
  60. struct aesni_gcm_set_hash_subkey_result {
  61. int err;
  62. struct completion completion;
  63. };
  64. struct aesni_hash_subkey_req_data {
  65. u8 iv[16];
  66. struct aesni_gcm_set_hash_subkey_result result;
  67. struct scatterlist sg;
  68. };
  69. #define AESNI_ALIGN (16)
  70. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  71. #define RFC4106_HASH_SUBKEY_SIZE 16
  72. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  73. unsigned int key_len);
  74. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  75. const u8 *in);
  76. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in, unsigned int len);
  80. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len, u8 *iv);
  84. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. int crypto_fpu_init(void);
  87. void crypto_fpu_exit(void);
  88. #ifdef CONFIG_X86_64
  89. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  90. const u8 *in, unsigned int len, u8 *iv);
  91. /* asmlinkage void aesni_gcm_enc()
  92. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  93. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  94. * const u8 *in, Plaintext input
  95. * unsigned long plaintext_len, Length of data in bytes for encryption.
  96. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  97. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  98. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  99. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  100. * const u8 *aad, Additional Authentication Data (AAD)
  101. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  102. * is going to be 8 or 12 bytes
  103. * u8 *auth_tag, Authenticated Tag output.
  104. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  105. * Valid values are 16 (most likely), 12 or 8.
  106. */
  107. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  108. const u8 *in, unsigned long plaintext_len, u8 *iv,
  109. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  110. u8 *auth_tag, unsigned long auth_tag_len);
  111. /* asmlinkage void aesni_gcm_dec()
  112. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  113. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  114. * const u8 *in, Ciphertext input
  115. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  116. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  117. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  118. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  119. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  120. * const u8 *aad, Additional Authentication Data (AAD)
  121. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  122. * to be 8 or 12 bytes
  123. * u8 *auth_tag, Authenticated Tag output.
  124. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  125. * Valid values are 16 (most likely), 12 or 8.
  126. */
  127. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  128. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  129. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  130. u8 *auth_tag, unsigned long auth_tag_len);
  131. static inline struct
  132. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  133. {
  134. return
  135. (struct aesni_rfc4106_gcm_ctx *)
  136. PTR_ALIGN((u8 *)
  137. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  138. }
  139. #endif
  140. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  141. {
  142. unsigned long addr = (unsigned long)raw_ctx;
  143. unsigned long align = AESNI_ALIGN;
  144. if (align <= crypto_tfm_ctx_alignment())
  145. align = 1;
  146. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  147. }
  148. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  149. const u8 *in_key, unsigned int key_len)
  150. {
  151. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  152. u32 *flags = &tfm->crt_flags;
  153. int err;
  154. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  155. key_len != AES_KEYSIZE_256) {
  156. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  157. return -EINVAL;
  158. }
  159. if (!irq_fpu_usable())
  160. err = crypto_aes_expand_key(ctx, in_key, key_len);
  161. else {
  162. kernel_fpu_begin();
  163. err = aesni_set_key(ctx, in_key, key_len);
  164. kernel_fpu_end();
  165. }
  166. return err;
  167. }
  168. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  169. unsigned int key_len)
  170. {
  171. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  172. }
  173. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  174. {
  175. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  176. if (!irq_fpu_usable())
  177. crypto_aes_encrypt_x86(ctx, dst, src);
  178. else {
  179. kernel_fpu_begin();
  180. aesni_enc(ctx, dst, src);
  181. kernel_fpu_end();
  182. }
  183. }
  184. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  185. {
  186. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  187. if (!irq_fpu_usable())
  188. crypto_aes_decrypt_x86(ctx, dst, src);
  189. else {
  190. kernel_fpu_begin();
  191. aesni_dec(ctx, dst, src);
  192. kernel_fpu_end();
  193. }
  194. }
  195. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  196. {
  197. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  198. aesni_enc(ctx, dst, src);
  199. }
  200. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  201. {
  202. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  203. aesni_dec(ctx, dst, src);
  204. }
  205. static int ecb_encrypt(struct blkcipher_desc *desc,
  206. struct scatterlist *dst, struct scatterlist *src,
  207. unsigned int nbytes)
  208. {
  209. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  210. struct blkcipher_walk walk;
  211. int err;
  212. blkcipher_walk_init(&walk, dst, src, nbytes);
  213. err = blkcipher_walk_virt(desc, &walk);
  214. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  215. kernel_fpu_begin();
  216. while ((nbytes = walk.nbytes)) {
  217. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  218. nbytes & AES_BLOCK_MASK);
  219. nbytes &= AES_BLOCK_SIZE - 1;
  220. err = blkcipher_walk_done(desc, &walk, nbytes);
  221. }
  222. kernel_fpu_end();
  223. return err;
  224. }
  225. static int ecb_decrypt(struct blkcipher_desc *desc,
  226. struct scatterlist *dst, struct scatterlist *src,
  227. unsigned int nbytes)
  228. {
  229. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  230. struct blkcipher_walk walk;
  231. int err;
  232. blkcipher_walk_init(&walk, dst, src, nbytes);
  233. err = blkcipher_walk_virt(desc, &walk);
  234. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  235. kernel_fpu_begin();
  236. while ((nbytes = walk.nbytes)) {
  237. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  238. nbytes & AES_BLOCK_MASK);
  239. nbytes &= AES_BLOCK_SIZE - 1;
  240. err = blkcipher_walk_done(desc, &walk, nbytes);
  241. }
  242. kernel_fpu_end();
  243. return err;
  244. }
  245. static int cbc_encrypt(struct blkcipher_desc *desc,
  246. struct scatterlist *dst, struct scatterlist *src,
  247. unsigned int nbytes)
  248. {
  249. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  250. struct blkcipher_walk walk;
  251. int err;
  252. blkcipher_walk_init(&walk, dst, src, nbytes);
  253. err = blkcipher_walk_virt(desc, &walk);
  254. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  255. kernel_fpu_begin();
  256. while ((nbytes = walk.nbytes)) {
  257. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  258. nbytes & AES_BLOCK_MASK, walk.iv);
  259. nbytes &= AES_BLOCK_SIZE - 1;
  260. err = blkcipher_walk_done(desc, &walk, nbytes);
  261. }
  262. kernel_fpu_end();
  263. return err;
  264. }
  265. static int cbc_decrypt(struct blkcipher_desc *desc,
  266. struct scatterlist *dst, struct scatterlist *src,
  267. unsigned int nbytes)
  268. {
  269. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  270. struct blkcipher_walk walk;
  271. int err;
  272. blkcipher_walk_init(&walk, dst, src, nbytes);
  273. err = blkcipher_walk_virt(desc, &walk);
  274. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  275. kernel_fpu_begin();
  276. while ((nbytes = walk.nbytes)) {
  277. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  278. nbytes & AES_BLOCK_MASK, walk.iv);
  279. nbytes &= AES_BLOCK_SIZE - 1;
  280. err = blkcipher_walk_done(desc, &walk, nbytes);
  281. }
  282. kernel_fpu_end();
  283. return err;
  284. }
  285. #ifdef CONFIG_X86_64
  286. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  287. struct blkcipher_walk *walk)
  288. {
  289. u8 *ctrblk = walk->iv;
  290. u8 keystream[AES_BLOCK_SIZE];
  291. u8 *src = walk->src.virt.addr;
  292. u8 *dst = walk->dst.virt.addr;
  293. unsigned int nbytes = walk->nbytes;
  294. aesni_enc(ctx, keystream, ctrblk);
  295. crypto_xor(keystream, src, nbytes);
  296. memcpy(dst, keystream, nbytes);
  297. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  298. }
  299. static int ctr_crypt(struct blkcipher_desc *desc,
  300. struct scatterlist *dst, struct scatterlist *src,
  301. unsigned int nbytes)
  302. {
  303. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  304. struct blkcipher_walk walk;
  305. int err;
  306. blkcipher_walk_init(&walk, dst, src, nbytes);
  307. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  308. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  309. kernel_fpu_begin();
  310. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  311. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  312. nbytes & AES_BLOCK_MASK, walk.iv);
  313. nbytes &= AES_BLOCK_SIZE - 1;
  314. err = blkcipher_walk_done(desc, &walk, nbytes);
  315. }
  316. if (walk.nbytes) {
  317. ctr_crypt_final(ctx, &walk);
  318. err = blkcipher_walk_done(desc, &walk, 0);
  319. }
  320. kernel_fpu_end();
  321. return err;
  322. }
  323. #endif
  324. static int ablk_ecb_init(struct crypto_tfm *tfm)
  325. {
  326. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  327. }
  328. static int ablk_cbc_init(struct crypto_tfm *tfm)
  329. {
  330. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  331. }
  332. #ifdef CONFIG_X86_64
  333. static int ablk_ctr_init(struct crypto_tfm *tfm)
  334. {
  335. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  336. }
  337. #ifdef HAS_CTR
  338. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  339. {
  340. return ablk_init_common(tfm, "rfc3686(__driver-ctr-aes-aesni)");
  341. }
  342. #endif
  343. #endif
  344. #ifdef HAS_LRW
  345. static int ablk_lrw_init(struct crypto_tfm *tfm)
  346. {
  347. return ablk_init_common(tfm, "fpu(lrw(__driver-aes-aesni))");
  348. }
  349. #endif
  350. #ifdef HAS_PCBC
  351. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  352. {
  353. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  354. }
  355. #endif
  356. #ifdef HAS_XTS
  357. static int ablk_xts_init(struct crypto_tfm *tfm)
  358. {
  359. return ablk_init_common(tfm, "fpu(xts(__driver-aes-aesni))");
  360. }
  361. #endif
  362. #ifdef CONFIG_X86_64
  363. static int rfc4106_init(struct crypto_tfm *tfm)
  364. {
  365. struct cryptd_aead *cryptd_tfm;
  366. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  367. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  368. struct crypto_aead *cryptd_child;
  369. struct aesni_rfc4106_gcm_ctx *child_ctx;
  370. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  371. if (IS_ERR(cryptd_tfm))
  372. return PTR_ERR(cryptd_tfm);
  373. cryptd_child = cryptd_aead_child(cryptd_tfm);
  374. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  375. memcpy(child_ctx, ctx, sizeof(*ctx));
  376. ctx->cryptd_tfm = cryptd_tfm;
  377. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  378. + crypto_aead_reqsize(&cryptd_tfm->base);
  379. return 0;
  380. }
  381. static void rfc4106_exit(struct crypto_tfm *tfm)
  382. {
  383. struct aesni_rfc4106_gcm_ctx *ctx =
  384. (struct aesni_rfc4106_gcm_ctx *)
  385. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  386. if (!IS_ERR(ctx->cryptd_tfm))
  387. cryptd_free_aead(ctx->cryptd_tfm);
  388. return;
  389. }
  390. static void
  391. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  392. {
  393. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  394. if (err == -EINPROGRESS)
  395. return;
  396. result->err = err;
  397. complete(&result->completion);
  398. }
  399. static int
  400. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  401. {
  402. struct crypto_ablkcipher *ctr_tfm;
  403. struct ablkcipher_request *req;
  404. int ret = -EINVAL;
  405. struct aesni_hash_subkey_req_data *req_data;
  406. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  407. if (IS_ERR(ctr_tfm))
  408. return PTR_ERR(ctr_tfm);
  409. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  410. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  411. if (ret)
  412. goto out_free_ablkcipher;
  413. ret = -ENOMEM;
  414. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  415. if (!req)
  416. goto out_free_ablkcipher;
  417. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  418. if (!req_data)
  419. goto out_free_request;
  420. memset(req_data->iv, 0, sizeof(req_data->iv));
  421. /* Clear the data in the hash sub key container to zero.*/
  422. /* We want to cipher all zeros to create the hash sub key. */
  423. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  424. init_completion(&req_data->result.completion);
  425. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  426. ablkcipher_request_set_tfm(req, ctr_tfm);
  427. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  428. CRYPTO_TFM_REQ_MAY_BACKLOG,
  429. rfc4106_set_hash_subkey_done,
  430. &req_data->result);
  431. ablkcipher_request_set_crypt(req, &req_data->sg,
  432. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  433. ret = crypto_ablkcipher_encrypt(req);
  434. if (ret == -EINPROGRESS || ret == -EBUSY) {
  435. ret = wait_for_completion_interruptible
  436. (&req_data->result.completion);
  437. if (!ret)
  438. ret = req_data->result.err;
  439. }
  440. kfree(req_data);
  441. out_free_request:
  442. ablkcipher_request_free(req);
  443. out_free_ablkcipher:
  444. crypto_free_ablkcipher(ctr_tfm);
  445. return ret;
  446. }
  447. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  448. unsigned int key_len)
  449. {
  450. int ret = 0;
  451. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  452. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  453. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  454. struct aesni_rfc4106_gcm_ctx *child_ctx =
  455. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  456. u8 *new_key_align, *new_key_mem = NULL;
  457. if (key_len < 4) {
  458. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  459. return -EINVAL;
  460. }
  461. /*Account for 4 byte nonce at the end.*/
  462. key_len -= 4;
  463. if (key_len != AES_KEYSIZE_128) {
  464. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  465. return -EINVAL;
  466. }
  467. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  468. /*This must be on a 16 byte boundary!*/
  469. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  470. return -EINVAL;
  471. if ((unsigned long)key % AESNI_ALIGN) {
  472. /*key is not aligned: use an auxuliar aligned pointer*/
  473. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  474. if (!new_key_mem)
  475. return -ENOMEM;
  476. new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  477. memcpy(new_key_align, key, key_len);
  478. key = new_key_align;
  479. }
  480. if (!irq_fpu_usable())
  481. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  482. key, key_len);
  483. else {
  484. kernel_fpu_begin();
  485. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  486. kernel_fpu_end();
  487. }
  488. /*This must be on a 16 byte boundary!*/
  489. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  490. ret = -EINVAL;
  491. goto exit;
  492. }
  493. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  494. memcpy(child_ctx, ctx, sizeof(*ctx));
  495. exit:
  496. kfree(new_key_mem);
  497. return ret;
  498. }
  499. /* This is the Integrity Check Value (aka the authentication tag length and can
  500. * be 8, 12 or 16 bytes long. */
  501. static int rfc4106_set_authsize(struct crypto_aead *parent,
  502. unsigned int authsize)
  503. {
  504. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  505. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  506. switch (authsize) {
  507. case 8:
  508. case 12:
  509. case 16:
  510. break;
  511. default:
  512. return -EINVAL;
  513. }
  514. crypto_aead_crt(parent)->authsize = authsize;
  515. crypto_aead_crt(cryptd_child)->authsize = authsize;
  516. return 0;
  517. }
  518. static int rfc4106_encrypt(struct aead_request *req)
  519. {
  520. int ret;
  521. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  522. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  523. if (!irq_fpu_usable()) {
  524. struct aead_request *cryptd_req =
  525. (struct aead_request *) aead_request_ctx(req);
  526. memcpy(cryptd_req, req, sizeof(*req));
  527. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  528. return crypto_aead_encrypt(cryptd_req);
  529. } else {
  530. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  531. kernel_fpu_begin();
  532. ret = cryptd_child->base.crt_aead.encrypt(req);
  533. kernel_fpu_end();
  534. return ret;
  535. }
  536. }
  537. static int rfc4106_decrypt(struct aead_request *req)
  538. {
  539. int ret;
  540. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  541. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  542. if (!irq_fpu_usable()) {
  543. struct aead_request *cryptd_req =
  544. (struct aead_request *) aead_request_ctx(req);
  545. memcpy(cryptd_req, req, sizeof(*req));
  546. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  547. return crypto_aead_decrypt(cryptd_req);
  548. } else {
  549. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  550. kernel_fpu_begin();
  551. ret = cryptd_child->base.crt_aead.decrypt(req);
  552. kernel_fpu_end();
  553. return ret;
  554. }
  555. }
  556. static int __driver_rfc4106_encrypt(struct aead_request *req)
  557. {
  558. u8 one_entry_in_sg = 0;
  559. u8 *src, *dst, *assoc;
  560. __be32 counter = cpu_to_be32(1);
  561. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  562. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  563. void *aes_ctx = &(ctx->aes_key_expanded);
  564. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  565. u8 iv_tab[16+AESNI_ALIGN];
  566. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  567. struct scatter_walk src_sg_walk;
  568. struct scatter_walk assoc_sg_walk;
  569. struct scatter_walk dst_sg_walk;
  570. unsigned int i;
  571. /* Assuming we are supporting rfc4106 64-bit extended */
  572. /* sequence numbers We need to have the AAD length equal */
  573. /* to 8 or 12 bytes */
  574. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  575. return -EINVAL;
  576. /* IV below built */
  577. for (i = 0; i < 4; i++)
  578. *(iv+i) = ctx->nonce[i];
  579. for (i = 0; i < 8; i++)
  580. *(iv+4+i) = req->iv[i];
  581. *((__be32 *)(iv+12)) = counter;
  582. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  583. one_entry_in_sg = 1;
  584. scatterwalk_start(&src_sg_walk, req->src);
  585. scatterwalk_start(&assoc_sg_walk, req->assoc);
  586. src = scatterwalk_map(&src_sg_walk);
  587. assoc = scatterwalk_map(&assoc_sg_walk);
  588. dst = src;
  589. if (unlikely(req->src != req->dst)) {
  590. scatterwalk_start(&dst_sg_walk, req->dst);
  591. dst = scatterwalk_map(&dst_sg_walk);
  592. }
  593. } else {
  594. /* Allocate memory for src, dst, assoc */
  595. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  596. GFP_ATOMIC);
  597. if (unlikely(!src))
  598. return -ENOMEM;
  599. assoc = (src + req->cryptlen + auth_tag_len);
  600. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  601. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  602. req->assoclen, 0);
  603. dst = src;
  604. }
  605. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  606. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  607. + ((unsigned long)req->cryptlen), auth_tag_len);
  608. /* The authTag (aka the Integrity Check Value) needs to be written
  609. * back to the packet. */
  610. if (one_entry_in_sg) {
  611. if (unlikely(req->src != req->dst)) {
  612. scatterwalk_unmap(dst);
  613. scatterwalk_done(&dst_sg_walk, 0, 0);
  614. }
  615. scatterwalk_unmap(src);
  616. scatterwalk_unmap(assoc);
  617. scatterwalk_done(&src_sg_walk, 0, 0);
  618. scatterwalk_done(&assoc_sg_walk, 0, 0);
  619. } else {
  620. scatterwalk_map_and_copy(dst, req->dst, 0,
  621. req->cryptlen + auth_tag_len, 1);
  622. kfree(src);
  623. }
  624. return 0;
  625. }
  626. static int __driver_rfc4106_decrypt(struct aead_request *req)
  627. {
  628. u8 one_entry_in_sg = 0;
  629. u8 *src, *dst, *assoc;
  630. unsigned long tempCipherLen = 0;
  631. __be32 counter = cpu_to_be32(1);
  632. int retval = 0;
  633. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  634. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  635. void *aes_ctx = &(ctx->aes_key_expanded);
  636. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  637. u8 iv_and_authTag[32+AESNI_ALIGN];
  638. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  639. u8 *authTag = iv + 16;
  640. struct scatter_walk src_sg_walk;
  641. struct scatter_walk assoc_sg_walk;
  642. struct scatter_walk dst_sg_walk;
  643. unsigned int i;
  644. if (unlikely((req->cryptlen < auth_tag_len) ||
  645. (req->assoclen != 8 && req->assoclen != 12)))
  646. return -EINVAL;
  647. /* Assuming we are supporting rfc4106 64-bit extended */
  648. /* sequence numbers We need to have the AAD length */
  649. /* equal to 8 or 12 bytes */
  650. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  651. /* IV below built */
  652. for (i = 0; i < 4; i++)
  653. *(iv+i) = ctx->nonce[i];
  654. for (i = 0; i < 8; i++)
  655. *(iv+4+i) = req->iv[i];
  656. *((__be32 *)(iv+12)) = counter;
  657. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  658. one_entry_in_sg = 1;
  659. scatterwalk_start(&src_sg_walk, req->src);
  660. scatterwalk_start(&assoc_sg_walk, req->assoc);
  661. src = scatterwalk_map(&src_sg_walk);
  662. assoc = scatterwalk_map(&assoc_sg_walk);
  663. dst = src;
  664. if (unlikely(req->src != req->dst)) {
  665. scatterwalk_start(&dst_sg_walk, req->dst);
  666. dst = scatterwalk_map(&dst_sg_walk);
  667. }
  668. } else {
  669. /* Allocate memory for src, dst, assoc */
  670. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  671. if (!src)
  672. return -ENOMEM;
  673. assoc = (src + req->cryptlen + auth_tag_len);
  674. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  675. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  676. req->assoclen, 0);
  677. dst = src;
  678. }
  679. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  680. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  681. authTag, auth_tag_len);
  682. /* Compare generated tag with passed in tag. */
  683. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  684. -EBADMSG : 0;
  685. if (one_entry_in_sg) {
  686. if (unlikely(req->src != req->dst)) {
  687. scatterwalk_unmap(dst);
  688. scatterwalk_done(&dst_sg_walk, 0, 0);
  689. }
  690. scatterwalk_unmap(src);
  691. scatterwalk_unmap(assoc);
  692. scatterwalk_done(&src_sg_walk, 0, 0);
  693. scatterwalk_done(&assoc_sg_walk, 0, 0);
  694. } else {
  695. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  696. kfree(src);
  697. }
  698. return retval;
  699. }
  700. #endif
  701. static struct crypto_alg aesni_algs[] = { {
  702. .cra_name = "aes",
  703. .cra_driver_name = "aes-aesni",
  704. .cra_priority = 300,
  705. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  706. .cra_blocksize = AES_BLOCK_SIZE,
  707. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  708. AESNI_ALIGN - 1,
  709. .cra_alignmask = 0,
  710. .cra_module = THIS_MODULE,
  711. .cra_u = {
  712. .cipher = {
  713. .cia_min_keysize = AES_MIN_KEY_SIZE,
  714. .cia_max_keysize = AES_MAX_KEY_SIZE,
  715. .cia_setkey = aes_set_key,
  716. .cia_encrypt = aes_encrypt,
  717. .cia_decrypt = aes_decrypt
  718. }
  719. }
  720. }, {
  721. .cra_name = "__aes-aesni",
  722. .cra_driver_name = "__driver-aes-aesni",
  723. .cra_priority = 0,
  724. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  725. .cra_blocksize = AES_BLOCK_SIZE,
  726. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  727. AESNI_ALIGN - 1,
  728. .cra_alignmask = 0,
  729. .cra_module = THIS_MODULE,
  730. .cra_u = {
  731. .cipher = {
  732. .cia_min_keysize = AES_MIN_KEY_SIZE,
  733. .cia_max_keysize = AES_MAX_KEY_SIZE,
  734. .cia_setkey = aes_set_key,
  735. .cia_encrypt = __aes_encrypt,
  736. .cia_decrypt = __aes_decrypt
  737. }
  738. }
  739. }, {
  740. .cra_name = "__ecb-aes-aesni",
  741. .cra_driver_name = "__driver-ecb-aes-aesni",
  742. .cra_priority = 0,
  743. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  744. .cra_blocksize = AES_BLOCK_SIZE,
  745. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  746. AESNI_ALIGN - 1,
  747. .cra_alignmask = 0,
  748. .cra_type = &crypto_blkcipher_type,
  749. .cra_module = THIS_MODULE,
  750. .cra_u = {
  751. .blkcipher = {
  752. .min_keysize = AES_MIN_KEY_SIZE,
  753. .max_keysize = AES_MAX_KEY_SIZE,
  754. .setkey = aes_set_key,
  755. .encrypt = ecb_encrypt,
  756. .decrypt = ecb_decrypt,
  757. },
  758. },
  759. }, {
  760. .cra_name = "__cbc-aes-aesni",
  761. .cra_driver_name = "__driver-cbc-aes-aesni",
  762. .cra_priority = 0,
  763. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  764. .cra_blocksize = AES_BLOCK_SIZE,
  765. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  766. AESNI_ALIGN - 1,
  767. .cra_alignmask = 0,
  768. .cra_type = &crypto_blkcipher_type,
  769. .cra_module = THIS_MODULE,
  770. .cra_u = {
  771. .blkcipher = {
  772. .min_keysize = AES_MIN_KEY_SIZE,
  773. .max_keysize = AES_MAX_KEY_SIZE,
  774. .setkey = aes_set_key,
  775. .encrypt = cbc_encrypt,
  776. .decrypt = cbc_decrypt,
  777. },
  778. },
  779. }, {
  780. .cra_name = "ecb(aes)",
  781. .cra_driver_name = "ecb-aes-aesni",
  782. .cra_priority = 400,
  783. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  784. .cra_blocksize = AES_BLOCK_SIZE,
  785. .cra_ctxsize = sizeof(struct async_helper_ctx),
  786. .cra_alignmask = 0,
  787. .cra_type = &crypto_ablkcipher_type,
  788. .cra_module = THIS_MODULE,
  789. .cra_init = ablk_ecb_init,
  790. .cra_exit = ablk_exit,
  791. .cra_u = {
  792. .ablkcipher = {
  793. .min_keysize = AES_MIN_KEY_SIZE,
  794. .max_keysize = AES_MAX_KEY_SIZE,
  795. .setkey = ablk_set_key,
  796. .encrypt = ablk_encrypt,
  797. .decrypt = ablk_decrypt,
  798. },
  799. },
  800. }, {
  801. .cra_name = "cbc(aes)",
  802. .cra_driver_name = "cbc-aes-aesni",
  803. .cra_priority = 400,
  804. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  805. .cra_blocksize = AES_BLOCK_SIZE,
  806. .cra_ctxsize = sizeof(struct async_helper_ctx),
  807. .cra_alignmask = 0,
  808. .cra_type = &crypto_ablkcipher_type,
  809. .cra_module = THIS_MODULE,
  810. .cra_init = ablk_cbc_init,
  811. .cra_exit = ablk_exit,
  812. .cra_u = {
  813. .ablkcipher = {
  814. .min_keysize = AES_MIN_KEY_SIZE,
  815. .max_keysize = AES_MAX_KEY_SIZE,
  816. .ivsize = AES_BLOCK_SIZE,
  817. .setkey = ablk_set_key,
  818. .encrypt = ablk_encrypt,
  819. .decrypt = ablk_decrypt,
  820. },
  821. },
  822. #ifdef CONFIG_X86_64
  823. }, {
  824. .cra_name = "__ctr-aes-aesni",
  825. .cra_driver_name = "__driver-ctr-aes-aesni",
  826. .cra_priority = 0,
  827. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  828. .cra_blocksize = 1,
  829. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  830. AESNI_ALIGN - 1,
  831. .cra_alignmask = 0,
  832. .cra_type = &crypto_blkcipher_type,
  833. .cra_module = THIS_MODULE,
  834. .cra_u = {
  835. .blkcipher = {
  836. .min_keysize = AES_MIN_KEY_SIZE,
  837. .max_keysize = AES_MAX_KEY_SIZE,
  838. .ivsize = AES_BLOCK_SIZE,
  839. .setkey = aes_set_key,
  840. .encrypt = ctr_crypt,
  841. .decrypt = ctr_crypt,
  842. },
  843. },
  844. }, {
  845. .cra_name = "ctr(aes)",
  846. .cra_driver_name = "ctr-aes-aesni",
  847. .cra_priority = 400,
  848. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  849. .cra_blocksize = 1,
  850. .cra_ctxsize = sizeof(struct async_helper_ctx),
  851. .cra_alignmask = 0,
  852. .cra_type = &crypto_ablkcipher_type,
  853. .cra_module = THIS_MODULE,
  854. .cra_init = ablk_ctr_init,
  855. .cra_exit = ablk_exit,
  856. .cra_u = {
  857. .ablkcipher = {
  858. .min_keysize = AES_MIN_KEY_SIZE,
  859. .max_keysize = AES_MAX_KEY_SIZE,
  860. .ivsize = AES_BLOCK_SIZE,
  861. .setkey = ablk_set_key,
  862. .encrypt = ablk_encrypt,
  863. .decrypt = ablk_encrypt,
  864. .geniv = "chainiv",
  865. },
  866. },
  867. }, {
  868. .cra_name = "__gcm-aes-aesni",
  869. .cra_driver_name = "__driver-gcm-aes-aesni",
  870. .cra_priority = 0,
  871. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  872. .cra_blocksize = 1,
  873. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  874. AESNI_ALIGN,
  875. .cra_alignmask = 0,
  876. .cra_type = &crypto_aead_type,
  877. .cra_module = THIS_MODULE,
  878. .cra_u = {
  879. .aead = {
  880. .encrypt = __driver_rfc4106_encrypt,
  881. .decrypt = __driver_rfc4106_decrypt,
  882. },
  883. },
  884. }, {
  885. .cra_name = "rfc4106(gcm(aes))",
  886. .cra_driver_name = "rfc4106-gcm-aesni",
  887. .cra_priority = 400,
  888. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  889. .cra_blocksize = 1,
  890. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  891. AESNI_ALIGN,
  892. .cra_alignmask = 0,
  893. .cra_type = &crypto_nivaead_type,
  894. .cra_module = THIS_MODULE,
  895. .cra_init = rfc4106_init,
  896. .cra_exit = rfc4106_exit,
  897. .cra_u = {
  898. .aead = {
  899. .setkey = rfc4106_set_key,
  900. .setauthsize = rfc4106_set_authsize,
  901. .encrypt = rfc4106_encrypt,
  902. .decrypt = rfc4106_decrypt,
  903. .geniv = "seqiv",
  904. .ivsize = 8,
  905. .maxauthsize = 16,
  906. },
  907. },
  908. #ifdef HAS_CTR
  909. }, {
  910. .cra_name = "rfc3686(ctr(aes))",
  911. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  912. .cra_priority = 400,
  913. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  914. .cra_blocksize = 1,
  915. .cra_ctxsize = sizeof(struct async_helper_ctx),
  916. .cra_alignmask = 0,
  917. .cra_type = &crypto_ablkcipher_type,
  918. .cra_module = THIS_MODULE,
  919. .cra_init = ablk_rfc3686_ctr_init,
  920. .cra_exit = ablk_exit,
  921. .cra_u = {
  922. .ablkcipher = {
  923. .min_keysize = AES_MIN_KEY_SIZE +
  924. CTR_RFC3686_NONCE_SIZE,
  925. .max_keysize = AES_MAX_KEY_SIZE +
  926. CTR_RFC3686_NONCE_SIZE,
  927. .ivsize = CTR_RFC3686_IV_SIZE,
  928. .setkey = ablk_set_key,
  929. .encrypt = ablk_encrypt,
  930. .decrypt = ablk_decrypt,
  931. .geniv = "seqiv",
  932. },
  933. },
  934. #endif
  935. #endif
  936. #ifdef HAS_LRW
  937. }, {
  938. .cra_name = "lrw(aes)",
  939. .cra_driver_name = "lrw-aes-aesni",
  940. .cra_priority = 400,
  941. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  942. .cra_blocksize = AES_BLOCK_SIZE,
  943. .cra_ctxsize = sizeof(struct async_helper_ctx),
  944. .cra_alignmask = 0,
  945. .cra_type = &crypto_ablkcipher_type,
  946. .cra_module = THIS_MODULE,
  947. .cra_init = ablk_lrw_init,
  948. .cra_exit = ablk_exit,
  949. .cra_u = {
  950. .ablkcipher = {
  951. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  952. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  953. .ivsize = AES_BLOCK_SIZE,
  954. .setkey = ablk_set_key,
  955. .encrypt = ablk_encrypt,
  956. .decrypt = ablk_decrypt,
  957. },
  958. },
  959. #endif
  960. #ifdef HAS_PCBC
  961. }, {
  962. .cra_name = "pcbc(aes)",
  963. .cra_driver_name = "pcbc-aes-aesni",
  964. .cra_priority = 400,
  965. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  966. .cra_blocksize = AES_BLOCK_SIZE,
  967. .cra_ctxsize = sizeof(struct async_helper_ctx),
  968. .cra_alignmask = 0,
  969. .cra_type = &crypto_ablkcipher_type,
  970. .cra_module = THIS_MODULE,
  971. .cra_init = ablk_pcbc_init,
  972. .cra_exit = ablk_exit,
  973. .cra_u = {
  974. .ablkcipher = {
  975. .min_keysize = AES_MIN_KEY_SIZE,
  976. .max_keysize = AES_MAX_KEY_SIZE,
  977. .ivsize = AES_BLOCK_SIZE,
  978. .setkey = ablk_set_key,
  979. .encrypt = ablk_encrypt,
  980. .decrypt = ablk_decrypt,
  981. },
  982. },
  983. #endif
  984. #ifdef HAS_XTS
  985. }, {
  986. .cra_name = "xts(aes)",
  987. .cra_driver_name = "xts-aes-aesni",
  988. .cra_priority = 400,
  989. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  990. .cra_blocksize = AES_BLOCK_SIZE,
  991. .cra_ctxsize = sizeof(struct async_helper_ctx),
  992. .cra_alignmask = 0,
  993. .cra_type = &crypto_ablkcipher_type,
  994. .cra_module = THIS_MODULE,
  995. .cra_init = ablk_xts_init,
  996. .cra_exit = ablk_exit,
  997. .cra_u = {
  998. .ablkcipher = {
  999. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1000. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1001. .ivsize = AES_BLOCK_SIZE,
  1002. .setkey = ablk_set_key,
  1003. .encrypt = ablk_encrypt,
  1004. .decrypt = ablk_decrypt,
  1005. },
  1006. },
  1007. #endif
  1008. } };
  1009. static const struct x86_cpu_id aesni_cpu_id[] = {
  1010. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1011. {}
  1012. };
  1013. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1014. static int __init aesni_init(void)
  1015. {
  1016. int err, i;
  1017. if (!x86_match_cpu(aesni_cpu_id))
  1018. return -ENODEV;
  1019. err = crypto_fpu_init();
  1020. if (err)
  1021. return err;
  1022. for (i = 0; i < ARRAY_SIZE(aesni_algs); i++)
  1023. INIT_LIST_HEAD(&aesni_algs[i].cra_list);
  1024. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1025. }
  1026. static void __exit aesni_exit(void)
  1027. {
  1028. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1029. crypto_fpu_exit();
  1030. }
  1031. module_init(aesni_init);
  1032. module_exit(aesni_exit);
  1033. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1034. MODULE_LICENSE("GPL");
  1035. MODULE_ALIAS("aes");