time.c 46 KB

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  1. /*
  2. * Time of day based timer functions.
  3. *
  4. * S390 version
  5. * Copyright IBM Corp. 1999, 2008
  6. * Author(s): Hartmut Penner (hp@de.ibm.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  8. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  9. *
  10. * Derived from "arch/i386/kernel/time.c"
  11. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  12. */
  13. #define KMSG_COMPONENT "time"
  14. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  15. #include <linux/kernel_stat.h>
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/device.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <linux/kprobes.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/delay.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/vtimer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. #include "entry.h"
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace __kprobes sched_clock(void)
  59. {
  60. return (get_clock_monotonic() * 125) >> 9;
  61. }
  62. /*
  63. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  64. */
  65. unsigned long long monotonic_clock(void)
  66. {
  67. return sched_clock();
  68. }
  69. EXPORT_SYMBOL(monotonic_clock);
  70. void tod_to_timeval(__u64 todval, struct timespec *xt)
  71. {
  72. unsigned long long sec;
  73. sec = todval >> 12;
  74. do_div(sec, 1000000);
  75. xt->tv_sec = sec;
  76. todval -= (sec * 1000000) << 12;
  77. xt->tv_nsec = ((todval * 1000) >> 12);
  78. }
  79. EXPORT_SYMBOL(tod_to_timeval);
  80. void clock_comparator_work(void)
  81. {
  82. struct clock_event_device *cd;
  83. S390_lowcore.clock_comparator = -1ULL;
  84. set_clock_comparator(S390_lowcore.clock_comparator);
  85. cd = &__get_cpu_var(comparators);
  86. cd->event_handler(cd);
  87. }
  88. /*
  89. * Fixup the clock comparator.
  90. */
  91. static void fixup_clock_comparator(unsigned long long delta)
  92. {
  93. /* If nobody is waiting there's nothing to fix. */
  94. if (S390_lowcore.clock_comparator == -1ULL)
  95. return;
  96. S390_lowcore.clock_comparator += delta;
  97. set_clock_comparator(S390_lowcore.clock_comparator);
  98. }
  99. static int s390_next_ktime(ktime_t expires,
  100. struct clock_event_device *evt)
  101. {
  102. struct timespec ts;
  103. u64 nsecs;
  104. ts.tv_sec = ts.tv_nsec = 0;
  105. monotonic_to_bootbased(&ts);
  106. nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
  107. do_div(nsecs, 125);
  108. S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
  109. set_clock_comparator(S390_lowcore.clock_comparator);
  110. return 0;
  111. }
  112. static void s390_set_mode(enum clock_event_mode mode,
  113. struct clock_event_device *evt)
  114. {
  115. }
  116. /*
  117. * Set up lowcore and control register of the current cpu to
  118. * enable TOD clock and clock comparator interrupts.
  119. */
  120. void init_cpu_timer(void)
  121. {
  122. struct clock_event_device *cd;
  123. int cpu;
  124. S390_lowcore.clock_comparator = -1ULL;
  125. set_clock_comparator(S390_lowcore.clock_comparator);
  126. cpu = smp_processor_id();
  127. cd = &per_cpu(comparators, cpu);
  128. cd->name = "comparator";
  129. cd->features = CLOCK_EVT_FEAT_ONESHOT |
  130. CLOCK_EVT_FEAT_KTIME;
  131. cd->mult = 16777;
  132. cd->shift = 12;
  133. cd->min_delta_ns = 1;
  134. cd->max_delta_ns = LONG_MAX;
  135. cd->rating = 400;
  136. cd->cpumask = cpumask_of(cpu);
  137. cd->set_next_ktime = s390_next_ktime;
  138. cd->set_mode = s390_set_mode;
  139. clockevents_register_device(cd);
  140. /* Enable clock comparator timer interrupt. */
  141. __ctl_set_bit(0,11);
  142. /* Always allow the timing alert external interrupt. */
  143. __ctl_set_bit(0, 4);
  144. }
  145. static void clock_comparator_interrupt(struct ext_code ext_code,
  146. unsigned int param32,
  147. unsigned long param64)
  148. {
  149. kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
  150. if (S390_lowcore.clock_comparator == -1ULL)
  151. set_clock_comparator(S390_lowcore.clock_comparator);
  152. }
  153. static void etr_timing_alert(struct etr_irq_parm *);
  154. static void stp_timing_alert(struct stp_irq_parm *);
  155. static void timing_alert_interrupt(struct ext_code ext_code,
  156. unsigned int param32, unsigned long param64)
  157. {
  158. kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
  159. if (param32 & 0x00c40000)
  160. etr_timing_alert((struct etr_irq_parm *) &param32);
  161. if (param32 & 0x00038000)
  162. stp_timing_alert((struct stp_irq_parm *) &param32);
  163. }
  164. static void etr_reset(void);
  165. static void stp_reset(void);
  166. void read_persistent_clock(struct timespec *ts)
  167. {
  168. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  169. }
  170. void read_boot_clock(struct timespec *ts)
  171. {
  172. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  173. }
  174. static cycle_t read_tod_clock(struct clocksource *cs)
  175. {
  176. return get_clock();
  177. }
  178. static struct clocksource clocksource_tod = {
  179. .name = "tod",
  180. .rating = 400,
  181. .read = read_tod_clock,
  182. .mask = -1ULL,
  183. .mult = 1000,
  184. .shift = 12,
  185. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  186. };
  187. struct clocksource * __init clocksource_default_clock(void)
  188. {
  189. return &clocksource_tod;
  190. }
  191. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  192. struct clocksource *clock, u32 mult)
  193. {
  194. if (clock != &clocksource_tod)
  195. return;
  196. /* Make userspace gettimeofday spin until we're done. */
  197. ++vdso_data->tb_update_count;
  198. smp_wmb();
  199. vdso_data->xtime_tod_stamp = clock->cycle_last;
  200. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  201. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  202. vdso_data->wtom_clock_sec = wtm->tv_sec;
  203. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  204. vdso_data->ntp_mult = mult;
  205. smp_wmb();
  206. ++vdso_data->tb_update_count;
  207. }
  208. extern struct timezone sys_tz;
  209. void update_vsyscall_tz(void)
  210. {
  211. /* Make userspace gettimeofday spin until we're done. */
  212. ++vdso_data->tb_update_count;
  213. smp_wmb();
  214. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  215. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  216. smp_wmb();
  217. ++vdso_data->tb_update_count;
  218. }
  219. /*
  220. * Initialize the TOD clock and the CPU timer of
  221. * the boot cpu.
  222. */
  223. void __init time_init(void)
  224. {
  225. /* Reset time synchronization interfaces. */
  226. etr_reset();
  227. stp_reset();
  228. /* request the clock comparator external interrupt */
  229. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  230. panic("Couldn't request external interrupt 0x1004");
  231. /* request the timing alert external interrupt */
  232. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  233. panic("Couldn't request external interrupt 0x1406");
  234. if (clocksource_register(&clocksource_tod) != 0)
  235. panic("Could not register TOD clock source");
  236. /* Enable TOD clock interrupts on the boot cpu. */
  237. init_cpu_timer();
  238. /* Enable cpu timer interrupts on the boot cpu. */
  239. vtime_init();
  240. }
  241. /*
  242. * The time is "clock". old is what we think the time is.
  243. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  244. * "delay" is an approximation how long the synchronization took. If
  245. * the time correction is positive, then "delay" is subtracted from
  246. * the time difference and only the remaining part is passed to ntp.
  247. */
  248. static unsigned long long adjust_time(unsigned long long old,
  249. unsigned long long clock,
  250. unsigned long long delay)
  251. {
  252. unsigned long long delta, ticks;
  253. struct timex adjust;
  254. if (clock > old) {
  255. /* It is later than we thought. */
  256. delta = ticks = clock - old;
  257. delta = ticks = (delta < delay) ? 0 : delta - delay;
  258. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  259. adjust.offset = ticks * (1000000 / HZ);
  260. } else {
  261. /* It is earlier than we thought. */
  262. delta = ticks = old - clock;
  263. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  264. delta = -delta;
  265. adjust.offset = -ticks * (1000000 / HZ);
  266. }
  267. sched_clock_base_cc += delta;
  268. if (adjust.offset != 0) {
  269. pr_notice("The ETR interface has adjusted the clock "
  270. "by %li microseconds\n", adjust.offset);
  271. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  272. do_adjtimex(&adjust);
  273. }
  274. return delta;
  275. }
  276. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  277. static DEFINE_MUTEX(clock_sync_mutex);
  278. static unsigned long clock_sync_flags;
  279. #define CLOCK_SYNC_HAS_ETR 0
  280. #define CLOCK_SYNC_HAS_STP 1
  281. #define CLOCK_SYNC_ETR 2
  282. #define CLOCK_SYNC_STP 3
  283. /*
  284. * The synchronous get_clock function. It will write the current clock
  285. * value to the clock pointer and return 0 if the clock is in sync with
  286. * the external time source. If the clock mode is local it will return
  287. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  288. * reference.
  289. */
  290. int get_sync_clock(unsigned long long *clock)
  291. {
  292. atomic_t *sw_ptr;
  293. unsigned int sw0, sw1;
  294. sw_ptr = &get_cpu_var(clock_sync_word);
  295. sw0 = atomic_read(sw_ptr);
  296. *clock = get_clock();
  297. sw1 = atomic_read(sw_ptr);
  298. put_cpu_var(clock_sync_word);
  299. if (sw0 == sw1 && (sw0 & 0x80000000U))
  300. /* Success: time is in sync. */
  301. return 0;
  302. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  303. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  304. return -ENOSYS;
  305. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  306. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  307. return -EACCES;
  308. return -EAGAIN;
  309. }
  310. EXPORT_SYMBOL(get_sync_clock);
  311. /*
  312. * Make get_sync_clock return -EAGAIN.
  313. */
  314. static void disable_sync_clock(void *dummy)
  315. {
  316. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  317. /*
  318. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  319. * fail until the sync bit is turned back on. In addition
  320. * increase the "sequence" counter to avoid the race of an
  321. * etr event and the complete recovery against get_sync_clock.
  322. */
  323. atomic_clear_mask(0x80000000, sw_ptr);
  324. atomic_inc(sw_ptr);
  325. }
  326. /*
  327. * Make get_sync_clock return 0 again.
  328. * Needs to be called from a context disabled for preemption.
  329. */
  330. static void enable_sync_clock(void)
  331. {
  332. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  333. atomic_set_mask(0x80000000, sw_ptr);
  334. }
  335. /*
  336. * Function to check if the clock is in sync.
  337. */
  338. static inline int check_sync_clock(void)
  339. {
  340. atomic_t *sw_ptr;
  341. int rc;
  342. sw_ptr = &get_cpu_var(clock_sync_word);
  343. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  344. put_cpu_var(clock_sync_word);
  345. return rc;
  346. }
  347. /* Single threaded workqueue used for etr and stp sync events */
  348. static struct workqueue_struct *time_sync_wq;
  349. static void __init time_init_wq(void)
  350. {
  351. if (time_sync_wq)
  352. return;
  353. time_sync_wq = create_singlethread_workqueue("timesync");
  354. }
  355. /*
  356. * External Time Reference (ETR) code.
  357. */
  358. static int etr_port0_online;
  359. static int etr_port1_online;
  360. static int etr_steai_available;
  361. static int __init early_parse_etr(char *p)
  362. {
  363. if (strncmp(p, "off", 3) == 0)
  364. etr_port0_online = etr_port1_online = 0;
  365. else if (strncmp(p, "port0", 5) == 0)
  366. etr_port0_online = 1;
  367. else if (strncmp(p, "port1", 5) == 0)
  368. etr_port1_online = 1;
  369. else if (strncmp(p, "on", 2) == 0)
  370. etr_port0_online = etr_port1_online = 1;
  371. return 0;
  372. }
  373. early_param("etr", early_parse_etr);
  374. enum etr_event {
  375. ETR_EVENT_PORT0_CHANGE,
  376. ETR_EVENT_PORT1_CHANGE,
  377. ETR_EVENT_PORT_ALERT,
  378. ETR_EVENT_SYNC_CHECK,
  379. ETR_EVENT_SWITCH_LOCAL,
  380. ETR_EVENT_UPDATE,
  381. };
  382. /*
  383. * Valid bit combinations of the eacr register are (x = don't care):
  384. * e0 e1 dp p0 p1 ea es sl
  385. * 0 0 x 0 0 0 0 0 initial, disabled state
  386. * 0 0 x 0 1 1 0 0 port 1 online
  387. * 0 0 x 1 0 1 0 0 port 0 online
  388. * 0 0 x 1 1 1 0 0 both ports online
  389. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  390. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  391. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  392. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  393. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  394. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  395. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  396. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  397. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  398. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  399. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  400. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  401. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  402. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  403. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  404. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  405. */
  406. static struct etr_eacr etr_eacr;
  407. static u64 etr_tolec; /* time of last eacr update */
  408. static struct etr_aib etr_port0;
  409. static int etr_port0_uptodate;
  410. static struct etr_aib etr_port1;
  411. static int etr_port1_uptodate;
  412. static unsigned long etr_events;
  413. static struct timer_list etr_timer;
  414. static void etr_timeout(unsigned long dummy);
  415. static void etr_work_fn(struct work_struct *work);
  416. static DEFINE_MUTEX(etr_work_mutex);
  417. static DECLARE_WORK(etr_work, etr_work_fn);
  418. /*
  419. * Reset ETR attachment.
  420. */
  421. static void etr_reset(void)
  422. {
  423. etr_eacr = (struct etr_eacr) {
  424. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  425. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  426. .es = 0, .sl = 0 };
  427. if (etr_setr(&etr_eacr) == 0) {
  428. etr_tolec = get_clock();
  429. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  430. if (etr_port0_online && etr_port1_online)
  431. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  432. } else if (etr_port0_online || etr_port1_online) {
  433. pr_warning("The real or virtual hardware system does "
  434. "not provide an ETR interface\n");
  435. etr_port0_online = etr_port1_online = 0;
  436. }
  437. }
  438. static int __init etr_init(void)
  439. {
  440. struct etr_aib aib;
  441. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  442. return 0;
  443. time_init_wq();
  444. /* Check if this machine has the steai instruction. */
  445. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  446. etr_steai_available = 1;
  447. setup_timer(&etr_timer, etr_timeout, 0UL);
  448. if (etr_port0_online) {
  449. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  450. queue_work(time_sync_wq, &etr_work);
  451. }
  452. if (etr_port1_online) {
  453. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  454. queue_work(time_sync_wq, &etr_work);
  455. }
  456. return 0;
  457. }
  458. arch_initcall(etr_init);
  459. /*
  460. * Two sorts of ETR machine checks. The architecture reads:
  461. * "When a machine-check niterruption occurs and if a switch-to-local or
  462. * ETR-sync-check interrupt request is pending but disabled, this pending
  463. * disabled interruption request is indicated and is cleared".
  464. * Which means that we can get etr_switch_to_local events from the machine
  465. * check handler although the interruption condition is disabled. Lovely..
  466. */
  467. /*
  468. * Switch to local machine check. This is called when the last usable
  469. * ETR port goes inactive. After switch to local the clock is not in sync.
  470. */
  471. void etr_switch_to_local(void)
  472. {
  473. if (!etr_eacr.sl)
  474. return;
  475. disable_sync_clock(NULL);
  476. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  477. etr_eacr.es = etr_eacr.sl = 0;
  478. etr_setr(&etr_eacr);
  479. queue_work(time_sync_wq, &etr_work);
  480. }
  481. }
  482. /*
  483. * ETR sync check machine check. This is called when the ETR OTE and the
  484. * local clock OTE are farther apart than the ETR sync check tolerance.
  485. * After a ETR sync check the clock is not in sync. The machine check
  486. * is broadcasted to all cpus at the same time.
  487. */
  488. void etr_sync_check(void)
  489. {
  490. if (!etr_eacr.es)
  491. return;
  492. disable_sync_clock(NULL);
  493. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  494. etr_eacr.es = 0;
  495. etr_setr(&etr_eacr);
  496. queue_work(time_sync_wq, &etr_work);
  497. }
  498. }
  499. /*
  500. * ETR timing alert. There are two causes:
  501. * 1) port state change, check the usability of the port
  502. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  503. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  504. * or ETR-data word 4 (edf4) has changed.
  505. */
  506. static void etr_timing_alert(struct etr_irq_parm *intparm)
  507. {
  508. if (intparm->pc0)
  509. /* ETR port 0 state change. */
  510. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  511. if (intparm->pc1)
  512. /* ETR port 1 state change. */
  513. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  514. if (intparm->eai)
  515. /*
  516. * ETR port alert on either port 0, 1 or both.
  517. * Both ports are not up-to-date now.
  518. */
  519. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  520. queue_work(time_sync_wq, &etr_work);
  521. }
  522. static void etr_timeout(unsigned long dummy)
  523. {
  524. set_bit(ETR_EVENT_UPDATE, &etr_events);
  525. queue_work(time_sync_wq, &etr_work);
  526. }
  527. /*
  528. * Check if the etr mode is pss.
  529. */
  530. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  531. {
  532. return eacr.es && !eacr.sl;
  533. }
  534. /*
  535. * Check if the etr mode is etr.
  536. */
  537. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  538. {
  539. return eacr.es && eacr.sl;
  540. }
  541. /*
  542. * Check if the port can be used for TOD synchronization.
  543. * For PPS mode the port has to receive OTEs. For ETR mode
  544. * the port has to receive OTEs, the ETR stepping bit has to
  545. * be zero and the validity bits for data frame 1, 2, and 3
  546. * have to be 1.
  547. */
  548. static int etr_port_valid(struct etr_aib *aib, int port)
  549. {
  550. unsigned int psc;
  551. /* Check that this port is receiving OTEs. */
  552. if (aib->tsp == 0)
  553. return 0;
  554. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  555. if (psc == etr_lpsc_pps_mode)
  556. return 1;
  557. if (psc == etr_lpsc_operational_step)
  558. return !aib->esw.y && aib->slsw.v1 &&
  559. aib->slsw.v2 && aib->slsw.v3;
  560. return 0;
  561. }
  562. /*
  563. * Check if two ports are on the same network.
  564. */
  565. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  566. {
  567. // FIXME: any other fields we have to compare?
  568. return aib1->edf1.net_id == aib2->edf1.net_id;
  569. }
  570. /*
  571. * Wrapper for etr_stei that converts physical port states
  572. * to logical port states to be consistent with the output
  573. * of stetr (see etr_psc vs. etr_lpsc).
  574. */
  575. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  576. {
  577. BUG_ON(etr_steai(aib, func) != 0);
  578. /* Convert port state to logical port state. */
  579. if (aib->esw.psc0 == 1)
  580. aib->esw.psc0 = 2;
  581. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  582. aib->esw.psc0 = 1;
  583. if (aib->esw.psc1 == 1)
  584. aib->esw.psc1 = 2;
  585. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  586. aib->esw.psc1 = 1;
  587. }
  588. /*
  589. * Check if the aib a2 is still connected to the same attachment as
  590. * aib a1, the etv values differ by one and a2 is valid.
  591. */
  592. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  593. {
  594. int state_a1, state_a2;
  595. /* Paranoia check: e0/e1 should better be the same. */
  596. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  597. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  598. return 0;
  599. /* Still connected to the same etr ? */
  600. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  601. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  602. if (state_a1 == etr_lpsc_operational_step) {
  603. if (state_a2 != etr_lpsc_operational_step ||
  604. a1->edf1.net_id != a2->edf1.net_id ||
  605. a1->edf1.etr_id != a2->edf1.etr_id ||
  606. a1->edf1.etr_pn != a2->edf1.etr_pn)
  607. return 0;
  608. } else if (state_a2 != etr_lpsc_pps_mode)
  609. return 0;
  610. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  611. if (a1->edf2.etv + 1 != a2->edf2.etv)
  612. return 0;
  613. if (!etr_port_valid(a2, p))
  614. return 0;
  615. return 1;
  616. }
  617. struct clock_sync_data {
  618. atomic_t cpus;
  619. int in_sync;
  620. unsigned long long fixup_cc;
  621. int etr_port;
  622. struct etr_aib *etr_aib;
  623. };
  624. static void clock_sync_cpu(struct clock_sync_data *sync)
  625. {
  626. atomic_dec(&sync->cpus);
  627. enable_sync_clock();
  628. /*
  629. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  630. * is called on all other cpus while the TOD clocks is stopped.
  631. * __udelay will stop the cpu on an enabled wait psw until the
  632. * TOD is running again.
  633. */
  634. while (sync->in_sync == 0) {
  635. __udelay(1);
  636. /*
  637. * A different cpu changes *in_sync. Therefore use
  638. * barrier() to force memory access.
  639. */
  640. barrier();
  641. }
  642. if (sync->in_sync != 1)
  643. /* Didn't work. Clear per-cpu in sync bit again. */
  644. disable_sync_clock(NULL);
  645. /*
  646. * This round of TOD syncing is done. Set the clock comparator
  647. * to the next tick and let the processor continue.
  648. */
  649. fixup_clock_comparator(sync->fixup_cc);
  650. }
  651. /*
  652. * Sync the TOD clock using the port referred to by aibp. This port
  653. * has to be enabled and the other port has to be disabled. The
  654. * last eacr update has to be more than 1.6 seconds in the past.
  655. */
  656. static int etr_sync_clock(void *data)
  657. {
  658. static int first;
  659. unsigned long long clock, old_clock, delay, delta;
  660. struct clock_sync_data *etr_sync;
  661. struct etr_aib *sync_port, *aib;
  662. int port;
  663. int rc;
  664. etr_sync = data;
  665. if (xchg(&first, 1) == 1) {
  666. /* Slave */
  667. clock_sync_cpu(etr_sync);
  668. return 0;
  669. }
  670. /* Wait until all other cpus entered the sync function. */
  671. while (atomic_read(&etr_sync->cpus) != 0)
  672. cpu_relax();
  673. port = etr_sync->etr_port;
  674. aib = etr_sync->etr_aib;
  675. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  676. enable_sync_clock();
  677. /* Set clock to next OTE. */
  678. __ctl_set_bit(14, 21);
  679. __ctl_set_bit(0, 29);
  680. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  681. old_clock = get_clock();
  682. if (set_clock(clock) == 0) {
  683. __udelay(1); /* Wait for the clock to start. */
  684. __ctl_clear_bit(0, 29);
  685. __ctl_clear_bit(14, 21);
  686. etr_stetr(aib);
  687. /* Adjust Linux timing variables. */
  688. delay = (unsigned long long)
  689. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  690. delta = adjust_time(old_clock, clock, delay);
  691. etr_sync->fixup_cc = delta;
  692. fixup_clock_comparator(delta);
  693. /* Verify that the clock is properly set. */
  694. if (!etr_aib_follows(sync_port, aib, port)) {
  695. /* Didn't work. */
  696. disable_sync_clock(NULL);
  697. etr_sync->in_sync = -EAGAIN;
  698. rc = -EAGAIN;
  699. } else {
  700. etr_sync->in_sync = 1;
  701. rc = 0;
  702. }
  703. } else {
  704. /* Could not set the clock ?!? */
  705. __ctl_clear_bit(0, 29);
  706. __ctl_clear_bit(14, 21);
  707. disable_sync_clock(NULL);
  708. etr_sync->in_sync = -EAGAIN;
  709. rc = -EAGAIN;
  710. }
  711. xchg(&first, 0);
  712. return rc;
  713. }
  714. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  715. {
  716. struct clock_sync_data etr_sync;
  717. struct etr_aib *sync_port;
  718. int follows;
  719. int rc;
  720. /* Check if the current aib is adjacent to the sync port aib. */
  721. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  722. follows = etr_aib_follows(sync_port, aib, port);
  723. memcpy(sync_port, aib, sizeof(*aib));
  724. if (!follows)
  725. return -EAGAIN;
  726. memset(&etr_sync, 0, sizeof(etr_sync));
  727. etr_sync.etr_aib = aib;
  728. etr_sync.etr_port = port;
  729. get_online_cpus();
  730. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  731. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  732. put_online_cpus();
  733. return rc;
  734. }
  735. /*
  736. * Handle the immediate effects of the different events.
  737. * The port change event is used for online/offline changes.
  738. */
  739. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  740. {
  741. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  742. eacr.es = 0;
  743. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  744. eacr.es = eacr.sl = 0;
  745. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  746. etr_port0_uptodate = etr_port1_uptodate = 0;
  747. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  748. if (eacr.e0)
  749. /*
  750. * Port change of an enabled port. We have to
  751. * assume that this can have caused an stepping
  752. * port switch.
  753. */
  754. etr_tolec = get_clock();
  755. eacr.p0 = etr_port0_online;
  756. if (!eacr.p0)
  757. eacr.e0 = 0;
  758. etr_port0_uptodate = 0;
  759. }
  760. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  761. if (eacr.e1)
  762. /*
  763. * Port change of an enabled port. We have to
  764. * assume that this can have caused an stepping
  765. * port switch.
  766. */
  767. etr_tolec = get_clock();
  768. eacr.p1 = etr_port1_online;
  769. if (!eacr.p1)
  770. eacr.e1 = 0;
  771. etr_port1_uptodate = 0;
  772. }
  773. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  774. return eacr;
  775. }
  776. /*
  777. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  778. * one of the ports needs an update.
  779. */
  780. static void etr_set_tolec_timeout(unsigned long long now)
  781. {
  782. unsigned long micros;
  783. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  784. (!etr_eacr.p1 || etr_port1_uptodate))
  785. return;
  786. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  787. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  788. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  789. }
  790. /*
  791. * Set up a time that expires after 1/2 second.
  792. */
  793. static void etr_set_sync_timeout(void)
  794. {
  795. mod_timer(&etr_timer, jiffies + HZ/2);
  796. }
  797. /*
  798. * Update the aib information for one or both ports.
  799. */
  800. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  801. struct etr_eacr eacr)
  802. {
  803. /* With both ports disabled the aib information is useless. */
  804. if (!eacr.e0 && !eacr.e1)
  805. return eacr;
  806. /* Update port0 or port1 with aib stored in etr_work_fn. */
  807. if (aib->esw.q == 0) {
  808. /* Information for port 0 stored. */
  809. if (eacr.p0 && !etr_port0_uptodate) {
  810. etr_port0 = *aib;
  811. if (etr_port0_online)
  812. etr_port0_uptodate = 1;
  813. }
  814. } else {
  815. /* Information for port 1 stored. */
  816. if (eacr.p1 && !etr_port1_uptodate) {
  817. etr_port1 = *aib;
  818. if (etr_port0_online)
  819. etr_port1_uptodate = 1;
  820. }
  821. }
  822. /*
  823. * Do not try to get the alternate port aib if the clock
  824. * is not in sync yet.
  825. */
  826. if (!eacr.es || !check_sync_clock())
  827. return eacr;
  828. /*
  829. * If steai is available we can get the information about
  830. * the other port immediately. If only stetr is available the
  831. * data-port bit toggle has to be used.
  832. */
  833. if (etr_steai_available) {
  834. if (eacr.p0 && !etr_port0_uptodate) {
  835. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  836. etr_port0_uptodate = 1;
  837. }
  838. if (eacr.p1 && !etr_port1_uptodate) {
  839. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  840. etr_port1_uptodate = 1;
  841. }
  842. } else {
  843. /*
  844. * One port was updated above, if the other
  845. * port is not uptodate toggle dp bit.
  846. */
  847. if ((eacr.p0 && !etr_port0_uptodate) ||
  848. (eacr.p1 && !etr_port1_uptodate))
  849. eacr.dp ^= 1;
  850. else
  851. eacr.dp = 0;
  852. }
  853. return eacr;
  854. }
  855. /*
  856. * Write new etr control register if it differs from the current one.
  857. * Return 1 if etr_tolec has been updated as well.
  858. */
  859. static void etr_update_eacr(struct etr_eacr eacr)
  860. {
  861. int dp_changed;
  862. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  863. /* No change, return. */
  864. return;
  865. /*
  866. * The disable of an active port of the change of the data port
  867. * bit can/will cause a change in the data port.
  868. */
  869. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  870. (etr_eacr.dp ^ eacr.dp) != 0;
  871. etr_eacr = eacr;
  872. etr_setr(&etr_eacr);
  873. if (dp_changed)
  874. etr_tolec = get_clock();
  875. }
  876. /*
  877. * ETR work. In this function you'll find the main logic. In
  878. * particular this is the only function that calls etr_update_eacr(),
  879. * it "controls" the etr control register.
  880. */
  881. static void etr_work_fn(struct work_struct *work)
  882. {
  883. unsigned long long now;
  884. struct etr_eacr eacr;
  885. struct etr_aib aib;
  886. int sync_port;
  887. /* prevent multiple execution. */
  888. mutex_lock(&etr_work_mutex);
  889. /* Create working copy of etr_eacr. */
  890. eacr = etr_eacr;
  891. /* Check for the different events and their immediate effects. */
  892. eacr = etr_handle_events(eacr);
  893. /* Check if ETR is supposed to be active. */
  894. eacr.ea = eacr.p0 || eacr.p1;
  895. if (!eacr.ea) {
  896. /* Both ports offline. Reset everything. */
  897. eacr.dp = eacr.es = eacr.sl = 0;
  898. on_each_cpu(disable_sync_clock, NULL, 1);
  899. del_timer_sync(&etr_timer);
  900. etr_update_eacr(eacr);
  901. goto out_unlock;
  902. }
  903. /* Store aib to get the current ETR status word. */
  904. BUG_ON(etr_stetr(&aib) != 0);
  905. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  906. now = get_clock();
  907. /*
  908. * Update the port information if the last stepping port change
  909. * or data port change is older than 1.6 seconds.
  910. */
  911. if (now >= etr_tolec + (1600000 << 12))
  912. eacr = etr_handle_update(&aib, eacr);
  913. /*
  914. * Select ports to enable. The preferred synchronization mode is PPS.
  915. * If a port can be enabled depends on a number of things:
  916. * 1) The port needs to be online and uptodate. A port is not
  917. * disabled just because it is not uptodate, but it is only
  918. * enabled if it is uptodate.
  919. * 2) The port needs to have the same mode (pps / etr).
  920. * 3) The port needs to be usable -> etr_port_valid() == 1
  921. * 4) To enable the second port the clock needs to be in sync.
  922. * 5) If both ports are useable and are ETR ports, the network id
  923. * has to be the same.
  924. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  925. */
  926. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  927. eacr.sl = 0;
  928. eacr.e0 = 1;
  929. if (!etr_mode_is_pps(etr_eacr))
  930. eacr.es = 0;
  931. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  932. eacr.e1 = 0;
  933. // FIXME: uptodate checks ?
  934. else if (etr_port0_uptodate && etr_port1_uptodate)
  935. eacr.e1 = 1;
  936. sync_port = (etr_port0_uptodate &&
  937. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  938. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  939. eacr.sl = 0;
  940. eacr.e0 = 0;
  941. eacr.e1 = 1;
  942. if (!etr_mode_is_pps(etr_eacr))
  943. eacr.es = 0;
  944. sync_port = (etr_port1_uptodate &&
  945. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  946. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  947. eacr.sl = 1;
  948. eacr.e0 = 1;
  949. if (!etr_mode_is_etr(etr_eacr))
  950. eacr.es = 0;
  951. if (!eacr.es || !eacr.p1 ||
  952. aib.esw.psc1 != etr_lpsc_operational_alt)
  953. eacr.e1 = 0;
  954. else if (etr_port0_uptodate && etr_port1_uptodate &&
  955. etr_compare_network(&etr_port0, &etr_port1))
  956. eacr.e1 = 1;
  957. sync_port = (etr_port0_uptodate &&
  958. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  959. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  960. eacr.sl = 1;
  961. eacr.e0 = 0;
  962. eacr.e1 = 1;
  963. if (!etr_mode_is_etr(etr_eacr))
  964. eacr.es = 0;
  965. sync_port = (etr_port1_uptodate &&
  966. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  967. } else {
  968. /* Both ports not usable. */
  969. eacr.es = eacr.sl = 0;
  970. sync_port = -1;
  971. }
  972. /*
  973. * If the clock is in sync just update the eacr and return.
  974. * If there is no valid sync port wait for a port update.
  975. */
  976. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  977. etr_update_eacr(eacr);
  978. etr_set_tolec_timeout(now);
  979. goto out_unlock;
  980. }
  981. /*
  982. * Prepare control register for clock syncing
  983. * (reset data port bit, set sync check control.
  984. */
  985. eacr.dp = 0;
  986. eacr.es = 1;
  987. /*
  988. * Update eacr and try to synchronize the clock. If the update
  989. * of eacr caused a stepping port switch (or if we have to
  990. * assume that a stepping port switch has occurred) or the
  991. * clock syncing failed, reset the sync check control bit
  992. * and set up a timer to try again after 0.5 seconds
  993. */
  994. etr_update_eacr(eacr);
  995. if (now < etr_tolec + (1600000 << 12) ||
  996. etr_sync_clock_stop(&aib, sync_port) != 0) {
  997. /* Sync failed. Try again in 1/2 second. */
  998. eacr.es = 0;
  999. etr_update_eacr(eacr);
  1000. etr_set_sync_timeout();
  1001. } else
  1002. etr_set_tolec_timeout(now);
  1003. out_unlock:
  1004. mutex_unlock(&etr_work_mutex);
  1005. }
  1006. /*
  1007. * Sysfs interface functions
  1008. */
  1009. static struct bus_type etr_subsys = {
  1010. .name = "etr",
  1011. .dev_name = "etr",
  1012. };
  1013. static struct device etr_port0_dev = {
  1014. .id = 0,
  1015. .bus = &etr_subsys,
  1016. };
  1017. static struct device etr_port1_dev = {
  1018. .id = 1,
  1019. .bus = &etr_subsys,
  1020. };
  1021. /*
  1022. * ETR subsys attributes
  1023. */
  1024. static ssize_t etr_stepping_port_show(struct device *dev,
  1025. struct device_attribute *attr,
  1026. char *buf)
  1027. {
  1028. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1029. }
  1030. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1031. static ssize_t etr_stepping_mode_show(struct device *dev,
  1032. struct device_attribute *attr,
  1033. char *buf)
  1034. {
  1035. char *mode_str;
  1036. if (etr_mode_is_pps(etr_eacr))
  1037. mode_str = "pps";
  1038. else if (etr_mode_is_etr(etr_eacr))
  1039. mode_str = "etr";
  1040. else
  1041. mode_str = "local";
  1042. return sprintf(buf, "%s\n", mode_str);
  1043. }
  1044. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1045. /*
  1046. * ETR port attributes
  1047. */
  1048. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1049. {
  1050. if (dev == &etr_port0_dev)
  1051. return etr_port0_online ? &etr_port0 : NULL;
  1052. else
  1053. return etr_port1_online ? &etr_port1 : NULL;
  1054. }
  1055. static ssize_t etr_online_show(struct device *dev,
  1056. struct device_attribute *attr,
  1057. char *buf)
  1058. {
  1059. unsigned int online;
  1060. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1061. return sprintf(buf, "%i\n", online);
  1062. }
  1063. static ssize_t etr_online_store(struct device *dev,
  1064. struct device_attribute *attr,
  1065. const char *buf, size_t count)
  1066. {
  1067. unsigned int value;
  1068. value = simple_strtoul(buf, NULL, 0);
  1069. if (value != 0 && value != 1)
  1070. return -EINVAL;
  1071. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1072. return -EOPNOTSUPP;
  1073. mutex_lock(&clock_sync_mutex);
  1074. if (dev == &etr_port0_dev) {
  1075. if (etr_port0_online == value)
  1076. goto out; /* Nothing to do. */
  1077. etr_port0_online = value;
  1078. if (etr_port0_online && etr_port1_online)
  1079. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1080. else
  1081. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1082. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1083. queue_work(time_sync_wq, &etr_work);
  1084. } else {
  1085. if (etr_port1_online == value)
  1086. goto out; /* Nothing to do. */
  1087. etr_port1_online = value;
  1088. if (etr_port0_online && etr_port1_online)
  1089. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1090. else
  1091. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1092. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1093. queue_work(time_sync_wq, &etr_work);
  1094. }
  1095. out:
  1096. mutex_unlock(&clock_sync_mutex);
  1097. return count;
  1098. }
  1099. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1100. static ssize_t etr_stepping_control_show(struct device *dev,
  1101. struct device_attribute *attr,
  1102. char *buf)
  1103. {
  1104. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1105. etr_eacr.e0 : etr_eacr.e1);
  1106. }
  1107. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1108. static ssize_t etr_mode_code_show(struct device *dev,
  1109. struct device_attribute *attr, char *buf)
  1110. {
  1111. if (!etr_port0_online && !etr_port1_online)
  1112. /* Status word is not uptodate if both ports are offline. */
  1113. return -ENODATA;
  1114. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1115. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1116. }
  1117. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1118. static ssize_t etr_untuned_show(struct device *dev,
  1119. struct device_attribute *attr, char *buf)
  1120. {
  1121. struct etr_aib *aib = etr_aib_from_dev(dev);
  1122. if (!aib || !aib->slsw.v1)
  1123. return -ENODATA;
  1124. return sprintf(buf, "%i\n", aib->edf1.u);
  1125. }
  1126. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1127. static ssize_t etr_network_id_show(struct device *dev,
  1128. struct device_attribute *attr, char *buf)
  1129. {
  1130. struct etr_aib *aib = etr_aib_from_dev(dev);
  1131. if (!aib || !aib->slsw.v1)
  1132. return -ENODATA;
  1133. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1134. }
  1135. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1136. static ssize_t etr_id_show(struct device *dev,
  1137. struct device_attribute *attr, char *buf)
  1138. {
  1139. struct etr_aib *aib = etr_aib_from_dev(dev);
  1140. if (!aib || !aib->slsw.v1)
  1141. return -ENODATA;
  1142. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1143. }
  1144. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1145. static ssize_t etr_port_number_show(struct device *dev,
  1146. struct device_attribute *attr, char *buf)
  1147. {
  1148. struct etr_aib *aib = etr_aib_from_dev(dev);
  1149. if (!aib || !aib->slsw.v1)
  1150. return -ENODATA;
  1151. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1152. }
  1153. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1154. static ssize_t etr_coupled_show(struct device *dev,
  1155. struct device_attribute *attr, char *buf)
  1156. {
  1157. struct etr_aib *aib = etr_aib_from_dev(dev);
  1158. if (!aib || !aib->slsw.v3)
  1159. return -ENODATA;
  1160. return sprintf(buf, "%i\n", aib->edf3.c);
  1161. }
  1162. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1163. static ssize_t etr_local_time_show(struct device *dev,
  1164. struct device_attribute *attr, char *buf)
  1165. {
  1166. struct etr_aib *aib = etr_aib_from_dev(dev);
  1167. if (!aib || !aib->slsw.v3)
  1168. return -ENODATA;
  1169. return sprintf(buf, "%i\n", aib->edf3.blto);
  1170. }
  1171. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1172. static ssize_t etr_utc_offset_show(struct device *dev,
  1173. struct device_attribute *attr, char *buf)
  1174. {
  1175. struct etr_aib *aib = etr_aib_from_dev(dev);
  1176. if (!aib || !aib->slsw.v3)
  1177. return -ENODATA;
  1178. return sprintf(buf, "%i\n", aib->edf3.buo);
  1179. }
  1180. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1181. static struct device_attribute *etr_port_attributes[] = {
  1182. &dev_attr_online,
  1183. &dev_attr_stepping_control,
  1184. &dev_attr_state_code,
  1185. &dev_attr_untuned,
  1186. &dev_attr_network,
  1187. &dev_attr_id,
  1188. &dev_attr_port,
  1189. &dev_attr_coupled,
  1190. &dev_attr_local_time,
  1191. &dev_attr_utc_offset,
  1192. NULL
  1193. };
  1194. static int __init etr_register_port(struct device *dev)
  1195. {
  1196. struct device_attribute **attr;
  1197. int rc;
  1198. rc = device_register(dev);
  1199. if (rc)
  1200. goto out;
  1201. for (attr = etr_port_attributes; *attr; attr++) {
  1202. rc = device_create_file(dev, *attr);
  1203. if (rc)
  1204. goto out_unreg;
  1205. }
  1206. return 0;
  1207. out_unreg:
  1208. for (; attr >= etr_port_attributes; attr--)
  1209. device_remove_file(dev, *attr);
  1210. device_unregister(dev);
  1211. out:
  1212. return rc;
  1213. }
  1214. static void __init etr_unregister_port(struct device *dev)
  1215. {
  1216. struct device_attribute **attr;
  1217. for (attr = etr_port_attributes; *attr; attr++)
  1218. device_remove_file(dev, *attr);
  1219. device_unregister(dev);
  1220. }
  1221. static int __init etr_init_sysfs(void)
  1222. {
  1223. int rc;
  1224. rc = subsys_system_register(&etr_subsys, NULL);
  1225. if (rc)
  1226. goto out;
  1227. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1228. if (rc)
  1229. goto out_unreg_subsys;
  1230. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1231. if (rc)
  1232. goto out_remove_stepping_port;
  1233. rc = etr_register_port(&etr_port0_dev);
  1234. if (rc)
  1235. goto out_remove_stepping_mode;
  1236. rc = etr_register_port(&etr_port1_dev);
  1237. if (rc)
  1238. goto out_remove_port0;
  1239. return 0;
  1240. out_remove_port0:
  1241. etr_unregister_port(&etr_port0_dev);
  1242. out_remove_stepping_mode:
  1243. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1244. out_remove_stepping_port:
  1245. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1246. out_unreg_subsys:
  1247. bus_unregister(&etr_subsys);
  1248. out:
  1249. return rc;
  1250. }
  1251. device_initcall(etr_init_sysfs);
  1252. /*
  1253. * Server Time Protocol (STP) code.
  1254. */
  1255. static int stp_online;
  1256. static struct stp_sstpi stp_info;
  1257. static void *stp_page;
  1258. static void stp_work_fn(struct work_struct *work);
  1259. static DEFINE_MUTEX(stp_work_mutex);
  1260. static DECLARE_WORK(stp_work, stp_work_fn);
  1261. static struct timer_list stp_timer;
  1262. static int __init early_parse_stp(char *p)
  1263. {
  1264. if (strncmp(p, "off", 3) == 0)
  1265. stp_online = 0;
  1266. else if (strncmp(p, "on", 2) == 0)
  1267. stp_online = 1;
  1268. return 0;
  1269. }
  1270. early_param("stp", early_parse_stp);
  1271. /*
  1272. * Reset STP attachment.
  1273. */
  1274. static void __init stp_reset(void)
  1275. {
  1276. int rc;
  1277. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1278. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1279. if (rc == 0)
  1280. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1281. else if (stp_online) {
  1282. pr_warning("The real or virtual hardware system does "
  1283. "not provide an STP interface\n");
  1284. free_page((unsigned long) stp_page);
  1285. stp_page = NULL;
  1286. stp_online = 0;
  1287. }
  1288. }
  1289. static void stp_timeout(unsigned long dummy)
  1290. {
  1291. queue_work(time_sync_wq, &stp_work);
  1292. }
  1293. static int __init stp_init(void)
  1294. {
  1295. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1296. return 0;
  1297. setup_timer(&stp_timer, stp_timeout, 0UL);
  1298. time_init_wq();
  1299. if (!stp_online)
  1300. return 0;
  1301. queue_work(time_sync_wq, &stp_work);
  1302. return 0;
  1303. }
  1304. arch_initcall(stp_init);
  1305. /*
  1306. * STP timing alert. There are three causes:
  1307. * 1) timing status change
  1308. * 2) link availability change
  1309. * 3) time control parameter change
  1310. * In all three cases we are only interested in the clock source state.
  1311. * If a STP clock source is now available use it.
  1312. */
  1313. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1314. {
  1315. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1316. queue_work(time_sync_wq, &stp_work);
  1317. }
  1318. /*
  1319. * STP sync check machine check. This is called when the timing state
  1320. * changes from the synchronized state to the unsynchronized state.
  1321. * After a STP sync check the clock is not in sync. The machine check
  1322. * is broadcasted to all cpus at the same time.
  1323. */
  1324. void stp_sync_check(void)
  1325. {
  1326. disable_sync_clock(NULL);
  1327. queue_work(time_sync_wq, &stp_work);
  1328. }
  1329. /*
  1330. * STP island condition machine check. This is called when an attached
  1331. * server attempts to communicate over an STP link and the servers
  1332. * have matching CTN ids and have a valid stratum-1 configuration
  1333. * but the configurations do not match.
  1334. */
  1335. void stp_island_check(void)
  1336. {
  1337. disable_sync_clock(NULL);
  1338. queue_work(time_sync_wq, &stp_work);
  1339. }
  1340. static int stp_sync_clock(void *data)
  1341. {
  1342. static int first;
  1343. unsigned long long old_clock, delta;
  1344. struct clock_sync_data *stp_sync;
  1345. int rc;
  1346. stp_sync = data;
  1347. if (xchg(&first, 1) == 1) {
  1348. /* Slave */
  1349. clock_sync_cpu(stp_sync);
  1350. return 0;
  1351. }
  1352. /* Wait until all other cpus entered the sync function. */
  1353. while (atomic_read(&stp_sync->cpus) != 0)
  1354. cpu_relax();
  1355. enable_sync_clock();
  1356. rc = 0;
  1357. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1358. stp_info.todoff[2] || stp_info.todoff[3] ||
  1359. stp_info.tmd != 2) {
  1360. old_clock = get_clock();
  1361. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1362. if (rc == 0) {
  1363. delta = adjust_time(old_clock, get_clock(), 0);
  1364. fixup_clock_comparator(delta);
  1365. rc = chsc_sstpi(stp_page, &stp_info,
  1366. sizeof(struct stp_sstpi));
  1367. if (rc == 0 && stp_info.tmd != 2)
  1368. rc = -EAGAIN;
  1369. }
  1370. }
  1371. if (rc) {
  1372. disable_sync_clock(NULL);
  1373. stp_sync->in_sync = -EAGAIN;
  1374. } else
  1375. stp_sync->in_sync = 1;
  1376. xchg(&first, 0);
  1377. return 0;
  1378. }
  1379. /*
  1380. * STP work. Check for the STP state and take over the clock
  1381. * synchronization if the STP clock source is usable.
  1382. */
  1383. static void stp_work_fn(struct work_struct *work)
  1384. {
  1385. struct clock_sync_data stp_sync;
  1386. int rc;
  1387. /* prevent multiple execution. */
  1388. mutex_lock(&stp_work_mutex);
  1389. if (!stp_online) {
  1390. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1391. del_timer_sync(&stp_timer);
  1392. goto out_unlock;
  1393. }
  1394. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1395. if (rc)
  1396. goto out_unlock;
  1397. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1398. if (rc || stp_info.c == 0)
  1399. goto out_unlock;
  1400. /* Skip synchronization if the clock is already in sync. */
  1401. if (check_sync_clock())
  1402. goto out_unlock;
  1403. memset(&stp_sync, 0, sizeof(stp_sync));
  1404. get_online_cpus();
  1405. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1406. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1407. put_online_cpus();
  1408. if (!check_sync_clock())
  1409. /*
  1410. * There is a usable clock but the synchonization failed.
  1411. * Retry after a second.
  1412. */
  1413. mod_timer(&stp_timer, jiffies + HZ);
  1414. out_unlock:
  1415. mutex_unlock(&stp_work_mutex);
  1416. }
  1417. /*
  1418. * STP subsys sysfs interface functions
  1419. */
  1420. static struct bus_type stp_subsys = {
  1421. .name = "stp",
  1422. .dev_name = "stp",
  1423. };
  1424. static ssize_t stp_ctn_id_show(struct device *dev,
  1425. struct device_attribute *attr,
  1426. char *buf)
  1427. {
  1428. if (!stp_online)
  1429. return -ENODATA;
  1430. return sprintf(buf, "%016llx\n",
  1431. *(unsigned long long *) stp_info.ctnid);
  1432. }
  1433. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1434. static ssize_t stp_ctn_type_show(struct device *dev,
  1435. struct device_attribute *attr,
  1436. char *buf)
  1437. {
  1438. if (!stp_online)
  1439. return -ENODATA;
  1440. return sprintf(buf, "%i\n", stp_info.ctn);
  1441. }
  1442. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1443. static ssize_t stp_dst_offset_show(struct device *dev,
  1444. struct device_attribute *attr,
  1445. char *buf)
  1446. {
  1447. if (!stp_online || !(stp_info.vbits & 0x2000))
  1448. return -ENODATA;
  1449. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1450. }
  1451. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1452. static ssize_t stp_leap_seconds_show(struct device *dev,
  1453. struct device_attribute *attr,
  1454. char *buf)
  1455. {
  1456. if (!stp_online || !(stp_info.vbits & 0x8000))
  1457. return -ENODATA;
  1458. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1459. }
  1460. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1461. static ssize_t stp_stratum_show(struct device *dev,
  1462. struct device_attribute *attr,
  1463. char *buf)
  1464. {
  1465. if (!stp_online)
  1466. return -ENODATA;
  1467. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1468. }
  1469. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1470. static ssize_t stp_time_offset_show(struct device *dev,
  1471. struct device_attribute *attr,
  1472. char *buf)
  1473. {
  1474. if (!stp_online || !(stp_info.vbits & 0x0800))
  1475. return -ENODATA;
  1476. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1477. }
  1478. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1479. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1480. struct device_attribute *attr,
  1481. char *buf)
  1482. {
  1483. if (!stp_online || !(stp_info.vbits & 0x4000))
  1484. return -ENODATA;
  1485. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1486. }
  1487. static DEVICE_ATTR(time_zone_offset, 0400,
  1488. stp_time_zone_offset_show, NULL);
  1489. static ssize_t stp_timing_mode_show(struct device *dev,
  1490. struct device_attribute *attr,
  1491. char *buf)
  1492. {
  1493. if (!stp_online)
  1494. return -ENODATA;
  1495. return sprintf(buf, "%i\n", stp_info.tmd);
  1496. }
  1497. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1498. static ssize_t stp_timing_state_show(struct device *dev,
  1499. struct device_attribute *attr,
  1500. char *buf)
  1501. {
  1502. if (!stp_online)
  1503. return -ENODATA;
  1504. return sprintf(buf, "%i\n", stp_info.tst);
  1505. }
  1506. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1507. static ssize_t stp_online_show(struct device *dev,
  1508. struct device_attribute *attr,
  1509. char *buf)
  1510. {
  1511. return sprintf(buf, "%i\n", stp_online);
  1512. }
  1513. static ssize_t stp_online_store(struct device *dev,
  1514. struct device_attribute *attr,
  1515. const char *buf, size_t count)
  1516. {
  1517. unsigned int value;
  1518. value = simple_strtoul(buf, NULL, 0);
  1519. if (value != 0 && value != 1)
  1520. return -EINVAL;
  1521. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1522. return -EOPNOTSUPP;
  1523. mutex_lock(&clock_sync_mutex);
  1524. stp_online = value;
  1525. if (stp_online)
  1526. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1527. else
  1528. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1529. queue_work(time_sync_wq, &stp_work);
  1530. mutex_unlock(&clock_sync_mutex);
  1531. return count;
  1532. }
  1533. /*
  1534. * Can't use DEVICE_ATTR because the attribute should be named
  1535. * stp/online but dev_attr_online already exists in this file ..
  1536. */
  1537. static struct device_attribute dev_attr_stp_online = {
  1538. .attr = { .name = "online", .mode = 0600 },
  1539. .show = stp_online_show,
  1540. .store = stp_online_store,
  1541. };
  1542. static struct device_attribute *stp_attributes[] = {
  1543. &dev_attr_ctn_id,
  1544. &dev_attr_ctn_type,
  1545. &dev_attr_dst_offset,
  1546. &dev_attr_leap_seconds,
  1547. &dev_attr_stp_online,
  1548. &dev_attr_stratum,
  1549. &dev_attr_time_offset,
  1550. &dev_attr_time_zone_offset,
  1551. &dev_attr_timing_mode,
  1552. &dev_attr_timing_state,
  1553. NULL
  1554. };
  1555. static int __init stp_init_sysfs(void)
  1556. {
  1557. struct device_attribute **attr;
  1558. int rc;
  1559. rc = subsys_system_register(&stp_subsys, NULL);
  1560. if (rc)
  1561. goto out;
  1562. for (attr = stp_attributes; *attr; attr++) {
  1563. rc = device_create_file(stp_subsys.dev_root, *attr);
  1564. if (rc)
  1565. goto out_unreg;
  1566. }
  1567. return 0;
  1568. out_unreg:
  1569. for (; attr >= stp_attributes; attr--)
  1570. device_remove_file(stp_subsys.dev_root, *attr);
  1571. bus_unregister(&stp_subsys);
  1572. out:
  1573. return rc;
  1574. }
  1575. device_initcall(stp_init_sysfs);